2 * "High Precision Event Timer" based timekeeping.
4 * Copyright (c) 1991,1992,1995 Linus Torvalds
5 * Copyright (c) 1994 Alan Modra
6 * Copyright (c) 1995 Markus Kuhn
7 * Copyright (c) 1996 Ingo Molnar
8 * Copyright (c) 1998 Andrea Arcangeli
9 * Copyright (c) 2002,2006 Vojtech Pavlik
10 * Copyright (c) 2003 Andi Kleen
11 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
14 #include <linux/clockchips.h>
15 #include <linux/init.h>
16 #include <linux/interrupt.h>
17 #include <linux/module.h>
18 #include <linux/time.h>
19 #include <linux/mca.h>
20 #include <linux/nmi.h>
22 #include <asm/i8253.h>
24 #include <asm/vgtod.h>
26 #include <asm/timer.h>
28 volatile unsigned long __jiffies __section_jiffies
= INITIAL_JIFFIES
;
30 unsigned long profile_pc(struct pt_regs
*regs
)
32 unsigned long pc
= instruction_pointer(regs
);
34 /* Assume the lock function has either no stack frame or a copy
36 Eflags always has bits 22 and up cleared unlike kernel addresses. */
37 if (!user_mode_vm(regs
) && in_lock_functions(pc
)) {
38 #ifdef CONFIG_FRAME_POINTER
39 return *(unsigned long *)(regs
->bp
+ sizeof(long));
41 unsigned long *sp
= (unsigned long *)regs
->sp
;
50 EXPORT_SYMBOL(profile_pc
);
52 static irqreturn_t
timer_interrupt(int irq
, void *dev_id
)
54 inc_irq_stat(irq0_irqs
);
56 global_clock_event
->event_handler(global_clock_event
);
60 u8 irq_v
= inb_p(0x61); /* read the current state */
61 outb_p(irq_v
|0x80, 0x61); /* reset the IRQ */
68 /* calibrate_cpu is used on systems with fixed rate TSCs to determine
69 * processor frequency */
70 #define TICK_COUNT 100000000
71 unsigned long __init
calibrate_cpu(void)
73 int tsc_start
, tsc_now
;
75 unsigned long evntsel3
= 0, pmc3
= 0, pmc_now
= 0;
78 for (i
= 0; i
< 4; i
++)
79 if (avail_to_resrv_perfctr_nmi_bit(i
))
81 no_ctr_free
= (i
== 4);
83 WARN(1, KERN_WARNING
"Warning: AMD perfctrs busy ... "
84 "cpu_khz value may be incorrect.\n");
86 rdmsrl(MSR_K7_EVNTSEL3
, evntsel3
);
87 wrmsrl(MSR_K7_EVNTSEL3
, 0);
88 rdmsrl(MSR_K7_PERFCTR3
, pmc3
);
90 reserve_perfctr_nmi(MSR_K7_PERFCTR0
+ i
);
91 reserve_evntsel_nmi(MSR_K7_EVNTSEL0
+ i
);
93 local_irq_save(flags
);
94 /* start measuring cycles, incrementing from 0 */
95 wrmsrl(MSR_K7_PERFCTR0
+ i
, 0);
96 wrmsrl(MSR_K7_EVNTSEL0
+ i
, 1 << 22 | 3 << 16 | 0x76);
99 rdmsrl(MSR_K7_PERFCTR0
+ i
, pmc_now
);
100 tsc_now
= get_cycles();
101 } while ((tsc_now
- tsc_start
) < TICK_COUNT
);
103 local_irq_restore(flags
);
105 wrmsrl(MSR_K7_EVNTSEL3
, 0);
106 wrmsrl(MSR_K7_PERFCTR3
, pmc3
);
107 wrmsrl(MSR_K7_EVNTSEL3
, evntsel3
);
109 release_perfctr_nmi(MSR_K7_PERFCTR0
+ i
);
110 release_evntsel_nmi(MSR_K7_EVNTSEL0
+ i
);
113 return pmc_now
* tsc_khz
/ (tsc_now
- tsc_start
);
116 static struct irqaction irq0
= {
117 .handler
= timer_interrupt
,
118 .flags
= IRQF_DISABLED
| IRQF_IRQPOLL
| IRQF_NOBALANCING
| IRQF_TIMER
,
119 .mask
= CPU_MASK_NONE
,
123 void __init
hpet_time_init(void)
128 irq0
.mask
= cpumask_of_cpu(0);
132 void __init
time_init(void)
136 late_time_init
= choose_time_init();