arch/blackfin/mach-bf533/boards/H8606.c

   1 /*
   2  * File:         arch/blackfin/mach-bf533/H8606.c
   3  * Based on:     arch/blackfin/mach-bf533/stamp.c
   4  * Author:       Javier Herrero <jherrero@hvsistemas.es>
   5  *
   6  * Created:      2007
   7  * Description:  Board Info File for the HV Sistemas H8606 board
   8  *
   9  * Modified:
  10  *               Copyright 2005 National ICT Australia (NICTA)
  11  *               Copyright 2004-2006 Analog Devices Inc
  12  *               Copyright 2007 HV Sistemas S.L.
  13  *
  14  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2 of the License, or
  19  * (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, see the file COPYING, or write
  28  * to the Free Software Foundation, Inc.,
  29  * 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  30  */
  31
  32 #include <linux/device.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/mtd/mtd.h>
  35 #include <linux/mtd/partitions.h>
  36 #include <linux/spi/spi.h>
  37 #include <linux/spi/flash.h>
  38 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  39 #include <linux/usb/isp1362.h>
  40 #endif
  41 #include <linux/irq.h>
  42
  43 #include <asm/dma.h>
  44 #include <asm/bfin5xx_spi.h>
  45 #include <asm/reboot.h>
  46 #include <asm/portmux.h>
  47
  48 /*
  49  * Name the Board for the /proc/cpuinfo
  50  */
  51 const char bfin_board_name[] = "HV Sistemas H8606";
  52
  53 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  54 static struct platform_device rtc_device = {
  55         .name = "rtc-bfin",
  56         .id   = -1,
  57 };
  58 #endif
  59
  60 /*
  61 *  Driver needs to know address, irq and flag pin.
  62  */
  63  #if    defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  64 static struct resource dm9000_resources[] = {
  65         [0] = {
  66                 .start  = 0x20300000,
  67                 .end    = 0x20300000 + 1,
  68                 .flags  = IORESOURCE_MEM,
  69         },
  70         [1] = {
  71                 .start  = 0x20300000 + 4,
  72                 .end    = 0x20300000 + 5,
  73                 .flags  = IORESOURCE_MEM,
  74         },
  75         [2] = {
  76                 .start  = IRQ_PF10,
  77                 .end    = IRQ_PF10,
  78                 .flags  = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
  79         },
  80 };
  81
  82 static struct platform_device dm9000_device = {
  83     .id                 = 0,
  84     .name               = "dm9000",
  85     .resource           = dm9000_resources,
  86     .num_resources      = ARRAY_SIZE(dm9000_resources),
  87 };
  88 #endif
  89
  90 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  91 static struct resource smc91x_resources[] = {
  92         {
  93                 .name = "smc91x-regs",
  94                 .start = 0x20300300,
  95                 .end = 0x20300300 + 16,
  96                 .flags = IORESOURCE_MEM,
  97         }, {
  98                 .start = IRQ_PROG_INTB,
  99                 .end = IRQ_PROG_INTB,
 100                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 101         }, {
 102                 .start = IRQ_PF7,
 103                 .end = IRQ_PF7,
 104                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 105         },
 106 };
 107
 108 static struct platform_device smc91x_device = {
 109         .name = "smc91x",
 110         .id = 0,
 111         .num_resources = ARRAY_SIZE(smc91x_resources),
 112         .resource = smc91x_resources,
 113 };
 114 #endif
 115
 116 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 117 static struct resource net2272_bfin_resources[] = {
 118         {
 119                 .start = 0x20300000,
 120                 .end = 0x20300000 + 0x100,
 121                 .flags = IORESOURCE_MEM,
 122         }, {
 123                 .start = IRQ_PF10,
 124                 .end = IRQ_PF10,
 125                 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 126         },
 127 };
 128
 129 static struct platform_device net2272_bfin_device = {
 130         .name = "net2272",
 131         .id = -1,
 132         .num_resources = ARRAY_SIZE(net2272_bfin_resources),
 133         .resource = net2272_bfin_resources,
 134 };
 135 #endif
 136
 137 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 138 /* all SPI peripherals info goes here */
 139
 140 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 141 static struct mtd_partition bfin_spi_flash_partitions[] = {
 142         {
 143                 .name = "bootloader(spi)",
 144                 .size = 0x00060000,
 145                 .offset = 0,
 146                 .mask_flags = MTD_CAP_ROM
 147         }, {
 148                 .name = "linux kernel(spi)",
 149                 .size = 0x100000,
 150                 .offset = 0x60000
 151         }, {
 152                 .name = "file system(spi)",
 153                 .size = 0x6a0000,
 154                 .offset = 0x00160000,
 155         }
 156 };
 157
 158 static struct flash_platform_data bfin_spi_flash_data = {
 159         .name = "m25p80",
 160         .parts = bfin_spi_flash_partitions,
 161         .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 162         .type = "m25p64",
 163 };
 164
 165 /* SPI flash chip (m25p64) */
 166 static struct bfin5xx_spi_chip spi_flash_chip_info = {
 167         .enable_dma = 0,         /* use dma transfer with this chip*/
 168         .bits_per_word = 8,
 169 };
 170 #endif
 171
 172 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 173 /* SPI ADC chip */
 174 static struct bfin5xx_spi_chip spi_adc_chip_info = {
 175         .ctl_reg = 0x1000,
 176         .enable_dma = 1,         /* use dma transfer with this chip*/
 177         .bits_per_word = 16,
 178 };
 179 #endif
 180
 181 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 182 static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
 183         .ctl_reg = 0x1000,
 184         .enable_dma = 0,
 185         .bits_per_word = 16,
 186 };
 187 #endif
 188
 189 #if defined(CONFIG_PBX)
 190 static struct bfin5xx_spi_chip spi_si3xxx_chip_info = {
 191         .ctl_reg        = 0x1c04,
 192         .enable_dma     = 0,
 193         .bits_per_word  = 8,
 194         .cs_change_per_word = 1,
 195 };
 196 #endif
 197
 198 /* Notice: for blackfin, the speed_hz is the value of register
 199  * SPI_BAUD, not the real baudrate */
 200 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 201 #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
 202         {
 203                 /* the modalias must be the same as spi device driver name */
 204                 .modalias = "m25p80", /* Name of spi_driver for this device */
 205                 /* this value is the baudrate divisor */
 206                 .max_speed_hz = 50000000, /* actual baudrate is SCLK/(2xspeed_hz) */
 207                 .bus_num = 0, /* Framework bus number */
 208                 .chip_select = 2, /* Framework chip select. On STAMP537 it is SPISSEL2*/
 209                 .platform_data = &bfin_spi_flash_data,
 210                 .controller_data = &spi_flash_chip_info,
 211                 .mode = SPI_MODE_3,
 212         },
 213 #endif
 214
 215 #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
 216         {
 217                 .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
 218                 .max_speed_hz = 4,     /* actual baudrate is SCLK/(2xspeed_hz) */
 219                 .bus_num = 1, /* Framework bus number */
 220                 .chip_select = 1, /* Framework chip select. */
 221                 .platform_data = NULL, /* No spi_driver specific config */
 222                 .controller_data = &spi_adc_chip_info,
 223         },
 224 #endif
 225
 226 #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
 227         {
 228                 .modalias = "ad1836-spi",
 229                 .max_speed_hz = 16,
 230                 .bus_num = 1,
 231                 .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
 232                 .controller_data = &ad1836_spi_chip_info,
 233         },
 234 #endif
 235
 236 #if defined(CONFIG_PBX)
 237         {
 238                 .modalias        = "fxs-spi",
 239                 .max_speed_hz    = 4,
 240                 .bus_num         = 1,
 241                 .chip_select     = 3,
 242                 .controller_data = &spi_si3xxx_chip_info,
 243         },
 244
 245         {
 246                 .modalias        = "fxo-spi",
 247                 .max_speed_hz    = 4,
 248                 .bus_num         = 1,
 249                 .chip_select     = 2,
 250                 .controller_data = &spi_si3xxx_chip_info,
 251         },
 252 #endif
 253 };
 254
 255 /* SPI (0) */
 256 static struct resource bfin_spi0_resource[] = {
 257         [0] = {
 258                 .start = SPI0_REGBASE,
 259                 .end   = SPI0_REGBASE + 0xFF,
 260                 .flags = IORESOURCE_MEM,
 261         },
 262         [1] = {
 263                 .start = CH_SPI,
 264                 .end   = CH_SPI,
 265                 .flags = IORESOURCE_IRQ,
 266         }
 267 };
 268
 269
 270 /* SPI controller data */
 271 static struct bfin5xx_spi_master bfin_spi0_info = {
 272         .num_chipselect = 8,
 273         .enable_dma = 1,  /* master has the ability to do dma transfer */
 274         .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 275 };
 276
 277 static struct platform_device bfin_spi0_device = {
 278         .name = "bfin-spi",
 279         .id = 0, /* Bus number */
 280         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 281         .resource = bfin_spi0_resource,
 282         .dev = {
 283                 .platform_data = &bfin_spi0_info, /* Passed to driver */
 284         },
 285 };
 286 #endif  /* spi master and devices */
 287
 288 #if defined(CONFIG_FB_BF537_LQ035) || defined(CONFIG_FB_BF537_LQ035_MODULE)
 289 static struct platform_device bfin_fb_device = {
 290         .name = "bf537-fb",
 291 };
 292 #endif
 293
 294 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 295 static struct resource bfin_uart_resources[] = {
 296         {
 297                 .start = 0xFFC00400,
 298                 .end = 0xFFC004FF,
 299                 .flags = IORESOURCE_MEM,
 300         },
 301 };
 302
 303 static struct platform_device bfin_uart_device = {
 304         .name = "bfin-uart",
 305         .id = 1,
 306         .num_resources = ARRAY_SIZE(bfin_uart_resources),
 307         .resource = bfin_uart_resources,
 308 };
 309 #endif
 310
 311 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 312 static struct resource bfin_sir_resources[] = {
 313 #ifdef CONFIG_BFIN_SIR0
 314         {
 315                 .start = 0xFFC00400,
 316                 .end = 0xFFC004FF,
 317                 .flags = IORESOURCE_MEM,
 318         },
 319 #endif
 320 };
 321
 322 static struct platform_device bfin_sir_device = {
 323         .name = "bfin_sir",
 324         .id = 0,
 325         .num_resources = ARRAY_SIZE(bfin_sir_resources),
 326         .resource = bfin_sir_resources,
 327 };
 328 #endif
 329
 330 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 331
 332 #include <linux/serial_8250.h>
 333 #include <linux/serial.h>
 334
 335 /*
 336  * Configuration for two 16550 UARTS in FPGA at addresses 0x20200000 and 0x202000010.
 337  * running at half system clock, both with interrupt output or-ed to PF8. Change to
 338  * suit different FPGA configuration, or to suit real 16550 UARTS connected to the bus
 339  */
 340
 341 static struct plat_serial8250_port serial8250_platform_data [] = {
 342         {
 343                 .membase = 0x20200000,
 344                 .mapbase = 0x20200000,
 345                 .irq = IRQ_PF8,
 346                 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
 347                 .iotype = UPIO_MEM,
 348                 .regshift = 1,
 349                 .uartclk = 66666667,
 350         }, {
 351                 .membase = 0x20200010,
 352                 .mapbase = 0x20200010,
 353                 .irq = IRQ_PF8,
 354                 .flags = UPF_BOOT_AUTOCONF | UART_CONFIG_TYPE,
 355                 .iotype = UPIO_MEM,
 356                 .regshift = 1,
 357                 .uartclk = 66666667,
 358         }, {
 359         }
 360 };
 361
 362 static struct platform_device serial8250_device = {
 363         .id             = PLAT8250_DEV_PLATFORM,
 364         .name           = "serial8250",
 365         .dev            = {
 366                 .platform_data = serial8250_platform_data,
 367         },
 368 };
 369
 370 #endif
 371
 372 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
 373
 374 /*
 375  * Configuration for one OpenCores keyboard controller in FPGA at address 0x20200030,
 376  * interrupt output wired to PF9. Change to suit different FPGA configuration
 377  */
 378
 379 static struct resource opencores_kbd_resources[] = {
 380         [0] = {
 381                 .start  = 0x20200030,
 382                 .end    = 0x20300030 + 2,
 383                 .flags  = IORESOURCE_MEM,
 384         },
 385         [1] = {
 386                 .start  = IRQ_PF9,
 387                 .end    = IRQ_PF9,
 388                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 389         },
 390 };
 391
 392 static struct platform_device opencores_kbd_device = {
 393         .id             = -1,
 394         .name           = "opencores-kbd",
 395         .resource       = opencores_kbd_resources,
 396         .num_resources  = ARRAY_SIZE(opencores_kbd_resources),
 397 };
 398 #endif
 399
 400 static struct platform_device *h8606_devices[] __initdata = {
 401 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 402         &rtc_device,
 403 #endif
 404
 405 #if     defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
 406         &dm9000_device,
 407 #endif
 408
 409 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 410         &smc91x_device,
 411 #endif
 412
 413 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
 414         &net2272_bfin_device,
 415 #endif
 416
 417 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 418         &bfin_spi0_device,
 419 #endif
 420
 421 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 422         &bfin_uart_device,
 423 #endif
 424
 425 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 426         &serial8250_device,
 427 #endif
 428
 429 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 430         &bfin_sir_device,
 431 #endif
 432
 433 #if defined(CONFIG_KEYBOARD_OPENCORES) || defined(CONFIG_KEYBOARD_OPENCORES_MODULE)
 434         &opencores_kbd_device,
 435 #endif
 436 };
 437
 438 static int __init H8606_init(void)
 439 {
 440         printk(KERN_INFO "HV Sistemas H8606 board support by http://www.hvsistemas.com\n");
 441         printk(KERN_INFO "%s(): registering device resources\n", __func__);
 442         platform_add_devices(h8606_devices, ARRAY_SIZE(h8606_devices));
 443 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 444         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 445 #endif
 446         return 0;
 447 }
 448
 449 arch_initcall(H8606_init);