arch/mips/kernel/mips-cpc.c

   1 /*
   2  * Copyright (C) 2013 Imagination Technologies
   3  * Author: Paul Burton <paul.burton@imgtec.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation;  either version 2 of the  License, or (at your
   8  * option) any later version.
   9  */
  10
  11 #include <linux/errno.h>
  12
  13 #include <asm/mips-cm.h>
  14 #include <asm/mips-cpc.h>
  15
  16 void __iomem *mips_cpc_base;
  17
  18 phys_t __weak mips_cpc_phys_base(void)
  19 {
  20         u32 cpc_base;
  21
  22         if (!mips_cm_present())
  23                 return 0;
  24
  25         if (!(read_gcr_cpc_status() & CM_GCR_CPC_STATUS_EX_MSK))
  26                 return 0;
  27
  28         /* If the CPC is already enabled, leave it so */
  29         cpc_base = read_gcr_cpc_base();
  30         if (cpc_base & CM_GCR_CPC_BASE_CPCEN_MSK)
  31                 return cpc_base & CM_GCR_CPC_BASE_CPCBASE_MSK;
  32
  33         /* Otherwise, give it the default address & enable it */
  34         cpc_base = mips_cpc_default_phys_base();
  35         write_gcr_cpc_base(cpc_base | CM_GCR_CPC_BASE_CPCEN_MSK);
  36         return cpc_base;
  37 }
  38
  39 int mips_cpc_probe(void)
  40 {
  41         phys_t addr;
  42
  43         addr = mips_cpc_phys_base();
  44         if (!addr)
  45                 return -ENODEV;
  46
  47         mips_cpc_base = ioremap_nocache(addr, 0x8000);
  48         if (!mips_cpc_base)
  49                 return -ENXIO;
  50
  51         return 0;
  52 }