1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 1994 Linus Torvalds
5 * Cyrix stuff, June 1998 by:
6 * - Rafael R. Reilova (moved everything from head.S),
7 * <rreilova@ececs.uc.edu>
8 * - Channing Corn (tests & fixes),
9 * - Andrew D. Balsa (code cleanup).
11 #include <linux/init.h>
12 #include <linux/utsname.h>
13 #include <linux/cpu.h>
14 #include <linux/module.h>
16 #include <asm/nospec-branch.h>
17 #include <asm/cmdline.h>
19 #include <asm/processor.h>
20 #include <asm/processor-flags.h>
21 #include <asm/fpu/internal.h>
23 #include <asm/paravirt.h>
24 #include <asm/alternative.h>
25 #include <asm/pgtable.h>
26 #include <asm/set_memory.h>
27 #include <asm/intel-family.h>
29 static void __init
spectre_v2_select_mitigation(void);
31 void __init
check_bugs(void)
35 if (!IS_ENABLED(CONFIG_SMP
)) {
37 print_cpu_info(&boot_cpu_data
);
40 /* Select the proper spectre mitigation before patching alternatives */
41 spectre_v2_select_mitigation();
45 * Check whether we are able to run this kernel safely on SMP.
47 * - i386 is no longer supported.
48 * - In order to run on anything without a TSC, we need to be
49 * compiled for a i486.
51 if (boot_cpu_data
.x86
< 4)
52 panic("Kernel requires i486+ for 'invlpg' and other features");
54 init_utsname()->machine
[1] =
55 '0' + (boot_cpu_data
.x86
> 6 ? 6 : boot_cpu_data
.x86
);
56 alternative_instructions();
58 fpu__init_check_bugs();
59 #else /* CONFIG_X86_64 */
60 alternative_instructions();
63 * Make sure the first 2MB area is not mapped by huge pages
64 * There are typically fixed size MTRRs in there and overlapping
65 * MTRRs into large pages causes slow downs.
67 * Right now we don't do that with gbpages because there seems
68 * very little benefit for that case.
71 set_memory_4k((unsigned long)__va(0), 1);
75 /* The kernel command line selection */
76 enum spectre_v2_mitigation_cmd
{
80 SPECTRE_V2_CMD_RETPOLINE
,
81 SPECTRE_V2_CMD_RETPOLINE_GENERIC
,
82 SPECTRE_V2_CMD_RETPOLINE_AMD
,
85 static const char *spectre_v2_strings
[] = {
86 [SPECTRE_V2_NONE
] = "Vulnerable",
87 [SPECTRE_V2_RETPOLINE_MINIMAL
] = "Vulnerable: Minimal generic ASM retpoline",
88 [SPECTRE_V2_RETPOLINE_MINIMAL_AMD
] = "Vulnerable: Minimal AMD ASM retpoline",
89 [SPECTRE_V2_RETPOLINE_GENERIC
] = "Mitigation: Full generic retpoline",
90 [SPECTRE_V2_RETPOLINE_AMD
] = "Mitigation: Full AMD retpoline",
94 #define pr_fmt(fmt) "Spectre V2 : " fmt
96 static enum spectre_v2_mitigation spectre_v2_enabled
= SPECTRE_V2_NONE
;
99 static bool spectre_v2_bad_module
;
101 bool retpoline_module_ok(bool has_retpoline
)
103 if (spectre_v2_enabled
== SPECTRE_V2_NONE
|| has_retpoline
)
106 pr_err("System may be vulnerable to spectre v2\n");
107 spectre_v2_bad_module
= true;
111 static inline const char *spectre_v2_module_string(void)
113 return spectre_v2_bad_module
? " - vulnerable module loaded" : "";
116 static inline const char *spectre_v2_module_string(void) { return ""; }
119 static void __init
spec2_print_if_insecure(const char *reason
)
121 if (boot_cpu_has_bug(X86_BUG_SPECTRE_V2
))
122 pr_info("%s selected on command line.\n", reason
);
125 static void __init
spec2_print_if_secure(const char *reason
)
127 if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2
))
128 pr_info("%s selected on command line.\n", reason
);
131 static inline bool retp_compiler(void)
133 return __is_defined(RETPOLINE
);
136 static inline bool match_option(const char *arg
, int arglen
, const char *opt
)
138 int len
= strlen(opt
);
140 return len
== arglen
&& !strncmp(arg
, opt
, len
);
143 static const struct {
145 enum spectre_v2_mitigation_cmd cmd
;
147 } mitigation_options
[] = {
148 { "off", SPECTRE_V2_CMD_NONE
, false },
149 { "on", SPECTRE_V2_CMD_FORCE
, true },
150 { "retpoline", SPECTRE_V2_CMD_RETPOLINE
, false },
151 { "retpoline,amd", SPECTRE_V2_CMD_RETPOLINE_AMD
, false },
152 { "retpoline,generic", SPECTRE_V2_CMD_RETPOLINE_GENERIC
, false },
153 { "auto", SPECTRE_V2_CMD_AUTO
, false },
156 static enum spectre_v2_mitigation_cmd __init
spectre_v2_parse_cmdline(void)
160 enum spectre_v2_mitigation_cmd cmd
= SPECTRE_V2_CMD_AUTO
;
162 if (cmdline_find_option_bool(boot_command_line
, "nospectre_v2"))
163 return SPECTRE_V2_CMD_NONE
;
165 ret
= cmdline_find_option(boot_command_line
, "spectre_v2", arg
,
168 return SPECTRE_V2_CMD_AUTO
;
170 for (i
= 0; i
< ARRAY_SIZE(mitigation_options
); i
++) {
171 if (!match_option(arg
, ret
, mitigation_options
[i
].option
))
173 cmd
= mitigation_options
[i
].cmd
;
177 if (i
>= ARRAY_SIZE(mitigation_options
)) {
178 pr_err("unknown option (%s). Switching to AUTO select\n",
179 mitigation_options
[i
].option
);
180 return SPECTRE_V2_CMD_AUTO
;
184 if ((cmd
== SPECTRE_V2_CMD_RETPOLINE
||
185 cmd
== SPECTRE_V2_CMD_RETPOLINE_AMD
||
186 cmd
== SPECTRE_V2_CMD_RETPOLINE_GENERIC
) &&
187 !IS_ENABLED(CONFIG_RETPOLINE
)) {
188 pr_err("%s selected but not compiled in. Switching to AUTO select\n",
189 mitigation_options
[i
].option
);
190 return SPECTRE_V2_CMD_AUTO
;
193 if (cmd
== SPECTRE_V2_CMD_RETPOLINE_AMD
&&
194 boot_cpu_data
.x86_vendor
!= X86_VENDOR_AMD
) {
195 pr_err("retpoline,amd selected but CPU is not AMD. Switching to AUTO select\n");
196 return SPECTRE_V2_CMD_AUTO
;
199 if (mitigation_options
[i
].secure
)
200 spec2_print_if_secure(mitigation_options
[i
].option
);
202 spec2_print_if_insecure(mitigation_options
[i
].option
);
207 /* Check for Skylake-like CPUs (for RSB handling) */
208 static bool __init
is_skylake_era(void)
210 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_INTEL
&&
211 boot_cpu_data
.x86
== 6) {
212 switch (boot_cpu_data
.x86_model
) {
213 case INTEL_FAM6_SKYLAKE_MOBILE
:
214 case INTEL_FAM6_SKYLAKE_DESKTOP
:
215 case INTEL_FAM6_SKYLAKE_X
:
216 case INTEL_FAM6_KABYLAKE_MOBILE
:
217 case INTEL_FAM6_KABYLAKE_DESKTOP
:
224 static void __init
spectre_v2_select_mitigation(void)
226 enum spectre_v2_mitigation_cmd cmd
= spectre_v2_parse_cmdline();
227 enum spectre_v2_mitigation mode
= SPECTRE_V2_NONE
;
230 * If the CPU is not affected and the command line mode is NONE or AUTO
231 * then nothing to do.
233 if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2
) &&
234 (cmd
== SPECTRE_V2_CMD_NONE
|| cmd
== SPECTRE_V2_CMD_AUTO
))
238 case SPECTRE_V2_CMD_NONE
:
241 case SPECTRE_V2_CMD_FORCE
:
242 case SPECTRE_V2_CMD_AUTO
:
243 if (IS_ENABLED(CONFIG_RETPOLINE
))
246 case SPECTRE_V2_CMD_RETPOLINE_AMD
:
247 if (IS_ENABLED(CONFIG_RETPOLINE
))
250 case SPECTRE_V2_CMD_RETPOLINE_GENERIC
:
251 if (IS_ENABLED(CONFIG_RETPOLINE
))
252 goto retpoline_generic
;
254 case SPECTRE_V2_CMD_RETPOLINE
:
255 if (IS_ENABLED(CONFIG_RETPOLINE
))
259 pr_err("kernel not compiled with retpoline; no mitigation available!");
263 if (boot_cpu_data
.x86_vendor
== X86_VENDOR_AMD
) {
265 if (!boot_cpu_has(X86_FEATURE_LFENCE_RDTSC
)) {
266 pr_err("LFENCE not serializing. Switching to generic retpoline\n");
267 goto retpoline_generic
;
269 mode
= retp_compiler() ? SPECTRE_V2_RETPOLINE_AMD
:
270 SPECTRE_V2_RETPOLINE_MINIMAL_AMD
;
271 setup_force_cpu_cap(X86_FEATURE_RETPOLINE_AMD
);
272 setup_force_cpu_cap(X86_FEATURE_RETPOLINE
);
275 mode
= retp_compiler() ? SPECTRE_V2_RETPOLINE_GENERIC
:
276 SPECTRE_V2_RETPOLINE_MINIMAL
;
277 setup_force_cpu_cap(X86_FEATURE_RETPOLINE
);
280 spectre_v2_enabled
= mode
;
281 pr_info("%s\n", spectre_v2_strings
[mode
]);
284 * If neither SMEP or KPTI are available, there is a risk of
285 * hitting userspace addresses in the RSB after a context switch
286 * from a shallow call stack to a deeper one. To prevent this fill
287 * the entire RSB, even when using IBRS.
289 * Skylake era CPUs have a separate issue with *underflow* of the
290 * RSB, when they will predict 'ret' targets from the generic BTB.
291 * The proper mitigation for this is IBRS. If IBRS is not supported
292 * or deactivated in favour of retpolines the RSB fill on context
293 * switch is required.
295 if ((!boot_cpu_has(X86_FEATURE_PTI
) &&
296 !boot_cpu_has(X86_FEATURE_SMEP
)) || is_skylake_era()) {
297 setup_force_cpu_cap(X86_FEATURE_RSB_CTXSW
);
298 pr_info("Filling RSB on context switch\n");
301 /* Initialize Indirect Branch Prediction Barrier if supported */
302 if (boot_cpu_has(X86_FEATURE_IBPB
)) {
303 setup_force_cpu_cap(X86_FEATURE_USE_IBPB
);
304 pr_info("Enabling Indirect Branch Prediction Barrier\n");
311 ssize_t
cpu_show_meltdown(struct device
*dev
,
312 struct device_attribute
*attr
, char *buf
)
314 if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN
))
315 return sprintf(buf
, "Not affected\n");
316 if (boot_cpu_has(X86_FEATURE_PTI
))
317 return sprintf(buf
, "Mitigation: PTI\n");
318 return sprintf(buf
, "Vulnerable\n");
321 ssize_t
cpu_show_spectre_v1(struct device
*dev
,
322 struct device_attribute
*attr
, char *buf
)
324 if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V1
))
325 return sprintf(buf
, "Not affected\n");
326 return sprintf(buf
, "Mitigation: __user pointer sanitization\n");
329 ssize_t
cpu_show_spectre_v2(struct device
*dev
,
330 struct device_attribute
*attr
, char *buf
)
332 if (!boot_cpu_has_bug(X86_BUG_SPECTRE_V2
))
333 return sprintf(buf
, "Not affected\n");
335 return sprintf(buf
, "%s%s%s\n", spectre_v2_strings
[spectre_v2_enabled
],
336 boot_cpu_has(X86_FEATURE_USE_IBPB
) ? ", IBPB" : "",
337 spectre_v2_module_string());
341 void __ibp_barrier(void)
343 __wrmsr(MSR_IA32_PRED_CMD
, PRED_CMD_IBPB
, 0);
345 EXPORT_SYMBOL_GPL(__ibp_barrier
);