drivers/gpu/drm/radeon/radeon_ttm.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <ttm/ttm_bo_api.h>
  33 #include <ttm/ttm_bo_driver.h>
  34 #include <ttm/ttm_placement.h>
  35 #include <ttm/ttm_module.h>
  36 #include <ttm/ttm_page_alloc.h>
  37 #include <drm/drmP.h>
  38 #include <drm/radeon_drm.h>
  39 #include <linux/seq_file.h>
  40 #include <linux/slab.h>
  41 #include "radeon_reg.h"
  42 #include "radeon.h"
  43
  44 #define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
  45
  46 static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
  47
  48 static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
  49 {
  50         struct radeon_mman *mman;
  51         struct radeon_device *rdev;
  52
  53         mman = container_of(bdev, struct radeon_mman, bdev);
  54         rdev = container_of(mman, struct radeon_device, mman);
  55         return rdev;
  56 }
  57
  58
  59 /*
  60  * Global memory.
  61  */
  62 static int radeon_ttm_mem_global_init(struct drm_global_reference *ref)
  63 {
  64         return ttm_mem_global_init(ref->object);
  65 }
  66
  67 static void radeon_ttm_mem_global_release(struct drm_global_reference *ref)
  68 {
  69         ttm_mem_global_release(ref->object);
  70 }
  71
  72 static int radeon_ttm_global_init(struct radeon_device *rdev)
  73 {
  74         struct drm_global_reference *global_ref;
  75         int r;
  76
  77         rdev->mman.mem_global_referenced = false;
  78         global_ref = &rdev->mman.mem_global_ref;
  79         global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  80         global_ref->size = sizeof(struct ttm_mem_global);
  81         global_ref->init = &radeon_ttm_mem_global_init;
  82         global_ref->release = &radeon_ttm_mem_global_release;
  83         r = drm_global_item_ref(global_ref);
  84         if (r != 0) {
  85                 DRM_ERROR("Failed setting up TTM memory accounting "
  86                           "subsystem.\n");
  87                 return r;
  88         }
  89
  90         rdev->mman.bo_global_ref.mem_glob =
  91                 rdev->mman.mem_global_ref.object;
  92         global_ref = &rdev->mman.bo_global_ref.ref;
  93         global_ref->global_type = DRM_GLOBAL_TTM_BO;
  94         global_ref->size = sizeof(struct ttm_bo_global);
  95         global_ref->init = &ttm_bo_global_init;
  96         global_ref->release = &ttm_bo_global_release;
  97         r = drm_global_item_ref(global_ref);
  98         if (r != 0) {
  99                 DRM_ERROR("Failed setting up TTM BO subsystem.\n");
 100                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 101                 return r;
 102         }
 103
 104         rdev->mman.mem_global_referenced = true;
 105         return 0;
 106 }
 107
 108 static void radeon_ttm_global_fini(struct radeon_device *rdev)
 109 {
 110         if (rdev->mman.mem_global_referenced) {
 111                 drm_global_item_unref(&rdev->mman.bo_global_ref.ref);
 112                 drm_global_item_unref(&rdev->mman.mem_global_ref);
 113                 rdev->mman.mem_global_referenced = false;
 114         }
 115 }
 116
 117 static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
 118 {
 119         return 0;
 120 }
 121
 122 static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
 123                                 struct ttm_mem_type_manager *man)
 124 {
 125         struct radeon_device *rdev;
 126
 127         rdev = radeon_get_rdev(bdev);
 128
 129         switch (type) {
 130         case TTM_PL_SYSTEM:
 131                 /* System memory */
 132                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 133                 man->available_caching = TTM_PL_MASK_CACHING;
 134                 man->default_caching = TTM_PL_FLAG_CACHED;
 135                 break;
 136         case TTM_PL_TT:
 137                 man->func = &ttm_bo_manager_func;
 138                 man->gpu_offset = rdev->mc.gtt_start;
 139                 man->available_caching = TTM_PL_MASK_CACHING;
 140                 man->default_caching = TTM_PL_FLAG_CACHED;
 141                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
 142 #if __OS_HAS_AGP
 143                 if (rdev->flags & RADEON_IS_AGP) {
 144                         if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
 145                                 DRM_ERROR("AGP is not enabled for memory type %u\n",
 146                                           (unsigned)type);
 147                                 return -EINVAL;
 148                         }
 149                         if (!rdev->ddev->agp->cant_use_aperture)
 150                                 man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
 151                         man->available_caching = TTM_PL_FLAG_UNCACHED |
 152                                                  TTM_PL_FLAG_WC;
 153                         man->default_caching = TTM_PL_FLAG_WC;
 154                 }
 155 #endif
 156                 break;
 157         case TTM_PL_VRAM:
 158                 /* "On-card" video ram */
 159                 man->func = &ttm_bo_manager_func;
 160                 man->gpu_offset = rdev->mc.vram_start;
 161                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
 162                              TTM_MEMTYPE_FLAG_MAPPABLE;
 163                 man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
 164                 man->default_caching = TTM_PL_FLAG_WC;
 165                 break;
 166         default:
 167                 DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
 168                 return -EINVAL;
 169         }
 170         return 0;
 171 }
 172
 173 static void radeon_evict_flags(struct ttm_buffer_object *bo,
 174                                 struct ttm_placement *placement)
 175 {
 176         struct radeon_bo *rbo;
 177         static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
 178
 179         if (!radeon_ttm_bo_is_radeon_bo(bo)) {
 180                 placement->fpfn = 0;
 181                 placement->lpfn = 0;
 182                 placement->placement = &placements;
 183                 placement->busy_placement = &placements;
 184                 placement->num_placement = 1;
 185                 placement->num_busy_placement = 1;
 186                 return;
 187         }
 188         rbo = container_of(bo, struct radeon_bo, tbo);
 189         switch (bo->mem.mem_type) {
 190         case TTM_PL_VRAM:
 191                 if (rbo->rdev->ring[RADEON_RING_TYPE_GFX_INDEX].ready == false)
 192                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 193                 else
 194                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
 195                 break;
 196         case TTM_PL_TT:
 197         default:
 198                 radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
 199         }
 200         *placement = rbo->placement;
 201 }
 202
 203 static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
 204 {
 205         return 0;
 206 }
 207
 208 static void radeon_move_null(struct ttm_buffer_object *bo,
 209                              struct ttm_mem_reg *new_mem)
 210 {
 211         struct ttm_mem_reg *old_mem = &bo->mem;
 212
 213         BUG_ON(old_mem->mm_node != NULL);
 214         *old_mem = *new_mem;
 215         new_mem->mm_node = NULL;
 216 }
 217
 218 static int radeon_move_blit(struct ttm_buffer_object *bo,
 219                         bool evict, int no_wait_reserve, bool no_wait_gpu,
 220                         struct ttm_mem_reg *new_mem,
 221                         struct ttm_mem_reg *old_mem)
 222 {
 223         struct radeon_device *rdev;
 224         uint64_t old_start, new_start;
 225         struct radeon_fence *fence, *old_fence;
 226         int r;
 227
 228         rdev = radeon_get_rdev(bo->bdev);
 229         r = radeon_fence_create(rdev, &fence, radeon_copy_ring_index(rdev));
 230         if (unlikely(r)) {
 231                 return r;
 232         }
 233         old_start = old_mem->start << PAGE_SHIFT;
 234         new_start = new_mem->start << PAGE_SHIFT;
 235
 236         switch (old_mem->mem_type) {
 237         case TTM_PL_VRAM:
 238                 old_start += rdev->mc.vram_start;
 239                 break;
 240         case TTM_PL_TT:
 241                 old_start += rdev->mc.gtt_start;
 242                 break;
 243         default:
 244                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 245                 radeon_fence_unref(&fence);
 246                 return -EINVAL;
 247         }
 248         switch (new_mem->mem_type) {
 249         case TTM_PL_VRAM:
 250                 new_start += rdev->mc.vram_start;
 251                 break;
 252         case TTM_PL_TT:
 253                 new_start += rdev->mc.gtt_start;
 254                 break;
 255         default:
 256                 DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
 257                 radeon_fence_unref(&fence);
 258                 return -EINVAL;
 259         }
 260         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready) {
 261                 DRM_ERROR("Trying to move memory with ring turned off.\n");
 262                 radeon_fence_unref(&fence);
 263                 return -EINVAL;
 264         }
 265
 266         BUILD_BUG_ON((PAGE_SIZE % RADEON_GPU_PAGE_SIZE) != 0);
 267
 268         /* sync other rings */
 269         old_fence = bo->sync_obj;
 270         if (old_fence && old_fence->ring != fence->ring
 271             && !radeon_fence_signaled(old_fence)) {
 272                 bool sync_to_ring[RADEON_NUM_RINGS] = { };
 273                 sync_to_ring[old_fence->ring] = true;
 274
 275                 r = radeon_semaphore_create(rdev, &fence->semaphore);
 276                 if (r) {
 277                         radeon_fence_unref(&fence);
 278                         return r;
 279                 }
 280
 281                 r = radeon_semaphore_sync_rings(rdev, fence->semaphore,
 282                                                 sync_to_ring, fence->ring);
 283                 if (r) {
 284                         radeon_fence_unref(&fence);
 285                         return r;
 286                 }
 287         }
 288
 289         r = radeon_copy(rdev, old_start, new_start,
 290                         new_mem->num_pages * (PAGE_SIZE / RADEON_GPU_PAGE_SIZE), /* GPU pages */
 291                         fence);
 292         /* FIXME: handle copy error */
 293         r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
 294                                       evict, no_wait_reserve, no_wait_gpu, new_mem);
 295         radeon_fence_unref(&fence);
 296         return r;
 297 }
 298
 299 static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
 300                                 bool evict, bool interruptible,
 301                                 bool no_wait_reserve, bool no_wait_gpu,
 302                                 struct ttm_mem_reg *new_mem)
 303 {
 304         struct radeon_device *rdev;
 305         struct ttm_mem_reg *old_mem = &bo->mem;
 306         struct ttm_mem_reg tmp_mem;
 307         u32 placements;
 308         struct ttm_placement placement;
 309         int r;
 310
 311         rdev = radeon_get_rdev(bo->bdev);
 312         tmp_mem = *new_mem;
 313         tmp_mem.mm_node = NULL;
 314         placement.fpfn = 0;
 315         placement.lpfn = 0;
 316         placement.num_placement = 1;
 317         placement.placement = &placements;
 318         placement.num_busy_placement = 1;
 319         placement.busy_placement = &placements;
 320         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 321         r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
 322                              interruptible, no_wait_reserve, no_wait_gpu);
 323         if (unlikely(r)) {
 324                 return r;
 325         }
 326
 327         r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
 328         if (unlikely(r)) {
 329                 goto out_cleanup;
 330         }
 331
 332         r = ttm_tt_bind(bo->ttm, &tmp_mem);
 333         if (unlikely(r)) {
 334                 goto out_cleanup;
 335         }
 336         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem, old_mem);
 337         if (unlikely(r)) {
 338                 goto out_cleanup;
 339         }
 340         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, new_mem);
 341 out_cleanup:
 342         ttm_bo_mem_put(bo, &tmp_mem);
 343         return r;
 344 }
 345
 346 static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
 347                                 bool evict, bool interruptible,
 348                                 bool no_wait_reserve, bool no_wait_gpu,
 349                                 struct ttm_mem_reg *new_mem)
 350 {
 351         struct radeon_device *rdev;
 352         struct ttm_mem_reg *old_mem = &bo->mem;
 353         struct ttm_mem_reg tmp_mem;
 354         struct ttm_placement placement;
 355         u32 placements;
 356         int r;
 357
 358         rdev = radeon_get_rdev(bo->bdev);
 359         tmp_mem = *new_mem;
 360         tmp_mem.mm_node = NULL;
 361         placement.fpfn = 0;
 362         placement.lpfn = 0;
 363         placement.num_placement = 1;
 364         placement.placement = &placements;
 365         placement.num_busy_placement = 1;
 366         placement.busy_placement = &placements;
 367         placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
 368         r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait_reserve, no_wait_gpu);
 369         if (unlikely(r)) {
 370                 return r;
 371         }
 372         r = ttm_bo_move_ttm(bo, true, no_wait_reserve, no_wait_gpu, &tmp_mem);
 373         if (unlikely(r)) {
 374                 goto out_cleanup;
 375         }
 376         r = radeon_move_blit(bo, true, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 377         if (unlikely(r)) {
 378                 goto out_cleanup;
 379         }
 380 out_cleanup:
 381         ttm_bo_mem_put(bo, &tmp_mem);
 382         return r;
 383 }
 384
 385 static int radeon_bo_move(struct ttm_buffer_object *bo,
 386                         bool evict, bool interruptible,
 387                         bool no_wait_reserve, bool no_wait_gpu,
 388                         struct ttm_mem_reg *new_mem)
 389 {
 390         struct radeon_device *rdev;
 391         struct ttm_mem_reg *old_mem = &bo->mem;
 392         int r;
 393
 394         rdev = radeon_get_rdev(bo->bdev);
 395         if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
 396                 radeon_move_null(bo, new_mem);
 397                 return 0;
 398         }
 399         if ((old_mem->mem_type == TTM_PL_TT &&
 400              new_mem->mem_type == TTM_PL_SYSTEM) ||
 401             (old_mem->mem_type == TTM_PL_SYSTEM &&
 402              new_mem->mem_type == TTM_PL_TT)) {
 403                 /* bind is enough */
 404                 radeon_move_null(bo, new_mem);
 405                 return 0;
 406         }
 407         if (!rdev->ring[radeon_copy_ring_index(rdev)].ready ||
 408             rdev->asic->copy.copy == NULL) {
 409                 /* use memcpy */
 410                 goto memcpy;
 411         }
 412
 413         if (old_mem->mem_type == TTM_PL_VRAM &&
 414             new_mem->mem_type == TTM_PL_SYSTEM) {
 415                 r = radeon_move_vram_ram(bo, evict, interruptible,
 416                                         no_wait_reserve, no_wait_gpu, new_mem);
 417         } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
 418                    new_mem->mem_type == TTM_PL_VRAM) {
 419                 r = radeon_move_ram_vram(bo, evict, interruptible,
 420                                             no_wait_reserve, no_wait_gpu, new_mem);
 421         } else {
 422                 r = radeon_move_blit(bo, evict, no_wait_reserve, no_wait_gpu, new_mem, old_mem);
 423         }
 424
 425         if (r) {
 426 memcpy:
 427                 r = ttm_bo_move_memcpy(bo, evict, no_wait_reserve, no_wait_gpu, new_mem);
 428         }
 429         return r;
 430 }
 431
 432 static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 433 {
 434         struct ttm_mem_type_manager *man = &bdev->man[mem->mem_type];
 435         struct radeon_device *rdev = radeon_get_rdev(bdev);
 436
 437         mem->bus.addr = NULL;
 438         mem->bus.offset = 0;
 439         mem->bus.size = mem->num_pages << PAGE_SHIFT;
 440         mem->bus.base = 0;
 441         mem->bus.is_iomem = false;
 442         if (!(man->flags & TTM_MEMTYPE_FLAG_MAPPABLE))
 443                 return -EINVAL;
 444         switch (mem->mem_type) {
 445         case TTM_PL_SYSTEM:
 446                 /* system memory */
 447                 return 0;
 448         case TTM_PL_TT:
 449 #if __OS_HAS_AGP
 450                 if (rdev->flags & RADEON_IS_AGP) {
 451                         /* RADEON_IS_AGP is set only if AGP is active */
 452                         mem->bus.offset = mem->start << PAGE_SHIFT;
 453                         mem->bus.base = rdev->mc.agp_base;
 454                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
 455                 }
 456 #endif
 457                 break;
 458         case TTM_PL_VRAM:
 459                 mem->bus.offset = mem->start << PAGE_SHIFT;
 460                 /* check if it's visible */
 461                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
 462                         return -EINVAL;
 463                 mem->bus.base = rdev->mc.aper_base;
 464                 mem->bus.is_iomem = true;
 465 #ifdef __alpha__
 466                 /*
 467                  * Alpha: use bus.addr to hold the ioremap() return,
 468                  * so we can modify bus.base below.
 469                  */
 470                 if (mem->placement & TTM_PL_FLAG_WC)
 471                         mem->bus.addr =
 472                                 ioremap_wc(mem->bus.base + mem->bus.offset,
 473                                            mem->bus.size);
 474                 else
 475                         mem->bus.addr =
 476                                 ioremap_nocache(mem->bus.base + mem->bus.offset,
 477                                                 mem->bus.size);
 478
 479                 /*
 480                  * Alpha: Use just the bus offset plus
 481                  * the hose/domain memory base for bus.base.
 482                  * It then can be used to build PTEs for VRAM
 483                  * access, as done in ttm_bo_vm_fault().
 484                  */
 485                 mem->bus.base = (mem->bus.base & 0x0ffffffffUL) +
 486                         rdev->ddev->hose->dense_mem_base;
 487 #endif
 488                 break;
 489         default:
 490                 return -EINVAL;
 491         }
 492         return 0;
 493 }
 494
 495 static void radeon_ttm_io_mem_free(struct ttm_bo_device *bdev, struct ttm_mem_reg *mem)
 496 {
 497 }
 498
 499 static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
 500                                 bool lazy, bool interruptible)
 501 {
 502         return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
 503 }
 504
 505 static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
 506 {
 507         return 0;
 508 }
 509
 510 static void radeon_sync_obj_unref(void **sync_obj)
 511 {
 512         radeon_fence_unref((struct radeon_fence **)sync_obj);
 513 }
 514
 515 static void *radeon_sync_obj_ref(void *sync_obj)
 516 {
 517         return radeon_fence_ref((struct radeon_fence *)sync_obj);
 518 }
 519
 520 static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
 521 {
 522         return radeon_fence_signaled((struct radeon_fence *)sync_obj);
 523 }
 524
 525 /*
 526  * TTM backend functions.
 527  */
 528 struct radeon_ttm_tt {
 529         struct ttm_dma_tt               ttm;
 530         struct radeon_device            *rdev;
 531         u64                             offset;
 532 };
 533
 534 static int radeon_ttm_backend_bind(struct ttm_tt *ttm,
 535                                    struct ttm_mem_reg *bo_mem)
 536 {
 537         struct radeon_ttm_tt *gtt = (void*)ttm;
 538         int r;
 539
 540         gtt->offset = (unsigned long)(bo_mem->start << PAGE_SHIFT);
 541         if (!ttm->num_pages) {
 542                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n",
 543                      ttm->num_pages, bo_mem, ttm);
 544         }
 545         r = radeon_gart_bind(gtt->rdev, gtt->offset,
 546                              ttm->num_pages, ttm->pages, gtt->ttm.dma_address);
 547         if (r) {
 548                 DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
 549                           ttm->num_pages, (unsigned)gtt->offset);
 550                 return r;
 551         }
 552         return 0;
 553 }
 554
 555 static int radeon_ttm_backend_unbind(struct ttm_tt *ttm)
 556 {
 557         struct radeon_ttm_tt *gtt = (void *)ttm;
 558
 559         radeon_gart_unbind(gtt->rdev, gtt->offset, ttm->num_pages);
 560         return 0;
 561 }
 562
 563 static void radeon_ttm_backend_destroy(struct ttm_tt *ttm)
 564 {
 565         struct radeon_ttm_tt *gtt = (void *)ttm;
 566
 567         ttm_dma_tt_fini(&gtt->ttm);
 568         kfree(gtt);
 569 }
 570
 571 static struct ttm_backend_func radeon_backend_func = {
 572         .bind = &radeon_ttm_backend_bind,
 573         .unbind = &radeon_ttm_backend_unbind,
 574         .destroy = &radeon_ttm_backend_destroy,
 575 };
 576
 577 struct ttm_tt *radeon_ttm_tt_create(struct ttm_bo_device *bdev,
 578                                     unsigned long size, uint32_t page_flags,
 579                                     struct page *dummy_read_page)
 580 {
 581         struct radeon_device *rdev;
 582         struct radeon_ttm_tt *gtt;
 583
 584         rdev = radeon_get_rdev(bdev);
 585 #if __OS_HAS_AGP
 586         if (rdev->flags & RADEON_IS_AGP) {
 587                 return ttm_agp_tt_create(bdev, rdev->ddev->agp->bridge,
 588                                          size, page_flags, dummy_read_page);
 589         }
 590 #endif
 591
 592         gtt = kzalloc(sizeof(struct radeon_ttm_tt), GFP_KERNEL);
 593         if (gtt == NULL) {
 594                 return NULL;
 595         }
 596         gtt->ttm.ttm.func = &radeon_backend_func;
 597         gtt->rdev = rdev;
 598         if (ttm_dma_tt_init(&gtt->ttm, bdev, size, page_flags, dummy_read_page)) {
 599                 kfree(gtt);
 600                 return NULL;
 601         }
 602         return &gtt->ttm.ttm;
 603 }
 604
 605 static int radeon_ttm_tt_populate(struct ttm_tt *ttm)
 606 {
 607         struct radeon_device *rdev;
 608         struct radeon_ttm_tt *gtt = (void *)ttm;
 609         unsigned i;
 610         int r;
 611
 612         if (ttm->state != tt_unpopulated)
 613                 return 0;
 614
 615         rdev = radeon_get_rdev(ttm->bdev);
 616 #if __OS_HAS_AGP
 617         if (rdev->flags & RADEON_IS_AGP) {
 618                 return ttm_agp_tt_populate(ttm);
 619         }
 620 #endif
 621
 622 #ifdef CONFIG_SWIOTLB
 623         if (swiotlb_nr_tbl()) {
 624                 return ttm_dma_populate(&gtt->ttm, rdev->dev);
 625         }
 626 #endif
 627
 628         r = ttm_pool_populate(ttm);
 629         if (r) {
 630                 return r;
 631         }
 632
 633         for (i = 0; i < ttm->num_pages; i++) {
 634                 gtt->ttm.dma_address[i] = pci_map_page(rdev->pdev, ttm->pages[i],
 635                                                        0, PAGE_SIZE,
 636                                                        PCI_DMA_BIDIRECTIONAL);
 637                 if (pci_dma_mapping_error(rdev->pdev, gtt->ttm.dma_address[i])) {
 638                         while (--i) {
 639                                 pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 640                                                PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 641                                 gtt->ttm.dma_address[i] = 0;
 642                         }
 643                         ttm_pool_unpopulate(ttm);
 644                         return -EFAULT;
 645                 }
 646         }
 647         return 0;
 648 }
 649
 650 static void radeon_ttm_tt_unpopulate(struct ttm_tt *ttm)
 651 {
 652         struct radeon_device *rdev;
 653         struct radeon_ttm_tt *gtt = (void *)ttm;
 654         unsigned i;
 655
 656         rdev = radeon_get_rdev(ttm->bdev);
 657 #if __OS_HAS_AGP
 658         if (rdev->flags & RADEON_IS_AGP) {
 659                 ttm_agp_tt_unpopulate(ttm);
 660                 return;
 661         }
 662 #endif
 663
 664 #ifdef CONFIG_SWIOTLB
 665         if (swiotlb_nr_tbl()) {
 666                 ttm_dma_unpopulate(&gtt->ttm, rdev->dev);
 667                 return;
 668         }
 669 #endif
 670
 671         for (i = 0; i < ttm->num_pages; i++) {
 672                 if (gtt->ttm.dma_address[i]) {
 673                         pci_unmap_page(rdev->pdev, gtt->ttm.dma_address[i],
 674                                        PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
 675                 }
 676         }
 677
 678         ttm_pool_unpopulate(ttm);
 679 }
 680
 681 static struct ttm_bo_driver radeon_bo_driver = {
 682         .ttm_tt_create = &radeon_ttm_tt_create,
 683         .ttm_tt_populate = &radeon_ttm_tt_populate,
 684         .ttm_tt_unpopulate = &radeon_ttm_tt_unpopulate,
 685         .invalidate_caches = &radeon_invalidate_caches,
 686         .init_mem_type = &radeon_init_mem_type,
 687         .evict_flags = &radeon_evict_flags,
 688         .move = &radeon_bo_move,
 689         .verify_access = &radeon_verify_access,
 690         .sync_obj_signaled = &radeon_sync_obj_signaled,
 691         .sync_obj_wait = &radeon_sync_obj_wait,
 692         .sync_obj_flush = &radeon_sync_obj_flush,
 693         .sync_obj_unref = &radeon_sync_obj_unref,
 694         .sync_obj_ref = &radeon_sync_obj_ref,
 695         .move_notify = &radeon_bo_move_notify,
 696         .fault_reserve_notify = &radeon_bo_fault_reserve_notify,
 697         .io_mem_reserve = &radeon_ttm_io_mem_reserve,
 698         .io_mem_free = &radeon_ttm_io_mem_free,
 699 };
 700
 701 int radeon_ttm_init(struct radeon_device *rdev)
 702 {
 703         int r;
 704
 705         r = radeon_ttm_global_init(rdev);
 706         if (r) {
 707                 return r;
 708         }
 709         /* No others user of address space so set it to 0 */
 710         r = ttm_bo_device_init(&rdev->mman.bdev,
 711                                rdev->mman.bo_global_ref.ref.object,
 712                                &radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
 713                                rdev->need_dma32);
 714         if (r) {
 715                 DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
 716                 return r;
 717         }
 718         rdev->mman.initialized = true;
 719         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
 720                                 rdev->mc.real_vram_size >> PAGE_SHIFT);
 721         if (r) {
 722                 DRM_ERROR("Failed initializing VRAM heap.\n");
 723                 return r;
 724         }
 725         r = radeon_bo_create(rdev, 256 * 1024, PAGE_SIZE, true,
 726                                 RADEON_GEM_DOMAIN_VRAM,
 727                                 &rdev->stollen_vga_memory);
 728         if (r) {
 729                 return r;
 730         }
 731         r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 732         if (r)
 733                 return r;
 734         r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
 735         radeon_bo_unreserve(rdev->stollen_vga_memory);
 736         if (r) {
 737                 radeon_bo_unref(&rdev->stollen_vga_memory);
 738                 return r;
 739         }
 740         DRM_INFO("radeon: %uM of VRAM memory ready\n",
 741                  (unsigned)rdev->mc.real_vram_size / (1024 * 1024));
 742         r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
 743                                 rdev->mc.gtt_size >> PAGE_SHIFT);
 744         if (r) {
 745                 DRM_ERROR("Failed initializing GTT heap.\n");
 746                 return r;
 747         }
 748         DRM_INFO("radeon: %uM of GTT memory ready.\n",
 749                  (unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
 750         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
 751                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
 752         }
 753
 754         r = radeon_ttm_debugfs_init(rdev);
 755         if (r) {
 756                 DRM_ERROR("Failed to init debugfs\n");
 757                 return r;
 758         }
 759         return 0;
 760 }
 761
 762 void radeon_ttm_fini(struct radeon_device *rdev)
 763 {
 764         int r;
 765
 766         if (!rdev->mman.initialized)
 767                 return;
 768         if (rdev->stollen_vga_memory) {
 769                 r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
 770                 if (r == 0) {
 771                         radeon_bo_unpin(rdev->stollen_vga_memory);
 772                         radeon_bo_unreserve(rdev->stollen_vga_memory);
 773                 }
 774                 radeon_bo_unref(&rdev->stollen_vga_memory);
 775         }
 776         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 777         ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
 778         ttm_bo_device_release(&rdev->mman.bdev);
 779         radeon_gart_fini(rdev);
 780         radeon_ttm_global_fini(rdev);
 781         rdev->mman.initialized = false;
 782         DRM_INFO("radeon: ttm finalized\n");
 783 }
 784
 785 /* this should only be called at bootup or when userspace
 786  * isn't running */
 787 void radeon_ttm_set_active_vram_size(struct radeon_device *rdev, u64 size)
 788 {
 789         struct ttm_mem_type_manager *man;
 790
 791         if (!rdev->mman.initialized)
 792                 return;
 793
 794         man = &rdev->mman.bdev.man[TTM_PL_VRAM];
 795         /* this just adjusts TTM size idea, which sets lpfn to the correct value */
 796         man->size = size >> PAGE_SHIFT;
 797 }
 798
 799 static struct vm_operations_struct radeon_ttm_vm_ops;
 800 static const struct vm_operations_struct *ttm_vm_ops = NULL;
 801
 802 static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
 803 {
 804         struct ttm_buffer_object *bo;
 805         struct radeon_device *rdev;
 806         int r;
 807
 808         bo = (struct ttm_buffer_object *)vma->vm_private_data;
 809         if (bo == NULL) {
 810                 return VM_FAULT_NOPAGE;
 811         }
 812         rdev = radeon_get_rdev(bo->bdev);
 813         mutex_lock(&rdev->vram_mutex);
 814         r = ttm_vm_ops->fault(vma, vmf);
 815         mutex_unlock(&rdev->vram_mutex);
 816         return r;
 817 }
 818
 819 int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
 820 {
 821         struct drm_file *file_priv;
 822         struct radeon_device *rdev;
 823         int r;
 824
 825         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
 826                 return drm_mmap(filp, vma);
 827         }
 828
 829         file_priv = filp->private_data;
 830         rdev = file_priv->minor->dev->dev_private;
 831         if (rdev == NULL) {
 832                 return -EINVAL;
 833         }
 834         r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
 835         if (unlikely(r != 0)) {
 836                 return r;
 837         }
 838         if (unlikely(ttm_vm_ops == NULL)) {
 839                 ttm_vm_ops = vma->vm_ops;
 840                 radeon_ttm_vm_ops = *ttm_vm_ops;
 841                 radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
 842         }
 843         vma->vm_ops = &radeon_ttm_vm_ops;
 844         return 0;
 845 }
 846
 847
 848 #define RADEON_DEBUGFS_MEM_TYPES 2
 849
 850 #if defined(CONFIG_DEBUG_FS)
 851 static int radeon_mm_dump_table(struct seq_file *m, void *data)
 852 {
 853         struct drm_info_node *node = (struct drm_info_node *)m->private;
 854         struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
 855         struct drm_device *dev = node->minor->dev;
 856         struct radeon_device *rdev = dev->dev_private;
 857         int ret;
 858         struct ttm_bo_global *glob = rdev->mman.bdev.glob;
 859
 860         spin_lock(&glob->lru_lock);
 861         ret = drm_mm_dump_table(m, mm);
 862         spin_unlock(&glob->lru_lock);
 863         return ret;
 864 }
 865 #endif
 866
 867 static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
 868 {
 869 #if defined(CONFIG_DEBUG_FS)
 870         static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES+2];
 871         static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES+2][32];
 872         unsigned i;
 873
 874         for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
 875                 if (i == 0)
 876                         sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
 877                 else
 878                         sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
 879                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 880                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
 881                 radeon_mem_types_list[i].driver_features = 0;
 882                 if (i == 0)
 883                         radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_VRAM].priv;
 884                 else
 885                         radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_TT].priv;
 886
 887         }
 888         /* Add ttm page pool to debugfs */
 889         sprintf(radeon_mem_types_names[i], "ttm_page_pool");
 890         radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 891         radeon_mem_types_list[i].show = &ttm_page_alloc_debugfs;
 892         radeon_mem_types_list[i].driver_features = 0;
 893         radeon_mem_types_list[i++].data = NULL;
 894 #ifdef CONFIG_SWIOTLB
 895         if (swiotlb_nr_tbl()) {
 896                 sprintf(radeon_mem_types_names[i], "ttm_dma_page_pool");
 897                 radeon_mem_types_list[i].name = radeon_mem_types_names[i];
 898                 radeon_mem_types_list[i].show = &ttm_dma_page_alloc_debugfs;
 899                 radeon_mem_types_list[i].driver_features = 0;
 900                 radeon_mem_types_list[i++].data = NULL;
 901         }
 902 #endif
 903         return radeon_debugfs_add_files(rdev, radeon_mem_types_list, i);
 904
 905 #endif
 906         return 0;
 907 }