arch/blackfin/mach-bf548/include/mach/blackfin.h

   1 /*
   2  * File:         include/asm-blackfin/mach-bf548/blackfin.h
   3  * Based on:
   4  * Author:
   5  *
   6  * Created:
   7  * Description:
   8  *
   9  * Rev:
  10  *
  11  * Modified:
  12  *
  13  *
  14  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
  15  *
  16  * This program is free software; you can redistribute it and/or modify
  17  * it under the terms of the GNU General Public License as published by
  18  * the Free Software Foundation; either version 2, or (at your option)
  19  * any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; see the file COPYING.
  28  * If not, write to the Free Software Foundation,
  29  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  30  */
  31
  32 #ifndef _MACH_BLACKFIN_H_
  33 #define _MACH_BLACKFIN_H_
  34
  35 #include "bf548.h"
  36 #include "anomaly.h"
  37
  38 #ifdef CONFIG_BF542
  39 #include "defBF542.h"
  40 #endif
  41
  42 #ifdef CONFIG_BF544
  43 #include "defBF544.h"
  44 #endif
  45
  46 #ifdef CONFIG_BF547
  47 #include "defBF547.h"
  48 #endif
  49
  50 #ifdef CONFIG_BF548
  51 #include "defBF548.h"
  52 #endif
  53
  54 #ifdef CONFIG_BF549
  55 #include "defBF549.h"
  56 #endif
  57
  58 #if !defined(__ASSEMBLY__)
  59 #ifdef CONFIG_BF542
  60 #include "cdefBF542.h"
  61 #endif
  62 #ifdef CONFIG_BF544
  63 #include "cdefBF544.h"
  64 #endif
  65 #ifdef CONFIG_BF547
  66 #include "cdefBF547.h"
  67 #endif
  68 #ifdef CONFIG_BF548
  69 #include "cdefBF548.h"
  70 #endif
  71 #ifdef CONFIG_BF549
  72 #include "cdefBF549.h"
  73 #endif
  74
  75 #endif
  76
  77 #define BFIN_UART_NR_PORTS      4
  78
  79 #define OFFSET_DLL              0x00    /* Divisor Latch (Low-Byte)             */
  80 #define OFFSET_DLH              0x04    /* Divisor Latch (High-Byte)            */
  81 #define OFFSET_GCTL             0x08    /* Global Control Register              */
  82 #define OFFSET_LCR              0x0C    /* Line Control Register                */
  83 #define OFFSET_MCR              0x10    /* Modem Control Register               */
  84 #define OFFSET_LSR              0x14    /* Line Status Register                 */
  85 #define OFFSET_MSR              0x18    /* Modem Status Register                */
  86 #define OFFSET_SCR              0x1C    /* SCR Scratch Register                 */
  87 #define OFFSET_IER_SET          0x20    /* Set Interrupt Enable Register        */
  88 #define OFFSET_IER_CLEAR        0x24    /* Clear Interrupt Enable Register      */
  89 #define OFFSET_THR              0x28    /* Transmit Holding register            */
  90 #define OFFSET_RBR              0x2C    /* Receive Buffer register              */
  91
  92 /* PLL_DIV Masks */
  93 #define CCLK_DIV1 CSEL_DIV1     /* CCLK = VCO / 1 */
  94 #define CCLK_DIV2 CSEL_DIV2     /* CCLK = VCO / 2 */
  95 #define CCLK_DIV4 CSEL_DIV4     /* CCLK = VCO / 4 */
  96 #define CCLK_DIV8 CSEL_DIV8     /* CCLK = VCO / 8 */
  97
  98 #endif