| blob | aa58155187c5c0101fff086d630b196042a0e9d9 |
1 /*
2 * linux/arch/x86_64/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
7 *
8 * entry.S contains the system-call and fault low-level handling routines.
9 *
10 * Some of this is documented in Documentation/x86/entry_64.txt
11 *
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
15 *
16 * Some macro usage:
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
20 */
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
25 #include "calling.h"
26 #include <asm/asm-offsets.h>
27 #include <asm/msr.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
35 #include <asm/asm.h>
36 #include <asm/smap.h>
37 #include <asm/pgtable_types.h>
38 #include <asm/export.h>
39 #include <asm/frame.h>
40 #include <linux/err.h>
42 .code64
43 .section .entry.text, "ax"
45 #ifdef CONFIG_PARAVIRT
46 ENTRY(native_usergs_sysret64)
47 UNWIND_HINT_EMPTY
48 swapgs
49 sysretq
50 END(native_usergs_sysret64)
51 #endif /* CONFIG_PARAVIRT */
53 .macro TRACE_IRQS_IRETQ
54 #ifdef CONFIG_TRACE_IRQFLAGS
55 bt $9, EFLAGS(%rsp) /* interrupts off? */
56 jnc 1f
57 TRACE_IRQS_ON
58 1:
59 #endif
60 .endm
62 /*
63 * When dynamic function tracer is enabled it will add a breakpoint
64 * to all locations that it is about to modify, sync CPUs, update
65 * all the code, sync CPUs, then remove the breakpoints. In this time
66 * if lockdep is enabled, it might jump back into the debug handler
67 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
68 *
69 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
70 * make sure the stack pointer does not get reset back to the top
71 * of the debug stack, and instead just reuses the current stack.
72 */
73 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
75 .macro TRACE_IRQS_OFF_DEBUG
76 call debug_stack_set_zero
77 TRACE_IRQS_OFF
78 call debug_stack_reset
79 .endm
81 .macro TRACE_IRQS_ON_DEBUG
82 call debug_stack_set_zero
83 TRACE_IRQS_ON
84 call debug_stack_reset
85 .endm
87 .macro TRACE_IRQS_IRETQ_DEBUG
88 bt $9, EFLAGS(%rsp) /* interrupts off? */
89 jnc 1f
90 TRACE_IRQS_ON_DEBUG
91 1:
92 .endm
94 #else
95 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
96 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
97 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
98 #endif
100 /*
101 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
102 *
103 * This is the only entry point used for 64-bit system calls. The
104 * hardware interface is reasonably well designed and the register to
105 * argument mapping Linux uses fits well with the registers that are
106 * available when SYSCALL is used.
107 *
108 * SYSCALL instructions can be found inlined in libc implementations as
109 * well as some other programs and libraries. There are also a handful
110 * of SYSCALL instructions in the vDSO used, for example, as a
111 * clock_gettimeofday fallback.
112 *
113 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
114 * then loads new ss, cs, and rip from previously programmed MSRs.
115 * rflags gets masked by a value from another MSR (so CLD and CLAC
116 * are not needed). SYSCALL does not save anything on the stack
117 * and does not change rsp.
118 *
119 * Registers on entry:
120 * rax system call number
121 * rcx return address
122 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
123 * rdi arg0
124 * rsi arg1
125 * rdx arg2
126 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
127 * r8 arg4
128 * r9 arg5
129 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
130 *
131 * Only called from user space.
132 *
133 * When user can change pt_regs->foo always force IRET. That is because
134 * it deals with uncanonical addresses better. SYSRET has trouble
135 * with them due to bugs in both AMD and Intel CPUs.
136 */
138 ENTRY(entry_SYSCALL_64)
139 UNWIND_HINT_EMPTY
140 /*
141 * Interrupts are off on entry.
142 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
143 * it is too small to ever cause noticeable irq latency.
144 */
145 SWAPGS_UNSAFE_STACK
146 /*
147 * A hypervisor implementation might want to use a label
148 * after the swapgs, so that it can do the swapgs
149 * for the guest and jump here on syscall.
150 */
151 GLOBAL(entry_SYSCALL_64_after_swapgs)
153 movq %rsp, PER_CPU_VAR(rsp_scratch)
154 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
156 TRACE_IRQS_OFF
158 /* Construct struct pt_regs on stack */
159 pushq $__USER_DS /* pt_regs->ss */
160 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
161 pushq %r11 /* pt_regs->flags */
162 pushq $__USER_CS /* pt_regs->cs */
163 pushq %rcx /* pt_regs->ip */
164 pushq %rax /* pt_regs->orig_ax */
165 pushq %rdi /* pt_regs->di */
166 pushq %rsi /* pt_regs->si */
167 pushq %rdx /* pt_regs->dx */
168 pushq %rcx /* pt_regs->cx */
169 pushq $-ENOSYS /* pt_regs->ax */
170 pushq %r8 /* pt_regs->r8 */
171 pushq %r9 /* pt_regs->r9 */
172 pushq %r10 /* pt_regs->r10 */
173 pushq %r11 /* pt_regs->r11 */
174 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
175 UNWIND_HINT_REGS extra=0
177 /*
178 * If we need to do entry work or if we guess we'll need to do
179 * exit work, go straight to the slow path.
180 */
181 movq PER_CPU_VAR(current_task), %r11
182 testl $_TIF_WORK_SYSCALL_ENTRY|_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
183 jnz entry_SYSCALL64_slow_path
185 entry_SYSCALL_64_fastpath:
186 /*
187 * Easy case: enable interrupts and issue the syscall. If the syscall
188 * needs pt_regs, we'll call a stub that disables interrupts again
189 * and jumps to the slow path.
190 */
191 TRACE_IRQS_ON
192 ENABLE_INTERRUPTS(CLBR_NONE)
193 #if __SYSCALL_MASK == ~0
194 cmpq $__NR_syscall_max, %rax
195 #else
196 andl $__SYSCALL_MASK, %eax
197 cmpl $__NR_syscall_max, %eax
198 #endif
199 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
200 movq %r10, %rcx
202 /*
203 * This call instruction is handled specially in stub_ptregs_64.
204 * It might end up jumping to the slow path. If it jumps, RAX
205 * and all argument registers are clobbered.
206 */
207 call *sys_call_table(, %rax, 8)
208 .Lentry_SYSCALL_64_after_fastpath_call:
210 movq %rax, RAX(%rsp)
211 1:
213 /*
214 * If we get here, then we know that pt_regs is clean for SYSRET64.
215 * If we see that no exit work is required (which we are required
216 * to check with IRQs off), then we can go straight to SYSRET64.
217 */
218 DISABLE_INTERRUPTS(CLBR_ANY)
219 TRACE_IRQS_OFF
220 movq PER_CPU_VAR(current_task), %r11
221 testl $_TIF_ALLWORK_MASK, TASK_TI_flags(%r11)
222 jnz 1f
224 LOCKDEP_SYS_EXIT
225 TRACE_IRQS_ON /* user mode is traced as IRQs on */
226 movq RIP(%rsp), %rcx
227 movq EFLAGS(%rsp), %r11
228 RESTORE_C_REGS_EXCEPT_RCX_R11
229 movq RSP(%rsp), %rsp
230 UNWIND_HINT_EMPTY
231 USERGS_SYSRET64
233 1:
234 /*
235 * The fast path looked good when we started, but something changed
236 * along the way and we need to switch to the slow path. Calling
237 * raise(3) will trigger this, for example. IRQs are off.
238 */
239 TRACE_IRQS_ON
240 ENABLE_INTERRUPTS(CLBR_ANY)
241 SAVE_EXTRA_REGS
242 movq %rsp, %rdi
243 call syscall_return_slowpath /* returns with IRQs disabled */
244 jmp return_from_SYSCALL_64
246 entry_SYSCALL64_slow_path:
247 /* IRQs are off. */
248 SAVE_EXTRA_REGS
249 movq %rsp, %rdi
250 call do_syscall_64 /* returns with IRQs disabled */
252 return_from_SYSCALL_64:
253 RESTORE_EXTRA_REGS
254 TRACE_IRQS_IRETQ /* we're about to change IF */
256 /*
257 * Try to use SYSRET instead of IRET if we're returning to
258 * a completely clean 64-bit userspace context.
259 */
260 movq RCX(%rsp), %rcx
261 movq RIP(%rsp), %r11
262 cmpq %rcx, %r11 /* RCX == RIP */
263 jne opportunistic_sysret_failed
265 /*
266 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
267 * in kernel space. This essentially lets the user take over
268 * the kernel, since userspace controls RSP.
269 *
270 * If width of "canonical tail" ever becomes variable, this will need
271 * to be updated to remain correct on both old and new CPUs.
272 *
273 * Change top bits to match most significant bit (47th or 56th bit
274 * depending on paging mode) in the address.
275 */
276 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
277 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
279 /* If this changed %rcx, it was not canonical */
280 cmpq %rcx, %r11
281 jne opportunistic_sysret_failed
283 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
284 jne opportunistic_sysret_failed
286 movq R11(%rsp), %r11
287 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
288 jne opportunistic_sysret_failed
290 /*
291 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
292 * restore RF properly. If the slowpath sets it for whatever reason, we
293 * need to restore it correctly.
294 *
295 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
296 * trap from userspace immediately after SYSRET. This would cause an
297 * infinite loop whenever #DB happens with register state that satisfies
298 * the opportunistic SYSRET conditions. For example, single-stepping
299 * this user code:
300 *
301 * movq $stuck_here, %rcx
302 * pushfq
303 * popq %r11
304 * stuck_here:
305 *
306 * would never get past 'stuck_here'.
307 */
308 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
309 jnz opportunistic_sysret_failed
311 /* nothing to check for RSP */
313 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
314 jne opportunistic_sysret_failed
316 /*
317 * We win! This label is here just for ease of understanding
318 * perf profiles. Nothing jumps here.
319 */
320 syscall_return_via_sysret:
321 /* rcx and r11 are already restored (see code above) */
322 RESTORE_C_REGS_EXCEPT_RCX_R11
323 movq RSP(%rsp), %rsp
324 UNWIND_HINT_EMPTY
325 USERGS_SYSRET64
327 opportunistic_sysret_failed:
328 SWAPGS
329 jmp restore_c_regs_and_iret
330 END(entry_SYSCALL_64)
332 ENTRY(stub_ptregs_64)
333 /*
334 * Syscalls marked as needing ptregs land here.
335 * If we are on the fast path, we need to save the extra regs,
336 * which we achieve by trying again on the slow path. If we are on
337 * the slow path, the extra regs are already saved.
338 *
339 * RAX stores a pointer to the C function implementing the syscall.
340 * IRQs are on.
341 */
342 cmpq $.Lentry_SYSCALL_64_after_fastpath_call, (%rsp)
343 jne 1f
345 /*
346 * Called from fast path -- disable IRQs again, pop return address
347 * and jump to slow path
348 */
349 DISABLE_INTERRUPTS(CLBR_ANY)
350 TRACE_IRQS_OFF
351 popq %rax
352 UNWIND_HINT_REGS extra=0
353 jmp entry_SYSCALL64_slow_path
355 1:
356 jmp *%rax /* Called from C */
357 END(stub_ptregs_64)
359 .macro ptregs_stub func
360 ENTRY(ptregs_\func)
361 UNWIND_HINT_FUNC
362 leaq \func(%rip), %rax
363 jmp stub_ptregs_64
364 END(ptregs_\func)
365 .endm
367 /* Instantiate ptregs_stub for each ptregs-using syscall */
368 #define __SYSCALL_64_QUAL_(sym)
369 #define __SYSCALL_64_QUAL_ptregs(sym) ptregs_stub sym
370 #define __SYSCALL_64(nr, sym, qual) __SYSCALL_64_QUAL_##qual(sym)
371 #include <asm/syscalls_64.h>
373 /*
374 * %rdi: prev task
375 * %rsi: next task
376 */
377 ENTRY(__switch_to_asm)
378 UNWIND_HINT_FUNC
379 /*
380 * Save callee-saved registers
381 * This must match the order in inactive_task_frame
382 */
383 pushq %rbp
384 pushq %rbx
385 pushq %r12
386 pushq %r13
387 pushq %r14
388 pushq %r15
390 /* switch stack */
391 movq %rsp, TASK_threadsp(%rdi)
392 movq TASK_threadsp(%rsi), %rsp
394 #ifdef CONFIG_CC_STACKPROTECTOR
395 movq TASK_stack_canary(%rsi), %rbx
396 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
397 #endif
399 /* restore callee-saved registers */
400 popq %r15
401 popq %r14
402 popq %r13
403 popq %r12
404 popq %rbx
405 popq %rbp
407 jmp __switch_to
408 END(__switch_to_asm)
410 /*
411 * A newly forked process directly context switches into this address.
412 *
413 * rax: prev task we switched from
414 * rbx: kernel thread func (NULL for user thread)
415 * r12: kernel thread arg
416 */
417 ENTRY(ret_from_fork)
418 UNWIND_HINT_EMPTY
419 movq %rax, %rdi
420 call schedule_tail /* rdi: 'prev' task parameter */
422 testq %rbx, %rbx /* from kernel_thread? */
423 jnz 1f /* kernel threads are uncommon */
425 2:
426 UNWIND_HINT_REGS
427 movq %rsp, %rdi
428 call syscall_return_slowpath /* returns with IRQs disabled */
429 TRACE_IRQS_ON /* user mode is traced as IRQS on */
430 SWAPGS
431 jmp restore_regs_and_iret
433 1:
434 /* kernel thread */
435 movq %r12, %rdi
436 call *%rbx
437 /*
438 * A kernel thread is allowed to return here after successfully
439 * calling do_execve(). Exit to userspace to complete the execve()
440 * syscall.
441 */
442 movq $0, RAX(%rsp)
443 jmp 2b
444 END(ret_from_fork)
446 /*
447 * Build the entry stubs with some assembler magic.
448 * We pack 1 stub into every 8-byte block.
449 */
450 .align 8
451 ENTRY(irq_entries_start)
452 vector=FIRST_EXTERNAL_VECTOR
453 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
454 UNWIND_HINT_IRET_REGS
455 pushq $(~vector+0x80) /* Note: always in signed byte range */
456 jmp common_interrupt
457 .align 8
458 vector=vector+1
459 .endr
460 END(irq_entries_start)
462 .macro DEBUG_ENTRY_ASSERT_IRQS_OFF
463 #ifdef CONFIG_DEBUG_ENTRY
464 pushfq
465 testl $X86_EFLAGS_IF, (%rsp)
466 jz .Lokay_\@
467 ud2
468 .Lokay_\@:
469 addq $8, %rsp
470 #endif
471 .endm
473 /*
474 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
475 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
476 * Requires kernel GSBASE.
477 *
478 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
479 */
480 .macro ENTER_IRQ_STACK regs=1 old_rsp
481 DEBUG_ENTRY_ASSERT_IRQS_OFF
482 movq %rsp, \old_rsp
484 .if \regs
485 UNWIND_HINT_REGS base=\old_rsp
486 .endif
488 incl PER_CPU_VAR(irq_count)
489 jnz .Lirq_stack_push_old_rsp_\@
491 /*
492 * Right now, if we just incremented irq_count to zero, we've
493 * claimed the IRQ stack but we haven't switched to it yet.
494 *
495 * If anything is added that can interrupt us here without using IST,
496 * it must be *extremely* careful to limit its stack usage. This
497 * could include kprobes and a hypothetical future IST-less #DB
498 * handler.
499 *
500 * The OOPS unwinder relies on the word at the top of the IRQ
501 * stack linking back to the previous RSP for the entire time we're
502 * on the IRQ stack. For this to work reliably, we need to write
503 * it before we actually move ourselves to the IRQ stack.
504 */
506 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
507 movq PER_CPU_VAR(irq_stack_ptr), %rsp
509 #ifdef CONFIG_DEBUG_ENTRY
510 /*
511 * If the first movq above becomes wrong due to IRQ stack layout
512 * changes, the only way we'll notice is if we try to unwind right
513 * here. Assert that we set up the stack right to catch this type
514 * of bug quickly.
515 */
516 cmpq -8(%rsp), \old_rsp
517 je .Lirq_stack_okay\@
518 ud2
519 .Lirq_stack_okay\@:
520 #endif
522 .Lirq_stack_push_old_rsp_\@:
523 pushq \old_rsp
525 .if \regs
526 UNWIND_HINT_REGS indirect=1
527 .endif
528 .endm
530 /*
531 * Undoes ENTER_IRQ_STACK.
532 */
533 .macro LEAVE_IRQ_STACK regs=1
534 DEBUG_ENTRY_ASSERT_IRQS_OFF
535 /* We need to be off the IRQ stack before decrementing irq_count. */
536 popq %rsp
538 .if \regs
539 UNWIND_HINT_REGS
540 .endif
542 /*
543 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
544 * the irq stack but we're not on it.
545 */
547 decl PER_CPU_VAR(irq_count)
548 .endm
550 /*
551 * Interrupt entry/exit.
552 *
553 * Interrupt entry points save only callee clobbered registers in fast path.
554 *
555 * Entry runs with interrupts off.
556 */
558 /* 0(%rsp): ~(interrupt number) */
559 .macro interrupt func
560 cld
561 ALLOC_PT_GPREGS_ON_STACK
562 SAVE_C_REGS
563 SAVE_EXTRA_REGS
564 ENCODE_FRAME_POINTER
566 testb $3, CS(%rsp)
567 jz 1f
569 /*
570 * IRQ from user mode. Switch to kernel gsbase and inform context
571 * tracking that we're in kernel mode.
572 */
573 SWAPGS
575 /*
576 * We need to tell lockdep that IRQs are off. We can't do this until
577 * we fix gsbase, and we should do it before enter_from_user_mode
578 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
579 * the simplest way to handle it is to just call it twice if
580 * we enter from user mode. There's no reason to optimize this since
581 * TRACE_IRQS_OFF is a no-op if lockdep is off.
582 */
583 TRACE_IRQS_OFF
585 CALL_enter_from_user_mode
587 1:
588 ENTER_IRQ_STACK old_rsp=%rdi
589 /* We entered an interrupt context - irqs are off: */
590 TRACE_IRQS_OFF
592 call \func /* rdi points to pt_regs */
593 .endm
595 /*
596 * The interrupt stubs push (~vector+0x80) onto the stack and
597 * then jump to common_interrupt.
598 */
599 .p2align CONFIG_X86_L1_CACHE_SHIFT
600 common_interrupt:
601 ASM_CLAC
602 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
603 interrupt do_IRQ
604 /* 0(%rsp): old RSP */
605 ret_from_intr:
606 DISABLE_INTERRUPTS(CLBR_ANY)
607 TRACE_IRQS_OFF
609 LEAVE_IRQ_STACK
611 testb $3, CS(%rsp)
612 jz retint_kernel
614 /* Interrupt came from user space */
615 GLOBAL(retint_user)
616 mov %rsp,%rdi
617 call prepare_exit_to_usermode
618 TRACE_IRQS_IRETQ
619 SWAPGS
620 jmp restore_regs_and_iret
622 /* Returning to kernel space */
623 retint_kernel:
624 #ifdef CONFIG_PREEMPT
625 /* Interrupts are off */
626 /* Check if we need preemption */
627 bt $9, EFLAGS(%rsp) /* were interrupts off? */
628 jnc 1f
629 0: cmpl $0, PER_CPU_VAR(__preempt_count)
630 jnz 1f
631 call preempt_schedule_irq
632 jmp 0b
633 1:
634 #endif
635 /*
636 * The iretq could re-enable interrupts:
637 */
638 TRACE_IRQS_IRETQ
640 /*
641 * At this label, code paths which return to kernel and to user,
642 * which come from interrupts/exception and from syscalls, merge.
643 */
644 GLOBAL(restore_regs_and_iret)
645 RESTORE_EXTRA_REGS
646 restore_c_regs_and_iret:
647 RESTORE_C_REGS
648 REMOVE_PT_GPREGS_FROM_STACK 8
649 INTERRUPT_RETURN
651 ENTRY(native_iret)
652 UNWIND_HINT_IRET_REGS
653 /*
654 * Are we returning to a stack segment from the LDT? Note: in
655 * 64-bit mode SS:RSP on the exception stack is always valid.
656 */
657 #ifdef CONFIG_X86_ESPFIX64
658 testb $4, (SS-RIP)(%rsp)
659 jnz native_irq_return_ldt
660 #endif
662 .global native_irq_return_iret
663 native_irq_return_iret:
664 /*
665 * This may fault. Non-paranoid faults on return to userspace are
666 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
667 * Double-faults due to espfix64 are handled in do_double_fault.
668 * Other faults here are fatal.
669 */
670 iretq
672 #ifdef CONFIG_X86_ESPFIX64
673 native_irq_return_ldt:
674 /*
675 * We are running with user GSBASE. All GPRs contain their user
676 * values. We have a percpu ESPFIX stack that is eight slots
677 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
678 * of the ESPFIX stack.
679 *
680 * We clobber RAX and RDI in this code. We stash RDI on the
681 * normal stack and RAX on the ESPFIX stack.
682 *
683 * The ESPFIX stack layout we set up looks like this:
684 *
685 * --- top of ESPFIX stack ---
686 * SS
687 * RSP
688 * RFLAGS
689 * CS
690 * RIP <-- RSP points here when we're done
691 * RAX <-- espfix_waddr points here
692 * --- bottom of ESPFIX stack ---
693 */
695 pushq %rdi /* Stash user RDI */
696 SWAPGS
697 movq PER_CPU_VAR(espfix_waddr), %rdi
698 movq %rax, (0*8)(%rdi) /* user RAX */
699 movq (1*8)(%rsp), %rax /* user RIP */
700 movq %rax, (1*8)(%rdi)
701 movq (2*8)(%rsp), %rax /* user CS */
702 movq %rax, (2*8)(%rdi)
703 movq (3*8)(%rsp), %rax /* user RFLAGS */
704 movq %rax, (3*8)(%rdi)
705 movq (5*8)(%rsp), %rax /* user SS */
706 movq %rax, (5*8)(%rdi)
707 movq (4*8)(%rsp), %rax /* user RSP */
708 movq %rax, (4*8)(%rdi)
709 /* Now RAX == RSP. */
711 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
712 popq %rdi /* Restore user RDI */
714 /*
715 * espfix_stack[31:16] == 0. The page tables are set up such that
716 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
717 * espfix_waddr for any X. That is, there are 65536 RO aliases of
718 * the same page. Set up RSP so that RSP[31:16] contains the
719 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
720 * still points to an RO alias of the ESPFIX stack.
721 */
722 orq PER_CPU_VAR(espfix_stack), %rax
723 SWAPGS
724 movq %rax, %rsp
725 UNWIND_HINT_IRET_REGS offset=8
727 /*
728 * At this point, we cannot write to the stack any more, but we can
729 * still read.
730 */
731 popq %rax /* Restore user RAX */
733 /*
734 * RSP now points to an ordinary IRET frame, except that the page
735 * is read-only and RSP[31:16] are preloaded with the userspace
736 * values. We can now IRET back to userspace.
737 */
738 jmp native_irq_return_iret
739 #endif
740 END(common_interrupt)
742 /*
743 * APIC interrupts.
744 */
745 .macro apicinterrupt3 num sym do_sym
746 ENTRY(\sym)
747 UNWIND_HINT_IRET_REGS
748 ASM_CLAC
749 pushq $~(\num)
750 .Lcommon_\sym:
751 interrupt \do_sym
752 jmp ret_from_intr
753 END(\sym)
754 .endm
756 #ifdef CONFIG_TRACING
757 #define trace(sym) trace_##sym
758 #define smp_trace(sym) smp_trace_##sym
760 .macro trace_apicinterrupt num sym
761 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
762 .endm
763 #else
764 .macro trace_apicinterrupt num sym do_sym
765 .endm
766 #endif
768 /* Make sure APIC interrupt handlers end up in the irqentry section: */
769 #if defined(CONFIG_FUNCTION_GRAPH_TRACER) || defined(CONFIG_KASAN)
770 # define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
771 # define POP_SECTION_IRQENTRY .popsection
772 #else
773 # define PUSH_SECTION_IRQENTRY
774 # define POP_SECTION_IRQENTRY
775 #endif
777 .macro apicinterrupt num sym do_sym
778 PUSH_SECTION_IRQENTRY
779 apicinterrupt3 \num \sym \do_sym
780 trace_apicinterrupt \num \sym
781 POP_SECTION_IRQENTRY
782 .endm
784 #ifdef CONFIG_SMP
785 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
786 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
787 #endif
789 #ifdef CONFIG_X86_UV
790 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
791 #endif
793 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
794 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
796 #ifdef CONFIG_HAVE_KVM
797 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
798 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
799 #endif
801 #ifdef CONFIG_X86_MCE_THRESHOLD
802 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
803 #endif
805 #ifdef CONFIG_X86_MCE_AMD
806 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
807 #endif
809 #ifdef CONFIG_X86_THERMAL_VECTOR
810 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
811 #endif
813 #ifdef CONFIG_SMP
814 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
815 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
816 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
817 #endif
819 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
820 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
822 #ifdef CONFIG_IRQ_WORK
823 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
824 #endif
826 /*
827 * Exception entry points.
828 */
829 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
831 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
832 ENTRY(\sym)
833 UNWIND_HINT_IRET_REGS offset=8
835 /* Sanity check */
836 .if \shift_ist != -1 && \paranoid == 0
837 .error "using shift_ist requires paranoid=1"
838 .endif
840 ASM_CLAC
841 PARAVIRT_ADJUST_EXCEPTION_FRAME
843 .ifeq \has_error_code
844 pushq $-1 /* ORIG_RAX: no syscall to restart */
845 .endif
847 ALLOC_PT_GPREGS_ON_STACK
849 .if \paranoid
850 .if \paranoid == 1
851 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
852 jnz 1f
853 .endif
854 call paranoid_entry
855 .else
856 call error_entry
857 .endif
858 UNWIND_HINT_REGS
859 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
861 .if \paranoid
862 .if \shift_ist != -1
863 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
864 .else
865 TRACE_IRQS_OFF
866 .endif
867 .endif
869 movq %rsp, %rdi /* pt_regs pointer */
871 .if \has_error_code
872 movq ORIG_RAX(%rsp), %rsi /* get error code */
873 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
874 .else
875 xorl %esi, %esi /* no error code */
876 .endif
878 .if \shift_ist != -1
879 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
880 .endif
882 call \do_sym
884 .if \shift_ist != -1
885 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
886 .endif
888 /* these procedures expect "no swapgs" flag in ebx */
889 .if \paranoid
890 jmp paranoid_exit
891 .else
892 jmp error_exit
893 .endif
895 .if \paranoid == 1
896 /*
897 * Paranoid entry from userspace. Switch stacks and treat it
898 * as a normal entry. This means that paranoid handlers
899 * run in real process context if user_mode(regs).
900 */
901 1:
902 call error_entry
905 movq %rsp, %rdi /* pt_regs pointer */
906 call sync_regs
907 movq %rax, %rsp /* switch stack */
909 movq %rsp, %rdi /* pt_regs pointer */
911 .if \has_error_code
912 movq ORIG_RAX(%rsp), %rsi /* get error code */
913 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
914 .else
915 xorl %esi, %esi /* no error code */
916 .endif
918 call \do_sym
920 jmp error_exit /* %ebx: no swapgs flag */
921 .endif
922 END(\sym)
923 .endm
925 #ifdef CONFIG_TRACING
926 .macro trace_idtentry sym do_sym has_error_code:req
927 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
928 idtentry \sym \do_sym has_error_code=\has_error_code
929 .endm
930 #else
931 .macro trace_idtentry sym do_sym has_error_code:req
932 idtentry \sym \do_sym has_error_code=\has_error_code
933 .endm
934 #endif
936 idtentry divide_error do_divide_error has_error_code=0
937 idtentry overflow do_overflow has_error_code=0
938 idtentry bounds do_bounds has_error_code=0
939 idtentry invalid_op do_invalid_op has_error_code=0
940 idtentry device_not_available do_device_not_available has_error_code=0
941 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
942 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
943 idtentry invalid_TSS do_invalid_TSS has_error_code=1
944 idtentry segment_not_present do_segment_not_present has_error_code=1
945 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
946 idtentry coprocessor_error do_coprocessor_error has_error_code=0
947 idtentry alignment_check do_alignment_check has_error_code=1
948 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
951 /*
952 * Reload gs selector with exception handling
953 * edi: new selector
954 */
955 ENTRY(native_load_gs_index)
956 FRAME_BEGIN
957 pushfq
958 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
959 SWAPGS
960 .Lgs_change:
961 movl %edi, %gs
962 2: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
963 SWAPGS
964 popfq
965 FRAME_END
966 ret
967 ENDPROC(native_load_gs_index)
968 EXPORT_SYMBOL(native_load_gs_index)
970 _ASM_EXTABLE(.Lgs_change, bad_gs)
971 .section .fixup, "ax"
972 /* running with kernelgs */
973 bad_gs:
974 SWAPGS /* switch back to user gs */
975 .macro ZAP_GS
976 /* This can't be a string because the preprocessor needs to see it. */
977 movl $__USER_DS, %eax
978 movl %eax, %gs
979 .endm
980 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
981 xorl %eax, %eax
982 movl %eax, %gs
983 jmp 2b
984 .previous
986 /* Call softirq on interrupt stack. Interrupts are off. */
987 ENTRY(do_softirq_own_stack)
988 pushq %rbp
989 mov %rsp, %rbp
990 ENTER_IRQ_STACK regs=0 old_rsp=%r11
991 call __do_softirq
992 LEAVE_IRQ_STACK regs=0
993 leaveq
994 ret
995 ENDPROC(do_softirq_own_stack)
997 #ifdef CONFIG_XEN
998 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1000 /*
1001 * A note on the "critical region" in our callback handler.
1002 * We want to avoid stacking callback handlers due to events occurring
1003 * during handling of the last event. To do this, we keep events disabled
1004 * until we've done all processing. HOWEVER, we must enable events before
1005 * popping the stack frame (can't be done atomically) and so it would still
1006 * be possible to get enough handler activations to overflow the stack.
1007 * Although unlikely, bugs of that kind are hard to track down, so we'd
1008 * like to avoid the possibility.
1009 * So, on entry to the handler we detect whether we interrupted an
1010 * existing activation in its critical region -- if so, we pop the current
1011 * activation and restart the handler using the previous one.
1012 */
1013 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1015 /*
1016 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1017 * see the correct pointer to the pt_regs
1018 */
1019 UNWIND_HINT_FUNC
1020 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1021 UNWIND_HINT_REGS
1023 ENTER_IRQ_STACK old_rsp=%r10
1024 call xen_evtchn_do_upcall
1025 LEAVE_IRQ_STACK
1027 #ifndef CONFIG_PREEMPT
1028 call xen_maybe_preempt_hcall
1029 #endif
1030 jmp error_exit
1031 END(xen_do_hypervisor_callback)
1033 /*
1034 * Hypervisor uses this for application faults while it executes.
1035 * We get here for two reasons:
1036 * 1. Fault while reloading DS, ES, FS or GS
1037 * 2. Fault while executing IRET
1038 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1039 * registers that could be reloaded and zeroed the others.
1040 * Category 2 we fix up by killing the current process. We cannot use the
1041 * normal Linux return path in this case because if we use the IRET hypercall
1042 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1043 * We distinguish between categories by comparing each saved segment register
1044 * with its current contents: any discrepancy means we in category 1.
1045 */
1046 ENTRY(xen_failsafe_callback)
1047 UNWIND_HINT_EMPTY
1048 movl %ds, %ecx
1049 cmpw %cx, 0x10(%rsp)
1050 jne 1f
1051 movl %es, %ecx
1052 cmpw %cx, 0x18(%rsp)
1053 jne 1f
1054 movl %fs, %ecx
1055 cmpw %cx, 0x20(%rsp)
1056 jne 1f
1057 movl %gs, %ecx
1058 cmpw %cx, 0x28(%rsp)
1059 jne 1f
1060 /* All segments match their saved values => Category 2 (Bad IRET). */
1061 movq (%rsp), %rcx
1062 movq 8(%rsp), %r11
1063 addq $0x30, %rsp
1064 pushq $0 /* RIP */
1065 pushq %r11
1066 pushq %rcx
1067 UNWIND_HINT_IRET_REGS offset=8
1068 jmp general_protection
1069 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1070 movq (%rsp), %rcx
1071 movq 8(%rsp), %r11
1072 addq $0x30, %rsp
1073 UNWIND_HINT_IRET_REGS
1074 pushq $-1 /* orig_ax = -1 => not a system call */
1075 ALLOC_PT_GPREGS_ON_STACK
1076 SAVE_C_REGS
1077 SAVE_EXTRA_REGS
1078 ENCODE_FRAME_POINTER
1079 jmp error_exit
1080 END(xen_failsafe_callback)
1082 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1083 xen_hvm_callback_vector xen_evtchn_do_upcall
1085 #endif /* CONFIG_XEN */
1087 #if IS_ENABLED(CONFIG_HYPERV)
1088 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1089 hyperv_callback_vector hyperv_vector_handler
1090 #endif /* CONFIG_HYPERV */
1092 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1093 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1094 idtentry stack_segment do_stack_segment has_error_code=1
1096 #ifdef CONFIG_XEN
1097 idtentry xen_debug do_debug has_error_code=0
1098 idtentry xen_int3 do_int3 has_error_code=0
1099 idtentry xen_stack_segment do_stack_segment has_error_code=1
1100 #endif
1102 idtentry general_protection do_general_protection has_error_code=1
1103 trace_idtentry page_fault do_page_fault has_error_code=1
1105 #ifdef CONFIG_KVM_GUEST
1106 idtentry async_page_fault do_async_page_fault has_error_code=1
1107 #endif
1109 #ifdef CONFIG_X86_MCE
1110 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
1111 #endif
1113 /*
1114 * Save all registers in pt_regs, and switch gs if needed.
1115 * Use slow, but surefire "are we in kernel?" check.
1116 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1117 */
1118 ENTRY(paranoid_entry)
1119 UNWIND_HINT_FUNC
1120 cld
1121 SAVE_C_REGS 8
1122 SAVE_EXTRA_REGS 8
1123 ENCODE_FRAME_POINTER 8
1124 movl $1, %ebx
1125 movl $MSR_GS_BASE, %ecx
1126 rdmsr
1127 testl %edx, %edx
1128 js 1f /* negative -> in kernel */
1129 SWAPGS
1130 xorl %ebx, %ebx
1131 1: ret
1132 END(paranoid_entry)
1134 /*
1135 * "Paranoid" exit path from exception stack. This is invoked
1136 * only on return from non-NMI IST interrupts that came
1137 * from kernel space.
1138 *
1139 * We may be returning to very strange contexts (e.g. very early
1140 * in syscall entry), so checking for preemption here would
1141 * be complicated. Fortunately, we there's no good reason
1142 * to try to handle preemption here.
1143 *
1144 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1145 */
1146 ENTRY(paranoid_exit)
1147 UNWIND_HINT_REGS
1148 DISABLE_INTERRUPTS(CLBR_ANY)
1149 TRACE_IRQS_OFF_DEBUG
1150 testl %ebx, %ebx /* swapgs needed? */
1151 jnz paranoid_exit_no_swapgs
1152 TRACE_IRQS_IRETQ
1153 SWAPGS_UNSAFE_STACK
1154 jmp paranoid_exit_restore
1155 paranoid_exit_no_swapgs:
1156 TRACE_IRQS_IRETQ_DEBUG
1157 paranoid_exit_restore:
1158 RESTORE_EXTRA_REGS
1159 RESTORE_C_REGS
1160 REMOVE_PT_GPREGS_FROM_STACK 8
1161 INTERRUPT_RETURN
1162 END(paranoid_exit)
1164 /*
1165 * Save all registers in pt_regs, and switch gs if needed.
1166 * Return: EBX=0: came from user mode; EBX=1: otherwise
1167 */
1168 ENTRY(error_entry)
1169 UNWIND_HINT_FUNC
1170 cld
1171 SAVE_C_REGS 8
1172 SAVE_EXTRA_REGS 8
1173 ENCODE_FRAME_POINTER 8
1174 xorl %ebx, %ebx
1175 testb $3, CS+8(%rsp)
1176 jz .Lerror_kernelspace
1178 /*
1179 * We entered from user mode or we're pretending to have entered
1180 * from user mode due to an IRET fault.
1181 */
1182 SWAPGS
1184 .Lerror_entry_from_usermode_after_swapgs:
1185 /*
1186 * We need to tell lockdep that IRQs are off. We can't do this until
1187 * we fix gsbase, and we should do it before enter_from_user_mode
1188 * (which can take locks).
1189 */
1190 TRACE_IRQS_OFF
1191 CALL_enter_from_user_mode
1192 ret
1194 .Lerror_entry_done:
1195 TRACE_IRQS_OFF
1196 ret
1198 /*
1199 * There are two places in the kernel that can potentially fault with
1200 * usergs. Handle them here. B stepping K8s sometimes report a
1201 * truncated RIP for IRET exceptions returning to compat mode. Check
1202 * for these here too.
1203 */
1204 .Lerror_kernelspace:
1205 incl %ebx
1206 leaq native_irq_return_iret(%rip), %rcx
1207 cmpq %rcx, RIP+8(%rsp)
1208 je .Lerror_bad_iret
1209 movl %ecx, %eax /* zero extend */
1210 cmpq %rax, RIP+8(%rsp)
1211 je .Lbstep_iret
1212 cmpq $.Lgs_change, RIP+8(%rsp)
1213 jne .Lerror_entry_done
1215 /*
1216 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1217 * gsbase and proceed. We'll fix up the exception and land in
1218 * .Lgs_change's error handler with kernel gsbase.
1219 */
1220 SWAPGS
1221 jmp .Lerror_entry_done
1223 .Lbstep_iret:
1224 /* Fix truncated RIP */
1225 movq %rcx, RIP+8(%rsp)
1226 /* fall through */
1228 .Lerror_bad_iret:
1229 /*
1230 * We came from an IRET to user mode, so we have user gsbase.
1231 * Switch to kernel gsbase:
1232 */
1233 SWAPGS
1235 /*
1236 * Pretend that the exception came from user mode: set up pt_regs
1237 * as if we faulted immediately after IRET and clear EBX so that
1238 * error_exit knows that we will be returning to user mode.
1239 */
1240 mov %rsp, %rdi
1241 call fixup_bad_iret
1242 mov %rax, %rsp
1243 decl %ebx
1244 jmp .Lerror_entry_from_usermode_after_swapgs
1245 END(error_entry)
1248 /*
1249 * On entry, EBX is a "return to kernel mode" flag:
1250 * 1: already in kernel mode, don't need SWAPGS
1251 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1252 */
1253 ENTRY(error_exit)
1254 UNWIND_HINT_REGS
1255 DISABLE_INTERRUPTS(CLBR_ANY)
1256 TRACE_IRQS_OFF
1257 testl %ebx, %ebx
1258 jnz retint_kernel
1259 jmp retint_user
1260 END(error_exit)
1262 /* Runs on exception stack */
1263 ENTRY(nmi)
1264 UNWIND_HINT_IRET_REGS
1265 /*
1266 * Fix up the exception frame if we're on Xen.
1267 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1268 * one value to the stack on native, so it may clobber the rdx
1269 * scratch slot, but it won't clobber any of the important
1270 * slots past it.
1271 *
1272 * Xen is a different story, because the Xen frame itself overlaps
1273 * the "NMI executing" variable.
1274 */
1275 PARAVIRT_ADJUST_EXCEPTION_FRAME
1277 /*
1278 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1279 * the iretq it performs will take us out of NMI context.
1280 * This means that we can have nested NMIs where the next
1281 * NMI is using the top of the stack of the previous NMI. We
1282 * can't let it execute because the nested NMI will corrupt the
1283 * stack of the previous NMI. NMI handlers are not re-entrant
1284 * anyway.
1285 *
1286 * To handle this case we do the following:
1287 * Check the a special location on the stack that contains
1288 * a variable that is set when NMIs are executing.
1289 * The interrupted task's stack is also checked to see if it
1290 * is an NMI stack.
1291 * If the variable is not set and the stack is not the NMI
1292 * stack then:
1293 * o Set the special variable on the stack
1294 * o Copy the interrupt frame into an "outermost" location on the
1295 * stack
1296 * o Copy the interrupt frame into an "iret" location on the stack
1297 * o Continue processing the NMI
1298 * If the variable is set or the previous stack is the NMI stack:
1299 * o Modify the "iret" location to jump to the repeat_nmi
1300 * o return back to the first NMI
1301 *
1302 * Now on exit of the first NMI, we first clear the stack variable
1303 * The NMI stack will tell any nested NMIs at that point that it is
1304 * nested. Then we pop the stack normally with iret, and if there was
1305 * a nested NMI that updated the copy interrupt stack frame, a
1306 * jump will be made to the repeat_nmi code that will handle the second
1307 * NMI.
1308 *
1309 * However, espfix prevents us from directly returning to userspace
1310 * with a single IRET instruction. Similarly, IRET to user mode
1311 * can fault. We therefore handle NMIs from user space like
1312 * other IST entries.
1313 */
1315 /* Use %rdx as our temp variable throughout */
1316 pushq %rdx
1318 testb $3, CS-RIP+8(%rsp)
1319 jz .Lnmi_from_kernel
1321 /*
1322 * NMI from user mode. We need to run on the thread stack, but we
1323 * can't go through the normal entry paths: NMIs are masked, and
1324 * we don't want to enable interrupts, because then we'll end
1325 * up in an awkward situation in which IRQs are on but NMIs
1326 * are off.
1327 *
1328 * We also must not push anything to the stack before switching
1329 * stacks lest we corrupt the "NMI executing" variable.
1330 */
1332 SWAPGS_UNSAFE_STACK
1333 cld
1334 movq %rsp, %rdx
1335 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1336 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1337 pushq 5*8(%rdx) /* pt_regs->ss */
1338 pushq 4*8(%rdx) /* pt_regs->rsp */
1339 pushq 3*8(%rdx) /* pt_regs->flags */
1340 pushq 2*8(%rdx) /* pt_regs->cs */
1341 pushq 1*8(%rdx) /* pt_regs->rip */
1342 UNWIND_HINT_IRET_REGS
1343 pushq $-1 /* pt_regs->orig_ax */
1344 pushq %rdi /* pt_regs->di */
1345 pushq %rsi /* pt_regs->si */
1346 pushq (%rdx) /* pt_regs->dx */
1347 pushq %rcx /* pt_regs->cx */
1348 pushq %rax /* pt_regs->ax */
1349 pushq %r8 /* pt_regs->r8 */
1350 pushq %r9 /* pt_regs->r9 */
1351 pushq %r10 /* pt_regs->r10 */
1352 pushq %r11 /* pt_regs->r11 */
1353 pushq %rbx /* pt_regs->rbx */
1354 pushq %rbp /* pt_regs->rbp */
1355 pushq %r12 /* pt_regs->r12 */
1356 pushq %r13 /* pt_regs->r13 */
1357 pushq %r14 /* pt_regs->r14 */
1358 pushq %r15 /* pt_regs->r15 */
1359 UNWIND_HINT_REGS
1360 ENCODE_FRAME_POINTER
1362 /*
1363 * At this point we no longer need to worry about stack damage
1364 * due to nesting -- we're on the normal thread stack and we're
1365 * done with the NMI stack.
1366 */
1368 movq %rsp, %rdi
1369 movq $-1, %rsi
1370 call do_nmi
1372 /*
1373 * Return back to user mode. We must *not* do the normal exit
1374 * work, because we don't want to enable interrupts.
1375 */
1376 SWAPGS
1377 jmp restore_regs_and_iret
1379 .Lnmi_from_kernel:
1380 /*
1381 * Here's what our stack frame will look like:
1382 * +---------------------------------------------------------+
1383 * | original SS |
1384 * | original Return RSP |
1385 * | original RFLAGS |
1386 * | original CS |
1387 * | original RIP |
1388 * +---------------------------------------------------------+
1389 * | temp storage for rdx |
1390 * +---------------------------------------------------------+
1391 * | "NMI executing" variable |
1392 * +---------------------------------------------------------+
1393 * | iret SS } Copied from "outermost" frame |
1394 * | iret Return RSP } on each loop iteration; overwritten |
1395 * | iret RFLAGS } by a nested NMI to force another |
1396 * | iret CS } iteration if needed. |
1397 * | iret RIP } |
1398 * +---------------------------------------------------------+
1399 * | outermost SS } initialized in first_nmi; |
1400 * | outermost Return RSP } will not be changed before |
1401 * | outermost RFLAGS } NMI processing is done. |
1402 * | outermost CS } Copied to "iret" frame on each |
1403 * | outermost RIP } iteration. |
1404 * +---------------------------------------------------------+
1405 * | pt_regs |
1406 * +---------------------------------------------------------+
1407 *
1408 * The "original" frame is used by hardware. Before re-enabling
1409 * NMIs, we need to be done with it, and we need to leave enough
1410 * space for the asm code here.
1411 *
1412 * We return by executing IRET while RSP points to the "iret" frame.
1413 * That will either return for real or it will loop back into NMI
1414 * processing.
1415 *
1416 * The "outermost" frame is copied to the "iret" frame on each
1417 * iteration of the loop, so each iteration starts with the "iret"
1418 * frame pointing to the final return target.
1419 */
1421 /*
1422 * Determine whether we're a nested NMI.
1423 *
1424 * If we interrupted kernel code between repeat_nmi and
1425 * end_repeat_nmi, then we are a nested NMI. We must not
1426 * modify the "iret" frame because it's being written by
1427 * the outer NMI. That's okay; the outer NMI handler is
1428 * about to about to call do_nmi anyway, so we can just
1429 * resume the outer NMI.
1430 */
1432 movq $repeat_nmi, %rdx
1433 cmpq 8(%rsp), %rdx
1434 ja 1f
1435 movq $end_repeat_nmi, %rdx
1436 cmpq 8(%rsp), %rdx
1437 ja nested_nmi_out
1438 1:
1440 /*
1441 * Now check "NMI executing". If it's set, then we're nested.
1442 * This will not detect if we interrupted an outer NMI just
1443 * before IRET.
1444 */
1445 cmpl $1, -8(%rsp)
1446 je nested_nmi
1448 /*
1449 * Now test if the previous stack was an NMI stack. This covers
1450 * the case where we interrupt an outer NMI after it clears
1451 * "NMI executing" but before IRET. We need to be careful, though:
1452 * there is one case in which RSP could point to the NMI stack
1453 * despite there being no NMI active: naughty userspace controls
1454 * RSP at the very beginning of the SYSCALL targets. We can
1455 * pull a fast one on naughty userspace, though: we program
1456 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1457 * if it controls the kernel's RSP. We set DF before we clear
1458 * "NMI executing".
1459 */
1460 lea 6*8(%rsp), %rdx
1461 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1462 cmpq %rdx, 4*8(%rsp)
1463 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1464 ja first_nmi
1466 subq $EXCEPTION_STKSZ, %rdx
1467 cmpq %rdx, 4*8(%rsp)
1468 /* If it is below the NMI stack, it is a normal NMI */
1469 jb first_nmi
1471 /* Ah, it is within the NMI stack. */
1473 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1474 jz first_nmi /* RSP was user controlled. */
1476 /* This is a nested NMI. */
1478 nested_nmi:
1479 /*
1480 * Modify the "iret" frame to point to repeat_nmi, forcing another
1481 * iteration of NMI handling.
1482 */
1483 subq $8, %rsp
1484 leaq -10*8(%rsp), %rdx
1485 pushq $__KERNEL_DS
1486 pushq %rdx
1487 pushfq
1488 pushq $__KERNEL_CS
1489 pushq $repeat_nmi
1491 /* Put stack back */
1492 addq $(6*8), %rsp
1494 nested_nmi_out:
1495 popq %rdx
1497 /* We are returning to kernel mode, so this cannot result in a fault. */
1498 INTERRUPT_RETURN
1500 first_nmi:
1501 /* Restore rdx. */
1502 movq (%rsp), %rdx
1504 /* Make room for "NMI executing". */
1505 pushq $0
1507 /* Leave room for the "iret" frame */
1508 subq $(5*8), %rsp
1510 /* Copy the "original" frame to the "outermost" frame */
1511 .rept 5
1512 pushq 11*8(%rsp)
1513 .endr
1514 UNWIND_HINT_IRET_REGS
1516 /* Everything up to here is safe from nested NMIs */
1518 #ifdef CONFIG_DEBUG_ENTRY
1519 /*
1520 * For ease of testing, unmask NMIs right away. Disabled by
1521 * default because IRET is very expensive.
1522 */
1523 pushq $0 /* SS */
1524 pushq %rsp /* RSP (minus 8 because of the previous push) */
1525 addq $8, (%rsp) /* Fix up RSP */
1526 pushfq /* RFLAGS */
1527 pushq $__KERNEL_CS /* CS */
1528 pushq $1f /* RIP */
1529 INTERRUPT_RETURN /* continues at repeat_nmi below */
1530 UNWIND_HINT_IRET_REGS
1531 1:
1532 #endif
1534 repeat_nmi:
1535 /*
1536 * If there was a nested NMI, the first NMI's iret will return
1537 * here. But NMIs are still enabled and we can take another
1538 * nested NMI. The nested NMI checks the interrupted RIP to see
1539 * if it is between repeat_nmi and end_repeat_nmi, and if so
1540 * it will just return, as we are about to repeat an NMI anyway.
1541 * This makes it safe to copy to the stack frame that a nested
1542 * NMI will update.
1543 *
1544 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1545 * we're repeating an NMI, gsbase has the same value that it had on
1546 * the first iteration. paranoid_entry will load the kernel
1547 * gsbase if needed before we call do_nmi. "NMI executing"
1548 * is zero.
1549 */
1550 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1552 /*
1553 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1554 * here must not modify the "iret" frame while we're writing to
1555 * it or it will end up containing garbage.
1556 */
1557 addq $(10*8), %rsp
1558 .rept 5
1559 pushq -6*8(%rsp)
1560 .endr
1561 subq $(5*8), %rsp
1562 end_repeat_nmi:
1564 /*
1565 * Everything below this point can be preempted by a nested NMI.
1566 * If this happens, then the inner NMI will change the "iret"
1567 * frame to point back to repeat_nmi.
1568 */
1569 pushq $-1 /* ORIG_RAX: no syscall to restart */
1570 ALLOC_PT_GPREGS_ON_STACK
1572 /*
1573 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1574 * as we should not be calling schedule in NMI context.
1575 * Even with normal interrupts enabled. An NMI should not be
1576 * setting NEED_RESCHED or anything that normal interrupts and
1577 * exceptions might do.
1578 */
1579 call paranoid_entry
1580 UNWIND_HINT_REGS
1582 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1583 movq %rsp, %rdi
1584 movq $-1, %rsi
1585 call do_nmi
1587 testl %ebx, %ebx /* swapgs needed? */
1588 jnz nmi_restore
1589 nmi_swapgs:
1590 SWAPGS_UNSAFE_STACK
1591 nmi_restore:
1592 RESTORE_EXTRA_REGS
1593 RESTORE_C_REGS
1595 /* Point RSP at the "iret" frame. */
1596 REMOVE_PT_GPREGS_FROM_STACK 6*8
1598 /*
1599 * Clear "NMI executing". Set DF first so that we can easily
1600 * distinguish the remaining code between here and IRET from
1601 * the SYSCALL entry and exit paths. On a native kernel, we
1602 * could just inspect RIP, but, on paravirt kernels,
1603 * INTERRUPT_RETURN can translate into a jump into a
1604 * hypercall page.
1605 */
1606 std
1607 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1609 /*
1610 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1611 * stack in a single instruction. We are returning to kernel
1612 * mode, so this cannot result in a fault.
1613 */
1614 INTERRUPT_RETURN
1615 END(nmi)
1617 ENTRY(ignore_sysret)
1618 UNWIND_HINT_EMPTY
1619 mov $-ENOSYS, %eax
1620 sysret
1621 END(ignore_sysret)
1623 ENTRY(rewind_stack_do_exit)
1624 UNWIND_HINT_FUNC
1625 /* Prevent any naive code from trying to unwind to our caller. */
1626 xorl %ebp, %ebp
1628 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1629 leaq -PTREGS_SIZE(%rax), %rsp
1630 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1632 call do_exit
1633 END(rewind_stack_do_exit)