2 * Device Tree Source for AM33XX SoC
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
44 compatible = "arm,cortex-a8";
49 * To consider voltage drop between PMIC and SoC,
50 * tolerance value is reduced to 2% from 4% and
51 * voltage value is increased as a precaution.
60 voltage-tolerance = <2>; /* 2 percentage */
62 clocks = <&dpll_mpu_ck>;
65 clock-latency = <300000>; /* From omap-cpufreq driver */
70 compatible = "arm,cortex-a8-pmu";
75 * The soc node represents the soc top level view. It is used for IPs
76 * that are not memory mapped in the MPU view or for the MPU itself.
79 compatible = "ti,omap-infra";
81 compatible = "ti,omap3-mpu";
86 am33xx_control_module: control_module@4a002000 {
87 compatible = "syscon";
88 reg = <0x44e10000 0x7fc>;
91 am33xx_pinmux: pinmux@44e10800 {
92 compatible = "pinctrl-single";
93 reg = <0x44e10800 0x0238>;
96 pinctrl-single,register-width = <32>;
97 pinctrl-single,function-mask = <0x7f>;
101 * XXX: Use a flat representation of the AM33XX interconnect.
102 * The real AM33XX interconnect network is quite complex. Since
103 * it will not bring real advantage to represent that in DT
104 * for the moment, just use a fake OCP bus entry to represent
105 * the whole bus hierarchy.
108 compatible = "simple-bus";
109 #address-cells = <1>;
112 ti,hwmods = "l3_main";
114 prcm: prcm@44e00000 {
115 compatible = "ti,am3-prcm";
116 reg = <0x44e00000 0x4000>;
118 prcm_clocks: clocks {
119 #address-cells = <1>;
123 prcm_clockdomains: clockdomains {
127 scrm: scrm@44e10000 {
128 compatible = "ti,am3-scrm";
129 reg = <0x44e10000 0x2000>;
131 scrm_clocks: clocks {
132 #address-cells = <1>;
136 scrm_clockdomains: clockdomains {
140 cm: syscon@44e10000 {
141 compatible = "ti,am33xx-controlmodule", "syscon";
142 reg = <0x44e10000 0x800>;
145 intc: interrupt-controller@48200000 {
146 compatible = "ti,am33xx-intc";
147 interrupt-controller;
148 #interrupt-cells = <1>;
149 reg = <0x48200000 0x1000>;
152 edma: edma@49000000 {
153 compatible = "ti,edma3";
154 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
155 reg = <0x49000000 0x10000>,
157 interrupts = <12 13 14>;
161 gpio0: gpio@44e07000 {
162 compatible = "ti,omap4-gpio";
166 interrupt-controller;
167 #interrupt-cells = <2>;
168 reg = <0x44e07000 0x1000>;
172 gpio1: gpio@4804c000 {
173 compatible = "ti,omap4-gpio";
177 interrupt-controller;
178 #interrupt-cells = <2>;
179 reg = <0x4804c000 0x1000>;
183 gpio2: gpio@481ac000 {
184 compatible = "ti,omap4-gpio";
188 interrupt-controller;
189 #interrupt-cells = <2>;
190 reg = <0x481ac000 0x1000>;
194 gpio3: gpio@481ae000 {
195 compatible = "ti,omap4-gpio";
199 interrupt-controller;
200 #interrupt-cells = <2>;
201 reg = <0x481ae000 0x1000>;
205 uart0: serial@44e09000 {
206 compatible = "ti,omap3-uart";
208 clock-frequency = <48000000>;
209 reg = <0x44e09000 0x2000>;
212 dmas = <&edma 26>, <&edma 27>;
213 dma-names = "tx", "rx";
216 uart1: serial@48022000 {
217 compatible = "ti,omap3-uart";
219 clock-frequency = <48000000>;
220 reg = <0x48022000 0x2000>;
223 dmas = <&edma 28>, <&edma 29>;
224 dma-names = "tx", "rx";
227 uart2: serial@48024000 {
228 compatible = "ti,omap3-uart";
230 clock-frequency = <48000000>;
231 reg = <0x48024000 0x2000>;
234 dmas = <&edma 30>, <&edma 31>;
235 dma-names = "tx", "rx";
238 uart3: serial@481a6000 {
239 compatible = "ti,omap3-uart";
241 clock-frequency = <48000000>;
242 reg = <0x481a6000 0x2000>;
247 uart4: serial@481a8000 {
248 compatible = "ti,omap3-uart";
250 clock-frequency = <48000000>;
251 reg = <0x481a8000 0x2000>;
256 uart5: serial@481aa000 {
257 compatible = "ti,omap3-uart";
259 clock-frequency = <48000000>;
260 reg = <0x481aa000 0x2000>;
266 compatible = "ti,omap4-i2c";
267 #address-cells = <1>;
270 reg = <0x44e0b000 0x1000>;
276 compatible = "ti,omap4-i2c";
277 #address-cells = <1>;
280 reg = <0x4802a000 0x1000>;
286 compatible = "ti,omap4-i2c";
287 #address-cells = <1>;
290 reg = <0x4819c000 0x1000>;
296 compatible = "ti,omap4-hsmmc";
299 ti,needs-special-reset;
300 ti,needs-special-hs-handling;
303 dma-names = "tx", "rx";
305 interrupt-parent = <&intc>;
306 reg = <0x48060000 0x1000>;
311 compatible = "ti,omap4-hsmmc";
313 ti,needs-special-reset;
316 dma-names = "tx", "rx";
318 interrupt-parent = <&intc>;
319 reg = <0x481d8000 0x1000>;
324 compatible = "ti,omap4-hsmmc";
326 ti,needs-special-reset;
328 interrupt-parent = <&intc>;
329 reg = <0x47810000 0x1000>;
333 hwspinlock: spinlock@480ca000 {
334 compatible = "ti,omap4-hwspinlock";
335 reg = <0x480ca000 0x1000>;
336 ti,hwmods = "spinlock";
341 compatible = "ti,omap3-wdt";
342 ti,hwmods = "wd_timer2";
343 reg = <0x44e35000 0x1000>;
347 dcan0: can@481cc000 {
348 compatible = "ti,am3352-d_can";
349 ti,hwmods = "d_can0";
350 reg = <0x481cc000 0x2000>;
351 clocks = <&dcan0_fck>;
353 syscon-raminit = <&am33xx_control_module 0x644 0>;
358 dcan1: can@481d0000 {
359 compatible = "ti,am3352-d_can";
360 ti,hwmods = "d_can1";
361 reg = <0x481d0000 0x2000>;
362 clocks = <&dcan1_fck>;
364 syscon-raminit = <&am33xx_control_module 0x644 1>;
369 mailbox: mailbox@480C8000 {
370 compatible = "ti,omap4-mailbox";
371 reg = <0x480C8000 0x200>;
373 ti,hwmods = "mailbox";
375 ti,mbox-num-users = <4>;
376 ti,mbox-num-fifos = <8>;
377 mbox_wkupm3: wkup_m3 {
378 ti,mbox-tx = <0 0 0>;
379 ti,mbox-rx = <0 0 3>;
383 timer1: timer@44e31000 {
384 compatible = "ti,am335x-timer-1ms";
385 reg = <0x44e31000 0x400>;
387 ti,hwmods = "timer1";
391 timer2: timer@48040000 {
392 compatible = "ti,am335x-timer";
393 reg = <0x48040000 0x400>;
395 ti,hwmods = "timer2";
398 timer3: timer@48042000 {
399 compatible = "ti,am335x-timer";
400 reg = <0x48042000 0x400>;
402 ti,hwmods = "timer3";
405 timer4: timer@48044000 {
406 compatible = "ti,am335x-timer";
407 reg = <0x48044000 0x400>;
409 ti,hwmods = "timer4";
413 timer5: timer@48046000 {
414 compatible = "ti,am335x-timer";
415 reg = <0x48046000 0x400>;
417 ti,hwmods = "timer5";
421 timer6: timer@48048000 {
422 compatible = "ti,am335x-timer";
423 reg = <0x48048000 0x400>;
425 ti,hwmods = "timer6";
429 timer7: timer@4804a000 {
430 compatible = "ti,am335x-timer";
431 reg = <0x4804a000 0x400>;
433 ti,hwmods = "timer7";
438 compatible = "ti,am3352-rtc", "ti,da830-rtc";
439 reg = <0x44e3e000 0x1000>;
446 compatible = "ti,omap4-mcspi";
447 #address-cells = <1>;
449 reg = <0x48030000 0x400>;
457 dma-names = "tx0", "rx0", "tx1", "rx1";
462 compatible = "ti,omap4-mcspi";
463 #address-cells = <1>;
465 reg = <0x481a0000 0x400>;
473 dma-names = "tx0", "rx0", "tx1", "rx1";
478 compatible = "ti,am33xx-usb";
479 reg = <0x47400000 0x1000>;
481 #address-cells = <1>;
483 ti,hwmods = "usb_otg_hs";
486 usb_ctrl_mod: control@44e10620 {
487 compatible = "ti,am335x-usb-ctrl-module";
488 reg = <0x44e10620 0x10
490 reg-names = "phy_ctrl", "wakeup";
494 usb0_phy: usb-phy@47401300 {
495 compatible = "ti,am335x-usb-phy";
496 reg = <0x47401300 0x100>;
499 ti,ctrl_mod = <&usb_ctrl_mod>;
503 compatible = "ti,musb-am33xx";
505 reg = <0x47401400 0x400
507 reg-names = "mc", "control";
510 interrupt-names = "mc";
512 mentor,multipoint = <1>;
513 mentor,num-eps = <16>;
514 mentor,ram-bits = <12>;
515 mentor,power = <500>;
518 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
519 &cppi41dma 2 0 &cppi41dma 3 0
520 &cppi41dma 4 0 &cppi41dma 5 0
521 &cppi41dma 6 0 &cppi41dma 7 0
522 &cppi41dma 8 0 &cppi41dma 9 0
523 &cppi41dma 10 0 &cppi41dma 11 0
524 &cppi41dma 12 0 &cppi41dma 13 0
525 &cppi41dma 14 0 &cppi41dma 0 1
526 &cppi41dma 1 1 &cppi41dma 2 1
527 &cppi41dma 3 1 &cppi41dma 4 1
528 &cppi41dma 5 1 &cppi41dma 6 1
529 &cppi41dma 7 1 &cppi41dma 8 1
530 &cppi41dma 9 1 &cppi41dma 10 1
531 &cppi41dma 11 1 &cppi41dma 12 1
532 &cppi41dma 13 1 &cppi41dma 14 1>;
534 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
535 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
537 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
538 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
542 usb1_phy: usb-phy@47401b00 {
543 compatible = "ti,am335x-usb-phy";
544 reg = <0x47401b00 0x100>;
547 ti,ctrl_mod = <&usb_ctrl_mod>;
551 compatible = "ti,musb-am33xx";
553 reg = <0x47401c00 0x400
555 reg-names = "mc", "control";
557 interrupt-names = "mc";
559 mentor,multipoint = <1>;
560 mentor,num-eps = <16>;
561 mentor,ram-bits = <12>;
562 mentor,power = <500>;
565 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
566 &cppi41dma 17 0 &cppi41dma 18 0
567 &cppi41dma 19 0 &cppi41dma 20 0
568 &cppi41dma 21 0 &cppi41dma 22 0
569 &cppi41dma 23 0 &cppi41dma 24 0
570 &cppi41dma 25 0 &cppi41dma 26 0
571 &cppi41dma 27 0 &cppi41dma 28 0
572 &cppi41dma 29 0 &cppi41dma 15 1
573 &cppi41dma 16 1 &cppi41dma 17 1
574 &cppi41dma 18 1 &cppi41dma 19 1
575 &cppi41dma 20 1 &cppi41dma 21 1
576 &cppi41dma 22 1 &cppi41dma 23 1
577 &cppi41dma 24 1 &cppi41dma 25 1
578 &cppi41dma 26 1 &cppi41dma 27 1
579 &cppi41dma 28 1 &cppi41dma 29 1>;
581 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
582 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
584 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
585 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
589 cppi41dma: dma-controller@47402000 {
590 compatible = "ti,am3359-cppi41";
591 reg = <0x47400000 0x1000
595 reg-names = "glue", "controller", "scheduler", "queuemgr";
597 interrupt-names = "glue";
599 #dma-channels = <30>;
600 #dma-requests = <256>;
605 epwmss0: epwmss@48300000 {
606 compatible = "ti,am33xx-pwmss";
607 reg = <0x48300000 0x10>;
608 ti,hwmods = "epwmss0";
609 #address-cells = <1>;
612 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
613 0x48300180 0x48300180 0x80 /* EQEP */
614 0x48300200 0x48300200 0x80>; /* EHRPWM */
616 ecap0: ecap@48300100 {
617 compatible = "ti,am33xx-ecap";
619 reg = <0x48300100 0x80>;
621 interrupt-names = "ecap0";
626 ehrpwm0: ehrpwm@48300200 {
627 compatible = "ti,am33xx-ehrpwm";
629 reg = <0x48300200 0x80>;
630 ti,hwmods = "ehrpwm0";
635 epwmss1: epwmss@48302000 {
636 compatible = "ti,am33xx-pwmss";
637 reg = <0x48302000 0x10>;
638 ti,hwmods = "epwmss1";
639 #address-cells = <1>;
642 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
643 0x48302180 0x48302180 0x80 /* EQEP */
644 0x48302200 0x48302200 0x80>; /* EHRPWM */
646 ecap1: ecap@48302100 {
647 compatible = "ti,am33xx-ecap";
649 reg = <0x48302100 0x80>;
651 interrupt-names = "ecap1";
656 ehrpwm1: ehrpwm@48302200 {
657 compatible = "ti,am33xx-ehrpwm";
659 reg = <0x48302200 0x80>;
660 ti,hwmods = "ehrpwm1";
665 epwmss2: epwmss@48304000 {
666 compatible = "ti,am33xx-pwmss";
667 reg = <0x48304000 0x10>;
668 ti,hwmods = "epwmss2";
669 #address-cells = <1>;
672 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
673 0x48304180 0x48304180 0x80 /* EQEP */
674 0x48304200 0x48304200 0x80>; /* EHRPWM */
676 ecap2: ecap@48304100 {
677 compatible = "ti,am33xx-ecap";
679 reg = <0x48304100 0x80>;
681 interrupt-names = "ecap2";
686 ehrpwm2: ehrpwm@48304200 {
687 compatible = "ti,am33xx-ehrpwm";
689 reg = <0x48304200 0x80>;
690 ti,hwmods = "ehrpwm2";
695 mac: ethernet@4a100000 {
696 compatible = "ti,cpsw";
697 ti,hwmods = "cpgmac0";
698 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
699 clock-names = "fck", "cpts";
700 cpdma_channels = <8>;
701 ale_entries = <1024>;
702 bd_ram_size = <0x2000>;
705 mac_control = <0x20>;
708 cpts_clock_mult = <0x80000000>;
709 cpts_clock_shift = <29>;
710 reg = <0x4a100000 0x800
712 #address-cells = <1>;
714 interrupt-parent = <&intc>;
721 interrupts = <40 41 42 43>;
726 davinci_mdio: mdio@4a101000 {
727 compatible = "ti,davinci_mdio";
728 #address-cells = <1>;
730 ti,hwmods = "davinci_mdio";
731 bus_freq = <1000000>;
732 reg = <0x4a101000 0x100>;
736 cpsw_emac0: slave@4a100200 {
737 /* Filled in by U-Boot */
738 mac-address = [ 00 00 00 00 00 00 ];
741 cpsw_emac1: slave@4a100300 {
742 /* Filled in by U-Boot */
743 mac-address = [ 00 00 00 00 00 00 ];
746 phy_sel: cpsw-phy-sel@44e10650 {
747 compatible = "ti,am3352-cpsw-phy-sel";
748 reg= <0x44e10650 0x4>;
749 reg-names = "gmii-sel";
753 ocmcram: ocmcram@40300000 {
754 compatible = "mmio-sram";
755 reg = <0x40300000 0x10000>; /* 64k */
758 wkup_m3: wkup_m3@44d00000 {
759 compatible = "ti,am3353-wkup-m3";
760 reg = <0x44d00000 0x4000 /* M3 UMEM */
761 0x44d80000 0x2000>; /* M3 DMEM */
762 ti,hwmods = "wkup_m3";
767 compatible = "ti,am3352-elm";
768 reg = <0x48080000 0x2000>;
774 lcdc: lcdc@4830e000 {
775 compatible = "ti,am33xx-tilcdc";
776 reg = <0x4830e000 0x1000>;
777 interrupt-parent = <&intc>;
783 tscadc: tscadc@44e0d000 {
784 compatible = "ti,am3359-tscadc";
785 reg = <0x44e0d000 0x1000>;
786 interrupt-parent = <&intc>;
788 ti,hwmods = "adc_tsc";
792 compatible = "ti,am3359-tsc";
795 #io-channel-cells = <1>;
796 compatible = "ti,am3359-adc";
800 gpmc: gpmc@50000000 {
801 compatible = "ti,am3352-gpmc";
804 reg = <0x50000000 0x2000>;
807 gpmc,num-waitpins = <2>;
808 #address-cells = <2>;
813 sham: sham@53100000 {
814 compatible = "ti,omap4-sham";
816 reg = <0x53100000 0x200>;
823 compatible = "ti,omap4-aes";
825 reg = <0x53500000 0xa0>;
829 dma-names = "tx", "rx";
832 mcasp0: mcasp@48038000 {
833 compatible = "ti,am33xx-mcasp-audio";
834 ti,hwmods = "mcasp0";
835 reg = <0x48038000 0x2000>,
836 <0x46000000 0x400000>;
837 reg-names = "mpu", "dat";
838 interrupts = <80>, <81>;
839 interrupt-names = "tx", "rx";
843 dma-names = "tx", "rx";
846 mcasp1: mcasp@4803C000 {
847 compatible = "ti,am33xx-mcasp-audio";
848 ti,hwmods = "mcasp1";
849 reg = <0x4803C000 0x2000>,
850 <0x46400000 0x400000>;
851 reg-names = "mpu", "dat";
852 interrupts = <82>, <83>;
853 interrupt-names = "tx", "rx";
857 dma-names = "tx", "rx";
861 compatible = "ti,omap4-rng";
863 reg = <0x48310000 0x2000>;
869 /include/ "am33xx-clocks.dtsi"