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net: asix: Avoid looping when the device is disconnected
[linux-2.6/btrfs-unstable.git] / drivers / net / usb / asix_devices.c
blobebeb73014fdfc3693677ef0224f551a3ad80ee8e
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
20 */
21
22 #include "asix.h"
23
24 #define PHY_MODE_MARVELL 0x0000
25 #define MII_MARVELL_LED_CTRL 0x0018
26 #define MII_MARVELL_STATUS 0x001b
27 #define MII_MARVELL_CTRL 0x0014
28
29 #define MARVELL_LED_MANUAL 0x0019
30
31 #define MARVELL_STATUS_HWCFG 0x0004
32
33 #define MARVELL_CTRL_TXDELAY 0x0002
34 #define MARVELL_CTRL_RXDELAY 0x0080
35
36 #define PHY_MODE_RTL8211CL 0x000C
37
38 struct ax88172_int_data {
39 __le16 res1;
40 u8 link;
41 __le16 res2;
42 u8 status;
43 __le16 res3;
44 } __packed;
45
46 static void asix_status(struct usbnet *dev, struct urb *urb)
47 {
48 struct ax88172_int_data *event;
49 int link;
50
51 if (urb->actual_length < 8)
52 return;
53
54 event = urb->transfer_buffer;
55 link = event->link & 0x01;
56 if (netif_carrier_ok(dev->net) != link) {
57 usbnet_link_change(dev, link, 1);
58 netdev_dbg(dev->net, "Link Status is: %d\n", link);
59 }
60 }
61
62 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
63 {
64 if (is_valid_ether_addr(addr)) {
65 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
66 } else {
67 netdev_info(dev->net, "invalid hw address, using random\n");
68 eth_hw_addr_random(dev->net);
69 }
70 }
71
72 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
73 static u32 asix_get_phyid(struct usbnet *dev)
74 {
75 int phy_reg;
76 u32 phy_id;
77 int i;
78
79 /* Poll for the rare case the FW or phy isn't ready yet. */
80 for (i = 0; i < 100; i++) {
81 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
82 if (phy_reg < 0)
83 return 0;
84 if (phy_reg != 0 && phy_reg != 0xFFFF)
85 break;
86 mdelay(1);
87 }
88
89 if (phy_reg <= 0 || phy_reg == 0xFFFF)
90 return 0;
91
92 phy_id = (phy_reg & 0xffff) << 16;
93
94 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
95 if (phy_reg < 0)
96 return 0;
97
98 phy_id |= (phy_reg & 0xffff);
99
100 return phy_id;
101 }
102
103 static u32 asix_get_link(struct net_device *net)
104 {
105 struct usbnet *dev = netdev_priv(net);
106
107 return mii_link_ok(&dev->mii);
108 }
109
110 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
111 {
112 struct usbnet *dev = netdev_priv(net);
113
114 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
115 }
116
117 /* We need to override some ethtool_ops so we require our
118 own structure so we don't interfere with other usbnet
119 devices that may be connected at the same time. */
120 static const struct ethtool_ops ax88172_ethtool_ops = {
121 .get_drvinfo = asix_get_drvinfo,
122 .get_link = asix_get_link,
123 .get_msglevel = usbnet_get_msglevel,
124 .set_msglevel = usbnet_set_msglevel,
125 .get_wol = asix_get_wol,
126 .set_wol = asix_set_wol,
127 .get_eeprom_len = asix_get_eeprom_len,
128 .get_eeprom = asix_get_eeprom,
129 .set_eeprom = asix_set_eeprom,
130 .get_settings = usbnet_get_settings,
131 .set_settings = usbnet_set_settings,
132 .nway_reset = usbnet_nway_reset,
133 };
134
135 static void ax88172_set_multicast(struct net_device *net)
136 {
137 struct usbnet *dev = netdev_priv(net);
138 struct asix_data *data = (struct asix_data *)&dev->data;
139 u8 rx_ctl = 0x8c;
140
141 if (net->flags & IFF_PROMISC) {
142 rx_ctl |= 0x01;
143 } else if (net->flags & IFF_ALLMULTI ||
144 netdev_mc_count(net) > AX_MAX_MCAST) {
145 rx_ctl |= 0x02;
146 } else if (netdev_mc_empty(net)) {
147 /* just broadcast and directed */
148 } else {
149 /* We use the 20 byte dev->data
150 * for our 8 byte filter buffer
151 * to avoid allocating memory that
152 * is tricky to free later */
153 struct netdev_hw_addr *ha;
154 u32 crc_bits;
155
156 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
157
158 /* Build the multicast hash filter. */
159 netdev_for_each_mc_addr(ha, net) {
160 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
161 data->multi_filter[crc_bits >> 3] |=
162 1 << (crc_bits & 7);
163 }
164
165 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
166 AX_MCAST_FILTER_SIZE, data->multi_filter);
167
168 rx_ctl |= 0x10;
169 }
170
171 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
172 }
173
174 static int ax88172_link_reset(struct usbnet *dev)
175 {
176 u8 mode;
177 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
178
179 mii_check_media(&dev->mii, 1, 1);
180 mii_ethtool_gset(&dev->mii, &ecmd);
181 mode = AX88172_MEDIUM_DEFAULT;
182
183 if (ecmd.duplex != DUPLEX_FULL)
184 mode |= ~AX88172_MEDIUM_FD;
185
186 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
187 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
188
189 asix_write_medium_mode(dev, mode, 0);
190
191 return 0;
192 }
193
194 static const struct net_device_ops ax88172_netdev_ops = {
195 .ndo_open = usbnet_open,
196 .ndo_stop = usbnet_stop,
197 .ndo_start_xmit = usbnet_start_xmit,
198 .ndo_tx_timeout = usbnet_tx_timeout,
199 .ndo_change_mtu = usbnet_change_mtu,
200 .ndo_set_mac_address = eth_mac_addr,
201 .ndo_validate_addr = eth_validate_addr,
202 .ndo_do_ioctl = asix_ioctl,
203 .ndo_set_rx_mode = ax88172_set_multicast,
204 };
205
206 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
207 {
208 int ret = 0;
209 u8 buf[ETH_ALEN];
210 int i;
211 unsigned long gpio_bits = dev->driver_info->data;
212
213 usbnet_get_endpoints(dev,intf);
214
215 /* Toggle the GPIOs in a manufacturer/model specific way */
216 for (i = 2; i >= 0; i--) {
217 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
218 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
219 if (ret < 0)
220 goto out;
221 msleep(5);
222 }
223
224 ret = asix_write_rx_ctl(dev, 0x80, 0);
225 if (ret < 0)
226 goto out;
227
228 /* Get the MAC address */
229 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
230 0, 0, ETH_ALEN, buf, 0);
231 if (ret < 0) {
232 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
233 ret);
234 goto out;
235 }
236
237 asix_set_netdev_dev_addr(dev, buf);
238
239 /* Initialize MII structure */
240 dev->mii.dev = dev->net;
241 dev->mii.mdio_read = asix_mdio_read;
242 dev->mii.mdio_write = asix_mdio_write;
243 dev->mii.phy_id_mask = 0x3f;
244 dev->mii.reg_num_mask = 0x1f;
245 dev->mii.phy_id = asix_get_phy_addr(dev);
246
247 dev->net->netdev_ops = &ax88172_netdev_ops;
248 dev->net->ethtool_ops = &ax88172_ethtool_ops;
249 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
250 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
251
252 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
253 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
254 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
255 mii_nway_restart(&dev->mii);
256
257 return 0;
258
259 out:
260 return ret;
261 }
262
263 static const struct ethtool_ops ax88772_ethtool_ops = {
264 .get_drvinfo = asix_get_drvinfo,
265 .get_link = asix_get_link,
266 .get_msglevel = usbnet_get_msglevel,
267 .set_msglevel = usbnet_set_msglevel,
268 .get_wol = asix_get_wol,
269 .set_wol = asix_set_wol,
270 .get_eeprom_len = asix_get_eeprom_len,
271 .get_eeprom = asix_get_eeprom,
272 .set_eeprom = asix_set_eeprom,
273 .get_settings = usbnet_get_settings,
274 .set_settings = usbnet_set_settings,
275 .nway_reset = usbnet_nway_reset,
276 };
277
278 static int ax88772_link_reset(struct usbnet *dev)
279 {
280 u16 mode;
281 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
282
283 mii_check_media(&dev->mii, 1, 1);
284 mii_ethtool_gset(&dev->mii, &ecmd);
285 mode = AX88772_MEDIUM_DEFAULT;
286
287 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
288 mode &= ~AX_MEDIUM_PS;
289
290 if (ecmd.duplex != DUPLEX_FULL)
291 mode &= ~AX_MEDIUM_FD;
292
293 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
294 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
295
296 asix_write_medium_mode(dev, mode, 0);
297
298 return 0;
299 }
300
301 static int ax88772_reset(struct usbnet *dev)
302 {
303 struct asix_data *data = (struct asix_data *)&dev->data;
304 int ret;
305
306 /* Rewrite MAC address */
307 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
308 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
309 ETH_ALEN, data->mac_addr, 0);
310 if (ret < 0)
311 goto out;
312
313 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
314 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
315 if (ret < 0)
316 goto out;
317
318 asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
319 if (ret < 0)
320 goto out;
321
322 return 0;
323
324 out:
325 return ret;
326 }
327
328 static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
329 {
330 struct asix_data *data = (struct asix_data *)&dev->data;
331 int ret, embd_phy;
332 u16 rx_ctl;
333
334 ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
335 AX_GPIO_GPO2EN, 5, in_pm);
336 if (ret < 0)
337 goto out;
338
339 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
340
341 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy,
342 0, 0, NULL, in_pm);
343 if (ret < 0) {
344 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
345 goto out;
346 }
347
348 if (embd_phy) {
349 ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
350 if (ret < 0)
351 goto out;
352
353 usleep_range(10000, 11000);
354
355 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
356 if (ret < 0)
357 goto out;
358
359 msleep(60);
360
361 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
362 in_pm);
363 if (ret < 0)
364 goto out;
365 } else {
366 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
367 in_pm);
368 if (ret < 0)
369 goto out;
370 }
371
372 msleep(150);
373
374 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
375 MII_PHYSID1))){
376 ret = -EIO;
377 goto out;
378 }
379
380 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
381 if (ret < 0)
382 goto out;
383
384 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
385 if (ret < 0)
386 goto out;
387
388 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
389 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
390 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
391 if (ret < 0) {
392 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
393 goto out;
394 }
395
396 /* Rewrite MAC address */
397 ether_addr_copy(data->mac_addr, dev->net->dev_addr);
398 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
399 ETH_ALEN, data->mac_addr, in_pm);
400 if (ret < 0)
401 goto out;
402
403 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
404 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
405 if (ret < 0)
406 goto out;
407
408 rx_ctl = asix_read_rx_ctl(dev, in_pm);
409 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
410 rx_ctl);
411
412 rx_ctl = asix_read_medium_status(dev, in_pm);
413 netdev_dbg(dev->net,
414 "Medium Status is 0x%04x after all initializations\n",
415 rx_ctl);
416
417 return 0;
418
419 out:
420 return ret;
421 }
422
423 static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
424 {
425 struct asix_data *data = (struct asix_data *)&dev->data;
426 int ret, embd_phy;
427 u16 rx_ctl;
428 u8 chipcode = 0;
429
430 ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
431 if (ret < 0)
432 goto out;
433
434 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
435
436 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy |
437 AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
438 if (ret < 0) {
439 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
440 goto out;
441 }
442 usleep_range(10000, 11000);
443
444 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
445 if (ret < 0)
446 goto out;
447
448 usleep_range(10000, 11000);
449
450 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
451 if (ret < 0)
452 goto out;
453
454 msleep(160);
455
456 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
457 if (ret < 0)
458 goto out;
459
460 ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
461 if (ret < 0)
462 goto out;
463
464 msleep(200);
465
466 if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
467 MII_PHYSID1))) {
468 ret = -1;
469 goto out;
470 }
471
472 ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0,
473 0, 1, &chipcode, in_pm);
474 if (ret < 0)
475 goto out;
476
477 if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772B_CHIPCODE) {
478 ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
479 0, NULL, in_pm);
480 if (ret < 0) {
481 netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
482 ret);
483 goto out;
484 }
485 }
486
487 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
488 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
489 AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
490 if (ret < 0) {
491 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
492 goto out;
493 }
494
495 /* Rewrite MAC address */
496 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
497 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
498 data->mac_addr, in_pm);
499 if (ret < 0)
500 goto out;
501
502 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
503 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
504 if (ret < 0)
505 goto out;
506
507 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
508 if (ret < 0)
509 return ret;
510
511 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
512 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
513 if (ret < 0)
514 goto out;
515
516 rx_ctl = asix_read_rx_ctl(dev, in_pm);
517 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
518 rx_ctl);
519
520 rx_ctl = asix_read_medium_status(dev, in_pm);
521 netdev_dbg(dev->net,
522 "Medium Status is 0x%04x after all initializations\n",
523 rx_ctl);
524
525 return 0;
526
527 out:
528 return ret;
529 }
530
531 static const struct net_device_ops ax88772_netdev_ops = {
532 .ndo_open = usbnet_open,
533 .ndo_stop = usbnet_stop,
534 .ndo_start_xmit = usbnet_start_xmit,
535 .ndo_tx_timeout = usbnet_tx_timeout,
536 .ndo_change_mtu = usbnet_change_mtu,
537 .ndo_set_mac_address = asix_set_mac_address,
538 .ndo_validate_addr = eth_validate_addr,
539 .ndo_do_ioctl = asix_ioctl,
540 .ndo_set_rx_mode = asix_set_multicast,
541 };
542
543 static void ax88772_suspend(struct usbnet *dev)
544 {
545 struct asix_common_private *priv = dev->driver_priv;
546
547 /* Preserve BMCR for restoring */
548 priv->presvd_phy_bmcr =
549 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_BMCR);
550
551 /* Preserve ANAR for restoring */
552 priv->presvd_phy_advertise =
553 asix_mdio_read_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE);
554 }
555
556 static int asix_suspend(struct usb_interface *intf, pm_message_t message)
557 {
558 struct usbnet *dev = usb_get_intfdata(intf);
559 struct asix_common_private *priv = dev->driver_priv;
560
561 if (priv->suspend)
562 priv->suspend(dev);
563
564 return usbnet_suspend(intf, message);
565 }
566
567 static void ax88772_restore_phy(struct usbnet *dev)
568 {
569 struct asix_common_private *priv = dev->driver_priv;
570
571 if (priv->presvd_phy_advertise) {
572 /* Restore Advertisement control reg */
573 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_ADVERTISE,
574 priv->presvd_phy_advertise);
575
576 /* Restore BMCR */
577 asix_mdio_write_nopm(dev->net, dev->mii.phy_id, MII_BMCR,
578 priv->presvd_phy_bmcr);
579
580 priv->presvd_phy_advertise = 0;
581 priv->presvd_phy_bmcr = 0;
582 }
583 }
584
585 static void ax88772_resume(struct usbnet *dev)
586 {
587 int i;
588
589 for (i = 0; i < 3; i++)
590 if (!ax88772_hw_reset(dev, 1))
591 break;
592 ax88772_restore_phy(dev);
593 }
594
595 static void ax88772a_resume(struct usbnet *dev)
596 {
597 int i;
598
599 for (i = 0; i < 3; i++) {
600 if (!ax88772a_hw_reset(dev, 1))
601 break;
602 }
603
604 ax88772_restore_phy(dev);
605 }
606
607 static int asix_resume(struct usb_interface *intf)
608 {
609 struct usbnet *dev = usb_get_intfdata(intf);
610 struct asix_common_private *priv = dev->driver_priv;
611
612 if (priv->resume)
613 priv->resume(dev);
614
615 return usbnet_resume(intf);
616 }
617
618 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
619 {
620 int ret, i;
621 u8 buf[ETH_ALEN], chipcode = 0;
622 u32 phyid;
623 struct asix_common_private *priv;
624
625 usbnet_get_endpoints(dev,intf);
626
627 /* Get the MAC address */
628 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
629 for (i = 0; i < (ETH_ALEN >> 1); i++) {
630 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
631 0, 2, buf + i * 2, 0);
632 if (ret < 0)
633 break;
634 }
635 } else {
636 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
637 0, 0, ETH_ALEN, buf, 0);
638 }
639
640 if (ret < 0) {
641 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
642 return ret;
643 }
644
645 asix_set_netdev_dev_addr(dev, buf);
646
647 /* Initialize MII structure */
648 dev->mii.dev = dev->net;
649 dev->mii.mdio_read = asix_mdio_read;
650 dev->mii.mdio_write = asix_mdio_write;
651 dev->mii.phy_id_mask = 0x1f;
652 dev->mii.reg_num_mask = 0x1f;
653 dev->mii.phy_id = asix_get_phy_addr(dev);
654
655 dev->net->netdev_ops = &ax88772_netdev_ops;
656 dev->net->ethtool_ops = &ax88772_ethtool_ops;
657 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
658 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
659
660 asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode, 0);
661 chipcode &= AX_CHIPCODE_MASK;
662
663 (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
664 ax88772a_hw_reset(dev, 0);
665
666 /* Read PHYID register *AFTER* the PHY was reset properly */
667 phyid = asix_get_phyid(dev);
668 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
669
670 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
671 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
672 /* hard_mtu is still the default - the device does not support
673 jumbo eth frames */
674 dev->rx_urb_size = 2048;
675 }
676
677 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
678 if (!dev->driver_priv)
679 return -ENOMEM;
680
681 priv = dev->driver_priv;
682
683 priv->presvd_phy_bmcr = 0;
684 priv->presvd_phy_advertise = 0;
685 if (chipcode == AX_AX88772_CHIPCODE) {
686 priv->resume = ax88772_resume;
687 priv->suspend = ax88772_suspend;
688 } else {
689 priv->resume = ax88772a_resume;
690 priv->suspend = ax88772_suspend;
691 }
692
693 return 0;
694 }
695
696 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
697 {
698 kfree(dev->driver_priv);
699 }
700
701 static const struct ethtool_ops ax88178_ethtool_ops = {
702 .get_drvinfo = asix_get_drvinfo,
703 .get_link = asix_get_link,
704 .get_msglevel = usbnet_get_msglevel,
705 .set_msglevel = usbnet_set_msglevel,
706 .get_wol = asix_get_wol,
707 .set_wol = asix_set_wol,
708 .get_eeprom_len = asix_get_eeprom_len,
709 .get_eeprom = asix_get_eeprom,
710 .set_eeprom = asix_set_eeprom,
711 .get_settings = usbnet_get_settings,
712 .set_settings = usbnet_set_settings,
713 .nway_reset = usbnet_nway_reset,
714 };
715
716 static int marvell_phy_init(struct usbnet *dev)
717 {
718 struct asix_data *data = (struct asix_data *)&dev->data;
719 u16 reg;
720
721 netdev_dbg(dev->net, "marvell_phy_init()\n");
722
723 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
724 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
725
726 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
727 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
728
729 if (data->ledmode) {
730 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
731 MII_MARVELL_LED_CTRL);
732 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
733
734 reg &= 0xf8ff;
735 reg |= (1 + 0x0100);
736 asix_mdio_write(dev->net, dev->mii.phy_id,
737 MII_MARVELL_LED_CTRL, reg);
738
739 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
740 MII_MARVELL_LED_CTRL);
741 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
742 reg &= 0xfc0f;
743 }
744
745 return 0;
746 }
747
748 static int rtl8211cl_phy_init(struct usbnet *dev)
749 {
750 struct asix_data *data = (struct asix_data *)&dev->data;
751
752 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
753
754 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
755 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
756 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
757 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
758 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
759
760 if (data->ledmode == 12) {
761 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
762 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
763 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
764 }
765
766 return 0;
767 }
768
769 static int marvell_led_status(struct usbnet *dev, u16 speed)
770 {
771 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
772
773 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
774
775 /* Clear out the center LED bits - 0x03F0 */
776 reg &= 0xfc0f;
777
778 switch (speed) {
779 case SPEED_1000:
780 reg |= 0x03e0;
781 break;
782 case SPEED_100:
783 reg |= 0x03b0;
784 break;
785 default:
786 reg |= 0x02f0;
787 }
788
789 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
790 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
791
792 return 0;
793 }
794
795 static int ax88178_reset(struct usbnet *dev)
796 {
797 struct asix_data *data = (struct asix_data *)&dev->data;
798 int ret;
799 __le16 eeprom;
800 u8 status;
801 int gpio0 = 0;
802 u32 phyid;
803
804 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
805 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
806
807 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
808 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
809 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
810
811 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
812
813 if (eeprom == cpu_to_le16(0xffff)) {
814 data->phymode = PHY_MODE_MARVELL;
815 data->ledmode = 0;
816 gpio0 = 1;
817 } else {
818 data->phymode = le16_to_cpu(eeprom) & 0x7F;
819 data->ledmode = le16_to_cpu(eeprom) >> 8;
820 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
821 }
822 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
823
824 /* Power up external GigaPHY through AX88178 GPIO pin */
825 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
826 AX_GPIO_GPO1EN, 40, 0);
827 if ((le16_to_cpu(eeprom) >> 8) != 1) {
828 asix_write_gpio(dev, 0x003c, 30, 0);
829 asix_write_gpio(dev, 0x001c, 300, 0);
830 asix_write_gpio(dev, 0x003c, 30, 0);
831 } else {
832 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
833 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
834 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
835 }
836
837 /* Read PHYID register *AFTER* powering up PHY */
838 phyid = asix_get_phyid(dev);
839 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
840
841 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
842 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
843
844 asix_sw_reset(dev, 0, 0);
845 msleep(150);
846
847 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
848 msleep(150);
849
850 asix_write_rx_ctl(dev, 0, 0);
851
852 if (data->phymode == PHY_MODE_MARVELL) {
853 marvell_phy_init(dev);
854 msleep(60);
855 } else if (data->phymode == PHY_MODE_RTL8211CL)
856 rtl8211cl_phy_init(dev);
857
858 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
859 BMCR_RESET | BMCR_ANENABLE);
860 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
861 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
862 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
863 ADVERTISE_1000FULL);
864
865 mii_nway_restart(&dev->mii);
866
867 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
868 if (ret < 0)
869 return ret;
870
871 /* Rewrite MAC address */
872 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
873 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
874 data->mac_addr, 0);
875 if (ret < 0)
876 return ret;
877
878 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
879 if (ret < 0)
880 return ret;
881
882 return 0;
883 }
884
885 static int ax88178_link_reset(struct usbnet *dev)
886 {
887 u16 mode;
888 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
889 struct asix_data *data = (struct asix_data *)&dev->data;
890 u32 speed;
891
892 netdev_dbg(dev->net, "ax88178_link_reset()\n");
893
894 mii_check_media(&dev->mii, 1, 1);
895 mii_ethtool_gset(&dev->mii, &ecmd);
896 mode = AX88178_MEDIUM_DEFAULT;
897 speed = ethtool_cmd_speed(&ecmd);
898
899 if (speed == SPEED_1000)
900 mode |= AX_MEDIUM_GM;
901 else if (speed == SPEED_100)
902 mode |= AX_MEDIUM_PS;
903 else
904 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
905
906 mode |= AX_MEDIUM_ENCK;
907
908 if (ecmd.duplex == DUPLEX_FULL)
909 mode |= AX_MEDIUM_FD;
910 else
911 mode &= ~AX_MEDIUM_FD;
912
913 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
914 speed, ecmd.duplex, mode);
915
916 asix_write_medium_mode(dev, mode, 0);
917
918 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
919 marvell_led_status(dev, speed);
920
921 return 0;
922 }
923
924 static void ax88178_set_mfb(struct usbnet *dev)
925 {
926 u16 mfb = AX_RX_CTL_MFB_16384;
927 u16 rxctl;
928 u16 medium;
929 int old_rx_urb_size = dev->rx_urb_size;
930
931 if (dev->hard_mtu < 2048) {
932 dev->rx_urb_size = 2048;
933 mfb = AX_RX_CTL_MFB_2048;
934 } else if (dev->hard_mtu < 4096) {
935 dev->rx_urb_size = 4096;
936 mfb = AX_RX_CTL_MFB_4096;
937 } else if (dev->hard_mtu < 8192) {
938 dev->rx_urb_size = 8192;
939 mfb = AX_RX_CTL_MFB_8192;
940 } else if (dev->hard_mtu < 16384) {
941 dev->rx_urb_size = 16384;
942 mfb = AX_RX_CTL_MFB_16384;
943 }
944
945 rxctl = asix_read_rx_ctl(dev, 0);
946 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
947
948 medium = asix_read_medium_status(dev, 0);
949 if (dev->net->mtu > 1500)
950 medium |= AX_MEDIUM_JFE;
951 else
952 medium &= ~AX_MEDIUM_JFE;
953 asix_write_medium_mode(dev, medium, 0);
954
955 if (dev->rx_urb_size > old_rx_urb_size)
956 usbnet_unlink_rx_urbs(dev);
957 }
958
959 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
960 {
961 struct usbnet *dev = netdev_priv(net);
962 int ll_mtu = new_mtu + net->hard_header_len + 4;
963
964 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
965
966 if (new_mtu <= 0 || ll_mtu > 16384)
967 return -EINVAL;
968
969 if ((ll_mtu % dev->maxpacket) == 0)
970 return -EDOM;
971
972 net->mtu = new_mtu;
973 dev->hard_mtu = net->mtu + net->hard_header_len;
974 ax88178_set_mfb(dev);
975
976 /* max qlen depend on hard_mtu and rx_urb_size */
977 usbnet_update_max_qlen(dev);
978
979 return 0;
980 }
981
982 static const struct net_device_ops ax88178_netdev_ops = {
983 .ndo_open = usbnet_open,
984 .ndo_stop = usbnet_stop,
985 .ndo_start_xmit = usbnet_start_xmit,
986 .ndo_tx_timeout = usbnet_tx_timeout,
987 .ndo_set_mac_address = asix_set_mac_address,
988 .ndo_validate_addr = eth_validate_addr,
989 .ndo_set_rx_mode = asix_set_multicast,
990 .ndo_do_ioctl = asix_ioctl,
991 .ndo_change_mtu = ax88178_change_mtu,
992 };
993
994 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
995 {
996 int ret;
997 u8 buf[ETH_ALEN];
998
999 usbnet_get_endpoints(dev,intf);
1000
1001 /* Get the MAC address */
1002 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1003 if (ret < 0) {
1004 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1005 return ret;
1006 }
1007
1008 asix_set_netdev_dev_addr(dev, buf);
1009
1010 /* Initialize MII structure */
1011 dev->mii.dev = dev->net;
1012 dev->mii.mdio_read = asix_mdio_read;
1013 dev->mii.mdio_write = asix_mdio_write;
1014 dev->mii.phy_id_mask = 0x1f;
1015 dev->mii.reg_num_mask = 0xff;
1016 dev->mii.supports_gmii = 1;
1017 dev->mii.phy_id = asix_get_phy_addr(dev);
1018
1019 dev->net->netdev_ops = &ax88178_netdev_ops;
1020 dev->net->ethtool_ops = &ax88178_ethtool_ops;
1021
1022 /* Blink LEDS so users know driver saw dongle */
1023 asix_sw_reset(dev, 0, 0);
1024 msleep(150);
1025
1026 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1027 msleep(150);
1028
1029 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1030 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1031 /* hard_mtu is still the default - the device does not support
1032 jumbo eth frames */
1033 dev->rx_urb_size = 2048;
1034 }
1035
1036 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1037 if (!dev->driver_priv)
1038 return -ENOMEM;
1039
1040 return 0;
1041 }
1042
1043 static const struct driver_info ax8817x_info = {
1044 .description = "ASIX AX8817x USB 2.0 Ethernet",
1045 .bind = ax88172_bind,
1046 .status = asix_status,
1047 .link_reset = ax88172_link_reset,
1048 .reset = ax88172_link_reset,
1049 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1050 .data = 0x00130103,
1051 };
1052
1053 static const struct driver_info dlink_dub_e100_info = {
1054 .description = "DLink DUB-E100 USB Ethernet",
1055 .bind = ax88172_bind,
1056 .status = asix_status,
1057 .link_reset = ax88172_link_reset,
1058 .reset = ax88172_link_reset,
1059 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1060 .data = 0x009f9d9f,
1061 };
1062
1063 static const struct driver_info netgear_fa120_info = {
1064 .description = "Netgear FA-120 USB Ethernet",
1065 .bind = ax88172_bind,
1066 .status = asix_status,
1067 .link_reset = ax88172_link_reset,
1068 .reset = ax88172_link_reset,
1069 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1070 .data = 0x00130103,
1071 };
1072
1073 static const struct driver_info hawking_uf200_info = {
1074 .description = "Hawking UF200 USB Ethernet",
1075 .bind = ax88172_bind,
1076 .status = asix_status,
1077 .link_reset = ax88172_link_reset,
1078 .reset = ax88172_link_reset,
1079 .flags = FLAG_ETHER | FLAG_LINK_INTR,
1080 .data = 0x001f1d1f,
1081 };
1082
1083 static const struct driver_info ax88772_info = {
1084 .description = "ASIX AX88772 USB 2.0 Ethernet",
1085 .bind = ax88772_bind,
1086 .unbind = ax88772_unbind,
1087 .status = asix_status,
1088 .link_reset = ax88772_link_reset,
1089 .reset = ax88772_reset,
1090 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1091 .rx_fixup = asix_rx_fixup_common,
1092 .tx_fixup = asix_tx_fixup,
1093 };
1094
1095 static const struct driver_info ax88772b_info = {
1096 .description = "ASIX AX88772B USB 2.0 Ethernet",
1097 .bind = ax88772_bind,
1098 .unbind = ax88772_unbind,
1099 .status = asix_status,
1100 .link_reset = ax88772_link_reset,
1101 .reset = ax88772_reset,
1102 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1103 FLAG_MULTI_PACKET,
1104 .rx_fixup = asix_rx_fixup_common,
1105 .tx_fixup = asix_tx_fixup,
1106 .data = FLAG_EEPROM_MAC,
1107 };
1108
1109 static const struct driver_info ax88178_info = {
1110 .description = "ASIX AX88178 USB 2.0 Ethernet",
1111 .bind = ax88178_bind,
1112 .unbind = ax88772_unbind,
1113 .status = asix_status,
1114 .link_reset = ax88178_link_reset,
1115 .reset = ax88178_reset,
1116 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1117 FLAG_MULTI_PACKET,
1118 .rx_fixup = asix_rx_fixup_common,
1119 .tx_fixup = asix_tx_fixup,
1120 };
1121
1122 /*
1123 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1124 * no-name packaging.
1125 * USB device strings are:
1126 * 1: Manufacturer: USBLINK
1127 * 2: Product: HG20F9 USB2.0
1128 * 3: Serial: 000003
1129 * Appears to be compatible with Asix 88772B.
1130 */
1131 static const struct driver_info hg20f9_info = {
1132 .description = "HG20F9 USB 2.0 Ethernet",
1133 .bind = ax88772_bind,
1134 .unbind = ax88772_unbind,
1135 .status = asix_status,
1136 .link_reset = ax88772_link_reset,
1137 .reset = ax88772_reset,
1138 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1139 FLAG_MULTI_PACKET,
1140 .rx_fixup = asix_rx_fixup_common,
1141 .tx_fixup = asix_tx_fixup,
1142 .data = FLAG_EEPROM_MAC,
1143 };
1144
1145 static const struct usb_device_id products [] = {
1146 {
1147 // Linksys USB200M
1148 USB_DEVICE (0x077b, 0x2226),
1149 .driver_info = (unsigned long) &ax8817x_info,
1150 }, {
1151 // Netgear FA120
1152 USB_DEVICE (0x0846, 0x1040),
1153 .driver_info = (unsigned long) &netgear_fa120_info,
1154 }, {
1155 // DLink DUB-E100
1156 USB_DEVICE (0x2001, 0x1a00),
1157 .driver_info = (unsigned long) &dlink_dub_e100_info,
1158 }, {
1159 // Intellinet, ST Lab USB Ethernet
1160 USB_DEVICE (0x0b95, 0x1720),
1161 .driver_info = (unsigned long) &ax8817x_info,
1162 }, {
1163 // Hawking UF200, TrendNet TU2-ET100
1164 USB_DEVICE (0x07b8, 0x420a),
1165 .driver_info = (unsigned long) &hawking_uf200_info,
1166 }, {
1167 // Billionton Systems, USB2AR
1168 USB_DEVICE (0x08dd, 0x90ff),
1169 .driver_info = (unsigned long) &ax8817x_info,
1170 }, {
1171 // Billionton Systems, GUSB2AM-1G-B
1172 USB_DEVICE(0x08dd, 0x0114),
1173 .driver_info = (unsigned long) &ax88178_info,
1174 }, {
1175 // ATEN UC210T
1176 USB_DEVICE (0x0557, 0x2009),
1177 .driver_info = (unsigned long) &ax8817x_info,
1178 }, {
1179 // Buffalo LUA-U2-KTX
1180 USB_DEVICE (0x0411, 0x003d),
1181 .driver_info = (unsigned long) &ax8817x_info,
1182 }, {
1183 // Buffalo LUA-U2-GT 10/100/1000
1184 USB_DEVICE (0x0411, 0x006e),
1185 .driver_info = (unsigned long) &ax88178_info,
1186 }, {
1187 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1188 USB_DEVICE (0x6189, 0x182d),
1189 .driver_info = (unsigned long) &ax8817x_info,
1190 }, {
1191 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1192 USB_DEVICE (0x0df6, 0x0056),
1193 .driver_info = (unsigned long) &ax88178_info,
1194 }, {
1195 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1196 USB_DEVICE (0x0df6, 0x061c),
1197 .driver_info = (unsigned long) &ax88178_info,
1198 }, {
1199 // corega FEther USB2-TX
1200 USB_DEVICE (0x07aa, 0x0017),
1201 .driver_info = (unsigned long) &ax8817x_info,
1202 }, {
1203 // Surecom EP-1427X-2
1204 USB_DEVICE (0x1189, 0x0893),
1205 .driver_info = (unsigned long) &ax8817x_info,
1206 }, {
1207 // goodway corp usb gwusb2e
1208 USB_DEVICE (0x1631, 0x6200),
1209 .driver_info = (unsigned long) &ax8817x_info,
1210 }, {
1211 // JVC MP-PRX1 Port Replicator
1212 USB_DEVICE (0x04f1, 0x3008),
1213 .driver_info = (unsigned long) &ax8817x_info,
1214 }, {
1215 // Lenovo U2L100P 10/100
1216 USB_DEVICE (0x17ef, 0x7203),
1217 .driver_info = (unsigned long)&ax88772b_info,
1218 }, {
1219 // ASIX AX88772B 10/100
1220 USB_DEVICE (0x0b95, 0x772b),
1221 .driver_info = (unsigned long) &ax88772b_info,
1222 }, {
1223 // ASIX AX88772 10/100
1224 USB_DEVICE (0x0b95, 0x7720),
1225 .driver_info = (unsigned long) &ax88772_info,
1226 }, {
1227 // ASIX AX88178 10/100/1000
1228 USB_DEVICE (0x0b95, 0x1780),
1229 .driver_info = (unsigned long) &ax88178_info,
1230 }, {
1231 // Logitec LAN-GTJ/U2A
1232 USB_DEVICE (0x0789, 0x0160),
1233 .driver_info = (unsigned long) &ax88178_info,
1234 }, {
1235 // Linksys USB200M Rev 2
1236 USB_DEVICE (0x13b1, 0x0018),
1237 .driver_info = (unsigned long) &ax88772_info,
1238 }, {
1239 // 0Q0 cable ethernet
1240 USB_DEVICE (0x1557, 0x7720),
1241 .driver_info = (unsigned long) &ax88772_info,
1242 }, {
1243 // DLink DUB-E100 H/W Ver B1
1244 USB_DEVICE (0x07d1, 0x3c05),
1245 .driver_info = (unsigned long) &ax88772_info,
1246 }, {
1247 // DLink DUB-E100 H/W Ver B1 Alternate
1248 USB_DEVICE (0x2001, 0x3c05),
1249 .driver_info = (unsigned long) &ax88772_info,
1250 }, {
1251 // DLink DUB-E100 H/W Ver C1
1252 USB_DEVICE (0x2001, 0x1a02),
1253 .driver_info = (unsigned long) &ax88772_info,
1254 }, {
1255 // Linksys USB1000
1256 USB_DEVICE (0x1737, 0x0039),
1257 .driver_info = (unsigned long) &ax88178_info,
1258 }, {
1259 // IO-DATA ETG-US2
1260 USB_DEVICE (0x04bb, 0x0930),
1261 .driver_info = (unsigned long) &ax88178_info,
1262 }, {
1263 // Belkin F5D5055
1264 USB_DEVICE(0x050d, 0x5055),
1265 .driver_info = (unsigned long) &ax88178_info,
1266 }, {
1267 // Apple USB Ethernet Adapter
1268 USB_DEVICE(0x05ac, 0x1402),
1269 .driver_info = (unsigned long) &ax88772_info,
1270 }, {
1271 // Cables-to-Go USB Ethernet Adapter
1272 USB_DEVICE(0x0b95, 0x772a),
1273 .driver_info = (unsigned long) &ax88772_info,
1274 }, {
1275 // ABOCOM for pci
1276 USB_DEVICE(0x14ea, 0xab11),
1277 .driver_info = (unsigned long) &ax88178_info,
1278 }, {
1279 // ASIX 88772a
1280 USB_DEVICE(0x0db0, 0xa877),
1281 .driver_info = (unsigned long) &ax88772_info,
1282 }, {
1283 // Asus USB Ethernet Adapter
1284 USB_DEVICE (0x0b95, 0x7e2b),
1285 .driver_info = (unsigned long)&ax88772b_info,
1286 }, {
1287 /* ASIX 88172a demo board */
1288 USB_DEVICE(0x0b95, 0x172a),
1289 .driver_info = (unsigned long) &ax88172a_info,
1290 }, {
1291 /*
1292 * USBLINK HG20F9 "USB 2.0 LAN"
1293 * Appears to have gazumped Linksys's manufacturer ID but
1294 * doesn't (yet) conflict with any known Linksys product.
1295 */
1296 USB_DEVICE(0x066b, 0x20f9),
1297 .driver_info = (unsigned long) &hg20f9_info,
1298 },
1299 { }, // END
1300 };
1301 MODULE_DEVICE_TABLE(usb, products);
1302
1303 static struct usb_driver asix_driver = {
1304 .name = DRIVER_NAME,
1305 .id_table = products,
1306 .probe = usbnet_probe,
1307 .suspend = asix_suspend,
1308 .resume = asix_resume,
1309 .disconnect = usbnet_disconnect,
1310 .supports_autosuspend = 1,
1311 .disable_hub_initiated_lpm = 1,
1312 };
1313
1314 module_usb_driver(asix_driver);
1315
1316 MODULE_AUTHOR("David Hollis");
1317 MODULE_VERSION(DRIVER_VERSION);
1318 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1319 MODULE_LICENSE("GPL");
1320
(deprecated) Btrfs devel tree