drivers/net/ethernet/intel/ixgbevf/ixgbevf.h

   1 /*******************************************************************************
   2
   3   Intel 82599 Virtual Function driver
   4   Copyright(c) 1999 - 2012 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #ifndef _IXGBEVF_H_
  29 #define _IXGBEVF_H_
  30
  31 #include <linux/types.h>
  32 #include <linux/bitops.h>
  33 #include <linux/timer.h>
  34 #include <linux/io.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/if_vlan.h>
  37 #include <linux/u64_stats_sync.h>
  38
  39 #include "vf.h"
  40
  41 #ifdef CONFIG_NET_RX_BUSY_POLL
  42 #include <net/busy_poll.h>
  43 #define BP_EXTENDED_STATS
  44 #endif
  45
  46 /* wrapper around a pointer to a socket buffer,
  47  * so a DMA handle can be stored along with the buffer */
  48 struct ixgbevf_tx_buffer {
  49         struct sk_buff *skb;
  50         dma_addr_t dma;
  51         unsigned long time_stamp;
  52         union ixgbe_adv_tx_desc *next_to_watch;
  53         u16 length;
  54         u16 mapped_as_page;
  55 };
  56
  57 struct ixgbevf_rx_buffer {
  58         struct sk_buff *skb;
  59         dma_addr_t dma;
  60 };
  61
  62 struct ixgbevf_ring {
  63         struct ixgbevf_ring *next;
  64         struct net_device *netdev;
  65         struct device *dev;
  66         void *desc;                     /* descriptor ring memory */
  67         dma_addr_t dma;                 /* phys. address of descriptor ring */
  68         unsigned int size;              /* length in bytes */
  69         unsigned int count;             /* amount of descriptors */
  70         unsigned int next_to_use;
  71         unsigned int next_to_clean;
  72
  73         int queue_index; /* needed for multiqueue queue management */
  74         union {
  75                 struct ixgbevf_tx_buffer *tx_buffer_info;
  76                 struct ixgbevf_rx_buffer *rx_buffer_info;
  77         };
  78
  79         u64                     total_bytes;
  80         u64                     total_packets;
  81         struct u64_stats_sync   syncp;
  82         u64 hw_csum_rx_error;
  83         u64 hw_csum_rx_good;
  84 #ifdef BP_EXTENDED_STATS
  85         u64 bp_yields;
  86         u64 bp_misses;
  87         u64 bp_cleaned;
  88 #endif
  89         u8 __iomem *tail;
  90
  91         u16 reg_idx; /* holds the special value that gets the hardware register
  92                       * offset associated with this ring, which is different
  93                       * for DCB and RSS modes */
  94
  95         u16 rx_buf_len;
  96 };
  97
  98 /* How many Rx Buffers do we bundle into one write to the hardware ? */
  99 #define IXGBEVF_RX_BUFFER_WRITE 16      /* Must be power of 2 */
 100
 101 #define MAX_RX_QUEUES IXGBE_VF_MAX_RX_QUEUES
 102 #define MAX_TX_QUEUES IXGBE_VF_MAX_TX_QUEUES
 103
 104 #define IXGBEVF_DEFAULT_TXD   1024
 105 #define IXGBEVF_DEFAULT_RXD   512
 106 #define IXGBEVF_MAX_TXD       4096
 107 #define IXGBEVF_MIN_TXD       64
 108 #define IXGBEVF_MAX_RXD       4096
 109 #define IXGBEVF_MIN_RXD       64
 110
 111 /* Supported Rx Buffer Sizes */
 112 #define IXGBEVF_RXBUFFER_256   256    /* Used for packet split */
 113 #define IXGBEVF_RXBUFFER_2K    2048
 114 #define IXGBEVF_RXBUFFER_4K    4096
 115 #define IXGBEVF_RXBUFFER_8K    8192
 116 #define IXGBEVF_RXBUFFER_10K   10240
 117
 118 #define IXGBEVF_RX_HDR_SIZE IXGBEVF_RXBUFFER_256
 119
 120 #define MAXIMUM_ETHERNET_VLAN_SIZE (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)
 121
 122 #define IXGBE_TX_FLAGS_CSUM             (u32)(1)
 123 #define IXGBE_TX_FLAGS_VLAN             (u32)(1 << 1)
 124 #define IXGBE_TX_FLAGS_TSO              (u32)(1 << 2)
 125 #define IXGBE_TX_FLAGS_IPV4             (u32)(1 << 3)
 126 #define IXGBE_TX_FLAGS_FCOE             (u32)(1 << 4)
 127 #define IXGBE_TX_FLAGS_FSO              (u32)(1 << 5)
 128 #define IXGBE_TX_FLAGS_VLAN_MASK        0xffff0000
 129 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK   0x0000e000
 130 #define IXGBE_TX_FLAGS_VLAN_SHIFT       16
 131
 132 struct ixgbevf_ring_container {
 133         struct ixgbevf_ring *ring;      /* pointer to linked list of rings */
 134         unsigned int total_bytes;       /* total bytes processed this int */
 135         unsigned int total_packets;     /* total packets processed this int */
 136         u8 count;                       /* total number of rings in vector */
 137         u8 itr;                         /* current ITR setting for ring */
 138 };
 139
 140 /* iterator for handling rings in ring container */
 141 #define ixgbevf_for_each_ring(pos, head) \
 142         for (pos = (head).ring; pos != NULL; pos = pos->next)
 143
 144 /* MAX_MSIX_Q_VECTORS of these are allocated,
 145  * but we only use one per queue-specific vector.
 146  */
 147 struct ixgbevf_q_vector {
 148         struct ixgbevf_adapter *adapter;
 149         u16 v_idx;              /* index of q_vector within array, also used for
 150                                  * finding the bit in EICR and friends that
 151                                  * represents the vector for this ring */
 152         u16 itr;                /* Interrupt throttle rate written to EITR */
 153         struct napi_struct napi;
 154         struct ixgbevf_ring_container rx, tx;
 155         char name[IFNAMSIZ + 9];
 156 #ifdef CONFIG_NET_RX_BUSY_POLL
 157         unsigned int state;
 158 #define IXGBEVF_QV_STATE_IDLE           0
 159 #define IXGBEVF_QV_STATE_NAPI           1    /* NAPI owns this QV */
 160 #define IXGBEVF_QV_STATE_POLL           2    /* poll owns this QV */
 161 #define IXGBEVF_QV_STATE_DISABLED       4    /* QV is disabled */
 162 #define IXGBEVF_QV_OWNED (IXGBEVF_QV_STATE_NAPI | IXGBEVF_QV_STATE_POLL)
 163 #define IXGBEVF_QV_LOCKED (IXGBEVF_QV_OWNED | IXGBEVF_QV_STATE_DISABLED)
 164 #define IXGBEVF_QV_STATE_NAPI_YIELD     8    /* NAPI yielded this QV */
 165 #define IXGBEVF_QV_STATE_POLL_YIELD     16   /* poll yielded this QV */
 166 #define IXGBEVF_QV_YIELD (IXGBEVF_QV_STATE_NAPI_YIELD | IXGBEVF_QV_STATE_POLL_YIELD)
 167 #define IXGBEVF_QV_USER_PEND (IXGBEVF_QV_STATE_POLL | IXGBEVF_QV_STATE_POLL_YIELD)
 168         spinlock_t lock;
 169 #endif /* CONFIG_NET_RX_BUSY_POLL */
 170 };
 171 #ifdef CONFIG_NET_RX_BUSY_POLL
 172 static inline void ixgbevf_qv_init_lock(struct ixgbevf_q_vector *q_vector)
 173 {
 174
 175         spin_lock_init(&q_vector->lock);
 176         q_vector->state = IXGBEVF_QV_STATE_IDLE;
 177 }
 178
 179 /* called from the device poll routine to get ownership of a q_vector */
 180 static inline bool ixgbevf_qv_lock_napi(struct ixgbevf_q_vector *q_vector)
 181 {
 182         int rc = true;
 183         spin_lock_bh(&q_vector->lock);
 184         if (q_vector->state & IXGBEVF_QV_LOCKED) {
 185                 WARN_ON(q_vector->state & IXGBEVF_QV_STATE_NAPI);
 186                 q_vector->state |= IXGBEVF_QV_STATE_NAPI_YIELD;
 187                 rc = false;
 188 #ifdef BP_EXTENDED_STATS
 189                 q_vector->tx.ring->bp_yields++;
 190 #endif
 191         } else {
 192                 /* we don't care if someone yielded */
 193                 q_vector->state = IXGBEVF_QV_STATE_NAPI;
 194         }
 195         spin_unlock_bh(&q_vector->lock);
 196         return rc;
 197 }
 198
 199 /* returns true is someone tried to get the qv while napi had it */
 200 static inline bool ixgbevf_qv_unlock_napi(struct ixgbevf_q_vector *q_vector)
 201 {
 202         int rc = false;
 203         spin_lock_bh(&q_vector->lock);
 204         WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_POLL |
 205                                    IXGBEVF_QV_STATE_NAPI_YIELD));
 206
 207         if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
 208                 rc = true;
 209         /* reset state to idle, unless QV is disabled */
 210         q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
 211         spin_unlock_bh(&q_vector->lock);
 212         return rc;
 213 }
 214
 215 /* called from ixgbevf_low_latency_poll() */
 216 static inline bool ixgbevf_qv_lock_poll(struct ixgbevf_q_vector *q_vector)
 217 {
 218         int rc = true;
 219         spin_lock_bh(&q_vector->lock);
 220         if ((q_vector->state & IXGBEVF_QV_LOCKED)) {
 221                 q_vector->state |= IXGBEVF_QV_STATE_POLL_YIELD;
 222                 rc = false;
 223 #ifdef BP_EXTENDED_STATS
 224                 q_vector->rx.ring->bp_yields++;
 225 #endif
 226         } else {
 227                 /* preserve yield marks */
 228                 q_vector->state |= IXGBEVF_QV_STATE_POLL;
 229         }
 230         spin_unlock_bh(&q_vector->lock);
 231         return rc;
 232 }
 233
 234 /* returns true if someone tried to get the qv while it was locked */
 235 static inline bool ixgbevf_qv_unlock_poll(struct ixgbevf_q_vector *q_vector)
 236 {
 237         int rc = false;
 238         spin_lock_bh(&q_vector->lock);
 239         WARN_ON(q_vector->state & (IXGBEVF_QV_STATE_NAPI));
 240
 241         if (q_vector->state & IXGBEVF_QV_STATE_POLL_YIELD)
 242                 rc = true;
 243         /* reset state to idle, unless QV is disabled */
 244         q_vector->state &= IXGBEVF_QV_STATE_DISABLED;
 245         spin_unlock_bh(&q_vector->lock);
 246         return rc;
 247 }
 248
 249 /* true if a socket is polling, even if it did not get the lock */
 250 static inline bool ixgbevf_qv_busy_polling(struct ixgbevf_q_vector *q_vector)
 251 {
 252         WARN_ON(!(q_vector->state & IXGBEVF_QV_OWNED));
 253         return q_vector->state & IXGBEVF_QV_USER_PEND;
 254 }
 255
 256 /* false if QV is currently owned */
 257 static inline bool ixgbevf_qv_disable(struct ixgbevf_q_vector *q_vector)
 258 {
 259         int rc = true;
 260         spin_lock_bh(&q_vector->lock);
 261         if (q_vector->state & IXGBEVF_QV_OWNED)
 262                 rc = false;
 263         q_vector->state |= IXGBEVF_QV_STATE_DISABLED;
 264         spin_unlock_bh(&q_vector->lock);
 265         return rc;
 266 }
 267
 268 #endif /* CONFIG_NET_RX_BUSY_POLL */
 269
 270 /*
 271  * microsecond values for various ITR rates shifted by 2 to fit itr register
 272  * with the first 3 bits reserved 0
 273  */
 274 #define IXGBE_MIN_RSC_ITR       24
 275 #define IXGBE_100K_ITR          40
 276 #define IXGBE_20K_ITR           200
 277 #define IXGBE_10K_ITR           400
 278 #define IXGBE_8K_ITR            500
 279
 280 /* Helper macros to switch between ints/sec and what the register uses.
 281  * And yes, it's the same math going both ways.  The lowest value
 282  * supported by all of the ixgbe hardware is 8.
 283  */
 284 #define EITR_INTS_PER_SEC_TO_REG(_eitr) \
 285         ((_eitr) ? (1000000000 / ((_eitr) * 256)) : 8)
 286 #define EITR_REG_TO_INTS_PER_SEC EITR_INTS_PER_SEC_TO_REG
 287
 288 static inline u16 ixgbevf_desc_unused(struct ixgbevf_ring *ring)
 289 {
 290         u16 ntc = ring->next_to_clean;
 291         u16 ntu = ring->next_to_use;
 292
 293         return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
 294 }
 295
 296 #define IXGBEVF_RX_DESC(R, i)       \
 297         (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
 298 #define IXGBEVF_TX_DESC(R, i)       \
 299         (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
 300 #define IXGBEVF_TX_CTXTDESC(R, i)           \
 301         (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
 302
 303 #define IXGBE_MAX_JUMBO_FRAME_SIZE      9728 /* Maximum Supported Size 9.5KB */
 304
 305 #define OTHER_VECTOR 1
 306 #define NON_Q_VECTORS (OTHER_VECTOR)
 307
 308 #define MAX_MSIX_Q_VECTORS 2
 309
 310 #define MIN_MSIX_Q_VECTORS 1
 311 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
 312
 313 /* board specific private data structure */
 314 struct ixgbevf_adapter {
 315         struct timer_list watchdog_timer;
 316         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 317         u16 bd_number;
 318         struct work_struct reset_task;
 319         struct ixgbevf_q_vector *q_vector[MAX_MSIX_Q_VECTORS];
 320
 321         /* Interrupt Throttle Rate */
 322         u16 rx_itr_setting;
 323         u16 tx_itr_setting;
 324
 325         /* interrupt masks */
 326         u32 eims_enable_mask;
 327         u32 eims_other;
 328
 329         /* TX */
 330         struct ixgbevf_ring *tx_ring[MAX_TX_QUEUES]; /* One per active queue */
 331         int num_tx_queues;
 332         u64 restart_queue;
 333         u64 hw_csum_tx_good;
 334         u64 lsc_int;
 335         u64 hw_tso_ctxt;
 336         u64 hw_tso6_ctxt;
 337         u32 tx_timeout_count;
 338
 339         /* RX */
 340         struct ixgbevf_ring *rx_ring[MAX_TX_QUEUES]; /* One per active queue */
 341         int num_rx_queues;
 342         u64 hw_csum_rx_error;
 343         u64 hw_rx_no_dma_resources;
 344         u64 hw_csum_rx_good;
 345         u64 non_eop_descs;
 346         int num_msix_vectors;
 347         struct msix_entry *msix_entries;
 348
 349         u32 alloc_rx_page_failed;
 350         u32 alloc_rx_buff_failed;
 351
 352         /* Some features need tri-state capability,
 353          * thus the additional *_CAPABLE flags.
 354          */
 355         u32 flags;
 356 #define IXGBE_FLAG_IN_WATCHDOG_TASK             (u32)(1)
 357 #define IXGBE_FLAG_IN_NETPOLL                   (u32)(1 << 1)
 358 #define IXGBEVF_FLAG_QUEUE_RESET_REQUESTED      (u32)(1 << 2)
 359
 360         /* OS defined structs */
 361         struct net_device *netdev;
 362         struct pci_dev *pdev;
 363
 364         /* structs defined in ixgbe_vf.h */
 365         struct ixgbe_hw hw;
 366         u16 msg_enable;
 367         struct ixgbevf_hw_stats stats;
 368         /* Interrupt Throttle Rate */
 369         u32 eitr_param;
 370
 371         unsigned long state;
 372         u64 tx_busy;
 373         unsigned int tx_ring_count;
 374         unsigned int rx_ring_count;
 375
 376 #ifdef BP_EXTENDED_STATS
 377         u64 bp_rx_yields;
 378         u64 bp_rx_cleaned;
 379         u64 bp_rx_missed;
 380
 381         u64 bp_tx_yields;
 382         u64 bp_tx_cleaned;
 383         u64 bp_tx_missed;
 384 #endif
 385
 386         u32 link_speed;
 387         bool link_up;
 388
 389         struct work_struct watchdog_task;
 390
 391         spinlock_t mbx_lock;
 392 };
 393
 394 enum ixbgevf_state_t {
 395         __IXGBEVF_TESTING,
 396         __IXGBEVF_RESETTING,
 397         __IXGBEVF_DOWN
 398 };
 399
 400 struct ixgbevf_cb {
 401         struct sk_buff *prev;
 402 };
 403 #define IXGBE_CB(skb) ((struct ixgbevf_cb *)(skb)->cb)
 404
 405 enum ixgbevf_boards {
 406         board_82599_vf,
 407         board_X540_vf,
 408 };
 409
 410 extern const struct ixgbevf_info ixgbevf_82599_vf_info;
 411 extern const struct ixgbevf_info ixgbevf_X540_vf_info;
 412 extern const struct ixgbe_mbx_operations ixgbevf_mbx_ops;
 413
 414 /* needed by ethtool.c */
 415 extern const char ixgbevf_driver_name[];
 416 extern const char ixgbevf_driver_version[];
 417
 418 void ixgbevf_up(struct ixgbevf_adapter *adapter);
 419 void ixgbevf_down(struct ixgbevf_adapter *adapter);
 420 void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter);
 421 void ixgbevf_reset(struct ixgbevf_adapter *adapter);
 422 void ixgbevf_set_ethtool_ops(struct net_device *netdev);
 423 int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
 424 int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
 425 void ixgbevf_free_rx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
 426 void ixgbevf_free_tx_resources(struct ixgbevf_adapter *, struct ixgbevf_ring *);
 427 void ixgbevf_update_stats(struct ixgbevf_adapter *adapter);
 428 int ethtool_ioctl(struct ifreq *ifr);
 429
 430 extern void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector);
 431
 432 void ixgbe_napi_add_all(struct ixgbevf_adapter *adapter);
 433 void ixgbe_napi_del_all(struct ixgbevf_adapter *adapter);
 434
 435 #ifdef DEBUG
 436 char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw);
 437 #define hw_dbg(hw, format, arg...) \
 438         printk(KERN_DEBUG "%s: " format, ixgbevf_get_hw_dev_name(hw), ##arg)
 439 #else
 440 #define hw_dbg(hw, format, arg...) do {} while (0)
 441 #endif
 442
 443 #endif /* _IXGBEVF_H_ */