ASoC: arizona: Add defines for FLL configuration constants
[linux-2.6/btrfs-unstable.git] / drivers / cpufreq / exynos-cpufreq.c
blobfcd2914d081a8852620d3f420b433393fd66ec5e
1 /*
2 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
3 * http://www.samsung.com
5 * EXYNOS - CPU frequency scaling support for EXYNOS series
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/err.h>
14 #include <linux/clk.h>
15 #include <linux/io.h>
16 #include <linux/slab.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/cpufreq.h>
19 #include <linux/suspend.h>
20 #include <linux/platform_device.h>
22 #include <plat/cpu.h>
24 #include "exynos-cpufreq.h"
26 static struct exynos_dvfs_info *exynos_info;
28 static struct regulator *arm_regulator;
30 static unsigned int locking_frequency;
31 static bool frequency_locked;
32 static DEFINE_MUTEX(cpufreq_lock);
34 static int exynos_cpufreq_get_index(unsigned int freq)
36 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
37 int index;
39 for (index = 0;
40 freq_table[index].frequency != CPUFREQ_TABLE_END; index++)
41 if (freq_table[index].frequency == freq)
42 break;
44 if (freq_table[index].frequency == CPUFREQ_TABLE_END)
45 return -EINVAL;
47 return index;
50 static int exynos_cpufreq_scale(unsigned int target_freq)
52 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
53 unsigned int *volt_table = exynos_info->volt_table;
54 struct cpufreq_policy *policy = cpufreq_cpu_get(0);
55 unsigned int arm_volt, safe_arm_volt = 0;
56 unsigned int mpll_freq_khz = exynos_info->mpll_freq_khz;
57 unsigned int old_freq;
58 int index, old_index;
59 int ret = 0;
61 old_freq = policy->cur;
64 * The policy max have been changed so that we cannot get proper
65 * old_index with cpufreq_frequency_table_target(). Thus, ignore
66 * policy and get the index from the raw frequency table.
68 old_index = exynos_cpufreq_get_index(old_freq);
69 if (old_index < 0) {
70 ret = old_index;
71 goto out;
74 index = exynos_cpufreq_get_index(target_freq);
75 if (index < 0) {
76 ret = index;
77 goto out;
81 * ARM clock source will be changed APLL to MPLL temporary
82 * To support this level, need to control regulator for
83 * required voltage level
85 if (exynos_info->need_apll_change != NULL) {
86 if (exynos_info->need_apll_change(old_index, index) &&
87 (freq_table[index].frequency < mpll_freq_khz) &&
88 (freq_table[old_index].frequency < mpll_freq_khz))
89 safe_arm_volt = volt_table[exynos_info->pll_safe_idx];
91 arm_volt = volt_table[index];
93 /* When the new frequency is higher than current frequency */
94 if ((target_freq > old_freq) && !safe_arm_volt) {
95 /* Firstly, voltage up to increase frequency */
96 ret = regulator_set_voltage(arm_regulator, arm_volt, arm_volt);
97 if (ret) {
98 pr_err("%s: failed to set cpu voltage to %d\n",
99 __func__, arm_volt);
100 return ret;
104 if (safe_arm_volt) {
105 ret = regulator_set_voltage(arm_regulator, safe_arm_volt,
106 safe_arm_volt);
107 if (ret) {
108 pr_err("%s: failed to set cpu voltage to %d\n",
109 __func__, safe_arm_volt);
110 return ret;
114 exynos_info->set_freq(old_index, index);
116 /* When the new frequency is lower than current frequency */
117 if ((target_freq < old_freq) ||
118 ((target_freq > old_freq) && safe_arm_volt)) {
119 /* down the voltage after frequency change */
120 ret = regulator_set_voltage(arm_regulator, arm_volt,
121 arm_volt);
122 if (ret) {
123 pr_err("%s: failed to set cpu voltage to %d\n",
124 __func__, arm_volt);
125 goto out;
129 out:
130 cpufreq_cpu_put(policy);
132 return ret;
135 static int exynos_target(struct cpufreq_policy *policy, unsigned int index)
137 struct cpufreq_frequency_table *freq_table = exynos_info->freq_table;
138 int ret = 0;
140 mutex_lock(&cpufreq_lock);
142 if (frequency_locked)
143 goto out;
145 ret = exynos_cpufreq_scale(freq_table[index].frequency);
147 out:
148 mutex_unlock(&cpufreq_lock);
150 return ret;
153 #ifdef CONFIG_PM
154 static int exynos_cpufreq_suspend(struct cpufreq_policy *policy)
156 return 0;
159 static int exynos_cpufreq_resume(struct cpufreq_policy *policy)
161 return 0;
163 #endif
166 * exynos_cpufreq_pm_notifier - block CPUFREQ's activities in suspend-resume
167 * context
168 * @notifier
169 * @pm_event
170 * @v
172 * While frequency_locked == true, target() ignores every frequency but
173 * locking_frequency. The locking_frequency value is the initial frequency,
174 * which is set by the bootloader. In order to eliminate possible
175 * inconsistency in clock values, we save and restore frequencies during
176 * suspend and resume and block CPUFREQ activities. Note that the standard
177 * suspend/resume cannot be used as they are too deep (syscore_ops) for
178 * regulator actions.
180 static int exynos_cpufreq_pm_notifier(struct notifier_block *notifier,
181 unsigned long pm_event, void *v)
183 int ret;
185 switch (pm_event) {
186 case PM_SUSPEND_PREPARE:
187 mutex_lock(&cpufreq_lock);
188 frequency_locked = true;
189 mutex_unlock(&cpufreq_lock);
191 ret = exynos_cpufreq_scale(locking_frequency);
192 if (ret < 0)
193 return NOTIFY_BAD;
195 break;
197 case PM_POST_SUSPEND:
198 mutex_lock(&cpufreq_lock);
199 frequency_locked = false;
200 mutex_unlock(&cpufreq_lock);
201 break;
204 return NOTIFY_OK;
207 static struct notifier_block exynos_cpufreq_nb = {
208 .notifier_call = exynos_cpufreq_pm_notifier,
211 static int exynos_cpufreq_cpu_init(struct cpufreq_policy *policy)
213 policy->clk = exynos_info->cpu_clk;
214 return cpufreq_generic_init(policy, exynos_info->freq_table, 100000);
217 static struct cpufreq_driver exynos_driver = {
218 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
219 .verify = cpufreq_generic_frequency_table_verify,
220 .target_index = exynos_target,
221 .get = cpufreq_generic_get,
222 .init = exynos_cpufreq_cpu_init,
223 .exit = cpufreq_generic_exit,
224 .name = "exynos_cpufreq",
225 .attr = cpufreq_generic_attr,
226 #ifdef CONFIG_ARM_EXYNOS_CPU_FREQ_BOOST_SW
227 .boost_supported = true,
228 #endif
229 #ifdef CONFIG_PM
230 .suspend = exynos_cpufreq_suspend,
231 .resume = exynos_cpufreq_resume,
232 #endif
235 static int exynos_cpufreq_probe(struct platform_device *pdev)
237 int ret = -EINVAL;
239 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
240 if (!exynos_info)
241 return -ENOMEM;
243 if (soc_is_exynos4210())
244 ret = exynos4210_cpufreq_init(exynos_info);
245 else if (soc_is_exynos4212() || soc_is_exynos4412())
246 ret = exynos4x12_cpufreq_init(exynos_info);
247 else if (soc_is_exynos5250())
248 ret = exynos5250_cpufreq_init(exynos_info);
249 else
250 return 0;
252 if (ret)
253 goto err_vdd_arm;
255 if (exynos_info->set_freq == NULL) {
256 pr_err("%s: No set_freq function (ERR)\n", __func__);
257 goto err_vdd_arm;
260 arm_regulator = regulator_get(NULL, "vdd_arm");
261 if (IS_ERR(arm_regulator)) {
262 pr_err("%s: failed to get resource vdd_arm\n", __func__);
263 goto err_vdd_arm;
266 locking_frequency = clk_get_rate(exynos_info->cpu_clk) / 1000;
268 register_pm_notifier(&exynos_cpufreq_nb);
270 if (cpufreq_register_driver(&exynos_driver)) {
271 pr_err("%s: failed to register cpufreq driver\n", __func__);
272 goto err_cpufreq;
275 return 0;
276 err_cpufreq:
277 unregister_pm_notifier(&exynos_cpufreq_nb);
279 regulator_put(arm_regulator);
280 err_vdd_arm:
281 kfree(exynos_info);
282 return -EINVAL;
285 static struct platform_driver exynos_cpufreq_platdrv = {
286 .driver = {
287 .name = "exynos-cpufreq",
288 .owner = THIS_MODULE,
290 .probe = exynos_cpufreq_probe,
292 module_platform_driver(exynos_cpufreq_platdrv);