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V4L/DVB (13997): gspca_ov519: differentiate ov7620 and ov7620ae and fix 640x480 on...
[linux-2.6/btrfs-unstable.git] / drivers / media / video / gspca / ov519.c
bloba607622b73480b6bfd3a4a17dcc57cb0b687d96a
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include "gspca.h"
42
43 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
44 MODULE_DESCRIPTION("OV519 USB Camera Driver");
45 MODULE_LICENSE("GPL");
46
47 /* global parameters */
48 static int frame_rate;
49
50 /* Number of times to retry a failed I2C transaction. Increase this if you
51 * are getting "Failed to read sensor ID..." */
52 static int i2c_detect_tries = 10;
53
54 /* ov519 device descriptor */
55 struct sd {
56 struct gspca_dev gspca_dev; /* !! must be the first item */
57
58 __u8 packet_nr;
59
60 char bridge;
61 #define BRIDGE_OV511 0
62 #define BRIDGE_OV511PLUS 1
63 #define BRIDGE_OV518 2
64 #define BRIDGE_OV518PLUS 3
65 #define BRIDGE_OV519 4
66 #define BRIDGE_OVFX2 5
67 #define BRIDGE_W9968CF 6
68 #define BRIDGE_MASK 7
69
70 char invert_led;
71 #define BRIDGE_INVERT_LED 8
72
73 /* Determined by sensor type */
74 __u8 sif;
75
76 __u8 brightness;
77 __u8 contrast;
78 __u8 colors;
79 __u8 hflip;
80 __u8 vflip;
81 __u8 autobrightness;
82 __u8 freq;
83 __u8 quality;
84 #define QUALITY_MIN 50
85 #define QUALITY_MAX 70
86 #define QUALITY_DEF 50
87
88 __u8 stopped; /* Streaming is temporarily paused */
89
90 __u8 frame_rate; /* current Framerate */
91 __u8 clockdiv; /* clockdiv override */
92
93 char sensor; /* Type of image sensor chip (SEN_*) */
94 #define SEN_UNKNOWN 0
95 #define SEN_OV2610 1
96 #define SEN_OV3610 2
97 #define SEN_OV6620 3
98 #define SEN_OV6630 4
99 #define SEN_OV66308AF 5
100 #define SEN_OV7610 6
101 #define SEN_OV7620 7
102 #define SEN_OV7620AE 8
103 #define SEN_OV7640 9
104 #define SEN_OV7670 10
105 #define SEN_OV76BE 11
106 #define SEN_OV8610 12
107
108 u8 sensor_addr;
109 int sensor_width;
110 int sensor_height;
111 int sensor_reg_cache[256];
112
113 u8 *jpeg_hdr;
114 };
115
116 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
117 the ov sensors which is already present here. When we have the time we
118 really should move the sensor drivers to v4l2 sub drivers. */
119 #include "w996Xcf.c"
120
121 /* V4L2 controls supported by the driver */
122 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val);
123 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val);
124 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val);
125 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val);
126 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val);
127 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val);
128 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val);
129 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val);
130 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val);
131 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val);
132 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val);
133 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val);
134 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val);
135 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val);
136 static void setbrightness(struct gspca_dev *gspca_dev);
137 static void setcontrast(struct gspca_dev *gspca_dev);
138 static void setcolors(struct gspca_dev *gspca_dev);
139 static void setautobrightness(struct sd *sd);
140 static void setfreq(struct sd *sd);
141
142 static const struct ctrl sd_ctrls[] = {
143 {
144 {
145 .id = V4L2_CID_BRIGHTNESS,
146 .type = V4L2_CTRL_TYPE_INTEGER,
147 .name = "Brightness",
148 .minimum = 0,
149 .maximum = 255,
150 .step = 1,
151 #define BRIGHTNESS_DEF 127
152 .default_value = BRIGHTNESS_DEF,
153 },
154 .set = sd_setbrightness,
155 .get = sd_getbrightness,
156 },
157 {
158 {
159 .id = V4L2_CID_CONTRAST,
160 .type = V4L2_CTRL_TYPE_INTEGER,
161 .name = "Contrast",
162 .minimum = 0,
163 .maximum = 255,
164 .step = 1,
165 #define CONTRAST_DEF 127
166 .default_value = CONTRAST_DEF,
167 },
168 .set = sd_setcontrast,
169 .get = sd_getcontrast,
170 },
171 {
172 {
173 .id = V4L2_CID_SATURATION,
174 .type = V4L2_CTRL_TYPE_INTEGER,
175 .name = "Color",
176 .minimum = 0,
177 .maximum = 255,
178 .step = 1,
179 #define COLOR_DEF 127
180 .default_value = COLOR_DEF,
181 },
182 .set = sd_setcolors,
183 .get = sd_getcolors,
184 },
185 /* The flip controls work with ov7670 only */
186 #define HFLIP_IDX 3
187 {
188 {
189 .id = V4L2_CID_HFLIP,
190 .type = V4L2_CTRL_TYPE_BOOLEAN,
191 .name = "Mirror",
192 .minimum = 0,
193 .maximum = 1,
194 .step = 1,
195 #define HFLIP_DEF 0
196 .default_value = HFLIP_DEF,
197 },
198 .set = sd_sethflip,
199 .get = sd_gethflip,
200 },
201 #define VFLIP_IDX 4
202 {
203 {
204 .id = V4L2_CID_VFLIP,
205 .type = V4L2_CTRL_TYPE_BOOLEAN,
206 .name = "Vflip",
207 .minimum = 0,
208 .maximum = 1,
209 .step = 1,
210 #define VFLIP_DEF 0
211 .default_value = VFLIP_DEF,
212 },
213 .set = sd_setvflip,
214 .get = sd_getvflip,
215 },
216 #define AUTOBRIGHT_IDX 5
217 {
218 {
219 .id = V4L2_CID_AUTOBRIGHTNESS,
220 .type = V4L2_CTRL_TYPE_BOOLEAN,
221 .name = "Auto Brightness",
222 .minimum = 0,
223 .maximum = 1,
224 .step = 1,
225 #define AUTOBRIGHT_DEF 1
226 .default_value = AUTOBRIGHT_DEF,
227 },
228 .set = sd_setautobrightness,
229 .get = sd_getautobrightness,
230 },
231 #define FREQ_IDX 6
232 {
233 {
234 .id = V4L2_CID_POWER_LINE_FREQUENCY,
235 .type = V4L2_CTRL_TYPE_MENU,
236 .name = "Light frequency filter",
237 .minimum = 0,
238 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
239 .step = 1,
240 #define FREQ_DEF 0
241 .default_value = FREQ_DEF,
242 },
243 .set = sd_setfreq,
244 .get = sd_getfreq,
245 },
246 #define OV7670_FREQ_IDX 7
247 {
248 {
249 .id = V4L2_CID_POWER_LINE_FREQUENCY,
250 .type = V4L2_CTRL_TYPE_MENU,
251 .name = "Light frequency filter",
252 .minimum = 0,
253 .maximum = 3, /* 0: 0, 1: 50Hz, 2:60Hz 3: Auto Hz */
254 .step = 1,
255 #define OV7670_FREQ_DEF 3
256 .default_value = OV7670_FREQ_DEF,
257 },
258 .set = sd_setfreq,
259 .get = sd_getfreq,
260 },
261 };
262
263 static const struct v4l2_pix_format ov519_vga_mode[] = {
264 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
265 .bytesperline = 320,
266 .sizeimage = 320 * 240 * 3 / 8 + 590,
267 .colorspace = V4L2_COLORSPACE_JPEG,
268 .priv = 1},
269 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
270 .bytesperline = 640,
271 .sizeimage = 640 * 480 * 3 / 8 + 590,
272 .colorspace = V4L2_COLORSPACE_JPEG,
273 .priv = 0},
274 };
275 static const struct v4l2_pix_format ov519_sif_mode[] = {
276 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
277 .bytesperline = 160,
278 .sizeimage = 160 * 120 * 3 / 8 + 590,
279 .colorspace = V4L2_COLORSPACE_JPEG,
280 .priv = 3},
281 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
282 .bytesperline = 176,
283 .sizeimage = 176 * 144 * 3 / 8 + 590,
284 .colorspace = V4L2_COLORSPACE_JPEG,
285 .priv = 1},
286 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
287 .bytesperline = 320,
288 .sizeimage = 320 * 240 * 3 / 8 + 590,
289 .colorspace = V4L2_COLORSPACE_JPEG,
290 .priv = 2},
291 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
292 .bytesperline = 352,
293 .sizeimage = 352 * 288 * 3 / 8 + 590,
294 .colorspace = V4L2_COLORSPACE_JPEG,
295 .priv = 0},
296 };
297
298 /* Note some of the sizeimage values for the ov511 / ov518 may seem
299 larger then necessary, however they need to be this big as the ov511 /
300 ov518 always fills the entire isoc frame, using 0 padding bytes when
301 it doesn't have any data. So with low framerates the amount of data
302 transfered can become quite large (libv4l will remove all the 0 padding
303 in userspace). */
304 static const struct v4l2_pix_format ov518_vga_mode[] = {
305 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
306 .bytesperline = 320,
307 .sizeimage = 320 * 240 * 3,
308 .colorspace = V4L2_COLORSPACE_JPEG,
309 .priv = 1},
310 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
311 .bytesperline = 640,
312 .sizeimage = 640 * 480 * 2,
313 .colorspace = V4L2_COLORSPACE_JPEG,
314 .priv = 0},
315 };
316 static const struct v4l2_pix_format ov518_sif_mode[] = {
317 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
318 .bytesperline = 160,
319 .sizeimage = 70000,
320 .colorspace = V4L2_COLORSPACE_JPEG,
321 .priv = 3},
322 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
323 .bytesperline = 176,
324 .sizeimage = 70000,
325 .colorspace = V4L2_COLORSPACE_JPEG,
326 .priv = 1},
327 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
328 .bytesperline = 320,
329 .sizeimage = 320 * 240 * 3,
330 .colorspace = V4L2_COLORSPACE_JPEG,
331 .priv = 2},
332 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
333 .bytesperline = 352,
334 .sizeimage = 352 * 288 * 3,
335 .colorspace = V4L2_COLORSPACE_JPEG,
336 .priv = 0},
337 };
338
339 static const struct v4l2_pix_format ov511_vga_mode[] = {
340 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
341 .bytesperline = 320,
342 .sizeimage = 320 * 240 * 3,
343 .colorspace = V4L2_COLORSPACE_JPEG,
344 .priv = 1},
345 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
346 .bytesperline = 640,
347 .sizeimage = 640 * 480 * 2,
348 .colorspace = V4L2_COLORSPACE_JPEG,
349 .priv = 0},
350 };
351 static const struct v4l2_pix_format ov511_sif_mode[] = {
352 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
353 .bytesperline = 160,
354 .sizeimage = 70000,
355 .colorspace = V4L2_COLORSPACE_JPEG,
356 .priv = 3},
357 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
358 .bytesperline = 176,
359 .sizeimage = 70000,
360 .colorspace = V4L2_COLORSPACE_JPEG,
361 .priv = 1},
362 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
363 .bytesperline = 320,
364 .sizeimage = 320 * 240 * 3,
365 .colorspace = V4L2_COLORSPACE_JPEG,
366 .priv = 2},
367 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
368 .bytesperline = 352,
369 .sizeimage = 352 * 288 * 3,
370 .colorspace = V4L2_COLORSPACE_JPEG,
371 .priv = 0},
372 };
373
374 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
375 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
376 .bytesperline = 320,
377 .sizeimage = 320 * 240,
378 .colorspace = V4L2_COLORSPACE_SRGB,
379 .priv = 1},
380 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
381 .bytesperline = 640,
382 .sizeimage = 640 * 480,
383 .colorspace = V4L2_COLORSPACE_SRGB,
384 .priv = 0},
385 };
386 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
387 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
388 .bytesperline = 160,
389 .sizeimage = 160 * 120,
390 .colorspace = V4L2_COLORSPACE_SRGB,
391 .priv = 3},
392 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
393 .bytesperline = 176,
394 .sizeimage = 176 * 144,
395 .colorspace = V4L2_COLORSPACE_SRGB,
396 .priv = 1},
397 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
398 .bytesperline = 320,
399 .sizeimage = 320 * 240,
400 .colorspace = V4L2_COLORSPACE_SRGB,
401 .priv = 2},
402 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
403 .bytesperline = 352,
404 .sizeimage = 352 * 288,
405 .colorspace = V4L2_COLORSPACE_SRGB,
406 .priv = 0},
407 };
408 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
409 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
410 .bytesperline = 1600,
411 .sizeimage = 1600 * 1200,
412 .colorspace = V4L2_COLORSPACE_SRGB},
413 };
414 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
415 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
416 .bytesperline = 640,
417 .sizeimage = 640 * 480,
418 .colorspace = V4L2_COLORSPACE_SRGB,
419 .priv = 1},
420 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
421 .bytesperline = 800,
422 .sizeimage = 800 * 600,
423 .colorspace = V4L2_COLORSPACE_SRGB,
424 .priv = 1},
425 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
426 .bytesperline = 1024,
427 .sizeimage = 1024 * 768,
428 .colorspace = V4L2_COLORSPACE_SRGB,
429 .priv = 1},
430 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
431 .bytesperline = 1600,
432 .sizeimage = 1600 * 1200,
433 .colorspace = V4L2_COLORSPACE_SRGB,
434 .priv = 0},
435 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
436 .bytesperline = 2048,
437 .sizeimage = 2048 * 1536,
438 .colorspace = V4L2_COLORSPACE_SRGB,
439 .priv = 0},
440 };
441
442
443 /* Registers common to OV511 / OV518 */
444 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
445 #define R51x_SYS_RESET 0x50
446 /* Reset type flags */
447 #define OV511_RESET_OMNICE 0x08
448 #define R51x_SYS_INIT 0x53
449 #define R51x_SYS_SNAP 0x52
450 #define R51x_SYS_CUST_ID 0x5F
451 #define R51x_COMP_LUT_BEGIN 0x80
452
453 /* OV511 Camera interface register numbers */
454 #define R511_CAM_DELAY 0x10
455 #define R511_CAM_EDGE 0x11
456 #define R511_CAM_PXCNT 0x12
457 #define R511_CAM_LNCNT 0x13
458 #define R511_CAM_PXDIV 0x14
459 #define R511_CAM_LNDIV 0x15
460 #define R511_CAM_UV_EN 0x16
461 #define R511_CAM_LINE_MODE 0x17
462 #define R511_CAM_OPTS 0x18
463
464 #define R511_SNAP_FRAME 0x19
465 #define R511_SNAP_PXCNT 0x1A
466 #define R511_SNAP_LNCNT 0x1B
467 #define R511_SNAP_PXDIV 0x1C
468 #define R511_SNAP_LNDIV 0x1D
469 #define R511_SNAP_UV_EN 0x1E
470 #define R511_SNAP_UV_EN 0x1E
471 #define R511_SNAP_OPTS 0x1F
472
473 #define R511_DRAM_FLOW_CTL 0x20
474 #define R511_FIFO_OPTS 0x31
475 #define R511_I2C_CTL 0x40
476 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
477 #define R511_COMP_EN 0x78
478 #define R511_COMP_LUT_EN 0x79
479
480 /* OV518 Camera interface register numbers */
481 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
482 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
483
484 /* OV519 Camera interface register numbers */
485 #define OV519_R10_H_SIZE 0x10
486 #define OV519_R11_V_SIZE 0x11
487 #define OV519_R12_X_OFFSETL 0x12
488 #define OV519_R13_X_OFFSETH 0x13
489 #define OV519_R14_Y_OFFSETL 0x14
490 #define OV519_R15_Y_OFFSETH 0x15
491 #define OV519_R16_DIVIDER 0x16
492 #define OV519_R20_DFR 0x20
493 #define OV519_R25_FORMAT 0x25
494
495 /* OV519 System Controller register numbers */
496 #define OV519_SYS_RESET1 0x51
497 #define OV519_SYS_EN_CLK1 0x54
498
499 #define OV519_GPIO_DATA_OUT0 0x71
500 #define OV519_GPIO_IO_CTRL0 0x72
501
502 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
503
504 /*
505 * The FX2 chip does not give us a zero length read at end of frame.
506 * It does, however, give a short read at the end of a frame, if
507 * neccessary, rather than run two frames together.
508 *
509 * By choosing the right bulk transfer size, we are guaranteed to always
510 * get a short read for the last read of each frame. Frame sizes are
511 * always a composite number (width * height, or a multiple) so if we
512 * choose a prime number, we are guaranteed that the last read of a
513 * frame will be short.
514 *
515 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
516 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
517 * to figure out why. [PMiller]
518 *
519 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
520 *
521 * It isn't enough to know the number of bytes per frame, in case we
522 * have data dropouts or buffer overruns (even though the FX2 double
523 * buffers, there are some pretty strict real time constraints for
524 * isochronous transfer for larger frame sizes).
525 */
526 #define OVFX2_BULK_SIZE (13 * 4096)
527
528 /* I2C registers */
529 #define R51x_I2C_W_SID 0x41
530 #define R51x_I2C_SADDR_3 0x42
531 #define R51x_I2C_SADDR_2 0x43
532 #define R51x_I2C_R_SID 0x44
533 #define R51x_I2C_DATA 0x45
534 #define R518_I2C_CTL 0x47 /* OV518(+) only */
535 #define OVFX2_I2C_ADDR 0x00
536
537 /* I2C ADDRESSES */
538 #define OV7xx0_SID 0x42
539 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
540 #define OV8xx0_SID 0xa0
541 #define OV6xx0_SID 0xc0
542
543 /* OV7610 registers */
544 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
545 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
546 #define OV7610_REG_RED 0x02 /* red channel balance */
547 #define OV7610_REG_SAT 0x03 /* saturation */
548 #define OV8610_REG_HUE 0x04 /* 04 reserved */
549 #define OV7610_REG_CNT 0x05 /* Y contrast */
550 #define OV7610_REG_BRT 0x06 /* Y brightness */
551 #define OV7610_REG_COM_C 0x14 /* misc common regs */
552 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
553 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
554 #define OV7610_REG_COM_I 0x29 /* misc settings */
555
556 /* OV7670 registers */
557 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
558 #define OV7670_REG_BLUE 0x01 /* blue gain */
559 #define OV7670_REG_RED 0x02 /* red gain */
560 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
561 #define OV7670_REG_COM1 0x04 /* Control 1 */
562 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
563 #define OV7670_REG_COM3 0x0c /* Control 3 */
564 #define OV7670_REG_COM4 0x0d /* Control 4 */
565 #define OV7670_REG_COM5 0x0e /* All "reserved" */
566 #define OV7670_REG_COM6 0x0f /* Control 6 */
567 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
568 #define OV7670_REG_CLKRC 0x11 /* Clock control */
569 #define OV7670_REG_COM7 0x12 /* Control 7 */
570 #define OV7670_COM7_FMT_VGA 0x00
571 #define OV7670_COM7_YUV 0x00 /* YUV */
572 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
573 #define OV7670_COM7_FMT_MASK 0x38
574 #define OV7670_COM7_RESET 0x80 /* Register reset */
575 #define OV7670_REG_COM8 0x13 /* Control 8 */
576 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
577 #define OV7670_COM8_AWB 0x02 /* White balance enable */
578 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
579 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
580 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
581 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
582 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
583 #define OV7670_REG_COM10 0x15 /* Control 10 */
584 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
585 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
586 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
587 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
588 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
589 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
590 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
591 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
592 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
593 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
594 #define OV7670_REG_HREF 0x32 /* HREF pieces */
595 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
596 #define OV7670_REG_COM11 0x3b /* Control 11 */
597 #define OV7670_COM11_EXP 0x02
598 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
599 #define OV7670_REG_COM12 0x3c /* Control 12 */
600 #define OV7670_REG_COM13 0x3d /* Control 13 */
601 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
602 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
603 #define OV7670_REG_COM14 0x3e /* Control 14 */
604 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
605 #define OV7670_REG_COM15 0x40 /* Control 15 */
606 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
607 #define OV7670_REG_COM16 0x41 /* Control 16 */
608 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
609 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
610 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
611 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
612 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
613 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
614 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
615 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
616 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
617 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
618 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
619 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
620 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
621 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
622
623 struct ov_regvals {
624 __u8 reg;
625 __u8 val;
626 };
627 struct ov_i2c_regvals {
628 __u8 reg;
629 __u8 val;
630 };
631
632 /* Settings for OV2610 camera chip */
633 static const struct ov_i2c_regvals norm_2610[] =
634 {
635 { 0x12, 0x80 }, /* reset */
636 };
637
638 static const struct ov_i2c_regvals norm_3620b[] =
639 {
640 /*
641 * From the datasheet: "Note that after writing to register COMH
642 * (0x12) to change the sensor mode, registers related to the
643 * sensor’s cropping window will be reset back to their default
644 * values."
645 *
646 * "wait 4096 external clock ... to make sure the sensor is
647 * stable and ready to access registers" i.e. 160us at 24MHz
648 */
649
650 { 0x12, 0x80 }, /* COMH reset */
651 { 0x12, 0x00 }, /* QXGA, master */
652
653 /*
654 * 11 CLKRC "Clock Rate Control"
655 * [7] internal frequency doublers: on
656 * [6] video port mode: master
657 * [5:0] clock divider: 1
658 */
659 { 0x11, 0x80 },
660
661 /*
662 * 13 COMI "Common Control I"
663 * = 192 (0xC0) 11000000
664 * COMI[7] "AEC speed selection"
665 * = 1 (0x01) 1....... "Faster AEC correction"
666 * COMI[6] "AEC speed step selection"
667 * = 1 (0x01) .1...... "Big steps, fast"
668 * COMI[5] "Banding filter on off"
669 * = 0 (0x00) ..0..... "Off"
670 * COMI[4] "Banding filter option"
671 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
672 * the PLL is ON"
673 * COMI[3] "Reserved"
674 * = 0 (0x00) ....0...
675 * COMI[2] "AGC auto manual control selection"
676 * = 0 (0x00) .....0.. "Manual"
677 * COMI[1] "AWB auto manual control selection"
678 * = 0 (0x00) ......0. "Manual"
679 * COMI[0] "Exposure control"
680 * = 0 (0x00) .......0 "Manual"
681 */
682 { 0x13, 0xC0 },
683
684 /*
685 * 09 COMC "Common Control C"
686 * = 8 (0x08) 00001000
687 * COMC[7:5] "Reserved"
688 * = 0 (0x00) 000.....
689 * COMC[4] "Sleep Mode Enable"
690 * = 0 (0x00) ...0.... "Normal mode"
691 * COMC[3:2] "Sensor sampling reset timing selection"
692 * = 2 (0x02) ....10.. "Longer reset time"
693 * COMC[1:0] "Output drive current select"
694 * = 0 (0x00) ......00 "Weakest"
695 */
696 { 0x09, 0x08 },
697
698 /*
699 * 0C COMD "Common Control D"
700 * = 8 (0x08) 00001000
701 * COMD[7] "Reserved"
702 * = 0 (0x00) 0.......
703 * COMD[6] "Swap MSB and LSB at the output port"
704 * = 0 (0x00) .0...... "False"
705 * COMD[5:3] "Reserved"
706 * = 1 (0x01) ..001...
707 * COMD[2] "Output Average On Off"
708 * = 0 (0x00) .....0.. "Output Normal"
709 * COMD[1] "Sensor precharge voltage selection"
710 * = 0 (0x00) ......0. "Selects internal
711 * reference precharge
712 * voltage"
713 * COMD[0] "Snapshot option"
714 * = 0 (0x00) .......0 "Enable live video output
715 * after snapshot sequence"
716 */
717 { 0x0c, 0x08 },
718
719 /*
720 * 0D COME "Common Control E"
721 * = 161 (0xA1) 10100001
722 * COME[7] "Output average option"
723 * = 1 (0x01) 1....... "Output average of 4 pixels"
724 * COME[6] "Anti-blooming control"
725 * = 0 (0x00) .0...... "Off"
726 * COME[5:3] "Reserved"
727 * = 4 (0x04) ..100...
728 * COME[2] "Clock output power down pin status"
729 * = 0 (0x00) .....0.. "Tri-state data output pin
730 * on power down"
731 * COME[1] "Data output pin status selection at power down"
732 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
733 * HREF, and CHSYNC pins on
734 * power down"
735 * COME[0] "Auto zero circuit select"
736 * = 1 (0x01) .......1 "On"
737 */
738 { 0x0d, 0xA1 },
739
740 /*
741 * 0E COMF "Common Control F"
742 * = 112 (0x70) 01110000
743 * COMF[7] "System clock selection"
744 * = 0 (0x00) 0....... "Use 24 MHz system clock"
745 * COMF[6:4] "Reserved"
746 * = 7 (0x07) .111....
747 * COMF[3] "Manual auto negative offset canceling selection"
748 * = 0 (0x00) ....0... "Auto detect negative
749 * offset and cancel it"
750 * COMF[2:0] "Reserved"
751 * = 0 (0x00) .....000
752 */
753 { 0x0e, 0x70 },
754
755 /*
756 * 0F COMG "Common Control G"
757 * = 66 (0x42) 01000010
758 * COMG[7] "Optical black output selection"
759 * = 0 (0x00) 0....... "Disable"
760 * COMG[6] "Black level calibrate selection"
761 * = 1 (0x01) .1...... "Use optical black pixels
762 * to calibrate"
763 * COMG[5:4] "Reserved"
764 * = 0 (0x00) ..00....
765 * COMG[3] "Channel offset adjustment"
766 * = 0 (0x00) ....0... "Disable offset adjustment"
767 * COMG[2] "ADC black level calibration option"
768 * = 0 (0x00) .....0.. "Use B/G line and G/R
769 * line to calibrate each
770 * channel's black level"
771 * COMG[1] "Reserved"
772 * = 1 (0x01) ......1.
773 * COMG[0] "ADC black level calibration enable"
774 * = 0 (0x00) .......0 "Disable"
775 */
776 { 0x0f, 0x42 },
777
778 /*
779 * 14 COMJ "Common Control J"
780 * = 198 (0xC6) 11000110
781 * COMJ[7:6] "AGC gain ceiling"
782 * = 3 (0x03) 11...... "8x"
783 * COMJ[5:4] "Reserved"
784 * = 0 (0x00) ..00....
785 * COMJ[3] "Auto banding filter"
786 * = 0 (0x00) ....0... "Banding filter is always
787 * on off depending on
788 * COMI[5] setting"
789 * COMJ[2] "VSYNC drop option"
790 * = 1 (0x01) .....1.. "SYNC is dropped if frame
791 * data is dropped"
792 * COMJ[1] "Frame data drop"
793 * = 1 (0x01) ......1. "Drop frame data if
794 * exposure is not within
795 * tolerance. In AEC mode,
796 * data is normally dropped
797 * when data is out of
798 * range."
799 * COMJ[0] "Reserved"
800 * = 0 (0x00) .......0
801 */
802 { 0x14, 0xC6 },
803
804 /*
805 * 15 COMK "Common Control K"
806 * = 2 (0x02) 00000010
807 * COMK[7] "CHSYNC pin output swap"
808 * = 0 (0x00) 0....... "CHSYNC"
809 * COMK[6] "HREF pin output swap"
810 * = 0 (0x00) .0...... "HREF"
811 * COMK[5] "PCLK output selection"
812 * = 0 (0x00) ..0..... "PCLK always output"
813 * COMK[4] "PCLK edge selection"
814 * = 0 (0x00) ...0.... "Data valid on falling edge"
815 * COMK[3] "HREF output polarity"
816 * = 0 (0x00) ....0... "positive"
817 * COMK[2] "Reserved"
818 * = 0 (0x00) .....0..
819 * COMK[1] "VSYNC polarity"
820 * = 1 (0x01) ......1. "negative"
821 * COMK[0] "HSYNC polarity"
822 * = 0 (0x00) .......0 "positive"
823 */
824 { 0x15, 0x02 },
825
826 /*
827 * 33 CHLF "Current Control"
828 * = 9 (0x09) 00001001
829 * CHLF[7:6] "Sensor current control"
830 * = 0 (0x00) 00......
831 * CHLF[5] "Sensor current range control"
832 * = 0 (0x00) ..0..... "normal range"
833 * CHLF[4] "Sensor current"
834 * = 0 (0x00) ...0.... "normal current"
835 * CHLF[3] "Sensor buffer current control"
836 * = 1 (0x01) ....1... "half current"
837 * CHLF[2] "Column buffer current control"
838 * = 0 (0x00) .....0.. "normal current"
839 * CHLF[1] "Analog DSP current control"
840 * = 0 (0x00) ......0. "normal current"
841 * CHLF[1] "ADC current control"
842 * = 0 (0x00) ......0. "normal current"
843 */
844 { 0x33, 0x09 },
845
846 /*
847 * 34 VBLM "Blooming Control"
848 * = 80 (0x50) 01010000
849 * VBLM[7] "Hard soft reset switch"
850 * = 0 (0x00) 0....... "Hard reset"
851 * VBLM[6:4] "Blooming voltage selection"
852 * = 5 (0x05) .101....
853 * VBLM[3:0] "Sensor current control"
854 * = 0 (0x00) ....0000
855 */
856 { 0x34, 0x50 },
857
858 /*
859 * 36 VCHG "Sensor Precharge Voltage Control"
860 * = 0 (0x00) 00000000
861 * VCHG[7] "Reserved"
862 * = 0 (0x00) 0.......
863 * VCHG[6:4] "Sensor precharge voltage control"
864 * = 0 (0x00) .000....
865 * VCHG[3:0] "Sensor array common reference"
866 * = 0 (0x00) ....0000
867 */
868 { 0x36, 0x00 },
869
870 /*
871 * 37 ADC "ADC Reference Control"
872 * = 4 (0x04) 00000100
873 * ADC[7:4] "Reserved"
874 * = 0 (0x00) 0000....
875 * ADC[3] "ADC input signal range"
876 * = 0 (0x00) ....0... "Input signal 1.0x"
877 * ADC[2:0] "ADC range control"
878 * = 4 (0x04) .....100
879 */
880 { 0x37, 0x04 },
881
882 /*
883 * 38 ACOM "Analog Common Ground"
884 * = 82 (0x52) 01010010
885 * ACOM[7] "Analog gain control"
886 * = 0 (0x00) 0....... "Gain 1x"
887 * ACOM[6] "Analog black level calibration"
888 * = 1 (0x01) .1...... "On"
889 * ACOM[5:0] "Reserved"
890 * = 18 (0x12) ..010010
891 */
892 { 0x38, 0x52 },
893
894 /*
895 * 3A FREFA "Internal Reference Adjustment"
896 * = 0 (0x00) 00000000
897 * FREFA[7:0] "Range"
898 * = 0 (0x00) 00000000
899 */
900 { 0x3a, 0x00 },
901
902 /*
903 * 3C FVOPT "Internal Reference Adjustment"
904 * = 31 (0x1F) 00011111
905 * FVOPT[7:0] "Range"
906 * = 31 (0x1F) 00011111
907 */
908 { 0x3c, 0x1F },
909
910 /*
911 * 44 Undocumented = 0 (0x00) 00000000
912 * 44[7:0] "It's a secret"
913 * = 0 (0x00) 00000000
914 */
915 { 0x44, 0x00 },
916
917 /*
918 * 40 Undocumented = 0 (0x00) 00000000
919 * 40[7:0] "It's a secret"
920 * = 0 (0x00) 00000000
921 */
922 { 0x40, 0x00 },
923
924 /*
925 * 41 Undocumented = 0 (0x00) 00000000
926 * 41[7:0] "It's a secret"
927 * = 0 (0x00) 00000000
928 */
929 { 0x41, 0x00 },
930
931 /*
932 * 42 Undocumented = 0 (0x00) 00000000
933 * 42[7:0] "It's a secret"
934 * = 0 (0x00) 00000000
935 */
936 { 0x42, 0x00 },
937
938 /*
939 * 43 Undocumented = 0 (0x00) 00000000
940 * 43[7:0] "It's a secret"
941 * = 0 (0x00) 00000000
942 */
943 { 0x43, 0x00 },
944
945 /*
946 * 45 Undocumented = 128 (0x80) 10000000
947 * 45[7:0] "It's a secret"
948 * = 128 (0x80) 10000000
949 */
950 { 0x45, 0x80 },
951
952 /*
953 * 48 Undocumented = 192 (0xC0) 11000000
954 * 48[7:0] "It's a secret"
955 * = 192 (0xC0) 11000000
956 */
957 { 0x48, 0xC0 },
958
959 /*
960 * 49 Undocumented = 25 (0x19) 00011001
961 * 49[7:0] "It's a secret"
962 * = 25 (0x19) 00011001
963 */
964 { 0x49, 0x19 },
965
966 /*
967 * 4B Undocumented = 128 (0x80) 10000000
968 * 4B[7:0] "It's a secret"
969 * = 128 (0x80) 10000000
970 */
971 { 0x4B, 0x80 },
972
973 /*
974 * 4D Undocumented = 196 (0xC4) 11000100
975 * 4D[7:0] "It's a secret"
976 * = 196 (0xC4) 11000100
977 */
978 { 0x4D, 0xC4 },
979
980 /*
981 * 35 VREF "Reference Voltage Control"
982 * = 76 (0x4C) 01001100
983 * VREF[7:5] "Column high reference control"
984 * = 2 (0x02) 010..... "higher voltage"
985 * VREF[4:2] "Column low reference control"
986 * = 3 (0x03) ...011.. "Highest voltage"
987 * VREF[1:0] "Reserved"
988 * = 0 (0x00) ......00
989 */
990 { 0x35, 0x4C },
991
992 /*
993 * 3D Undocumented = 0 (0x00) 00000000
994 * 3D[7:0] "It's a secret"
995 * = 0 (0x00) 00000000
996 */
997 { 0x3D, 0x00 },
998
999 /*
1000 * 3E Undocumented = 0 (0x00) 00000000
1001 * 3E[7:0] "It's a secret"
1002 * = 0 (0x00) 00000000
1003 */
1004 { 0x3E, 0x00 },
1005
1006 /*
1007 * 3B FREFB "Internal Reference Adjustment"
1008 * = 24 (0x18) 00011000
1009 * FREFB[7:0] "Range"
1010 * = 24 (0x18) 00011000
1011 */
1012 { 0x3b, 0x18 },
1013
1014 /*
1015 * 33 CHLF "Current Control"
1016 * = 25 (0x19) 00011001
1017 * CHLF[7:6] "Sensor current control"
1018 * = 0 (0x00) 00......
1019 * CHLF[5] "Sensor current range control"
1020 * = 0 (0x00) ..0..... "normal range"
1021 * CHLF[4] "Sensor current"
1022 * = 1 (0x01) ...1.... "double current"
1023 * CHLF[3] "Sensor buffer current control"
1024 * = 1 (0x01) ....1... "half current"
1025 * CHLF[2] "Column buffer current control"
1026 * = 0 (0x00) .....0.. "normal current"
1027 * CHLF[1] "Analog DSP current control"
1028 * = 0 (0x00) ......0. "normal current"
1029 * CHLF[1] "ADC current control"
1030 * = 0 (0x00) ......0. "normal current"
1031 */
1032 { 0x33, 0x19 },
1033
1034 /*
1035 * 34 VBLM "Blooming Control"
1036 * = 90 (0x5A) 01011010
1037 * VBLM[7] "Hard soft reset switch"
1038 * = 0 (0x00) 0....... "Hard reset"
1039 * VBLM[6:4] "Blooming voltage selection"
1040 * = 5 (0x05) .101....
1041 * VBLM[3:0] "Sensor current control"
1042 * = 10 (0x0A) ....1010
1043 */
1044 { 0x34, 0x5A },
1045
1046 /*
1047 * 3B FREFB "Internal Reference Adjustment"
1048 * = 0 (0x00) 00000000
1049 * FREFB[7:0] "Range"
1050 * = 0 (0x00) 00000000
1051 */
1052 { 0x3b, 0x00 },
1053
1054 /*
1055 * 33 CHLF "Current Control"
1056 * = 9 (0x09) 00001001
1057 * CHLF[7:6] "Sensor current control"
1058 * = 0 (0x00) 00......
1059 * CHLF[5] "Sensor current range control"
1060 * = 0 (0x00) ..0..... "normal range"
1061 * CHLF[4] "Sensor current"
1062 * = 0 (0x00) ...0.... "normal current"
1063 * CHLF[3] "Sensor buffer current control"
1064 * = 1 (0x01) ....1... "half current"
1065 * CHLF[2] "Column buffer current control"
1066 * = 0 (0x00) .....0.. "normal current"
1067 * CHLF[1] "Analog DSP current control"
1068 * = 0 (0x00) ......0. "normal current"
1069 * CHLF[1] "ADC current control"
1070 * = 0 (0x00) ......0. "normal current"
1071 */
1072 { 0x33, 0x09 },
1073
1074 /*
1075 * 34 VBLM "Blooming Control"
1076 * = 80 (0x50) 01010000
1077 * VBLM[7] "Hard soft reset switch"
1078 * = 0 (0x00) 0....... "Hard reset"
1079 * VBLM[6:4] "Blooming voltage selection"
1080 * = 5 (0x05) .101....
1081 * VBLM[3:0] "Sensor current control"
1082 * = 0 (0x00) ....0000
1083 */
1084 { 0x34, 0x50 },
1085
1086 /*
1087 * 12 COMH "Common Control H"
1088 * = 64 (0x40) 01000000
1089 * COMH[7] "SRST"
1090 * = 0 (0x00) 0....... "No-op"
1091 * COMH[6:4] "Resolution selection"
1092 * = 4 (0x04) .100.... "XGA"
1093 * COMH[3] "Master slave selection"
1094 * = 0 (0x00) ....0... "Master mode"
1095 * COMH[2] "Internal B/R channel option"
1096 * = 0 (0x00) .....0.. "B/R use same channel"
1097 * COMH[1] "Color bar test pattern"
1098 * = 0 (0x00) ......0. "Off"
1099 * COMH[0] "Reserved"
1100 * = 0 (0x00) .......0
1101 */
1102 { 0x12, 0x40 },
1103
1104 /*
1105 * 17 HREFST "Horizontal window start"
1106 * = 31 (0x1F) 00011111
1107 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1108 * = 31 (0x1F) 00011111
1109 */
1110 { 0x17, 0x1F },
1111
1112 /*
1113 * 18 HREFEND "Horizontal window end"
1114 * = 95 (0x5F) 01011111
1115 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1116 * = 95 (0x5F) 01011111
1117 */
1118 { 0x18, 0x5F },
1119
1120 /*
1121 * 19 VSTRT "Vertical window start"
1122 * = 0 (0x00) 00000000
1123 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1124 * = 0 (0x00) 00000000
1125 */
1126 { 0x19, 0x00 },
1127
1128 /*
1129 * 1A VEND "Vertical window end"
1130 * = 96 (0x60) 01100000
1131 * VEND[7:0] "Vertical Window End, 8 MSBs"
1132 * = 96 (0x60) 01100000
1133 */
1134 { 0x1a, 0x60 },
1135
1136 /*
1137 * 32 COMM "Common Control M"
1138 * = 18 (0x12) 00010010
1139 * COMM[7:6] "Pixel clock divide option"
1140 * = 0 (0x00) 00...... "/1"
1141 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1142 * = 2 (0x02) ..010...
1143 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1144 * = 2 (0x02) .....010
1145 */
1146 { 0x32, 0x12 },
1147
1148 /*
1149 * 03 COMA "Common Control A"
1150 * = 74 (0x4A) 01001010
1151 * COMA[7:4] "AWB Update Threshold"
1152 * = 4 (0x04) 0100....
1153 * COMA[3:2] "Vertical window end line control 2 LSBs"
1154 * = 2 (0x02) ....10..
1155 * COMA[1:0] "Vertical window start line control 2 LSBs"
1156 * = 2 (0x02) ......10
1157 */
1158 { 0x03, 0x4A },
1159
1160 /*
1161 * 11 CLKRC "Clock Rate Control"
1162 * = 128 (0x80) 10000000
1163 * CLKRC[7] "Internal frequency doublers on off seclection"
1164 * = 1 (0x01) 1....... "On"
1165 * CLKRC[6] "Digital video master slave selection"
1166 * = 0 (0x00) .0...... "Master mode, sensor
1167 * provides PCLK"
1168 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1169 * = 0 (0x00) ..000000
1170 */
1171 { 0x11, 0x80 },
1172
1173 /*
1174 * 12 COMH "Common Control H"
1175 * = 0 (0x00) 00000000
1176 * COMH[7] "SRST"
1177 * = 0 (0x00) 0....... "No-op"
1178 * COMH[6:4] "Resolution selection"
1179 * = 0 (0x00) .000.... "QXGA"
1180 * COMH[3] "Master slave selection"
1181 * = 0 (0x00) ....0... "Master mode"
1182 * COMH[2] "Internal B/R channel option"
1183 * = 0 (0x00) .....0.. "B/R use same channel"
1184 * COMH[1] "Color bar test pattern"
1185 * = 0 (0x00) ......0. "Off"
1186 * COMH[0] "Reserved"
1187 * = 0 (0x00) .......0
1188 */
1189 { 0x12, 0x00 },
1190
1191 /*
1192 * 12 COMH "Common Control H"
1193 * = 64 (0x40) 01000000
1194 * COMH[7] "SRST"
1195 * = 0 (0x00) 0....... "No-op"
1196 * COMH[6:4] "Resolution selection"
1197 * = 4 (0x04) .100.... "XGA"
1198 * COMH[3] "Master slave selection"
1199 * = 0 (0x00) ....0... "Master mode"
1200 * COMH[2] "Internal B/R channel option"
1201 * = 0 (0x00) .....0.. "B/R use same channel"
1202 * COMH[1] "Color bar test pattern"
1203 * = 0 (0x00) ......0. "Off"
1204 * COMH[0] "Reserved"
1205 * = 0 (0x00) .......0
1206 */
1207 { 0x12, 0x40 },
1208
1209 /*
1210 * 17 HREFST "Horizontal window start"
1211 * = 31 (0x1F) 00011111
1212 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1213 * = 31 (0x1F) 00011111
1214 */
1215 { 0x17, 0x1F },
1216
1217 /*
1218 * 18 HREFEND "Horizontal window end"
1219 * = 95 (0x5F) 01011111
1220 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1221 * = 95 (0x5F) 01011111
1222 */
1223 { 0x18, 0x5F },
1224
1225 /*
1226 * 19 VSTRT "Vertical window start"
1227 * = 0 (0x00) 00000000
1228 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1229 * = 0 (0x00) 00000000
1230 */
1231 { 0x19, 0x00 },
1232
1233 /*
1234 * 1A VEND "Vertical window end"
1235 * = 96 (0x60) 01100000
1236 * VEND[7:0] "Vertical Window End, 8 MSBs"
1237 * = 96 (0x60) 01100000
1238 */
1239 { 0x1a, 0x60 },
1240
1241 /*
1242 * 32 COMM "Common Control M"
1243 * = 18 (0x12) 00010010
1244 * COMM[7:6] "Pixel clock divide option"
1245 * = 0 (0x00) 00...... "/1"
1246 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1247 * = 2 (0x02) ..010...
1248 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1249 * = 2 (0x02) .....010
1250 */
1251 { 0x32, 0x12 },
1252
1253 /*
1254 * 03 COMA "Common Control A"
1255 * = 74 (0x4A) 01001010
1256 * COMA[7:4] "AWB Update Threshold"
1257 * = 4 (0x04) 0100....
1258 * COMA[3:2] "Vertical window end line control 2 LSBs"
1259 * = 2 (0x02) ....10..
1260 * COMA[1:0] "Vertical window start line control 2 LSBs"
1261 * = 2 (0x02) ......10
1262 */
1263 { 0x03, 0x4A },
1264
1265 /*
1266 * 02 RED "Red Gain Control"
1267 * = 175 (0xAF) 10101111
1268 * RED[7] "Action"
1269 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1270 * RED[6:0] "Value"
1271 * = 47 (0x2F) .0101111
1272 */
1273 { 0x02, 0xAF },
1274
1275 /*
1276 * 2D ADDVSL "VSYNC Pulse Width"
1277 * = 210 (0xD2) 11010010
1278 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1279 * = 210 (0xD2) 11010010
1280 */
1281 { 0x2d, 0xD2 },
1282
1283 /*
1284 * 00 GAIN = 24 (0x18) 00011000
1285 * GAIN[7:6] "Reserved"
1286 * = 0 (0x00) 00......
1287 * GAIN[5] "Double"
1288 * = 0 (0x00) ..0..... "False"
1289 * GAIN[4] "Double"
1290 * = 1 (0x01) ...1.... "True"
1291 * GAIN[3:0] "Range"
1292 * = 8 (0x08) ....1000
1293 */
1294 { 0x00, 0x18 },
1295
1296 /*
1297 * 01 BLUE "Blue Gain Control"
1298 * = 240 (0xF0) 11110000
1299 * BLUE[7] "Action"
1300 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1301 * BLUE[6:0] "Value"
1302 * = 112 (0x70) .1110000
1303 */
1304 { 0x01, 0xF0 },
1305
1306 /*
1307 * 10 AEC "Automatic Exposure Control"
1308 * = 10 (0x0A) 00001010
1309 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1310 * = 10 (0x0A) 00001010
1311 */
1312 { 0x10, 0x0A },
1313
1314 { 0xE1, 0x67 },
1315 { 0xE3, 0x03 },
1316 { 0xE4, 0x26 },
1317 { 0xE5, 0x3E },
1318 { 0xF8, 0x01 },
1319 { 0xFF, 0x01 },
1320 };
1321
1322 static const struct ov_i2c_regvals norm_6x20[] = {
1323 { 0x12, 0x80 }, /* reset */
1324 { 0x11, 0x01 },
1325 { 0x03, 0x60 },
1326 { 0x05, 0x7f }, /* For when autoadjust is off */
1327 { 0x07, 0xa8 },
1328 /* The ratio of 0x0c and 0x0d controls the white point */
1329 { 0x0c, 0x24 },
1330 { 0x0d, 0x24 },
1331 { 0x0f, 0x15 }, /* COMS */
1332 { 0x10, 0x75 }, /* AEC Exposure time */
1333 { 0x12, 0x24 }, /* Enable AGC */
1334 { 0x14, 0x04 },
1335 /* 0x16: 0x06 helps frame stability with moving objects */
1336 { 0x16, 0x06 },
1337 /* { 0x20, 0x30 }, * Aperture correction enable */
1338 { 0x26, 0xb2 }, /* BLC enable */
1339 /* 0x28: 0x05 Selects RGB format if RGB on */
1340 { 0x28, 0x05 },
1341 { 0x2a, 0x04 }, /* Disable framerate adjust */
1342 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1343 { 0x2d, 0x85 },
1344 { 0x33, 0xa0 }, /* Color Processing Parameter */
1345 { 0x34, 0xd2 }, /* Max A/D range */
1346 { 0x38, 0x8b },
1347 { 0x39, 0x40 },
1348
1349 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1350 { 0x3c, 0x3c }, /* Change AEC mode */
1351 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1352
1353 { 0x3d, 0x80 },
1354 /* These next two registers (0x4a, 0x4b) are undocumented.
1355 * They control the color balance */
1356 { 0x4a, 0x80 },
1357 { 0x4b, 0x80 },
1358 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1359 { 0x4e, 0xc1 },
1360 { 0x4f, 0x04 },
1361 /* Do 50-53 have any effect? */
1362 /* Toggle 0x12[2] off and on here? */
1363 };
1364
1365 static const struct ov_i2c_regvals norm_6x30[] = {
1366 { 0x12, 0x80 }, /* Reset */
1367 { 0x00, 0x1f }, /* Gain */
1368 { 0x01, 0x99 }, /* Blue gain */
1369 { 0x02, 0x7c }, /* Red gain */
1370 { 0x03, 0xc0 }, /* Saturation */
1371 { 0x05, 0x0a }, /* Contrast */
1372 { 0x06, 0x95 }, /* Brightness */
1373 { 0x07, 0x2d }, /* Sharpness */
1374 { 0x0c, 0x20 },
1375 { 0x0d, 0x20 },
1376 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1377 { 0x0f, 0x05 },
1378 { 0x10, 0x9a },
1379 { 0x11, 0x00 }, /* Pixel clock = fastest */
1380 { 0x12, 0x24 }, /* Enable AGC and AWB */
1381 { 0x13, 0x21 },
1382 { 0x14, 0x80 },
1383 { 0x15, 0x01 },
1384 { 0x16, 0x03 },
1385 { 0x17, 0x38 },
1386 { 0x18, 0xea },
1387 { 0x19, 0x04 },
1388 { 0x1a, 0x93 },
1389 { 0x1b, 0x00 },
1390 { 0x1e, 0xc4 },
1391 { 0x1f, 0x04 },
1392 { 0x20, 0x20 },
1393 { 0x21, 0x10 },
1394 { 0x22, 0x88 },
1395 { 0x23, 0xc0 }, /* Crystal circuit power level */
1396 { 0x25, 0x9a }, /* Increase AEC black ratio */
1397 { 0x26, 0xb2 }, /* BLC enable */
1398 { 0x27, 0xa2 },
1399 { 0x28, 0x00 },
1400 { 0x29, 0x00 },
1401 { 0x2a, 0x84 }, /* 60 Hz power */
1402 { 0x2b, 0xa8 }, /* 60 Hz power */
1403 { 0x2c, 0xa0 },
1404 { 0x2d, 0x95 }, /* Enable auto-brightness */
1405 { 0x2e, 0x88 },
1406 { 0x33, 0x26 },
1407 { 0x34, 0x03 },
1408 { 0x36, 0x8f },
1409 { 0x37, 0x80 },
1410 { 0x38, 0x83 },
1411 { 0x39, 0x80 },
1412 { 0x3a, 0x0f },
1413 { 0x3b, 0x3c },
1414 { 0x3c, 0x1a },
1415 { 0x3d, 0x80 },
1416 { 0x3e, 0x80 },
1417 { 0x3f, 0x0e },
1418 { 0x40, 0x00 }, /* White bal */
1419 { 0x41, 0x00 }, /* White bal */
1420 { 0x42, 0x80 },
1421 { 0x43, 0x3f }, /* White bal */
1422 { 0x44, 0x80 },
1423 { 0x45, 0x20 },
1424 { 0x46, 0x20 },
1425 { 0x47, 0x80 },
1426 { 0x48, 0x7f },
1427 { 0x49, 0x00 },
1428 { 0x4a, 0x00 },
1429 { 0x4b, 0x80 },
1430 { 0x4c, 0xd0 },
1431 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1432 { 0x4e, 0x40 },
1433 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1434 { 0x50, 0xff },
1435 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1436 { 0x55, 0xff },
1437 { 0x56, 0x12 },
1438 { 0x57, 0x81 },
1439 { 0x58, 0x75 },
1440 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1441 { 0x5a, 0x2c },
1442 { 0x5b, 0x0f }, /* AWB chrominance levels */
1443 { 0x5c, 0x10 },
1444 { 0x3d, 0x80 },
1445 { 0x27, 0xa6 },
1446 { 0x12, 0x20 }, /* Toggle AWB */
1447 { 0x12, 0x24 },
1448 };
1449
1450 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1451 *
1452 * Register 0x0f in the 7610 has the following effects:
1453 *
1454 * 0x85 (AEC method 1): Best overall, good contrast range
1455 * 0x45 (AEC method 2): Very overexposed
1456 * 0xa5 (spec sheet default): Ok, but the black level is
1457 * shifted resulting in loss of contrast
1458 * 0x05 (old driver setting): very overexposed, too much
1459 * contrast
1460 */
1461 static const struct ov_i2c_regvals norm_7610[] = {
1462 { 0x10, 0xff },
1463 { 0x16, 0x06 },
1464 { 0x28, 0x24 },
1465 { 0x2b, 0xac },
1466 { 0x12, 0x00 },
1467 { 0x38, 0x81 },
1468 { 0x28, 0x24 }, /* 0c */
1469 { 0x0f, 0x85 }, /* lg's setting */
1470 { 0x15, 0x01 },
1471 { 0x20, 0x1c },
1472 { 0x23, 0x2a },
1473 { 0x24, 0x10 },
1474 { 0x25, 0x8a },
1475 { 0x26, 0xa2 },
1476 { 0x27, 0xc2 },
1477 { 0x2a, 0x04 },
1478 { 0x2c, 0xfe },
1479 { 0x2d, 0x93 },
1480 { 0x30, 0x71 },
1481 { 0x31, 0x60 },
1482 { 0x32, 0x26 },
1483 { 0x33, 0x20 },
1484 { 0x34, 0x48 },
1485 { 0x12, 0x24 },
1486 { 0x11, 0x01 },
1487 { 0x0c, 0x24 },
1488 { 0x0d, 0x24 },
1489 };
1490
1491 static const struct ov_i2c_regvals norm_7620[] = {
1492 { 0x12, 0x80 }, /* reset */
1493 { 0x00, 0x00 }, /* gain */
1494 { 0x01, 0x80 }, /* blue gain */
1495 { 0x02, 0x80 }, /* red gain */
1496 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1497 { 0x06, 0x60 },
1498 { 0x07, 0x00 },
1499 { 0x0c, 0x24 },
1500 { 0x0c, 0x24 },
1501 { 0x0d, 0x24 },
1502 { 0x11, 0x01 },
1503 { 0x12, 0x24 },
1504 { 0x13, 0x01 },
1505 { 0x14, 0x84 },
1506 { 0x15, 0x01 },
1507 { 0x16, 0x03 },
1508 { 0x17, 0x2f },
1509 { 0x18, 0xcf },
1510 { 0x19, 0x06 },
1511 { 0x1a, 0xf5 },
1512 { 0x1b, 0x00 },
1513 { 0x20, 0x18 },
1514 { 0x21, 0x80 },
1515 { 0x22, 0x80 },
1516 { 0x23, 0x00 },
1517 { 0x26, 0xa2 },
1518 { 0x27, 0xea },
1519 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1520 { 0x29, 0x00 },
1521 { 0x2a, 0x10 },
1522 { 0x2b, 0x00 },
1523 { 0x2c, 0x88 },
1524 { 0x2d, 0x91 },
1525 { 0x2e, 0x80 },
1526 { 0x2f, 0x44 },
1527 { 0x60, 0x27 },
1528 { 0x61, 0x02 },
1529 { 0x62, 0x5f },
1530 { 0x63, 0xd5 },
1531 { 0x64, 0x57 },
1532 { 0x65, 0x83 },
1533 { 0x66, 0x55 },
1534 { 0x67, 0x92 },
1535 { 0x68, 0xcf },
1536 { 0x69, 0x76 },
1537 { 0x6a, 0x22 },
1538 { 0x6b, 0x00 },
1539 { 0x6c, 0x02 },
1540 { 0x6d, 0x44 },
1541 { 0x6e, 0x80 },
1542 { 0x6f, 0x1d },
1543 { 0x70, 0x8b },
1544 { 0x71, 0x00 },
1545 { 0x72, 0x14 },
1546 { 0x73, 0x54 },
1547 { 0x74, 0x00 },
1548 { 0x75, 0x8e },
1549 { 0x76, 0x00 },
1550 { 0x77, 0xff },
1551 { 0x78, 0x80 },
1552 { 0x79, 0x80 },
1553 { 0x7a, 0x80 },
1554 { 0x7b, 0xe2 },
1555 { 0x7c, 0x00 },
1556 };
1557
1558 /* 7640 and 7648. The defaults should be OK for most registers. */
1559 static const struct ov_i2c_regvals norm_7640[] = {
1560 { 0x12, 0x80 },
1561 { 0x12, 0x14 },
1562 };
1563
1564 /* 7670. Defaults taken from OmniVision provided data,
1565 * as provided by Jonathan Corbet of OLPC */
1566 static const struct ov_i2c_regvals norm_7670[] = {
1567 { OV7670_REG_COM7, OV7670_COM7_RESET },
1568 { OV7670_REG_TSLB, 0x04 }, /* OV */
1569 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1570 { OV7670_REG_CLKRC, 0x01 },
1571 /*
1572 * Set the hardware window. These values from OV don't entirely
1573 * make sense - hstop is less than hstart. But they work...
1574 */
1575 { OV7670_REG_HSTART, 0x13 },
1576 { OV7670_REG_HSTOP, 0x01 },
1577 { OV7670_REG_HREF, 0xb6 },
1578 { OV7670_REG_VSTART, 0x02 },
1579 { OV7670_REG_VSTOP, 0x7a },
1580 { OV7670_REG_VREF, 0x0a },
1581
1582 { OV7670_REG_COM3, 0x00 },
1583 { OV7670_REG_COM14, 0x00 },
1584 /* Mystery scaling numbers */
1585 { 0x70, 0x3a },
1586 { 0x71, 0x35 },
1587 { 0x72, 0x11 },
1588 { 0x73, 0xf0 },
1589 { 0xa2, 0x02 },
1590 /* { OV7670_REG_COM10, 0x0 }, */
1591
1592 /* Gamma curve values */
1593 { 0x7a, 0x20 },
1594 { 0x7b, 0x10 },
1595 { 0x7c, 0x1e },
1596 { 0x7d, 0x35 },
1597 { 0x7e, 0x5a },
1598 { 0x7f, 0x69 },
1599 { 0x80, 0x76 },
1600 { 0x81, 0x80 },
1601 { 0x82, 0x88 },
1602 { 0x83, 0x8f },
1603 { 0x84, 0x96 },
1604 { 0x85, 0xa3 },
1605 { 0x86, 0xaf },
1606 { 0x87, 0xc4 },
1607 { 0x88, 0xd7 },
1608 { 0x89, 0xe8 },
1609
1610 /* AGC and AEC parameters. Note we start by disabling those features,
1611 then turn them only after tweaking the values. */
1612 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1613 | OV7670_COM8_AECSTEP
1614 | OV7670_COM8_BFILT },
1615 { OV7670_REG_GAIN, 0x00 },
1616 { OV7670_REG_AECH, 0x00 },
1617 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1618 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1619 { OV7670_REG_BD50MAX, 0x05 },
1620 { OV7670_REG_BD60MAX, 0x07 },
1621 { OV7670_REG_AEW, 0x95 },
1622 { OV7670_REG_AEB, 0x33 },
1623 { OV7670_REG_VPT, 0xe3 },
1624 { OV7670_REG_HAECC1, 0x78 },
1625 { OV7670_REG_HAECC2, 0x68 },
1626 { 0xa1, 0x03 }, /* magic */
1627 { OV7670_REG_HAECC3, 0xd8 },
1628 { OV7670_REG_HAECC4, 0xd8 },
1629 { OV7670_REG_HAECC5, 0xf0 },
1630 { OV7670_REG_HAECC6, 0x90 },
1631 { OV7670_REG_HAECC7, 0x94 },
1632 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1633 | OV7670_COM8_AECSTEP
1634 | OV7670_COM8_BFILT
1635 | OV7670_COM8_AGC
1636 | OV7670_COM8_AEC },
1637
1638 /* Almost all of these are magic "reserved" values. */
1639 { OV7670_REG_COM5, 0x61 },
1640 { OV7670_REG_COM6, 0x4b },
1641 { 0x16, 0x02 },
1642 { OV7670_REG_MVFP, 0x07 },
1643 { 0x21, 0x02 },
1644 { 0x22, 0x91 },
1645 { 0x29, 0x07 },
1646 { 0x33, 0x0b },
1647 { 0x35, 0x0b },
1648 { 0x37, 0x1d },
1649 { 0x38, 0x71 },
1650 { 0x39, 0x2a },
1651 { OV7670_REG_COM12, 0x78 },
1652 { 0x4d, 0x40 },
1653 { 0x4e, 0x20 },
1654 { OV7670_REG_GFIX, 0x00 },
1655 { 0x6b, 0x4a },
1656 { 0x74, 0x10 },
1657 { 0x8d, 0x4f },
1658 { 0x8e, 0x00 },
1659 { 0x8f, 0x00 },
1660 { 0x90, 0x00 },
1661 { 0x91, 0x00 },
1662 { 0x96, 0x00 },
1663 { 0x9a, 0x00 },
1664 { 0xb0, 0x84 },
1665 { 0xb1, 0x0c },
1666 { 0xb2, 0x0e },
1667 { 0xb3, 0x82 },
1668 { 0xb8, 0x0a },
1669
1670 /* More reserved magic, some of which tweaks white balance */
1671 { 0x43, 0x0a },
1672 { 0x44, 0xf0 },
1673 { 0x45, 0x34 },
1674 { 0x46, 0x58 },
1675 { 0x47, 0x28 },
1676 { 0x48, 0x3a },
1677 { 0x59, 0x88 },
1678 { 0x5a, 0x88 },
1679 { 0x5b, 0x44 },
1680 { 0x5c, 0x67 },
1681 { 0x5d, 0x49 },
1682 { 0x5e, 0x0e },
1683 { 0x6c, 0x0a },
1684 { 0x6d, 0x55 },
1685 { 0x6e, 0x11 },
1686 { 0x6f, 0x9f },
1687 /* "9e for advance AWB" */
1688 { 0x6a, 0x40 },
1689 { OV7670_REG_BLUE, 0x40 },
1690 { OV7670_REG_RED, 0x60 },
1691 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1692 | OV7670_COM8_AECSTEP
1693 | OV7670_COM8_BFILT
1694 | OV7670_COM8_AGC
1695 | OV7670_COM8_AEC
1696 | OV7670_COM8_AWB },
1697
1698 /* Matrix coefficients */
1699 { 0x4f, 0x80 },
1700 { 0x50, 0x80 },
1701 { 0x51, 0x00 },
1702 { 0x52, 0x22 },
1703 { 0x53, 0x5e },
1704 { 0x54, 0x80 },
1705 { 0x58, 0x9e },
1706
1707 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1708 { OV7670_REG_EDGE, 0x00 },
1709 { 0x75, 0x05 },
1710 { 0x76, 0xe1 },
1711 { 0x4c, 0x00 },
1712 { 0x77, 0x01 },
1713 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1714 | OV7670_COM13_UVSAT
1715 | 2}, /* was 3 */
1716 { 0x4b, 0x09 },
1717 { 0xc9, 0x60 },
1718 { OV7670_REG_COM16, 0x38 },
1719 { 0x56, 0x40 },
1720
1721 { 0x34, 0x11 },
1722 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1723 { 0xa4, 0x88 },
1724 { 0x96, 0x00 },
1725 { 0x97, 0x30 },
1726 { 0x98, 0x20 },
1727 { 0x99, 0x30 },
1728 { 0x9a, 0x84 },
1729 { 0x9b, 0x29 },
1730 { 0x9c, 0x03 },
1731 { 0x9d, 0x4c },
1732 { 0x9e, 0x3f },
1733 { 0x78, 0x04 },
1734
1735 /* Extra-weird stuff. Some sort of multiplexor register */
1736 { 0x79, 0x01 },
1737 { 0xc8, 0xf0 },
1738 { 0x79, 0x0f },
1739 { 0xc8, 0x00 },
1740 { 0x79, 0x10 },
1741 { 0xc8, 0x7e },
1742 { 0x79, 0x0a },
1743 { 0xc8, 0x80 },
1744 { 0x79, 0x0b },
1745 { 0xc8, 0x01 },
1746 { 0x79, 0x0c },
1747 { 0xc8, 0x0f },
1748 { 0x79, 0x0d },
1749 { 0xc8, 0x20 },
1750 { 0x79, 0x09 },
1751 { 0xc8, 0x80 },
1752 { 0x79, 0x02 },
1753 { 0xc8, 0xc0 },
1754 { 0x79, 0x03 },
1755 { 0xc8, 0x40 },
1756 { 0x79, 0x05 },
1757 { 0xc8, 0x30 },
1758 { 0x79, 0x26 },
1759 };
1760
1761 static const struct ov_i2c_regvals norm_8610[] = {
1762 { 0x12, 0x80 },
1763 { 0x00, 0x00 },
1764 { 0x01, 0x80 },
1765 { 0x02, 0x80 },
1766 { 0x03, 0xc0 },
1767 { 0x04, 0x30 },
1768 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1769 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1770 { 0x0a, 0x86 },
1771 { 0x0b, 0xb0 },
1772 { 0x0c, 0x20 },
1773 { 0x0d, 0x20 },
1774 { 0x11, 0x01 },
1775 { 0x12, 0x25 },
1776 { 0x13, 0x01 },
1777 { 0x14, 0x04 },
1778 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1779 { 0x16, 0x03 },
1780 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1781 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1782 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1783 { 0x1a, 0xf5 },
1784 { 0x1b, 0x00 },
1785 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1786 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1787 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1788 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1789 { 0x26, 0xa2 },
1790 { 0x27, 0xea },
1791 { 0x28, 0x00 },
1792 { 0x29, 0x00 },
1793 { 0x2a, 0x80 },
1794 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1795 { 0x2c, 0xac },
1796 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1797 { 0x2e, 0x80 },
1798 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1799 { 0x4c, 0x00 },
1800 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1801 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1802 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1803 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1804 { 0x63, 0xff },
1805 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1806 * maybe thats wrong */
1807 { 0x65, 0x00 },
1808 { 0x66, 0x55 },
1809 { 0x67, 0xb0 },
1810 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1811 { 0x69, 0x02 },
1812 { 0x6a, 0x22 },
1813 { 0x6b, 0x00 },
1814 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1815 * deleting bit7 colors the first images red */
1816 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1817 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1818 { 0x6f, 0x01 },
1819 { 0x70, 0x8b },
1820 { 0x71, 0x00 },
1821 { 0x72, 0x14 },
1822 { 0x73, 0x54 },
1823 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1824 { 0x75, 0x0e },
1825 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1826 { 0x77, 0xff },
1827 { 0x78, 0x80 },
1828 { 0x79, 0x80 },
1829 { 0x7a, 0x80 },
1830 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1831 { 0x7c, 0x00 },
1832 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1833 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1834 { 0x7f, 0xfb },
1835 { 0x80, 0x28 },
1836 { 0x81, 0x00 },
1837 { 0x82, 0x23 },
1838 { 0x83, 0x0b },
1839 { 0x84, 0x00 },
1840 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1841 { 0x86, 0xc9 },
1842 { 0x87, 0x00 },
1843 { 0x88, 0x00 },
1844 { 0x89, 0x01 },
1845 { 0x12, 0x20 },
1846 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1847 };
1848
1849 static unsigned char ov7670_abs_to_sm(unsigned char v)
1850 {
1851 if (v > 127)
1852 return v & 0x7f;
1853 return (128 - v) | 0x80;
1854 }
1855
1856 /* Write a OV519 register */
1857 static int reg_w(struct sd *sd, __u16 index, __u16 value)
1858 {
1859 int ret, req = 0;
1860
1861 switch (sd->bridge) {
1862 case BRIDGE_OV511:
1863 case BRIDGE_OV511PLUS:
1864 req = 2;
1865 break;
1866 case BRIDGE_OVFX2:
1867 req = 0x0a;
1868 /* fall through */
1869 case BRIDGE_W9968CF:
1870 ret = usb_control_msg(sd->gspca_dev.dev,
1871 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1872 req,
1873 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1874 value, index, NULL, 0, 500);
1875 goto leave;
1876 default:
1877 req = 1;
1878 }
1879
1880 sd->gspca_dev.usb_buf[0] = value;
1881 ret = usb_control_msg(sd->gspca_dev.dev,
1882 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1883 req,
1884 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1885 0, index,
1886 sd->gspca_dev.usb_buf, 1, 500);
1887 leave:
1888 if (ret < 0) {
1889 PDEBUG(D_ERR, "Write reg 0x%04x -> [0x%02x] failed",
1890 value, index);
1891 return ret;
1892 }
1893
1894 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1895 return 0;
1896 }
1897
1898 /* Read from a OV519 register, note not valid for the w9968cf!! */
1899 /* returns: negative is error, pos or zero is data */
1900 static int reg_r(struct sd *sd, __u16 index)
1901 {
1902 int ret;
1903 int req;
1904
1905 switch (sd->bridge) {
1906 case BRIDGE_OV511:
1907 case BRIDGE_OV511PLUS:
1908 req = 3;
1909 break;
1910 case BRIDGE_OVFX2:
1911 req = 0x0b;
1912 break;
1913 default:
1914 req = 1;
1915 }
1916
1917 ret = usb_control_msg(sd->gspca_dev.dev,
1918 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1919 req,
1920 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1921 0, index, sd->gspca_dev.usb_buf, 1, 500);
1922
1923 if (ret >= 0) {
1924 ret = sd->gspca_dev.usb_buf[0];
1925 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1926 } else
1927 PDEBUG(D_ERR, "Read reg [0x%02x] failed", index);
1928
1929 return ret;
1930 }
1931
1932 /* Read 8 values from a OV519 register */
1933 static int reg_r8(struct sd *sd,
1934 __u16 index)
1935 {
1936 int ret;
1937
1938 ret = usb_control_msg(sd->gspca_dev.dev,
1939 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1940 1, /* REQ_IO */
1941 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1942 0, index, sd->gspca_dev.usb_buf, 8, 500);
1943
1944 if (ret >= 0)
1945 ret = sd->gspca_dev.usb_buf[0];
1946 else
1947 PDEBUG(D_ERR, "Read reg 8 [0x%02x] failed", index);
1948
1949 return ret;
1950 }
1951
1952 /*
1953 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1954 * the same position as 1's in "mask" are cleared and set to "value". Bits
1955 * that are in the same position as 0's in "mask" are preserved, regardless
1956 * of their respective state in "value".
1957 */
1958 static int reg_w_mask(struct sd *sd,
1959 __u16 index,
1960 __u8 value,
1961 __u8 mask)
1962 {
1963 int ret;
1964 __u8 oldval;
1965
1966 if (mask != 0xff) {
1967 value &= mask; /* Enforce mask on value */
1968 ret = reg_r(sd, index);
1969 if (ret < 0)
1970 return ret;
1971
1972 oldval = ret & ~mask; /* Clear the masked bits */
1973 value |= oldval; /* Set the desired bits */
1974 }
1975 return reg_w(sd, index, value);
1976 }
1977
1978 /*
1979 * Writes multiple (n) byte value to a single register. Only valid with certain
1980 * registers (0x30 and 0xc4 - 0xce).
1981 */
1982 static int ov518_reg_w32(struct sd *sd, __u16 index, u32 value, int n)
1983 {
1984 int ret;
1985
1986 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1987
1988 ret = usb_control_msg(sd->gspca_dev.dev,
1989 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1990 1 /* REG_IO */,
1991 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1992 0, index,
1993 sd->gspca_dev.usb_buf, n, 500);
1994 if (ret < 0) {
1995 PDEBUG(D_ERR, "Write reg32 [%02x] %08x failed", index, value);
1996 return ret;
1997 }
1998
1999 return 0;
2000 }
2001
2002 static int ov511_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2003 {
2004 int rc, retries;
2005
2006 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2007
2008 /* Three byte write cycle */
2009 for (retries = 6; ; ) {
2010 /* Select camera register */
2011 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2012 if (rc < 0)
2013 return rc;
2014
2015 /* Write "value" to I2C data port of OV511 */
2016 rc = reg_w(sd, R51x_I2C_DATA, value);
2017 if (rc < 0)
2018 return rc;
2019
2020 /* Initiate 3-byte write cycle */
2021 rc = reg_w(sd, R511_I2C_CTL, 0x01);
2022 if (rc < 0)
2023 return rc;
2024
2025 do {
2026 rc = reg_r(sd, R511_I2C_CTL);
2027 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2028
2029 if (rc < 0)
2030 return rc;
2031
2032 if ((rc & 2) == 0) /* Ack? */
2033 break;
2034 if (--retries < 0) {
2035 PDEBUG(D_USBO, "i2c write retries exhausted");
2036 return -1;
2037 }
2038 }
2039
2040 return 0;
2041 }
2042
2043 static int ov511_i2c_r(struct sd *sd, __u8 reg)
2044 {
2045 int rc, value, retries;
2046
2047 /* Two byte write cycle */
2048 for (retries = 6; ; ) {
2049 /* Select camera register */
2050 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2051 if (rc < 0)
2052 return rc;
2053
2054 /* Initiate 2-byte write cycle */
2055 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2056 if (rc < 0)
2057 return rc;
2058
2059 do {
2060 rc = reg_r(sd, R511_I2C_CTL);
2061 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2062
2063 if (rc < 0)
2064 return rc;
2065
2066 if ((rc & 2) == 0) /* Ack? */
2067 break;
2068
2069 /* I2C abort */
2070 reg_w(sd, R511_I2C_CTL, 0x10);
2071
2072 if (--retries < 0) {
2073 PDEBUG(D_USBI, "i2c write retries exhausted");
2074 return -1;
2075 }
2076 }
2077
2078 /* Two byte read cycle */
2079 for (retries = 6; ; ) {
2080 /* Initiate 2-byte read cycle */
2081 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2082 if (rc < 0)
2083 return rc;
2084
2085 do {
2086 rc = reg_r(sd, R511_I2C_CTL);
2087 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2088
2089 if (rc < 0)
2090 return rc;
2091
2092 if ((rc & 2) == 0) /* Ack? */
2093 break;
2094
2095 /* I2C abort */
2096 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2097 if (rc < 0)
2098 return rc;
2099
2100 if (--retries < 0) {
2101 PDEBUG(D_USBI, "i2c read retries exhausted");
2102 return -1;
2103 }
2104 }
2105
2106 value = reg_r(sd, R51x_I2C_DATA);
2107
2108 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2109
2110 /* This is needed to make i2c_w() work */
2111 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2112 if (rc < 0)
2113 return rc;
2114
2115 return value;
2116 }
2117
2118 /*
2119 * The OV518 I2C I/O procedure is different, hence, this function.
2120 * This is normally only called from i2c_w(). Note that this function
2121 * always succeeds regardless of whether the sensor is present and working.
2122 */
2123 static int ov518_i2c_w(struct sd *sd,
2124 __u8 reg,
2125 __u8 value)
2126 {
2127 int rc;
2128
2129 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2130
2131 /* Select camera register */
2132 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2133 if (rc < 0)
2134 return rc;
2135
2136 /* Write "value" to I2C data port of OV511 */
2137 rc = reg_w(sd, R51x_I2C_DATA, value);
2138 if (rc < 0)
2139 return rc;
2140
2141 /* Initiate 3-byte write cycle */
2142 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2143 if (rc < 0)
2144 return rc;
2145
2146 /* wait for write complete */
2147 msleep(4);
2148 return reg_r8(sd, R518_I2C_CTL);
2149 }
2150
2151 /*
2152 * returns: negative is error, pos or zero is data
2153 *
2154 * The OV518 I2C I/O procedure is different, hence, this function.
2155 * This is normally only called from i2c_r(). Note that this function
2156 * always succeeds regardless of whether the sensor is present and working.
2157 */
2158 static int ov518_i2c_r(struct sd *sd, __u8 reg)
2159 {
2160 int rc, value;
2161
2162 /* Select camera register */
2163 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2164 if (rc < 0)
2165 return rc;
2166
2167 /* Initiate 2-byte write cycle */
2168 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2169 if (rc < 0)
2170 return rc;
2171
2172 /* Initiate 2-byte read cycle */
2173 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2174 if (rc < 0)
2175 return rc;
2176 value = reg_r(sd, R51x_I2C_DATA);
2177 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2178 return value;
2179 }
2180
2181 static int ovfx2_i2c_w(struct sd *sd, __u8 reg, __u8 value)
2182 {
2183 int ret;
2184
2185 ret = usb_control_msg(sd->gspca_dev.dev,
2186 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2187 0x02,
2188 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2189 (__u16)value, (__u16)reg, NULL, 0, 500);
2190
2191 if (ret < 0) {
2192 PDEBUG(D_ERR, "i2c 0x%02x -> [0x%02x] failed", value, reg);
2193 return ret;
2194 }
2195
2196 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2197 return 0;
2198 }
2199
2200 static int ovfx2_i2c_r(struct sd *sd, __u8 reg)
2201 {
2202 int ret;
2203
2204 ret = usb_control_msg(sd->gspca_dev.dev,
2205 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2206 0x03,
2207 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2208 0, (__u16)reg, sd->gspca_dev.usb_buf, 1, 500);
2209
2210 if (ret >= 0) {
2211 ret = sd->gspca_dev.usb_buf[0];
2212 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2213 } else
2214 PDEBUG(D_ERR, "i2c read [0x%02x] failed", reg);
2215
2216 return ret;
2217 }
2218
2219 static int i2c_w(struct sd *sd, __u8 reg, __u8 value)
2220 {
2221 int ret = -1;
2222
2223 if (sd->sensor_reg_cache[reg] == value)
2224 return 0;
2225
2226 switch (sd->bridge) {
2227 case BRIDGE_OV511:
2228 case BRIDGE_OV511PLUS:
2229 ret = ov511_i2c_w(sd, reg, value);
2230 break;
2231 case BRIDGE_OV518:
2232 case BRIDGE_OV518PLUS:
2233 case BRIDGE_OV519:
2234 ret = ov518_i2c_w(sd, reg, value);
2235 break;
2236 case BRIDGE_OVFX2:
2237 ret = ovfx2_i2c_w(sd, reg, value);
2238 break;
2239 case BRIDGE_W9968CF:
2240 ret = w9968cf_i2c_w(sd, reg, value);
2241 break;
2242 }
2243
2244 if (ret >= 0) {
2245 /* Up on sensor reset empty the register cache */
2246 if (reg == 0x12 && (value & 0x80))
2247 memset(sd->sensor_reg_cache, -1,
2248 sizeof(sd->sensor_reg_cache));
2249 else
2250 sd->sensor_reg_cache[reg] = value;
2251 }
2252
2253 return ret;
2254 }
2255
2256 static int i2c_r(struct sd *sd, __u8 reg)
2257 {
2258 int ret = -1;
2259
2260 if (sd->sensor_reg_cache[reg] != -1)
2261 return sd->sensor_reg_cache[reg];
2262
2263 switch (sd->bridge) {
2264 case BRIDGE_OV511:
2265 case BRIDGE_OV511PLUS:
2266 ret = ov511_i2c_r(sd, reg);
2267 break;
2268 case BRIDGE_OV518:
2269 case BRIDGE_OV518PLUS:
2270 case BRIDGE_OV519:
2271 ret = ov518_i2c_r(sd, reg);
2272 break;
2273 case BRIDGE_OVFX2:
2274 ret = ovfx2_i2c_r(sd, reg);
2275 break;
2276 case BRIDGE_W9968CF:
2277 ret = w9968cf_i2c_r(sd, reg);
2278 break;
2279 }
2280
2281 if (ret >= 0)
2282 sd->sensor_reg_cache[reg] = ret;
2283
2284 return ret;
2285 }
2286
2287 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2288 * the same position as 1's in "mask" are cleared and set to "value". Bits
2289 * that are in the same position as 0's in "mask" are preserved, regardless
2290 * of their respective state in "value".
2291 */
2292 static int i2c_w_mask(struct sd *sd,
2293 __u8 reg,
2294 __u8 value,
2295 __u8 mask)
2296 {
2297 int rc;
2298 __u8 oldval;
2299
2300 value &= mask; /* Enforce mask on value */
2301 rc = i2c_r(sd, reg);
2302 if (rc < 0)
2303 return rc;
2304 oldval = rc & ~mask; /* Clear the masked bits */
2305 value |= oldval; /* Set the desired bits */
2306 return i2c_w(sd, reg, value);
2307 }
2308
2309 /* Temporarily stops OV511 from functioning. Must do this before changing
2310 * registers while the camera is streaming */
2311 static inline int ov51x_stop(struct sd *sd)
2312 {
2313 PDEBUG(D_STREAM, "stopping");
2314 sd->stopped = 1;
2315 switch (sd->bridge) {
2316 case BRIDGE_OV511:
2317 case BRIDGE_OV511PLUS:
2318 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2319 case BRIDGE_OV518:
2320 case BRIDGE_OV518PLUS:
2321 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2322 case BRIDGE_OV519:
2323 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2324 case BRIDGE_OVFX2:
2325 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2326 case BRIDGE_W9968CF:
2327 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2328 }
2329
2330 return 0;
2331 }
2332
2333 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2334 * actually stopped (for performance). */
2335 static inline int ov51x_restart(struct sd *sd)
2336 {
2337 int rc;
2338
2339 PDEBUG(D_STREAM, "restarting");
2340 if (!sd->stopped)
2341 return 0;
2342 sd->stopped = 0;
2343
2344 /* Reinitialize the stream */
2345 switch (sd->bridge) {
2346 case BRIDGE_OV511:
2347 case BRIDGE_OV511PLUS:
2348 return reg_w(sd, R51x_SYS_RESET, 0x00);
2349 case BRIDGE_OV518:
2350 case BRIDGE_OV518PLUS:
2351 rc = reg_w(sd, 0x2f, 0x80);
2352 if (rc < 0)
2353 return rc;
2354 return reg_w(sd, R51x_SYS_RESET, 0x00);
2355 case BRIDGE_OV519:
2356 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2357 case BRIDGE_OVFX2:
2358 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2359 case BRIDGE_W9968CF:
2360 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2361 }
2362
2363 return 0;
2364 }
2365
2366 static int ov51x_set_slave_ids(struct sd *sd, __u8 slave);
2367
2368 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2369 * is synchronized. Returns <0 on failure.
2370 */
2371 static int init_ov_sensor(struct sd *sd, __u8 slave)
2372 {
2373 int i;
2374
2375 if (ov51x_set_slave_ids(sd, slave) < 0)
2376 return -EIO;
2377
2378 /* Reset the sensor */
2379 if (i2c_w(sd, 0x12, 0x80) < 0)
2380 return -EIO;
2381
2382 /* Wait for it to initialize */
2383 msleep(150);
2384
2385 for (i = 0; i < i2c_detect_tries; i++) {
2386 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2387 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2388 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2389 return 0;
2390 }
2391
2392 /* Reset the sensor */
2393 if (i2c_w(sd, 0x12, 0x80) < 0)
2394 return -EIO;
2395 /* Wait for it to initialize */
2396 msleep(150);
2397 /* Dummy read to sync I2C */
2398 if (i2c_r(sd, 0x00) < 0)
2399 return -EIO;
2400 }
2401 return -EIO;
2402 }
2403
2404 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2405 * and the read slave will be set to (slave + 1).
2406 * This should not be called from outside the i2c I/O functions.
2407 * Sets I2C read and write slave IDs. Returns <0 for error
2408 */
2409 static int ov51x_set_slave_ids(struct sd *sd,
2410 __u8 slave)
2411 {
2412 int rc;
2413
2414 switch (sd->bridge) {
2415 case BRIDGE_OVFX2:
2416 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2417 case BRIDGE_W9968CF:
2418 sd->sensor_addr = slave;
2419 return 0;
2420 }
2421
2422 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2423 if (rc < 0)
2424 return rc;
2425 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2426 }
2427
2428 static int write_regvals(struct sd *sd,
2429 const struct ov_regvals *regvals,
2430 int n)
2431 {
2432 int rc;
2433
2434 while (--n >= 0) {
2435 rc = reg_w(sd, regvals->reg, regvals->val);
2436 if (rc < 0)
2437 return rc;
2438 regvals++;
2439 }
2440 return 0;
2441 }
2442
2443 static int write_i2c_regvals(struct sd *sd,
2444 const struct ov_i2c_regvals *regvals,
2445 int n)
2446 {
2447 int rc;
2448
2449 while (--n >= 0) {
2450 rc = i2c_w(sd, regvals->reg, regvals->val);
2451 if (rc < 0)
2452 return rc;
2453 regvals++;
2454 }
2455 return 0;
2456 }
2457
2458 /****************************************************************************
2459 *
2460 * OV511 and sensor configuration
2461 *
2462 ***************************************************************************/
2463
2464 /* This initializes the OV2x10 / OV3610 / OV3620 */
2465 static int ov_hires_configure(struct sd *sd)
2466 {
2467 int high, low;
2468
2469 if (sd->bridge != BRIDGE_OVFX2) {
2470 PDEBUG(D_ERR, "error hires sensors only supported with ovfx2");
2471 return -1;
2472 }
2473
2474 PDEBUG(D_PROBE, "starting ov hires configuration");
2475
2476 /* Detect sensor (sub)type */
2477 high = i2c_r(sd, 0x0a);
2478 low = i2c_r(sd, 0x0b);
2479 /* info("%x, %x", high, low); */
2480 if (high == 0x96 && low == 0x40) {
2481 PDEBUG(D_PROBE, "Sensor is an OV2610");
2482 sd->sensor = SEN_OV2610;
2483 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2484 PDEBUG(D_PROBE, "Sensor is an OV3610");
2485 sd->sensor = SEN_OV3610;
2486 } else {
2487 PDEBUG(D_ERR, "Error unknown sensor type: 0x%02x%02x",
2488 high, low);
2489 return -1;
2490 }
2491
2492 /* Set sensor-specific vars */
2493 return 0;
2494 }
2495
2496
2497 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2498 * the same register settings as the OV8610, since they are very similar.
2499 */
2500 static int ov8xx0_configure(struct sd *sd)
2501 {
2502 int rc;
2503
2504 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2505
2506 /* Detect sensor (sub)type */
2507 rc = i2c_r(sd, OV7610_REG_COM_I);
2508 if (rc < 0) {
2509 PDEBUG(D_ERR, "Error detecting sensor type");
2510 return -1;
2511 }
2512 if ((rc & 3) == 1) {
2513 sd->sensor = SEN_OV8610;
2514 } else {
2515 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2516 return -1;
2517 }
2518
2519 /* Set sensor-specific vars */
2520 return 0;
2521 }
2522
2523 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2524 * the same register settings as the OV7610, since they are very similar.
2525 */
2526 static int ov7xx0_configure(struct sd *sd)
2527 {
2528 int rc, high, low;
2529
2530
2531 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2532
2533 /* Detect sensor (sub)type */
2534 rc = i2c_r(sd, OV7610_REG_COM_I);
2535
2536 /* add OV7670 here
2537 * it appears to be wrongly detected as a 7610 by default */
2538 if (rc < 0) {
2539 PDEBUG(D_ERR, "Error detecting sensor type");
2540 return -1;
2541 }
2542 if ((rc & 3) == 3) {
2543 /* quick hack to make OV7670s work */
2544 high = i2c_r(sd, 0x0a);
2545 low = i2c_r(sd, 0x0b);
2546 /* info("%x, %x", high, low); */
2547 if (high == 0x76 && low == 0x73) {
2548 PDEBUG(D_PROBE, "Sensor is an OV7670");
2549 sd->sensor = SEN_OV7670;
2550 } else {
2551 PDEBUG(D_PROBE, "Sensor is an OV7610");
2552 sd->sensor = SEN_OV7610;
2553 }
2554 } else if ((rc & 3) == 1) {
2555 /* I don't know what's different about the 76BE yet. */
2556 if (i2c_r(sd, 0x15) & 1) {
2557 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2558 sd->sensor = SEN_OV7620AE;
2559 } else {
2560 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2561 sd->sensor = SEN_OV76BE;
2562 }
2563 } else if ((rc & 3) == 0) {
2564 /* try to read product id registers */
2565 high = i2c_r(sd, 0x0a);
2566 if (high < 0) {
2567 PDEBUG(D_ERR, "Error detecting camera chip PID");
2568 return high;
2569 }
2570 low = i2c_r(sd, 0x0b);
2571 if (low < 0) {
2572 PDEBUG(D_ERR, "Error detecting camera chip VER");
2573 return low;
2574 }
2575 if (high == 0x76) {
2576 switch (low) {
2577 case 0x30:
2578 PDEBUG(D_PROBE, "Sensor is an OV7630/OV7635");
2579 PDEBUG(D_ERR,
2580 "7630 is not supported by this driver");
2581 return -1;
2582 case 0x40:
2583 PDEBUG(D_PROBE, "Sensor is an OV7645");
2584 sd->sensor = SEN_OV7640; /* FIXME */
2585 break;
2586 case 0x45:
2587 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2588 sd->sensor = SEN_OV7640; /* FIXME */
2589 break;
2590 case 0x48:
2591 PDEBUG(D_PROBE, "Sensor is an OV7648");
2592 sd->sensor = SEN_OV7640; /* FIXME */
2593 break;
2594 default:
2595 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2596 return -1;
2597 }
2598 } else {
2599 PDEBUG(D_PROBE, "Sensor is an OV7620");
2600 sd->sensor = SEN_OV7620;
2601 }
2602 } else {
2603 PDEBUG(D_ERR, "Unknown image sensor version: %d", rc & 3);
2604 return -1;
2605 }
2606
2607 /* Set sensor-specific vars */
2608 return 0;
2609 }
2610
2611 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2612 static int ov6xx0_configure(struct sd *sd)
2613 {
2614 int rc;
2615 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2616
2617 /* Detect sensor (sub)type */
2618 rc = i2c_r(sd, OV7610_REG_COM_I);
2619 if (rc < 0) {
2620 PDEBUG(D_ERR, "Error detecting sensor type");
2621 return -1;
2622 }
2623
2624 /* Ugh. The first two bits are the version bits, but
2625 * the entire register value must be used. I guess OVT
2626 * underestimated how many variants they would make. */
2627 switch (rc) {
2628 case 0x00:
2629 sd->sensor = SEN_OV6630;
2630 PDEBUG(D_ERR,
2631 "WARNING: Sensor is an OV66308. Your camera may have");
2632 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2633 break;
2634 case 0x01:
2635 sd->sensor = SEN_OV6620;
2636 PDEBUG(D_PROBE, "Sensor is an OV6620");
2637 break;
2638 case 0x02:
2639 sd->sensor = SEN_OV6630;
2640 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2641 break;
2642 case 0x03:
2643 sd->sensor = SEN_OV66308AF;
2644 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2645 break;
2646 case 0x90:
2647 sd->sensor = SEN_OV6630;
2648 PDEBUG(D_ERR,
2649 "WARNING: Sensor is an OV66307. Your camera may have");
2650 PDEBUG(D_ERR, "been misdetected in previous driver versions.");
2651 break;
2652 default:
2653 PDEBUG(D_ERR, "FATAL: Unknown sensor version: 0x%02x", rc);
2654 return -1;
2655 }
2656
2657 /* Set sensor-specific vars */
2658 sd->sif = 1;
2659
2660 return 0;
2661 }
2662
2663 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2664 static void ov51x_led_control(struct sd *sd, int on)
2665 {
2666 if (sd->invert_led)
2667 on = !on;
2668
2669 switch (sd->bridge) {
2670 /* OV511 has no LED control */
2671 case BRIDGE_OV511PLUS:
2672 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2673 break;
2674 case BRIDGE_OV518:
2675 case BRIDGE_OV518PLUS:
2676 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2677 break;
2678 case BRIDGE_OV519:
2679 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2680 break;
2681 }
2682 }
2683
2684 static int ov51x_upload_quan_tables(struct sd *sd)
2685 {
2686 const unsigned char yQuanTable511[] = {
2687 0, 1, 1, 2, 2, 3, 3, 4,
2688 1, 1, 1, 2, 2, 3, 4, 4,
2689 1, 1, 2, 2, 3, 4, 4, 4,
2690 2, 2, 2, 3, 4, 4, 4, 4,
2691 2, 2, 3, 4, 4, 5, 5, 5,
2692 3, 3, 4, 4, 5, 5, 5, 5,
2693 3, 4, 4, 4, 5, 5, 5, 5,
2694 4, 4, 4, 4, 5, 5, 5, 5
2695 };
2696
2697 const unsigned char uvQuanTable511[] = {
2698 0, 2, 2, 3, 4, 4, 4, 4,
2699 2, 2, 2, 4, 4, 4, 4, 4,
2700 2, 2, 3, 4, 4, 4, 4, 4,
2701 3, 4, 4, 4, 4, 4, 4, 4,
2702 4, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4,
2704 4, 4, 4, 4, 4, 4, 4, 4,
2705 4, 4, 4, 4, 4, 4, 4, 4
2706 };
2707
2708 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2709 const unsigned char yQuanTable518[] = {
2710 5, 4, 5, 6, 6, 7, 7, 7,
2711 5, 5, 5, 5, 6, 7, 7, 7,
2712 6, 6, 6, 6, 7, 7, 7, 8,
2713 7, 7, 6, 7, 7, 7, 8, 8
2714 };
2715
2716 const unsigned char uvQuanTable518[] = {
2717 6, 6, 6, 7, 7, 7, 7, 7,
2718 6, 6, 6, 7, 7, 7, 7, 7,
2719 6, 6, 6, 7, 7, 7, 7, 8,
2720 7, 7, 7, 7, 7, 7, 8, 8
2721 };
2722
2723 const unsigned char *pYTable, *pUVTable;
2724 unsigned char val0, val1;
2725 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2726
2727 PDEBUG(D_PROBE, "Uploading quantization tables");
2728
2729 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2730 pYTable = yQuanTable511;
2731 pUVTable = uvQuanTable511;
2732 size = 32;
2733 } else {
2734 pYTable = yQuanTable518;
2735 pUVTable = uvQuanTable518;
2736 size = 16;
2737 }
2738
2739 for (i = 0; i < size; i++) {
2740 val0 = *pYTable++;
2741 val1 = *pYTable++;
2742 val0 &= 0x0f;
2743 val1 &= 0x0f;
2744 val0 |= val1 << 4;
2745 rc = reg_w(sd, reg, val0);
2746 if (rc < 0)
2747 return rc;
2748
2749 val0 = *pUVTable++;
2750 val1 = *pUVTable++;
2751 val0 &= 0x0f;
2752 val1 &= 0x0f;
2753 val0 |= val1 << 4;
2754 rc = reg_w(sd, reg + size, val0);
2755 if (rc < 0)
2756 return rc;
2757
2758 reg++;
2759 }
2760
2761 return 0;
2762 }
2763
2764 /* This initializes the OV511/OV511+ and the sensor */
2765 static int ov511_configure(struct gspca_dev *gspca_dev)
2766 {
2767 struct sd *sd = (struct sd *) gspca_dev;
2768 int rc;
2769
2770 /* For 511 and 511+ */
2771 const struct ov_regvals init_511[] = {
2772 { R51x_SYS_RESET, 0x7f },
2773 { R51x_SYS_INIT, 0x01 },
2774 { R51x_SYS_RESET, 0x7f },
2775 { R51x_SYS_INIT, 0x01 },
2776 { R51x_SYS_RESET, 0x3f },
2777 { R51x_SYS_INIT, 0x01 },
2778 { R51x_SYS_RESET, 0x3d },
2779 };
2780
2781 const struct ov_regvals norm_511[] = {
2782 { R511_DRAM_FLOW_CTL, 0x01 },
2783 { R51x_SYS_SNAP, 0x00 },
2784 { R51x_SYS_SNAP, 0x02 },
2785 { R51x_SYS_SNAP, 0x00 },
2786 { R511_FIFO_OPTS, 0x1f },
2787 { R511_COMP_EN, 0x00 },
2788 { R511_COMP_LUT_EN, 0x03 },
2789 };
2790
2791 const struct ov_regvals norm_511_p[] = {
2792 { R511_DRAM_FLOW_CTL, 0xff },
2793 { R51x_SYS_SNAP, 0x00 },
2794 { R51x_SYS_SNAP, 0x02 },
2795 { R51x_SYS_SNAP, 0x00 },
2796 { R511_FIFO_OPTS, 0xff },
2797 { R511_COMP_EN, 0x00 },
2798 { R511_COMP_LUT_EN, 0x03 },
2799 };
2800
2801 const struct ov_regvals compress_511[] = {
2802 { 0x70, 0x1f },
2803 { 0x71, 0x05 },
2804 { 0x72, 0x06 },
2805 { 0x73, 0x06 },
2806 { 0x74, 0x14 },
2807 { 0x75, 0x03 },
2808 { 0x76, 0x04 },
2809 { 0x77, 0x04 },
2810 };
2811
2812 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2813
2814 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2815 if (rc < 0)
2816 return rc;
2817
2818 switch (sd->bridge) {
2819 case BRIDGE_OV511:
2820 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2821 if (rc < 0)
2822 return rc;
2823 break;
2824 case BRIDGE_OV511PLUS:
2825 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2826 if (rc < 0)
2827 return rc;
2828 break;
2829 }
2830
2831 /* Init compression */
2832 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2833 if (rc < 0)
2834 return rc;
2835
2836 rc = ov51x_upload_quan_tables(sd);
2837 if (rc < 0) {
2838 PDEBUG(D_ERR, "Error uploading quantization tables");
2839 return rc;
2840 }
2841
2842 return 0;
2843 }
2844
2845 /* This initializes the OV518/OV518+ and the sensor */
2846 static int ov518_configure(struct gspca_dev *gspca_dev)
2847 {
2848 struct sd *sd = (struct sd *) gspca_dev;
2849 int rc;
2850
2851 /* For 518 and 518+ */
2852 const struct ov_regvals init_518[] = {
2853 { R51x_SYS_RESET, 0x40 },
2854 { R51x_SYS_INIT, 0xe1 },
2855 { R51x_SYS_RESET, 0x3e },
2856 { R51x_SYS_INIT, 0xe1 },
2857 { R51x_SYS_RESET, 0x00 },
2858 { R51x_SYS_INIT, 0xe1 },
2859 { 0x46, 0x00 },
2860 { 0x5d, 0x03 },
2861 };
2862
2863 const struct ov_regvals norm_518[] = {
2864 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2865 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2866 { 0x31, 0x0f },
2867 { 0x5d, 0x03 },
2868 { 0x24, 0x9f },
2869 { 0x25, 0x90 },
2870 { 0x20, 0x00 },
2871 { 0x51, 0x04 },
2872 { 0x71, 0x19 },
2873 { 0x2f, 0x80 },
2874 };
2875
2876 const struct ov_regvals norm_518_p[] = {
2877 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2878 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2879 { 0x31, 0x0f },
2880 { 0x5d, 0x03 },
2881 { 0x24, 0x9f },
2882 { 0x25, 0x90 },
2883 { 0x20, 0x60 },
2884 { 0x51, 0x02 },
2885 { 0x71, 0x19 },
2886 { 0x40, 0xff },
2887 { 0x41, 0x42 },
2888 { 0x46, 0x00 },
2889 { 0x33, 0x04 },
2890 { 0x21, 0x19 },
2891 { 0x3f, 0x10 },
2892 { 0x2f, 0x80 },
2893 };
2894
2895 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2896 PDEBUG(D_PROBE, "Device revision %d",
2897 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2898
2899 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2900 if (rc < 0)
2901 return rc;
2902
2903 /* Set LED GPIO pin to output mode */
2904 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2905 if (rc < 0)
2906 return rc;
2907
2908 switch (sd->bridge) {
2909 case BRIDGE_OV518:
2910 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2911 if (rc < 0)
2912 return rc;
2913 break;
2914 case BRIDGE_OV518PLUS:
2915 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2916 if (rc < 0)
2917 return rc;
2918 break;
2919 }
2920
2921 rc = ov51x_upload_quan_tables(sd);
2922 if (rc < 0) {
2923 PDEBUG(D_ERR, "Error uploading quantization tables");
2924 return rc;
2925 }
2926
2927 rc = reg_w(sd, 0x2f, 0x80);
2928 if (rc < 0)
2929 return rc;
2930
2931 return 0;
2932 }
2933
2934 static int ov519_configure(struct sd *sd)
2935 {
2936 static const struct ov_regvals init_519[] = {
2937 { 0x5a, 0x6d }, /* EnableSystem */
2938 { 0x53, 0x9b },
2939 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2940 { 0x5d, 0x03 },
2941 { 0x49, 0x01 },
2942 { 0x48, 0x00 },
2943 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2944 * detection will fail. This deserves further investigation. */
2945 { OV519_GPIO_IO_CTRL0, 0xee },
2946 { 0x51, 0x0f }, /* SetUsbInit */
2947 { 0x51, 0x00 },
2948 { 0x22, 0x00 },
2949 /* windows reads 0x55 at this point*/
2950 };
2951
2952 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2953 }
2954
2955 static int ovfx2_configure(struct sd *sd)
2956 {
2957 static const struct ov_regvals init_fx2[] = {
2958 { 0x00, 0x60 },
2959 { 0x02, 0x01 },
2960 { 0x0f, 0x1d },
2961 { 0xe9, 0x82 },
2962 { 0xea, 0xc7 },
2963 { 0xeb, 0x10 },
2964 { 0xec, 0xf6 },
2965 };
2966
2967 sd->stopped = 1;
2968
2969 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2970 }
2971
2972 /* this function is called at probe time */
2973 static int sd_config(struct gspca_dev *gspca_dev,
2974 const struct usb_device_id *id)
2975 {
2976 struct sd *sd = (struct sd *) gspca_dev;
2977 struct cam *cam = &gspca_dev->cam;
2978 int ret = 0;
2979
2980 sd->bridge = id->driver_info & BRIDGE_MASK;
2981 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2982
2983 switch (sd->bridge) {
2984 case BRIDGE_OV511:
2985 case BRIDGE_OV511PLUS:
2986 ret = ov511_configure(gspca_dev);
2987 break;
2988 case BRIDGE_OV518:
2989 case BRIDGE_OV518PLUS:
2990 ret = ov518_configure(gspca_dev);
2991 break;
2992 case BRIDGE_OV519:
2993 ret = ov519_configure(sd);
2994 break;
2995 case BRIDGE_OVFX2:
2996 ret = ovfx2_configure(sd);
2997 cam->bulk_size = OVFX2_BULK_SIZE;
2998 cam->bulk_nurbs = MAX_NURBS;
2999 cam->bulk = 1;
3000 break;
3001 case BRIDGE_W9968CF:
3002 ret = w9968cf_configure(sd);
3003 cam->reverse_alts = 1;
3004 break;
3005 }
3006
3007 if (ret)
3008 goto error;
3009
3010 ov51x_led_control(sd, 0); /* turn LED off */
3011
3012 /* The OV519 must be more aggressive about sensor detection since
3013 * I2C write will never fail if the sensor is not present. We have
3014 * to try to initialize the sensor to detect its presence */
3015
3016 /* Test for 76xx */
3017 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3018 if (ov7xx0_configure(sd) < 0) {
3019 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3020 goto error;
3021 }
3022 /* Test for 6xx0 */
3023 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3024 if (ov6xx0_configure(sd) < 0) {
3025 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3026 goto error;
3027 }
3028 /* Test for 8xx0 */
3029 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3030 if (ov8xx0_configure(sd) < 0) {
3031 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3032 goto error;
3033 }
3034 /* Test for 3xxx / 2xxx */
3035 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3036 if (ov_hires_configure(sd) < 0) {
3037 PDEBUG(D_ERR, "Failed to configure high res OV");
3038 goto error;
3039 }
3040 } else {
3041 PDEBUG(D_ERR, "Can't determine sensor slave IDs");
3042 goto error;
3043 }
3044
3045 switch (sd->bridge) {
3046 case BRIDGE_OV511:
3047 case BRIDGE_OV511PLUS:
3048 if (!sd->sif) {
3049 cam->cam_mode = ov511_vga_mode;
3050 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3051 } else {
3052 cam->cam_mode = ov511_sif_mode;
3053 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3054 }
3055 break;
3056 case BRIDGE_OV518:
3057 case BRIDGE_OV518PLUS:
3058 if (!sd->sif) {
3059 cam->cam_mode = ov518_vga_mode;
3060 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3061 } else {
3062 cam->cam_mode = ov518_sif_mode;
3063 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3064 }
3065 break;
3066 case BRIDGE_OV519:
3067 if (!sd->sif) {
3068 cam->cam_mode = ov519_vga_mode;
3069 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3070 } else {
3071 cam->cam_mode = ov519_sif_mode;
3072 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3073 }
3074 break;
3075 case BRIDGE_OVFX2:
3076 if (sd->sensor == SEN_OV2610) {
3077 cam->cam_mode = ovfx2_ov2610_mode;
3078 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3079 } else if (sd->sensor == SEN_OV3610) {
3080 cam->cam_mode = ovfx2_ov3610_mode;
3081 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3082 } else if (!sd->sif) {
3083 cam->cam_mode = ov519_vga_mode;
3084 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3085 } else {
3086 cam->cam_mode = ov519_sif_mode;
3087 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3088 }
3089 break;
3090 case BRIDGE_W9968CF:
3091 cam->cam_mode = w9968cf_vga_mode;
3092 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3093 if (sd->sif)
3094 cam->nmodes--;
3095
3096 /* w9968cf needs initialisation once the sensor is known */
3097 if (w9968cf_init(sd) < 0)
3098 goto error;
3099 break;
3100 }
3101 sd->brightness = BRIGHTNESS_DEF;
3102 if (sd->sensor == SEN_OV6630 || sd->sensor == SEN_OV66308AF)
3103 sd->contrast = 200; /* The default is too low for the ov6630 */
3104 else
3105 sd->contrast = CONTRAST_DEF;
3106 sd->colors = COLOR_DEF;
3107 sd->hflip = HFLIP_DEF;
3108 sd->vflip = VFLIP_DEF;
3109 sd->autobrightness = AUTOBRIGHT_DEF;
3110 if (sd->sensor == SEN_OV7670) {
3111 sd->freq = OV7670_FREQ_DEF;
3112 gspca_dev->ctrl_dis = 1 << FREQ_IDX;
3113 } else {
3114 sd->freq = FREQ_DEF;
3115 gspca_dev->ctrl_dis = (1 << HFLIP_IDX) | (1 << VFLIP_IDX) |
3116 (1 << OV7670_FREQ_IDX);
3117 }
3118 sd->quality = QUALITY_DEF;
3119 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670)
3120 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT_IDX;
3121 /* OV8610 Frequency filter control should work but needs testing */
3122 if (sd->sensor == SEN_OV8610)
3123 gspca_dev->ctrl_dis |= 1 << FREQ_IDX;
3124 /* No controls for the OV2610/OV3610 */
3125 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3126 gspca_dev->ctrl_dis |= 0xFF;
3127
3128 return 0;
3129 error:
3130 PDEBUG(D_ERR, "OV519 Config failed");
3131 return -EBUSY;
3132 }
3133
3134 /* this function is called at probe and resume time */
3135 static int sd_init(struct gspca_dev *gspca_dev)
3136 {
3137 struct sd *sd = (struct sd *) gspca_dev;
3138
3139 /* initialize the sensor */
3140 switch (sd->sensor) {
3141 case SEN_OV2610:
3142 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3143 return -EIO;
3144 /* Enable autogain, autoexpo, awb, bandfilter */
3145 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3146 return -EIO;
3147 break;
3148 case SEN_OV3610:
3149 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3150 return -EIO;
3151 /* Enable autogain, autoexpo, awb, bandfilter */
3152 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3153 return -EIO;
3154 break;
3155 case SEN_OV6620:
3156 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3157 return -EIO;
3158 break;
3159 case SEN_OV6630:
3160 case SEN_OV66308AF:
3161 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3162 return -EIO;
3163 break;
3164 default:
3165 /* case SEN_OV7610: */
3166 /* case SEN_OV76BE: */
3167 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3168 return -EIO;
3169 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3170 return -EIO;
3171 break;
3172 case SEN_OV7620:
3173 case SEN_OV7620AE:
3174 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3175 return -EIO;
3176 break;
3177 case SEN_OV7640:
3178 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3179 return -EIO;
3180 break;
3181 case SEN_OV7670:
3182 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3183 return -EIO;
3184 break;
3185 case SEN_OV8610:
3186 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3187 return -EIO;
3188 break;
3189 }
3190 return 0;
3191 }
3192
3193 /* Set up the OV511/OV511+ with the given image parameters.
3194 *
3195 * Do not put any sensor-specific code in here (including I2C I/O functions)
3196 */
3197 static int ov511_mode_init_regs(struct sd *sd)
3198 {
3199 int hsegs, vsegs, packet_size, fps, needed;
3200 int interlaced = 0;
3201 struct usb_host_interface *alt;
3202 struct usb_interface *intf;
3203
3204 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3205 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3206 if (!alt) {
3207 PDEBUG(D_ERR, "Couldn't get altsetting");
3208 return -EIO;
3209 }
3210
3211 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3212 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3213
3214 reg_w(sd, R511_CAM_UV_EN, 0x01);
3215 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3216 reg_w(sd, R511_SNAP_OPTS, 0x03);
3217
3218 /* Here I'm assuming that snapshot size == image size.
3219 * I hope that's always true. --claudio
3220 */
3221 hsegs = (sd->gspca_dev.width >> 3) - 1;
3222 vsegs = (sd->gspca_dev.height >> 3) - 1;
3223
3224 reg_w(sd, R511_CAM_PXCNT, hsegs);
3225 reg_w(sd, R511_CAM_LNCNT, vsegs);
3226 reg_w(sd, R511_CAM_PXDIV, 0x00);
3227 reg_w(sd, R511_CAM_LNDIV, 0x00);
3228
3229 /* YUV420, low pass filter on */
3230 reg_w(sd, R511_CAM_OPTS, 0x03);
3231
3232 /* Snapshot additions */
3233 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3234 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3235 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3236 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3237
3238 /******** Set the framerate ********/
3239 if (frame_rate > 0)
3240 sd->frame_rate = frame_rate;
3241
3242 switch (sd->sensor) {
3243 case SEN_OV6620:
3244 /* No framerate control, doesn't like higher rates yet */
3245 sd->clockdiv = 3;
3246 break;
3247
3248 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3249 for more sensors we need to do this for them too */
3250 case SEN_OV7620:
3251 case SEN_OV7620AE:
3252 case SEN_OV7640:
3253 case SEN_OV76BE:
3254 if (sd->gspca_dev.width == 320)
3255 interlaced = 1;
3256 /* Fall through */
3257 case SEN_OV6630:
3258 case SEN_OV7610:
3259 case SEN_OV7670:
3260 switch (sd->frame_rate) {
3261 case 30:
3262 case 25:
3263 /* Not enough bandwidth to do 640x480 @ 30 fps */
3264 if (sd->gspca_dev.width != 640) {
3265 sd->clockdiv = 0;
3266 break;
3267 }
3268 /* Fall through for 640x480 case */
3269 default:
3270 /* case 20: */
3271 /* case 15: */
3272 sd->clockdiv = 1;
3273 break;
3274 case 10:
3275 sd->clockdiv = 2;
3276 break;
3277 case 5:
3278 sd->clockdiv = 5;
3279 break;
3280 }
3281 if (interlaced) {
3282 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3283 /* Higher then 10 does not work */
3284 if (sd->clockdiv > 10)
3285 sd->clockdiv = 10;
3286 }
3287 break;
3288
3289 case SEN_OV8610:
3290 /* No framerate control ?? */
3291 sd->clockdiv = 0;
3292 break;
3293 }
3294
3295 /* Check if we have enough bandwidth to disable compression */
3296 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3297 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3298 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3299 if (needed > 1400 * packet_size) {
3300 /* Enable Y and UV quantization and compression */
3301 reg_w(sd, R511_COMP_EN, 0x07);
3302 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3303 } else {
3304 reg_w(sd, R511_COMP_EN, 0x06);
3305 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3306 }
3307
3308 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3309 reg_w(sd, R51x_SYS_RESET, 0);
3310
3311 return 0;
3312 }
3313
3314 /* Sets up the OV518/OV518+ with the given image parameters
3315 *
3316 * OV518 needs a completely different approach, until we can figure out what
3317 * the individual registers do. Also, only 15 FPS is supported now.
3318 *
3319 * Do not put any sensor-specific code in here (including I2C I/O functions)
3320 */
3321 static int ov518_mode_init_regs(struct sd *sd)
3322 {
3323 int hsegs, vsegs, packet_size;
3324 struct usb_host_interface *alt;
3325 struct usb_interface *intf;
3326
3327 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3328 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3329 if (!alt) {
3330 PDEBUG(D_ERR, "Couldn't get altsetting");
3331 return -EIO;
3332 }
3333
3334 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3335 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3336
3337 /******** Set the mode ********/
3338
3339 reg_w(sd, 0x2b, 0);
3340 reg_w(sd, 0x2c, 0);
3341 reg_w(sd, 0x2d, 0);
3342 reg_w(sd, 0x2e, 0);
3343 reg_w(sd, 0x3b, 0);
3344 reg_w(sd, 0x3c, 0);
3345 reg_w(sd, 0x3d, 0);
3346 reg_w(sd, 0x3e, 0);
3347
3348 if (sd->bridge == BRIDGE_OV518) {
3349 /* Set 8-bit (YVYU) input format */
3350 reg_w_mask(sd, 0x20, 0x08, 0x08);
3351
3352 /* Set 12-bit (4:2:0) output format */
3353 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3354 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3355 } else {
3356 reg_w(sd, 0x28, 0x80);
3357 reg_w(sd, 0x38, 0x80);
3358 }
3359
3360 hsegs = sd->gspca_dev.width / 16;
3361 vsegs = sd->gspca_dev.height / 4;
3362
3363 reg_w(sd, 0x29, hsegs);
3364 reg_w(sd, 0x2a, vsegs);
3365
3366 reg_w(sd, 0x39, hsegs);
3367 reg_w(sd, 0x3a, vsegs);
3368
3369 /* Windows driver does this here; who knows why */
3370 reg_w(sd, 0x2f, 0x80);
3371
3372 /******** Set the framerate ********/
3373 sd->clockdiv = 1;
3374
3375 /* Mode independent, but framerate dependent, regs */
3376 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3377 reg_w(sd, 0x51, 0x04);
3378 reg_w(sd, 0x22, 0x18);
3379 reg_w(sd, 0x23, 0xff);
3380
3381 if (sd->bridge == BRIDGE_OV518PLUS) {
3382 switch (sd->sensor) {
3383 case SEN_OV7620AE:
3384 if (sd->gspca_dev.width == 320) {
3385 reg_w(sd, 0x20, 0x00);
3386 reg_w(sd, 0x21, 0x19);
3387 } else {
3388 reg_w(sd, 0x20, 0x60);
3389 reg_w(sd, 0x21, 0x1f);
3390 }
3391 break;
3392 case SEN_OV7620:
3393 reg_w(sd, 0x20, 0x00);
3394 reg_w(sd, 0x21, 0x19);
3395 break;
3396 default:
3397 reg_w(sd, 0x21, 0x19);
3398 }
3399 } else
3400 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3401
3402 /* FIXME: Sensor-specific */
3403 /* Bit 5 is what matters here. Of course, it is "reserved" */
3404 i2c_w(sd, 0x54, 0x23);
3405
3406 reg_w(sd, 0x2f, 0x80);
3407
3408 if (sd->bridge == BRIDGE_OV518PLUS) {
3409 reg_w(sd, 0x24, 0x94);
3410 reg_w(sd, 0x25, 0x90);
3411 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3412 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3413 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3414 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3415 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3416 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3417 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3418 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3419 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3420 } else {
3421 reg_w(sd, 0x24, 0x9f);
3422 reg_w(sd, 0x25, 0x90);
3423 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3424 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3425 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3426 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3427 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3428 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3429 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3430 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3431 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3432 }
3433
3434 reg_w(sd, 0x2f, 0x80);
3435
3436 return 0;
3437 }
3438
3439
3440 /* Sets up the OV519 with the given image parameters
3441 *
3442 * OV519 needs a completely different approach, until we can figure out what
3443 * the individual registers do.
3444 *
3445 * Do not put any sensor-specific code in here (including I2C I/O functions)
3446 */
3447 static int ov519_mode_init_regs(struct sd *sd)
3448 {
3449 static const struct ov_regvals mode_init_519_ov7670[] = {
3450 { 0x5d, 0x03 }, /* Turn off suspend mode */
3451 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3452 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3453 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3454 { 0xa3, 0x18 },
3455 { 0xa4, 0x04 },
3456 { 0xa5, 0x28 },
3457 { 0x37, 0x00 }, /* SetUsbInit */
3458 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3459 /* Enable both fields, YUV Input, disable defect comp (why?) */
3460 { 0x20, 0x0c },
3461 { 0x21, 0x38 },
3462 { 0x22, 0x1d },
3463 { 0x17, 0x50 }, /* undocumented */
3464 { 0x37, 0x00 }, /* undocumented */
3465 { 0x40, 0xff }, /* I2C timeout counter */
3466 { 0x46, 0x00 }, /* I2C clock prescaler */
3467 { 0x59, 0x04 }, /* new from windrv 090403 */
3468 { 0xff, 0x00 }, /* undocumented */
3469 /* windows reads 0x55 at this point, why? */
3470 };
3471
3472 static const struct ov_regvals mode_init_519[] = {
3473 { 0x5d, 0x03 }, /* Turn off suspend mode */
3474 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3475 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3476 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3477 { 0xa3, 0x18 },
3478 { 0xa4, 0x04 },
3479 { 0xa5, 0x28 },
3480 { 0x37, 0x00 }, /* SetUsbInit */
3481 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3482 /* Enable both fields, YUV Input, disable defect comp (why?) */
3483 { 0x22, 0x1d },
3484 { 0x17, 0x50 }, /* undocumented */
3485 { 0x37, 0x00 }, /* undocumented */
3486 { 0x40, 0xff }, /* I2C timeout counter */
3487 { 0x46, 0x00 }, /* I2C clock prescaler */
3488 { 0x59, 0x04 }, /* new from windrv 090403 */
3489 { 0xff, 0x00 }, /* undocumented */
3490 /* windows reads 0x55 at this point, why? */
3491 };
3492
3493 /******** Set the mode ********/
3494 if (sd->sensor != SEN_OV7670) {
3495 if (write_regvals(sd, mode_init_519,
3496 ARRAY_SIZE(mode_init_519)))
3497 return -EIO;
3498 if (sd->sensor == SEN_OV7640) {
3499 /* Select 8-bit input mode */
3500 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3501 }
3502 } else {
3503 if (write_regvals(sd, mode_init_519_ov7670,
3504 ARRAY_SIZE(mode_init_519_ov7670)))
3505 return -EIO;
3506 }
3507
3508 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3509 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3510 if (sd->sensor == SEN_OV7670 &&
3511 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3512 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3513 else
3514 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3515 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3516 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3517 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3518 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3519 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3520 reg_w(sd, 0x26, 0x00); /* Undocumented */
3521
3522 /******** Set the framerate ********/
3523 if (frame_rate > 0)
3524 sd->frame_rate = frame_rate;
3525
3526 /* FIXME: These are only valid at the max resolution. */
3527 sd->clockdiv = 0;
3528 switch (sd->sensor) {
3529 case SEN_OV7640:
3530 switch (sd->frame_rate) {
3531 default:
3532 /* case 30: */
3533 reg_w(sd, 0xa4, 0x0c);
3534 reg_w(sd, 0x23, 0xff);
3535 break;
3536 case 25:
3537 reg_w(sd, 0xa4, 0x0c);
3538 reg_w(sd, 0x23, 0x1f);
3539 break;
3540 case 20:
3541 reg_w(sd, 0xa4, 0x0c);
3542 reg_w(sd, 0x23, 0x1b);
3543 break;
3544 case 15:
3545 reg_w(sd, 0xa4, 0x04);
3546 reg_w(sd, 0x23, 0xff);
3547 sd->clockdiv = 1;
3548 break;
3549 case 10:
3550 reg_w(sd, 0xa4, 0x04);
3551 reg_w(sd, 0x23, 0x1f);
3552 sd->clockdiv = 1;
3553 break;
3554 case 5:
3555 reg_w(sd, 0xa4, 0x04);
3556 reg_w(sd, 0x23, 0x1b);
3557 sd->clockdiv = 1;
3558 break;
3559 }
3560 break;
3561 case SEN_OV8610:
3562 switch (sd->frame_rate) {
3563 default: /* 15 fps */
3564 /* case 15: */
3565 reg_w(sd, 0xa4, 0x06);
3566 reg_w(sd, 0x23, 0xff);
3567 break;
3568 case 10:
3569 reg_w(sd, 0xa4, 0x06);
3570 reg_w(sd, 0x23, 0x1f);
3571 break;
3572 case 5:
3573 reg_w(sd, 0xa4, 0x06);
3574 reg_w(sd, 0x23, 0x1b);
3575 break;
3576 }
3577 break;
3578 case SEN_OV7670: /* guesses, based on 7640 */
3579 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3580 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3581 reg_w(sd, 0xa4, 0x10);
3582 switch (sd->frame_rate) {
3583 case 30:
3584 reg_w(sd, 0x23, 0xff);
3585 break;
3586 case 20:
3587 reg_w(sd, 0x23, 0x1b);
3588 break;
3589 default:
3590 /* case 15: */
3591 reg_w(sd, 0x23, 0xff);
3592 sd->clockdiv = 1;
3593 break;
3594 }
3595 break;
3596 }
3597 return 0;
3598 }
3599
3600 static int mode_init_ov_sensor_regs(struct sd *sd)
3601 {
3602 struct gspca_dev *gspca_dev;
3603 int qvga, xstart, xend, ystart, yend;
3604 __u8 v;
3605
3606 gspca_dev = &sd->gspca_dev;
3607 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3608
3609 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3610 switch (sd->sensor) {
3611 case SEN_OV2610:
3612 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3613 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3614 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3615 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3616 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3617 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3618 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3619 return 0;
3620 case SEN_OV3610:
3621 if (qvga) {
3622 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3623 ystart = (776 - gspca_dev->height) / 2;
3624 } else {
3625 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3626 ystart = (1544 - gspca_dev->height) / 2;
3627 }
3628 xend = xstart + gspca_dev->width;
3629 yend = ystart + gspca_dev->height;
3630 /* Writing to the COMH register resets the other windowing regs
3631 to their default values, so we must do this first. */
3632 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3633 i2c_w_mask(sd, 0x32,
3634 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3635 0x3f);
3636 i2c_w_mask(sd, 0x03,
3637 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3638 0x0f);
3639 i2c_w(sd, 0x17, xstart >> 4);
3640 i2c_w(sd, 0x18, xend >> 4);
3641 i2c_w(sd, 0x19, ystart >> 3);
3642 i2c_w(sd, 0x1a, yend >> 3);
3643 return 0;
3644 case SEN_OV8610:
3645 /* For OV8610 qvga means qsvga */
3646 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3647 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3648 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3649 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3650 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3651 break;
3652 case SEN_OV7610:
3653 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3654 i2c_w(sd, 0x35, qvga?0x1e:0x9e);
3655 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3656 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3657 break;
3658 case SEN_OV7620:
3659 case SEN_OV7620AE:
3660 case SEN_OV76BE:
3661 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3662 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3663 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3664 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3665 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3666 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3667 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3668 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3669 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3670 if (sd->sensor == SEN_OV76BE)
3671 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3672 break;
3673 case SEN_OV7640:
3674 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3675 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3676 /* i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a); */
3677 /* i2c_w(sd, 0x25, qvga ? 0x30 : 0x60); */
3678 /* i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40); */
3679 /* i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0); */
3680 /* i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20); */
3681 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3682 break;
3683 case SEN_OV7670:
3684 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3685 * do we need to set anything else?
3686 * HSTART etc are set in set_ov_sensor_window itself */
3687 i2c_w_mask(sd, OV7670_REG_COM7,
3688 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3689 OV7670_COM7_FMT_MASK);
3690 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3691 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3692 OV7670_COM8_AWB);
3693 if (qvga) { /* QVGA from ov7670.c by
3694 * Jonathan Corbet */
3695 xstart = 164;
3696 xend = 28;
3697 ystart = 14;
3698 yend = 494;
3699 } else { /* VGA */
3700 xstart = 158;
3701 xend = 14;
3702 ystart = 10;
3703 yend = 490;
3704 }
3705 /* OV7670 hardware window registers are split across
3706 * multiple locations */
3707 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3708 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3709 v = i2c_r(sd, OV7670_REG_HREF);
3710 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3711 msleep(10); /* need to sleep between read and write to
3712 * same reg! */
3713 i2c_w(sd, OV7670_REG_HREF, v);
3714
3715 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3716 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3717 v = i2c_r(sd, OV7670_REG_VREF);
3718 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3719 msleep(10); /* need to sleep between read and write to
3720 * same reg! */
3721 i2c_w(sd, OV7670_REG_VREF, v);
3722 break;
3723 case SEN_OV6620:
3724 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3725 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3726 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3727 break;
3728 case SEN_OV6630:
3729 case SEN_OV66308AF:
3730 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3731 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3732 break;
3733 default:
3734 return -EINVAL;
3735 }
3736
3737 /******** Clock programming ********/
3738 i2c_w(sd, 0x11, sd->clockdiv);
3739
3740 return 0;
3741 }
3742
3743 static void sethvflip(struct sd *sd)
3744 {
3745 if (sd->sensor != SEN_OV7670)
3746 return;
3747 if (sd->gspca_dev.streaming)
3748 ov51x_stop(sd);
3749 i2c_w_mask(sd, OV7670_REG_MVFP,
3750 OV7670_MVFP_MIRROR * sd->hflip
3751 | OV7670_MVFP_VFLIP * sd->vflip,
3752 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3753 if (sd->gspca_dev.streaming)
3754 ov51x_restart(sd);
3755 }
3756
3757 static int set_ov_sensor_window(struct sd *sd)
3758 {
3759 struct gspca_dev *gspca_dev;
3760 int qvga, crop;
3761 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3762 int ret;
3763
3764 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3765 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3766 sd->sensor == SEN_OV7670)
3767 return mode_init_ov_sensor_regs(sd);
3768
3769 gspca_dev = &sd->gspca_dev;
3770 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3771 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3772
3773 /* The different sensor ICs handle setting up of window differently.
3774 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3775 switch (sd->sensor) {
3776 case SEN_OV8610:
3777 hwsbase = 0x1e;
3778 hwebase = 0x1e;
3779 vwsbase = 0x02;
3780 vwebase = 0x02;
3781 break;
3782 case SEN_OV7610:
3783 case SEN_OV76BE:
3784 hwsbase = 0x38;
3785 hwebase = 0x3a;
3786 vwsbase = vwebase = 0x05;
3787 break;
3788 case SEN_OV6620:
3789 case SEN_OV6630:
3790 case SEN_OV66308AF:
3791 hwsbase = 0x38;
3792 hwebase = 0x3a;
3793 vwsbase = 0x05;
3794 vwebase = 0x06;
3795 if (sd->sensor == SEN_OV66308AF && qvga)
3796 /* HDG: this fixes U and V getting swapped */
3797 hwsbase++;
3798 if (crop) {
3799 hwsbase += 8;
3800 hwebase += 8;
3801 vwsbase += 11;
3802 vwebase += 11;
3803 }
3804 break;
3805 case SEN_OV7620:
3806 case SEN_OV7620AE:
3807 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3808 hwebase = 0x2f;
3809 vwsbase = vwebase = 0x05;
3810 break;
3811 case SEN_OV7640:
3812 hwsbase = 0x1a;
3813 hwebase = 0x1a;
3814 vwsbase = vwebase = 0x03;
3815 break;
3816 default:
3817 return -EINVAL;
3818 }
3819
3820 switch (sd->sensor) {
3821 case SEN_OV6620:
3822 case SEN_OV6630:
3823 case SEN_OV66308AF:
3824 if (qvga) { /* QCIF */
3825 hwscale = 0;
3826 vwscale = 0;
3827 } else { /* CIF */
3828 hwscale = 1;
3829 vwscale = 1; /* The datasheet says 0;
3830 * it's wrong */
3831 }
3832 break;
3833 case SEN_OV8610:
3834 if (qvga) { /* QSVGA */
3835 hwscale = 1;
3836 vwscale = 1;
3837 } else { /* SVGA */
3838 hwscale = 2;
3839 vwscale = 2;
3840 }
3841 break;
3842 default: /* SEN_OV7xx0 */
3843 if (qvga) { /* QVGA */
3844 hwscale = 1;
3845 vwscale = 0;
3846 } else { /* VGA */
3847 hwscale = 2;
3848 vwscale = 1;
3849 }
3850 }
3851
3852 ret = mode_init_ov_sensor_regs(sd);
3853 if (ret < 0)
3854 return ret;
3855
3856 i2c_w(sd, 0x17, hwsbase);
3857 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3858 i2c_w(sd, 0x19, vwsbase);
3859 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3860
3861 return 0;
3862 }
3863
3864 /* -- start the camera -- */
3865 static int sd_start(struct gspca_dev *gspca_dev)
3866 {
3867 struct sd *sd = (struct sd *) gspca_dev;
3868 int ret = 0;
3869
3870 /* Default for most bridges, allow bridge_mode_init_regs to override */
3871 sd->sensor_width = sd->gspca_dev.width;
3872 sd->sensor_height = sd->gspca_dev.height;
3873
3874 switch (sd->bridge) {
3875 case BRIDGE_OV511:
3876 case BRIDGE_OV511PLUS:
3877 ret = ov511_mode_init_regs(sd);
3878 break;
3879 case BRIDGE_OV518:
3880 case BRIDGE_OV518PLUS:
3881 ret = ov518_mode_init_regs(sd);
3882 break;
3883 case BRIDGE_OV519:
3884 ret = ov519_mode_init_regs(sd);
3885 break;
3886 /* case BRIDGE_OVFX2: nothing to do */
3887 case BRIDGE_W9968CF:
3888 ret = w9968cf_mode_init_regs(sd);
3889 break;
3890 }
3891 if (ret < 0)
3892 goto out;
3893
3894 ret = set_ov_sensor_window(sd);
3895 if (ret < 0)
3896 goto out;
3897
3898 setcontrast(gspca_dev);
3899 setbrightness(gspca_dev);
3900 setcolors(gspca_dev);
3901 sethvflip(sd);
3902 setautobrightness(sd);
3903 setfreq(sd);
3904
3905 ret = ov51x_restart(sd);
3906 if (ret < 0)
3907 goto out;
3908 ov51x_led_control(sd, 1);
3909 return 0;
3910 out:
3911 PDEBUG(D_ERR, "camera start error:%d", ret);
3912 return ret;
3913 }
3914
3915 static void sd_stopN(struct gspca_dev *gspca_dev)
3916 {
3917 struct sd *sd = (struct sd *) gspca_dev;
3918
3919 ov51x_stop(sd);
3920 ov51x_led_control(sd, 0);
3921 }
3922
3923 static void sd_stop0(struct gspca_dev *gspca_dev)
3924 {
3925 struct sd *sd = (struct sd *) gspca_dev;
3926
3927 if (sd->bridge == BRIDGE_W9968CF)
3928 w9968cf_stop0(sd);
3929 }
3930
3931 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3932 u8 *in, /* isoc packet */
3933 int len) /* iso packet length */
3934 {
3935 struct sd *sd = (struct sd *) gspca_dev;
3936
3937 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3938 * byte non-zero. The EOF packet has image width/height in the
3939 * 10th and 11th bytes. The 9th byte is given as follows:
3940 *
3941 * bit 7: EOF
3942 * 6: compression enabled
3943 * 5: 422/420/400 modes
3944 * 4: 422/420/400 modes
3945 * 3: 1
3946 * 2: snapshot button on
3947 * 1: snapshot frame
3948 * 0: even/odd field
3949 */
3950 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
3951 (in[8] & 0x08)) {
3952 if (in[8] & 0x80) {
3953 /* Frame end */
3954 if ((in[9] + 1) * 8 != gspca_dev->width ||
3955 (in[10] + 1) * 8 != gspca_dev->height) {
3956 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
3957 " requested: %dx%d\n",
3958 (in[9] + 1) * 8, (in[10] + 1) * 8,
3959 gspca_dev->width, gspca_dev->height);
3960 gspca_dev->last_packet_type = DISCARD_PACKET;
3961 return;
3962 }
3963 /* Add 11 byte footer to frame, might be usefull */
3964 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
3965 return;
3966 } else {
3967 /* Frame start */
3968 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
3969 sd->packet_nr = 0;
3970 }
3971 }
3972
3973 /* Ignore the packet number */
3974 len--;
3975
3976 /* intermediate packet */
3977 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
3978 }
3979
3980 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
3981 u8 *data, /* isoc packet */
3982 int len) /* iso packet length */
3983 {
3984 struct sd *sd = (struct sd *) gspca_dev;
3985
3986 /* A false positive here is likely, until OVT gives me
3987 * the definitive SOF/EOF format */
3988 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
3989 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
3990 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
3991 sd->packet_nr = 0;
3992 }
3993
3994 if (gspca_dev->last_packet_type == DISCARD_PACKET)
3995 return;
3996
3997 /* Does this device use packet numbers ? */
3998 if (len & 7) {
3999 len--;
4000 if (sd->packet_nr == data[len])
4001 sd->packet_nr++;
4002 /* The last few packets of the frame (which are all 0's
4003 except that they may contain part of the footer), are
4004 numbered 0 */
4005 else if (sd->packet_nr == 0 || data[len]) {
4006 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4007 (int)data[len], (int)sd->packet_nr);
4008 gspca_dev->last_packet_type = DISCARD_PACKET;
4009 return;
4010 }
4011 }
4012
4013 /* intermediate packet */
4014 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4015 }
4016
4017 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4018 u8 *data, /* isoc packet */
4019 int len) /* iso packet length */
4020 {
4021 /* Header of ov519 is 16 bytes:
4022 * Byte Value Description
4023 * 0 0xff magic
4024 * 1 0xff magic
4025 * 2 0xff magic
4026 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4027 * 9 0xXX 0x01 initial frame without data,
4028 * 0x00 standard frame with image
4029 * 14 Lo in EOF: length of image data / 8
4030 * 15 Hi
4031 */
4032
4033 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4034 switch (data[3]) {
4035 case 0x50: /* start of frame */
4036 #define HDRSZ 16
4037 data += HDRSZ;
4038 len -= HDRSZ;
4039 #undef HDRSZ
4040 if (data[0] == 0xff || data[1] == 0xd8)
4041 gspca_frame_add(gspca_dev, FIRST_PACKET,
4042 data, len);
4043 else
4044 gspca_dev->last_packet_type = DISCARD_PACKET;
4045 return;
4046 case 0x51: /* end of frame */
4047 if (data[9] != 0)
4048 gspca_dev->last_packet_type = DISCARD_PACKET;
4049 gspca_frame_add(gspca_dev, LAST_PACKET,
4050 NULL, 0);
4051 return;
4052 }
4053 }
4054
4055 /* intermediate packet */
4056 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4057 }
4058
4059 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4060 u8 *data, /* isoc packet */
4061 int len) /* iso packet length */
4062 {
4063 /* A short read signals EOF */
4064 if (len < OVFX2_BULK_SIZE) {
4065 gspca_frame_add(gspca_dev, LAST_PACKET, data, len);
4066 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4067 return;
4068 }
4069 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4070 }
4071
4072 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4073 u8 *data, /* isoc packet */
4074 int len) /* iso packet length */
4075 {
4076 struct sd *sd = (struct sd *) gspca_dev;
4077
4078 switch (sd->bridge) {
4079 case BRIDGE_OV511:
4080 case BRIDGE_OV511PLUS:
4081 ov511_pkt_scan(gspca_dev, data, len);
4082 break;
4083 case BRIDGE_OV518:
4084 case BRIDGE_OV518PLUS:
4085 ov518_pkt_scan(gspca_dev, data, len);
4086 break;
4087 case BRIDGE_OV519:
4088 ov519_pkt_scan(gspca_dev, data, len);
4089 break;
4090 case BRIDGE_OVFX2:
4091 ovfx2_pkt_scan(gspca_dev, data, len);
4092 break;
4093 case BRIDGE_W9968CF:
4094 w9968cf_pkt_scan(gspca_dev, data, len);
4095 break;
4096 }
4097 }
4098
4099 /* -- management routines -- */
4100
4101 static void setbrightness(struct gspca_dev *gspca_dev)
4102 {
4103 struct sd *sd = (struct sd *) gspca_dev;
4104 int val;
4105
4106 val = sd->brightness;
4107 switch (sd->sensor) {
4108 case SEN_OV8610:
4109 case SEN_OV7610:
4110 case SEN_OV76BE:
4111 case SEN_OV6620:
4112 case SEN_OV6630:
4113 case SEN_OV66308AF:
4114 case SEN_OV7640:
4115 i2c_w(sd, OV7610_REG_BRT, val);
4116 break;
4117 case SEN_OV7620:
4118 case SEN_OV7620AE:
4119 /* 7620 doesn't like manual changes when in auto mode */
4120 if (!sd->autobrightness)
4121 i2c_w(sd, OV7610_REG_BRT, val);
4122 break;
4123 case SEN_OV7670:
4124 /*win trace
4125 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4126 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4127 break;
4128 }
4129 }
4130
4131 static void setcontrast(struct gspca_dev *gspca_dev)
4132 {
4133 struct sd *sd = (struct sd *) gspca_dev;
4134 int val;
4135
4136 val = sd->contrast;
4137 switch (sd->sensor) {
4138 case SEN_OV7610:
4139 case SEN_OV6620:
4140 i2c_w(sd, OV7610_REG_CNT, val);
4141 break;
4142 case SEN_OV6630:
4143 case SEN_OV66308AF:
4144 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4145 break;
4146 case SEN_OV8610: {
4147 static const __u8 ctab[] = {
4148 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4149 };
4150
4151 /* Use Y gamma control instead. Bit 0 enables it. */
4152 i2c_w(sd, 0x64, ctab[val >> 5]);
4153 break;
4154 }
4155 case SEN_OV7620:
4156 case SEN_OV7620AE: {
4157 static const __u8 ctab[] = {
4158 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4159 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4160 };
4161
4162 /* Use Y gamma control instead. Bit 0 enables it. */
4163 i2c_w(sd, 0x64, ctab[val >> 4]);
4164 break;
4165 }
4166 case SEN_OV7640:
4167 /* Use gain control instead. */
4168 i2c_w(sd, OV7610_REG_GAIN, val >> 2);
4169 break;
4170 case SEN_OV7670:
4171 /* check that this isn't just the same as ov7610 */
4172 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4173 break;
4174 }
4175 }
4176
4177 static void setcolors(struct gspca_dev *gspca_dev)
4178 {
4179 struct sd *sd = (struct sd *) gspca_dev;
4180 int val;
4181
4182 val = sd->colors;
4183 switch (sd->sensor) {
4184 case SEN_OV8610:
4185 case SEN_OV7610:
4186 case SEN_OV76BE:
4187 case SEN_OV6620:
4188 case SEN_OV6630:
4189 case SEN_OV66308AF:
4190 i2c_w(sd, OV7610_REG_SAT, val);
4191 break;
4192 case SEN_OV7620:
4193 case SEN_OV7620AE:
4194 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4195 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4196 if (rc < 0)
4197 goto out; */
4198 i2c_w(sd, OV7610_REG_SAT, val);
4199 break;
4200 case SEN_OV7640:
4201 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4202 break;
4203 case SEN_OV7670:
4204 /* supported later once I work out how to do it
4205 * transparently fail now! */
4206 /* set REG_COM13 values for UV sat auto mode */
4207 break;
4208 }
4209 }
4210
4211 static void setautobrightness(struct sd *sd)
4212 {
4213 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7670 ||
4214 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4215 return;
4216
4217 i2c_w_mask(sd, 0x2d, sd->autobrightness ? 0x10 : 0x00, 0x10);
4218 }
4219
4220 static void setfreq(struct sd *sd)
4221 {
4222 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4223 return;
4224
4225 if (sd->sensor == SEN_OV7670) {
4226 switch (sd->freq) {
4227 case 0: /* Banding filter disabled */
4228 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4229 break;
4230 case 1: /* 50 hz */
4231 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4232 OV7670_COM8_BFILT);
4233 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4234 break;
4235 case 2: /* 60 hz */
4236 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4237 OV7670_COM8_BFILT);
4238 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4239 break;
4240 case 3: /* Auto hz */
4241 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4242 OV7670_COM8_BFILT);
4243 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4244 0x18);
4245 break;
4246 }
4247 } else {
4248 switch (sd->freq) {
4249 case 0: /* Banding filter disabled */
4250 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4251 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4252 break;
4253 case 1: /* 50 hz (filter on and framerate adj) */
4254 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4255 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4256 /* 20 fps -> 16.667 fps */
4257 if (sd->sensor == SEN_OV6620 ||
4258 sd->sensor == SEN_OV6630 ||
4259 sd->sensor == SEN_OV66308AF)
4260 i2c_w(sd, 0x2b, 0x5e);
4261 else
4262 i2c_w(sd, 0x2b, 0xac);
4263 break;
4264 case 2: /* 60 hz (filter on, ...) */
4265 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4266 if (sd->sensor == SEN_OV6620 ||
4267 sd->sensor == SEN_OV6630 ||
4268 sd->sensor == SEN_OV66308AF) {
4269 /* 20 fps -> 15 fps */
4270 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4271 i2c_w(sd, 0x2b, 0xa8);
4272 } else {
4273 /* no framerate adj. */
4274 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4275 }
4276 break;
4277 }
4278 }
4279 }
4280
4281 static int sd_setbrightness(struct gspca_dev *gspca_dev, __s32 val)
4282 {
4283 struct sd *sd = (struct sd *) gspca_dev;
4284
4285 sd->brightness = val;
4286 if (gspca_dev->streaming)
4287 setbrightness(gspca_dev);
4288 return 0;
4289 }
4290
4291 static int sd_getbrightness(struct gspca_dev *gspca_dev, __s32 *val)
4292 {
4293 struct sd *sd = (struct sd *) gspca_dev;
4294
4295 *val = sd->brightness;
4296 return 0;
4297 }
4298
4299 static int sd_setcontrast(struct gspca_dev *gspca_dev, __s32 val)
4300 {
4301 struct sd *sd = (struct sd *) gspca_dev;
4302
4303 sd->contrast = val;
4304 if (gspca_dev->streaming)
4305 setcontrast(gspca_dev);
4306 return 0;
4307 }
4308
4309 static int sd_getcontrast(struct gspca_dev *gspca_dev, __s32 *val)
4310 {
4311 struct sd *sd = (struct sd *) gspca_dev;
4312
4313 *val = sd->contrast;
4314 return 0;
4315 }
4316
4317 static int sd_setcolors(struct gspca_dev *gspca_dev, __s32 val)
4318 {
4319 struct sd *sd = (struct sd *) gspca_dev;
4320
4321 sd->colors = val;
4322 if (gspca_dev->streaming)
4323 setcolors(gspca_dev);
4324 return 0;
4325 }
4326
4327 static int sd_getcolors(struct gspca_dev *gspca_dev, __s32 *val)
4328 {
4329 struct sd *sd = (struct sd *) gspca_dev;
4330
4331 *val = sd->colors;
4332 return 0;
4333 }
4334
4335 static int sd_sethflip(struct gspca_dev *gspca_dev, __s32 val)
4336 {
4337 struct sd *sd = (struct sd *) gspca_dev;
4338
4339 sd->hflip = val;
4340 if (gspca_dev->streaming)
4341 sethvflip(sd);
4342 return 0;
4343 }
4344
4345 static int sd_gethflip(struct gspca_dev *gspca_dev, __s32 *val)
4346 {
4347 struct sd *sd = (struct sd *) gspca_dev;
4348
4349 *val = sd->hflip;
4350 return 0;
4351 }
4352
4353 static int sd_setvflip(struct gspca_dev *gspca_dev, __s32 val)
4354 {
4355 struct sd *sd = (struct sd *) gspca_dev;
4356
4357 sd->vflip = val;
4358 if (gspca_dev->streaming)
4359 sethvflip(sd);
4360 return 0;
4361 }
4362
4363 static int sd_getvflip(struct gspca_dev *gspca_dev, __s32 *val)
4364 {
4365 struct sd *sd = (struct sd *) gspca_dev;
4366
4367 *val = sd->vflip;
4368 return 0;
4369 }
4370
4371 static int sd_setautobrightness(struct gspca_dev *gspca_dev, __s32 val)
4372 {
4373 struct sd *sd = (struct sd *) gspca_dev;
4374
4375 sd->autobrightness = val;
4376 if (gspca_dev->streaming)
4377 setautobrightness(sd);
4378 return 0;
4379 }
4380
4381 static int sd_getautobrightness(struct gspca_dev *gspca_dev, __s32 *val)
4382 {
4383 struct sd *sd = (struct sd *) gspca_dev;
4384
4385 *val = sd->autobrightness;
4386 return 0;
4387 }
4388
4389 static int sd_setfreq(struct gspca_dev *gspca_dev, __s32 val)
4390 {
4391 struct sd *sd = (struct sd *) gspca_dev;
4392
4393 sd->freq = val;
4394 if (gspca_dev->streaming) {
4395 setfreq(sd);
4396 /* Ugly but necessary */
4397 if (sd->bridge == BRIDGE_W9968CF)
4398 w9968cf_set_crop_window(sd);
4399 }
4400 return 0;
4401 }
4402
4403 static int sd_getfreq(struct gspca_dev *gspca_dev, __s32 *val)
4404 {
4405 struct sd *sd = (struct sd *) gspca_dev;
4406
4407 *val = sd->freq;
4408 return 0;
4409 }
4410
4411 static int sd_querymenu(struct gspca_dev *gspca_dev,
4412 struct v4l2_querymenu *menu)
4413 {
4414 struct sd *sd = (struct sd *) gspca_dev;
4415
4416 switch (menu->id) {
4417 case V4L2_CID_POWER_LINE_FREQUENCY:
4418 switch (menu->index) {
4419 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4420 strcpy((char *) menu->name, "NoFliker");
4421 return 0;
4422 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4423 strcpy((char *) menu->name, "50 Hz");
4424 return 0;
4425 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4426 strcpy((char *) menu->name, "60 Hz");
4427 return 0;
4428 case 3:
4429 if (sd->sensor != SEN_OV7670)
4430 return -EINVAL;
4431
4432 strcpy((char *) menu->name, "Automatic");
4433 return 0;
4434 }
4435 break;
4436 }
4437 return -EINVAL;
4438 }
4439
4440 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4441 struct v4l2_jpegcompression *jcomp)
4442 {
4443 struct sd *sd = (struct sd *) gspca_dev;
4444
4445 if (sd->bridge != BRIDGE_W9968CF)
4446 return -EINVAL;
4447
4448 memset(jcomp, 0, sizeof *jcomp);
4449 jcomp->quality = sd->quality;
4450 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4451 V4L2_JPEG_MARKER_DRI;
4452 return 0;
4453 }
4454
4455 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4456 struct v4l2_jpegcompression *jcomp)
4457 {
4458 struct sd *sd = (struct sd *) gspca_dev;
4459
4460 if (sd->bridge != BRIDGE_W9968CF)
4461 return -EINVAL;
4462
4463 if (gspca_dev->streaming)
4464 return -EBUSY;
4465
4466 if (jcomp->quality < QUALITY_MIN)
4467 sd->quality = QUALITY_MIN;
4468 else if (jcomp->quality > QUALITY_MAX)
4469 sd->quality = QUALITY_MAX;
4470 else
4471 sd->quality = jcomp->quality;
4472
4473 /* Return resulting jcomp params to app */
4474 sd_get_jcomp(gspca_dev, jcomp);
4475
4476 return 0;
4477 }
4478
4479 /* sub-driver description */
4480 static const struct sd_desc sd_desc = {
4481 .name = MODULE_NAME,
4482 .ctrls = sd_ctrls,
4483 .nctrls = ARRAY_SIZE(sd_ctrls),
4484 .config = sd_config,
4485 .init = sd_init,
4486 .start = sd_start,
4487 .stopN = sd_stopN,
4488 .stop0 = sd_stop0,
4489 .pkt_scan = sd_pkt_scan,
4490 .querymenu = sd_querymenu,
4491 .get_jcomp = sd_get_jcomp,
4492 .set_jcomp = sd_set_jcomp,
4493 };
4494
4495 /* -- module initialisation -- */
4496 static const __devinitdata struct usb_device_id device_table[] = {
4497 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4498 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4499 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4500 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4501 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4502 {USB_DEVICE(0x041e, 0x4064),
4503 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4504 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4505 {USB_DEVICE(0x041e, 0x4068),
4506 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4507 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4508 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4509 {USB_DEVICE(0x054c, 0x0155),
4510 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4511 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4512 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4513 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4514 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4515 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4516 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4517 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4518 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4519 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4520 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4521 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4522 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4523 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4524 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4525 {}
4526 };
4527
4528 MODULE_DEVICE_TABLE(usb, device_table);
4529
4530 /* -- device connect -- */
4531 static int sd_probe(struct usb_interface *intf,
4532 const struct usb_device_id *id)
4533 {
4534 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4535 THIS_MODULE);
4536 }
4537
4538 static struct usb_driver sd_driver = {
4539 .name = MODULE_NAME,
4540 .id_table = device_table,
4541 .probe = sd_probe,
4542 .disconnect = gspca_disconnect,
4543 #ifdef CONFIG_PM
4544 .suspend = gspca_suspend,
4545 .resume = gspca_resume,
4546 #endif
4547 };
4548
4549 /* -- module insert / remove -- */
4550 static int __init sd_mod_init(void)
4551 {
4552 int ret;
4553 ret = usb_register(&sd_driver);
4554 if (ret < 0)
4555 return ret;
4556 PDEBUG(D_PROBE, "registered");
4557 return 0;
4558 }
4559 static void __exit sd_mod_exit(void)
4560 {
4561 usb_deregister(&sd_driver);
4562 PDEBUG(D_PROBE, "deregistered");
4563 }
4564
4565 module_init(sd_mod_init);
4566 module_exit(sd_mod_exit);
4567
4568 module_param(frame_rate, int, 0644);
4569 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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