2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40 #include <linux/user-return-notifier.h>
41 #include <trace/events/kvm.h>
42 #undef TRACE_INCLUDE_FILE
43 #define CREATE_TRACE_POINTS
46 #include <asm/uaccess.h>
52 #define MAX_IO_MSRS 256
53 #define CR0_RESERVED_BITS \
54 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
55 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
56 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
57 #define CR4_RESERVED_BITS \
58 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
59 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
60 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
61 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
63 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
65 #define KVM_MAX_MCE_BANKS 32
66 #define KVM_MCE_CAP_SUPPORTED MCG_CTL_P
69 * - enable syscall per default because its emulated by KVM
70 * - enable LME and LMA per default on 64 bit KVM
73 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffafeULL
;
75 static u64 __read_mostly efer_reserved_bits
= 0xfffffffffffffffeULL
;
78 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
79 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
81 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
);
82 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
83 struct kvm_cpuid_entry2 __user
*entries
);
85 struct kvm_x86_ops
*kvm_x86_ops
;
86 EXPORT_SYMBOL_GPL(kvm_x86_ops
);
89 module_param_named(ignore_msrs
, ignore_msrs
, bool, S_IRUGO
| S_IWUSR
);
91 #define KVM_NR_SHARED_MSRS 16
93 struct kvm_shared_msrs_global
{
95 struct kvm_shared_msr
{
98 } msrs
[KVM_NR_SHARED_MSRS
];
101 struct kvm_shared_msrs
{
102 struct user_return_notifier urn
;
104 u64 current_value
[KVM_NR_SHARED_MSRS
];
107 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global
;
108 static DEFINE_PER_CPU(struct kvm_shared_msrs
, shared_msrs
);
110 struct kvm_stats_debugfs_item debugfs_entries
[] = {
111 { "pf_fixed", VCPU_STAT(pf_fixed
) },
112 { "pf_guest", VCPU_STAT(pf_guest
) },
113 { "tlb_flush", VCPU_STAT(tlb_flush
) },
114 { "invlpg", VCPU_STAT(invlpg
) },
115 { "exits", VCPU_STAT(exits
) },
116 { "io_exits", VCPU_STAT(io_exits
) },
117 { "mmio_exits", VCPU_STAT(mmio_exits
) },
118 { "signal_exits", VCPU_STAT(signal_exits
) },
119 { "irq_window", VCPU_STAT(irq_window_exits
) },
120 { "nmi_window", VCPU_STAT(nmi_window_exits
) },
121 { "halt_exits", VCPU_STAT(halt_exits
) },
122 { "halt_wakeup", VCPU_STAT(halt_wakeup
) },
123 { "hypercalls", VCPU_STAT(hypercalls
) },
124 { "request_irq", VCPU_STAT(request_irq_exits
) },
125 { "irq_exits", VCPU_STAT(irq_exits
) },
126 { "host_state_reload", VCPU_STAT(host_state_reload
) },
127 { "efer_reload", VCPU_STAT(efer_reload
) },
128 { "fpu_reload", VCPU_STAT(fpu_reload
) },
129 { "insn_emulation", VCPU_STAT(insn_emulation
) },
130 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail
) },
131 { "irq_injections", VCPU_STAT(irq_injections
) },
132 { "nmi_injections", VCPU_STAT(nmi_injections
) },
133 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped
) },
134 { "mmu_pte_write", VM_STAT(mmu_pte_write
) },
135 { "mmu_pte_updated", VM_STAT(mmu_pte_updated
) },
136 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped
) },
137 { "mmu_flooded", VM_STAT(mmu_flooded
) },
138 { "mmu_recycled", VM_STAT(mmu_recycled
) },
139 { "mmu_cache_miss", VM_STAT(mmu_cache_miss
) },
140 { "mmu_unsync", VM_STAT(mmu_unsync
) },
141 { "remote_tlb_flush", VM_STAT(remote_tlb_flush
) },
142 { "largepages", VM_STAT(lpages
) },
146 static void kvm_on_user_return(struct user_return_notifier
*urn
)
149 struct kvm_shared_msr
*global
;
150 struct kvm_shared_msrs
*locals
151 = container_of(urn
, struct kvm_shared_msrs
, urn
);
153 for (slot
= 0; slot
< shared_msrs_global
.nr
; ++slot
) {
154 global
= &shared_msrs_global
.msrs
[slot
];
155 if (global
->value
!= locals
->current_value
[slot
]) {
156 wrmsrl(global
->msr
, global
->value
);
157 locals
->current_value
[slot
] = global
->value
;
160 locals
->registered
= false;
161 user_return_notifier_unregister(urn
);
164 void kvm_define_shared_msr(unsigned slot
, u32 msr
)
169 if (slot
>= shared_msrs_global
.nr
)
170 shared_msrs_global
.nr
= slot
+ 1;
171 shared_msrs_global
.msrs
[slot
].msr
= msr
;
172 rdmsrl_safe(msr
, &value
);
173 shared_msrs_global
.msrs
[slot
].value
= value
;
174 for_each_online_cpu(cpu
)
175 per_cpu(shared_msrs
, cpu
).current_value
[slot
] = value
;
177 EXPORT_SYMBOL_GPL(kvm_define_shared_msr
);
179 static void kvm_shared_msr_cpu_online(void)
182 struct kvm_shared_msrs
*locals
= &__get_cpu_var(shared_msrs
);
184 for (i
= 0; i
< shared_msrs_global
.nr
; ++i
)
185 locals
->current_value
[i
] = shared_msrs_global
.msrs
[i
].value
;
188 void kvm_set_shared_msr(unsigned slot
, u64 value
)
190 struct kvm_shared_msrs
*smsr
= &__get_cpu_var(shared_msrs
);
192 if (value
== smsr
->current_value
[slot
])
194 smsr
->current_value
[slot
] = value
;
195 wrmsrl(shared_msrs_global
.msrs
[slot
].msr
, value
);
196 if (!smsr
->registered
) {
197 smsr
->urn
.on_user_return
= kvm_on_user_return
;
198 user_return_notifier_register(&smsr
->urn
);
199 smsr
->registered
= true;
202 EXPORT_SYMBOL_GPL(kvm_set_shared_msr
);
204 unsigned long segment_base(u16 selector
)
206 struct descriptor_table gdt
;
207 struct desc_struct
*d
;
208 unsigned long table_base
;
215 table_base
= gdt
.base
;
217 if (selector
& 4) { /* from ldt */
218 u16 ldt_selector
= kvm_read_ldt();
220 table_base
= segment_base(ldt_selector
);
222 d
= (struct desc_struct
*)(table_base
+ (selector
& ~7));
223 v
= get_desc_base(d
);
225 if (d
->s
== 0 && (d
->type
== 2 || d
->type
== 9 || d
->type
== 11))
226 v
|= ((unsigned long)((struct ldttss_desc64
*)d
)->base3
) << 32;
230 EXPORT_SYMBOL_GPL(segment_base
);
232 u64
kvm_get_apic_base(struct kvm_vcpu
*vcpu
)
234 if (irqchip_in_kernel(vcpu
->kvm
))
235 return vcpu
->arch
.apic_base
;
237 return vcpu
->arch
.apic_base
;
239 EXPORT_SYMBOL_GPL(kvm_get_apic_base
);
241 void kvm_set_apic_base(struct kvm_vcpu
*vcpu
, u64 data
)
243 /* TODO: reserve bits check */
244 if (irqchip_in_kernel(vcpu
->kvm
))
245 kvm_lapic_set_base(vcpu
, data
);
247 vcpu
->arch
.apic_base
= data
;
249 EXPORT_SYMBOL_GPL(kvm_set_apic_base
);
251 void kvm_queue_exception(struct kvm_vcpu
*vcpu
, unsigned nr
)
253 WARN_ON(vcpu
->arch
.exception
.pending
);
254 vcpu
->arch
.exception
.pending
= true;
255 vcpu
->arch
.exception
.has_error_code
= false;
256 vcpu
->arch
.exception
.nr
= nr
;
258 EXPORT_SYMBOL_GPL(kvm_queue_exception
);
260 void kvm_inject_page_fault(struct kvm_vcpu
*vcpu
, unsigned long addr
,
263 ++vcpu
->stat
.pf_guest
;
265 if (vcpu
->arch
.exception
.pending
) {
266 switch(vcpu
->arch
.exception
.nr
) {
268 /* triple fault -> shutdown */
269 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
272 vcpu
->arch
.exception
.nr
= DF_VECTOR
;
273 vcpu
->arch
.exception
.error_code
= 0;
276 /* replace previous exception with a new one in a hope
277 that instruction re-execution will regenerate lost
279 vcpu
->arch
.exception
.pending
= false;
283 vcpu
->arch
.cr2
= addr
;
284 kvm_queue_exception_e(vcpu
, PF_VECTOR
, error_code
);
287 void kvm_inject_nmi(struct kvm_vcpu
*vcpu
)
289 vcpu
->arch
.nmi_pending
= 1;
291 EXPORT_SYMBOL_GPL(kvm_inject_nmi
);
293 void kvm_queue_exception_e(struct kvm_vcpu
*vcpu
, unsigned nr
, u32 error_code
)
295 WARN_ON(vcpu
->arch
.exception
.pending
);
296 vcpu
->arch
.exception
.pending
= true;
297 vcpu
->arch
.exception
.has_error_code
= true;
298 vcpu
->arch
.exception
.nr
= nr
;
299 vcpu
->arch
.exception
.error_code
= error_code
;
301 EXPORT_SYMBOL_GPL(kvm_queue_exception_e
);
304 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
305 * a #GP and return false.
307 bool kvm_require_cpl(struct kvm_vcpu
*vcpu
, int required_cpl
)
309 if (kvm_x86_ops
->get_cpl(vcpu
) <= required_cpl
)
311 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
314 EXPORT_SYMBOL_GPL(kvm_require_cpl
);
317 * Load the pae pdptrs. Return true is they are all valid.
319 int load_pdptrs(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
321 gfn_t pdpt_gfn
= cr3
>> PAGE_SHIFT
;
322 unsigned offset
= ((cr3
& (PAGE_SIZE
-1)) >> 5) << 2;
325 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
327 ret
= kvm_read_guest_page(vcpu
->kvm
, pdpt_gfn
, pdpte
,
328 offset
* sizeof(u64
), sizeof(pdpte
));
333 for (i
= 0; i
< ARRAY_SIZE(pdpte
); ++i
) {
334 if (is_present_gpte(pdpte
[i
]) &&
335 (pdpte
[i
] & vcpu
->arch
.mmu
.rsvd_bits_mask
[0][2])) {
342 memcpy(vcpu
->arch
.pdptrs
, pdpte
, sizeof(vcpu
->arch
.pdptrs
));
343 __set_bit(VCPU_EXREG_PDPTR
,
344 (unsigned long *)&vcpu
->arch
.regs_avail
);
345 __set_bit(VCPU_EXREG_PDPTR
,
346 (unsigned long *)&vcpu
->arch
.regs_dirty
);
351 EXPORT_SYMBOL_GPL(load_pdptrs
);
353 static bool pdptrs_changed(struct kvm_vcpu
*vcpu
)
355 u64 pdpte
[ARRAY_SIZE(vcpu
->arch
.pdptrs
)];
359 if (is_long_mode(vcpu
) || !is_pae(vcpu
))
362 if (!test_bit(VCPU_EXREG_PDPTR
,
363 (unsigned long *)&vcpu
->arch
.regs_avail
))
366 r
= kvm_read_guest(vcpu
->kvm
, vcpu
->arch
.cr3
& ~31u, pdpte
, sizeof(pdpte
));
369 changed
= memcmp(pdpte
, vcpu
->arch
.pdptrs
, sizeof(pdpte
)) != 0;
375 void kvm_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
377 if (cr0
& CR0_RESERVED_BITS
) {
378 printk(KERN_DEBUG
"set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
379 cr0
, vcpu
->arch
.cr0
);
380 kvm_inject_gp(vcpu
, 0);
384 if ((cr0
& X86_CR0_NW
) && !(cr0
& X86_CR0_CD
)) {
385 printk(KERN_DEBUG
"set_cr0: #GP, CD == 0 && NW == 1\n");
386 kvm_inject_gp(vcpu
, 0);
390 if ((cr0
& X86_CR0_PG
) && !(cr0
& X86_CR0_PE
)) {
391 printk(KERN_DEBUG
"set_cr0: #GP, set PG flag "
392 "and a clear PE flag\n");
393 kvm_inject_gp(vcpu
, 0);
397 if (!is_paging(vcpu
) && (cr0
& X86_CR0_PG
)) {
399 if ((vcpu
->arch
.shadow_efer
& EFER_LME
)) {
403 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
404 "in long mode while PAE is disabled\n");
405 kvm_inject_gp(vcpu
, 0);
408 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
410 printk(KERN_DEBUG
"set_cr0: #GP, start paging "
411 "in long mode while CS.L == 1\n");
412 kvm_inject_gp(vcpu
, 0);
418 if (is_pae(vcpu
) && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
419 printk(KERN_DEBUG
"set_cr0: #GP, pdptrs "
421 kvm_inject_gp(vcpu
, 0);
427 kvm_x86_ops
->set_cr0(vcpu
, cr0
);
428 vcpu
->arch
.cr0
= cr0
;
430 kvm_mmu_reset_context(vcpu
);
433 EXPORT_SYMBOL_GPL(kvm_set_cr0
);
435 void kvm_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
)
437 kvm_set_cr0(vcpu
, (vcpu
->arch
.cr0
& ~0x0ful
) | (msw
& 0x0f));
439 EXPORT_SYMBOL_GPL(kvm_lmsw
);
441 void kvm_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
443 unsigned long old_cr4
= vcpu
->arch
.cr4
;
444 unsigned long pdptr_bits
= X86_CR4_PGE
| X86_CR4_PSE
| X86_CR4_PAE
;
446 if (cr4
& CR4_RESERVED_BITS
) {
447 printk(KERN_DEBUG
"set_cr4: #GP, reserved bits\n");
448 kvm_inject_gp(vcpu
, 0);
452 if (is_long_mode(vcpu
)) {
453 if (!(cr4
& X86_CR4_PAE
)) {
454 printk(KERN_DEBUG
"set_cr4: #GP, clearing PAE while "
456 kvm_inject_gp(vcpu
, 0);
459 } else if (is_paging(vcpu
) && (cr4
& X86_CR4_PAE
)
460 && ((cr4
^ old_cr4
) & pdptr_bits
)
461 && !load_pdptrs(vcpu
, vcpu
->arch
.cr3
)) {
462 printk(KERN_DEBUG
"set_cr4: #GP, pdptrs reserved bits\n");
463 kvm_inject_gp(vcpu
, 0);
467 if (cr4
& X86_CR4_VMXE
) {
468 printk(KERN_DEBUG
"set_cr4: #GP, setting VMXE\n");
469 kvm_inject_gp(vcpu
, 0);
472 kvm_x86_ops
->set_cr4(vcpu
, cr4
);
473 vcpu
->arch
.cr4
= cr4
;
474 vcpu
->arch
.mmu
.base_role
.cr4_pge
= (cr4
& X86_CR4_PGE
) && !tdp_enabled
;
475 kvm_mmu_reset_context(vcpu
);
477 EXPORT_SYMBOL_GPL(kvm_set_cr4
);
479 void kvm_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
481 if (cr3
== vcpu
->arch
.cr3
&& !pdptrs_changed(vcpu
)) {
482 kvm_mmu_sync_roots(vcpu
);
483 kvm_mmu_flush_tlb(vcpu
);
487 if (is_long_mode(vcpu
)) {
488 if (cr3
& CR3_L_MODE_RESERVED_BITS
) {
489 printk(KERN_DEBUG
"set_cr3: #GP, reserved bits\n");
490 kvm_inject_gp(vcpu
, 0);
495 if (cr3
& CR3_PAE_RESERVED_BITS
) {
497 "set_cr3: #GP, reserved bits\n");
498 kvm_inject_gp(vcpu
, 0);
501 if (is_paging(vcpu
) && !load_pdptrs(vcpu
, cr3
)) {
502 printk(KERN_DEBUG
"set_cr3: #GP, pdptrs "
504 kvm_inject_gp(vcpu
, 0);
509 * We don't check reserved bits in nonpae mode, because
510 * this isn't enforced, and VMware depends on this.
515 * Does the new cr3 value map to physical memory? (Note, we
516 * catch an invalid cr3 even in real-mode, because it would
517 * cause trouble later on when we turn on paging anyway.)
519 * A real CPU would silently accept an invalid cr3 and would
520 * attempt to use it - with largely undefined (and often hard
521 * to debug) behavior on the guest side.
523 if (unlikely(!gfn_to_memslot(vcpu
->kvm
, cr3
>> PAGE_SHIFT
)))
524 kvm_inject_gp(vcpu
, 0);
526 vcpu
->arch
.cr3
= cr3
;
527 vcpu
->arch
.mmu
.new_cr3(vcpu
);
530 EXPORT_SYMBOL_GPL(kvm_set_cr3
);
532 void kvm_set_cr8(struct kvm_vcpu
*vcpu
, unsigned long cr8
)
534 if (cr8
& CR8_RESERVED_BITS
) {
535 printk(KERN_DEBUG
"set_cr8: #GP, reserved bits 0x%lx\n", cr8
);
536 kvm_inject_gp(vcpu
, 0);
539 if (irqchip_in_kernel(vcpu
->kvm
))
540 kvm_lapic_set_tpr(vcpu
, cr8
);
542 vcpu
->arch
.cr8
= cr8
;
544 EXPORT_SYMBOL_GPL(kvm_set_cr8
);
546 unsigned long kvm_get_cr8(struct kvm_vcpu
*vcpu
)
548 if (irqchip_in_kernel(vcpu
->kvm
))
549 return kvm_lapic_get_cr8(vcpu
);
551 return vcpu
->arch
.cr8
;
553 EXPORT_SYMBOL_GPL(kvm_get_cr8
);
555 static inline u32
bit(int bitno
)
557 return 1 << (bitno
& 31);
561 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
562 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
564 * This list is modified at module load time to reflect the
565 * capabilities of the host cpu. This capabilities test skips MSRs that are
566 * kvm-specific. Those are put in the beginning of the list.
569 #define KVM_SAVE_MSRS_BEGIN 2
570 static u32 msrs_to_save
[] = {
571 MSR_KVM_SYSTEM_TIME
, MSR_KVM_WALL_CLOCK
,
572 MSR_IA32_SYSENTER_CS
, MSR_IA32_SYSENTER_ESP
, MSR_IA32_SYSENTER_EIP
,
575 MSR_CSTAR
, MSR_KERNEL_GS_BASE
, MSR_SYSCALL_MASK
, MSR_LSTAR
,
577 MSR_IA32_TSC
, MSR_IA32_PERF_STATUS
, MSR_IA32_CR_PAT
, MSR_VM_HSAVE_PA
580 static unsigned num_msrs_to_save
;
582 static u32 emulated_msrs
[] = {
583 MSR_IA32_MISC_ENABLE
,
586 static void set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
588 if (efer
& efer_reserved_bits
) {
589 printk(KERN_DEBUG
"set_efer: 0x%llx #GP, reserved bits\n",
591 kvm_inject_gp(vcpu
, 0);
596 && (vcpu
->arch
.shadow_efer
& EFER_LME
) != (efer
& EFER_LME
)) {
597 printk(KERN_DEBUG
"set_efer: #GP, change LME while paging\n");
598 kvm_inject_gp(vcpu
, 0);
602 if (efer
& EFER_FFXSR
) {
603 struct kvm_cpuid_entry2
*feat
;
605 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
606 if (!feat
|| !(feat
->edx
& bit(X86_FEATURE_FXSR_OPT
))) {
607 printk(KERN_DEBUG
"set_efer: #GP, enable FFXSR w/o CPUID capability\n");
608 kvm_inject_gp(vcpu
, 0);
613 if (efer
& EFER_SVME
) {
614 struct kvm_cpuid_entry2
*feat
;
616 feat
= kvm_find_cpuid_entry(vcpu
, 0x80000001, 0);
617 if (!feat
|| !(feat
->ecx
& bit(X86_FEATURE_SVM
))) {
618 printk(KERN_DEBUG
"set_efer: #GP, enable SVM w/o SVM\n");
619 kvm_inject_gp(vcpu
, 0);
624 kvm_x86_ops
->set_efer(vcpu
, efer
);
627 efer
|= vcpu
->arch
.shadow_efer
& EFER_LMA
;
629 vcpu
->arch
.shadow_efer
= efer
;
631 vcpu
->arch
.mmu
.base_role
.nxe
= (efer
& EFER_NX
) && !tdp_enabled
;
632 kvm_mmu_reset_context(vcpu
);
635 void kvm_enable_efer_bits(u64 mask
)
637 efer_reserved_bits
&= ~mask
;
639 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits
);
643 * Writes msr value into into the appropriate "register".
644 * Returns 0 on success, non-0 otherwise.
645 * Assumes vcpu_load() was already called.
647 int kvm_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
649 return kvm_x86_ops
->set_msr(vcpu
, msr_index
, data
);
653 * Adapt set_msr() to msr_io()'s calling convention
655 static int do_set_msr(struct kvm_vcpu
*vcpu
, unsigned index
, u64
*data
)
657 return kvm_set_msr(vcpu
, index
, *data
);
660 static void kvm_write_wall_clock(struct kvm
*kvm
, gpa_t wall_clock
)
663 struct pvclock_wall_clock wc
;
664 struct timespec now
, sys
, boot
;
671 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
674 * The guest calculates current wall clock time by adding
675 * system time (updated by kvm_write_guest_time below) to the
676 * wall clock specified here. guest system time equals host
677 * system time for us, thus we must fill in host boot time here.
679 now
= current_kernel_time();
681 boot
= ns_to_timespec(timespec_to_ns(&now
) - timespec_to_ns(&sys
));
683 wc
.sec
= boot
.tv_sec
;
684 wc
.nsec
= boot
.tv_nsec
;
685 wc
.version
= version
;
687 kvm_write_guest(kvm
, wall_clock
, &wc
, sizeof(wc
));
690 kvm_write_guest(kvm
, wall_clock
, &version
, sizeof(version
));
693 static uint32_t div_frac(uint32_t dividend
, uint32_t divisor
)
695 uint32_t quotient
, remainder
;
697 /* Don't try to replace with do_div(), this one calculates
698 * "(dividend << 32) / divisor" */
700 : "=a" (quotient
), "=d" (remainder
)
701 : "0" (0), "1" (dividend
), "r" (divisor
) );
705 static void kvm_set_time_scale(uint32_t tsc_khz
, struct pvclock_vcpu_time_info
*hv_clock
)
707 uint64_t nsecs
= 1000000000LL;
712 tps64
= tsc_khz
* 1000LL;
713 while (tps64
> nsecs
*2) {
718 tps32
= (uint32_t)tps64
;
719 while (tps32
<= (uint32_t)nsecs
) {
724 hv_clock
->tsc_shift
= shift
;
725 hv_clock
->tsc_to_system_mul
= div_frac(nsecs
, tps32
);
727 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
728 __func__
, tsc_khz
, hv_clock
->tsc_shift
,
729 hv_clock
->tsc_to_system_mul
);
732 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz
);
734 static void kvm_write_guest_time(struct kvm_vcpu
*v
)
738 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
740 unsigned long this_tsc_khz
;
742 if ((!vcpu
->time_page
))
745 this_tsc_khz
= get_cpu_var(cpu_tsc_khz
);
746 if (unlikely(vcpu
->hv_clock_tsc_khz
!= this_tsc_khz
)) {
747 kvm_set_time_scale(this_tsc_khz
, &vcpu
->hv_clock
);
748 vcpu
->hv_clock_tsc_khz
= this_tsc_khz
;
750 put_cpu_var(cpu_tsc_khz
);
752 /* Keep irq disabled to prevent changes to the clock */
753 local_irq_save(flags
);
754 kvm_get_msr(v
, MSR_IA32_TSC
, &vcpu
->hv_clock
.tsc_timestamp
);
756 local_irq_restore(flags
);
758 /* With all the info we got, fill in the values */
760 vcpu
->hv_clock
.system_time
= ts
.tv_nsec
+
761 (NSEC_PER_SEC
* (u64
)ts
.tv_sec
) + v
->kvm
->arch
.kvmclock_offset
;
764 * The interface expects us to write an even number signaling that the
765 * update is finished. Since the guest won't see the intermediate
766 * state, we just increase by 2 at the end.
768 vcpu
->hv_clock
.version
+= 2;
770 shared_kaddr
= kmap_atomic(vcpu
->time_page
, KM_USER0
);
772 memcpy(shared_kaddr
+ vcpu
->time_offset
, &vcpu
->hv_clock
,
773 sizeof(vcpu
->hv_clock
));
775 kunmap_atomic(shared_kaddr
, KM_USER0
);
777 mark_page_dirty(v
->kvm
, vcpu
->time
>> PAGE_SHIFT
);
780 static int kvm_request_guest_time_update(struct kvm_vcpu
*v
)
782 struct kvm_vcpu_arch
*vcpu
= &v
->arch
;
784 if (!vcpu
->time_page
)
786 set_bit(KVM_REQ_KVMCLOCK_UPDATE
, &v
->requests
);
790 static bool msr_mtrr_valid(unsigned msr
)
793 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR
- 1:
794 case MSR_MTRRfix64K_00000
:
795 case MSR_MTRRfix16K_80000
:
796 case MSR_MTRRfix16K_A0000
:
797 case MSR_MTRRfix4K_C0000
:
798 case MSR_MTRRfix4K_C8000
:
799 case MSR_MTRRfix4K_D0000
:
800 case MSR_MTRRfix4K_D8000
:
801 case MSR_MTRRfix4K_E0000
:
802 case MSR_MTRRfix4K_E8000
:
803 case MSR_MTRRfix4K_F0000
:
804 case MSR_MTRRfix4K_F8000
:
805 case MSR_MTRRdefType
:
806 case MSR_IA32_CR_PAT
:
814 static bool valid_pat_type(unsigned t
)
816 return t
< 8 && (1 << t
) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
819 static bool valid_mtrr_type(unsigned t
)
821 return t
< 8 && (1 << t
) & 0x73; /* 0, 1, 4, 5, 6 */
824 static bool mtrr_valid(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
828 if (!msr_mtrr_valid(msr
))
831 if (msr
== MSR_IA32_CR_PAT
) {
832 for (i
= 0; i
< 8; i
++)
833 if (!valid_pat_type((data
>> (i
* 8)) & 0xff))
836 } else if (msr
== MSR_MTRRdefType
) {
839 return valid_mtrr_type(data
& 0xff);
840 } else if (msr
>= MSR_MTRRfix64K_00000
&& msr
<= MSR_MTRRfix4K_F8000
) {
841 for (i
= 0; i
< 8 ; i
++)
842 if (!valid_mtrr_type((data
>> (i
* 8)) & 0xff))
848 return valid_mtrr_type(data
& 0xff);
851 static int set_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
853 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
855 if (!mtrr_valid(vcpu
, msr
, data
))
858 if (msr
== MSR_MTRRdefType
) {
859 vcpu
->arch
.mtrr_state
.def_type
= data
;
860 vcpu
->arch
.mtrr_state
.enabled
= (data
& 0xc00) >> 10;
861 } else if (msr
== MSR_MTRRfix64K_00000
)
863 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
864 p
[1 + msr
- MSR_MTRRfix16K_80000
] = data
;
865 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
866 p
[3 + msr
- MSR_MTRRfix4K_C0000
] = data
;
867 else if (msr
== MSR_IA32_CR_PAT
)
868 vcpu
->arch
.pat
= data
;
869 else { /* Variable MTRRs */
870 int idx
, is_mtrr_mask
;
873 idx
= (msr
- 0x200) / 2;
874 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
877 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
880 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
884 kvm_mmu_reset_context(vcpu
);
888 static int set_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
890 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
891 unsigned bank_num
= mcg_cap
& 0xff;
894 case MSR_IA32_MCG_STATUS
:
895 vcpu
->arch
.mcg_status
= data
;
897 case MSR_IA32_MCG_CTL
:
898 if (!(mcg_cap
& MCG_CTL_P
))
900 if (data
!= 0 && data
!= ~(u64
)0)
902 vcpu
->arch
.mcg_ctl
= data
;
905 if (msr
>= MSR_IA32_MC0_CTL
&&
906 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
907 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
908 /* only 0 or all 1s can be written to IA32_MCi_CTL */
909 if ((offset
& 0x3) == 0 &&
910 data
!= 0 && data
!= ~(u64
)0)
912 vcpu
->arch
.mce_banks
[offset
] = data
;
920 static int xen_hvm_config(struct kvm_vcpu
*vcpu
, u64 data
)
922 struct kvm
*kvm
= vcpu
->kvm
;
923 int lm
= is_long_mode(vcpu
);
924 u8
*blob_addr
= lm
? (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_64
925 : (u8
*)(long)kvm
->arch
.xen_hvm_config
.blob_addr_32
;
926 u8 blob_size
= lm
? kvm
->arch
.xen_hvm_config
.blob_size_64
927 : kvm
->arch
.xen_hvm_config
.blob_size_32
;
928 u32 page_num
= data
& ~PAGE_MASK
;
929 u64 page_addr
= data
& PAGE_MASK
;
934 if (page_num
>= blob_size
)
937 page
= kzalloc(PAGE_SIZE
, GFP_KERNEL
);
941 if (copy_from_user(page
, blob_addr
+ (page_num
* PAGE_SIZE
), PAGE_SIZE
))
943 if (kvm_write_guest(kvm
, page_addr
, page
, PAGE_SIZE
))
952 int kvm_set_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64 data
)
956 set_efer(vcpu
, data
);
959 data
&= ~(u64
)0x40; /* ignore flush filter disable */
961 pr_unimpl(vcpu
, "unimplemented HWCR wrmsr: 0x%llx\n",
966 case MSR_FAM10H_MMIO_CONF_BASE
:
968 pr_unimpl(vcpu
, "unimplemented MMIO_CONF_BASE wrmsr: "
973 case MSR_AMD64_NB_CFG
:
975 case MSR_IA32_DEBUGCTLMSR
:
977 /* We support the non-activated case already */
979 } else if (data
& ~(DEBUGCTLMSR_LBR
| DEBUGCTLMSR_BTF
)) {
980 /* Values other than LBR and BTF are vendor-specific,
981 thus reserved and should throw a #GP */
984 pr_unimpl(vcpu
, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
987 case MSR_IA32_UCODE_REV
:
988 case MSR_IA32_UCODE_WRITE
:
989 case MSR_VM_HSAVE_PA
:
990 case MSR_AMD64_PATCH_LOADER
:
992 case 0x200 ... 0x2ff:
993 return set_msr_mtrr(vcpu
, msr
, data
);
994 case MSR_IA32_APICBASE
:
995 kvm_set_apic_base(vcpu
, data
);
997 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
998 return kvm_x2apic_msr_write(vcpu
, msr
, data
);
999 case MSR_IA32_MISC_ENABLE
:
1000 vcpu
->arch
.ia32_misc_enable_msr
= data
;
1002 case MSR_KVM_WALL_CLOCK
:
1003 vcpu
->kvm
->arch
.wall_clock
= data
;
1004 kvm_write_wall_clock(vcpu
->kvm
, data
);
1006 case MSR_KVM_SYSTEM_TIME
: {
1007 if (vcpu
->arch
.time_page
) {
1008 kvm_release_page_dirty(vcpu
->arch
.time_page
);
1009 vcpu
->arch
.time_page
= NULL
;
1012 vcpu
->arch
.time
= data
;
1014 /* we verify if the enable bit is set... */
1018 /* ...but clean it before doing the actual write */
1019 vcpu
->arch
.time_offset
= data
& ~(PAGE_MASK
| 1);
1021 vcpu
->arch
.time_page
=
1022 gfn_to_page(vcpu
->kvm
, data
>> PAGE_SHIFT
);
1024 if (is_error_page(vcpu
->arch
.time_page
)) {
1025 kvm_release_page_clean(vcpu
->arch
.time_page
);
1026 vcpu
->arch
.time_page
= NULL
;
1029 kvm_request_guest_time_update(vcpu
);
1032 case MSR_IA32_MCG_CTL
:
1033 case MSR_IA32_MCG_STATUS
:
1034 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1035 return set_msr_mce(vcpu
, msr
, data
);
1037 /* Performance counters are not protected by a CPUID bit,
1038 * so we should check all of them in the generic path for the sake of
1039 * cross vendor migration.
1040 * Writing a zero into the event select MSRs disables them,
1041 * which we perfectly emulate ;-). Any other value should be at least
1042 * reported, some guests depend on them.
1044 case MSR_P6_EVNTSEL0
:
1045 case MSR_P6_EVNTSEL1
:
1046 case MSR_K7_EVNTSEL0
:
1047 case MSR_K7_EVNTSEL1
:
1048 case MSR_K7_EVNTSEL2
:
1049 case MSR_K7_EVNTSEL3
:
1051 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1052 "0x%x data 0x%llx\n", msr
, data
);
1054 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1055 * so we ignore writes to make it happy.
1057 case MSR_P6_PERFCTR0
:
1058 case MSR_P6_PERFCTR1
:
1059 case MSR_K7_PERFCTR0
:
1060 case MSR_K7_PERFCTR1
:
1061 case MSR_K7_PERFCTR2
:
1062 case MSR_K7_PERFCTR3
:
1063 pr_unimpl(vcpu
, "unimplemented perfctr wrmsr: "
1064 "0x%x data 0x%llx\n", msr
, data
);
1067 if (msr
&& (msr
== vcpu
->kvm
->arch
.xen_hvm_config
.msr
))
1068 return xen_hvm_config(vcpu
, data
);
1070 pr_unimpl(vcpu
, "unhandled wrmsr: 0x%x data %llx\n",
1074 pr_unimpl(vcpu
, "ignored wrmsr: 0x%x data %llx\n",
1081 EXPORT_SYMBOL_GPL(kvm_set_msr_common
);
1085 * Reads an msr value (of 'msr_index') into 'pdata'.
1086 * Returns 0 on success, non-0 otherwise.
1087 * Assumes vcpu_load() was already called.
1089 int kvm_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
1091 return kvm_x86_ops
->get_msr(vcpu
, msr_index
, pdata
);
1094 static int get_msr_mtrr(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1096 u64
*p
= (u64
*)&vcpu
->arch
.mtrr_state
.fixed_ranges
;
1098 if (!msr_mtrr_valid(msr
))
1101 if (msr
== MSR_MTRRdefType
)
1102 *pdata
= vcpu
->arch
.mtrr_state
.def_type
+
1103 (vcpu
->arch
.mtrr_state
.enabled
<< 10);
1104 else if (msr
== MSR_MTRRfix64K_00000
)
1106 else if (msr
== MSR_MTRRfix16K_80000
|| msr
== MSR_MTRRfix16K_A0000
)
1107 *pdata
= p
[1 + msr
- MSR_MTRRfix16K_80000
];
1108 else if (msr
>= MSR_MTRRfix4K_C0000
&& msr
<= MSR_MTRRfix4K_F8000
)
1109 *pdata
= p
[3 + msr
- MSR_MTRRfix4K_C0000
];
1110 else if (msr
== MSR_IA32_CR_PAT
)
1111 *pdata
= vcpu
->arch
.pat
;
1112 else { /* Variable MTRRs */
1113 int idx
, is_mtrr_mask
;
1116 idx
= (msr
- 0x200) / 2;
1117 is_mtrr_mask
= msr
- 0x200 - 2 * idx
;
1120 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].base_lo
;
1123 (u64
*)&vcpu
->arch
.mtrr_state
.var_ranges
[idx
].mask_lo
;
1130 static int get_msr_mce(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1133 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1134 unsigned bank_num
= mcg_cap
& 0xff;
1137 case MSR_IA32_P5_MC_ADDR
:
1138 case MSR_IA32_P5_MC_TYPE
:
1141 case MSR_IA32_MCG_CAP
:
1142 data
= vcpu
->arch
.mcg_cap
;
1144 case MSR_IA32_MCG_CTL
:
1145 if (!(mcg_cap
& MCG_CTL_P
))
1147 data
= vcpu
->arch
.mcg_ctl
;
1149 case MSR_IA32_MCG_STATUS
:
1150 data
= vcpu
->arch
.mcg_status
;
1153 if (msr
>= MSR_IA32_MC0_CTL
&&
1154 msr
< MSR_IA32_MC0_CTL
+ 4 * bank_num
) {
1155 u32 offset
= msr
- MSR_IA32_MC0_CTL
;
1156 data
= vcpu
->arch
.mce_banks
[offset
];
1165 int kvm_get_msr_common(struct kvm_vcpu
*vcpu
, u32 msr
, u64
*pdata
)
1170 case MSR_IA32_PLATFORM_ID
:
1171 case MSR_IA32_UCODE_REV
:
1172 case MSR_IA32_EBL_CR_POWERON
:
1173 case MSR_IA32_DEBUGCTLMSR
:
1174 case MSR_IA32_LASTBRANCHFROMIP
:
1175 case MSR_IA32_LASTBRANCHTOIP
:
1176 case MSR_IA32_LASTINTFROMIP
:
1177 case MSR_IA32_LASTINTTOIP
:
1180 case MSR_VM_HSAVE_PA
:
1181 case MSR_P6_PERFCTR0
:
1182 case MSR_P6_PERFCTR1
:
1183 case MSR_P6_EVNTSEL0
:
1184 case MSR_P6_EVNTSEL1
:
1185 case MSR_K7_EVNTSEL0
:
1186 case MSR_K7_PERFCTR0
:
1187 case MSR_K8_INT_PENDING_MSG
:
1188 case MSR_AMD64_NB_CFG
:
1189 case MSR_FAM10H_MMIO_CONF_BASE
:
1193 data
= 0x500 | KVM_NR_VAR_MTRR
;
1195 case 0x200 ... 0x2ff:
1196 return get_msr_mtrr(vcpu
, msr
, pdata
);
1197 case 0xcd: /* fsb frequency */
1200 case MSR_IA32_APICBASE
:
1201 data
= kvm_get_apic_base(vcpu
);
1203 case APIC_BASE_MSR
... APIC_BASE_MSR
+ 0x3ff:
1204 return kvm_x2apic_msr_read(vcpu
, msr
, pdata
);
1206 case MSR_IA32_MISC_ENABLE
:
1207 data
= vcpu
->arch
.ia32_misc_enable_msr
;
1209 case MSR_IA32_PERF_STATUS
:
1210 /* TSC increment by tick */
1212 /* CPU multiplier */
1213 data
|= (((uint64_t)4ULL) << 40);
1216 data
= vcpu
->arch
.shadow_efer
;
1218 case MSR_KVM_WALL_CLOCK
:
1219 data
= vcpu
->kvm
->arch
.wall_clock
;
1221 case MSR_KVM_SYSTEM_TIME
:
1222 data
= vcpu
->arch
.time
;
1224 case MSR_IA32_P5_MC_ADDR
:
1225 case MSR_IA32_P5_MC_TYPE
:
1226 case MSR_IA32_MCG_CAP
:
1227 case MSR_IA32_MCG_CTL
:
1228 case MSR_IA32_MCG_STATUS
:
1229 case MSR_IA32_MC0_CTL
... MSR_IA32_MC0_CTL
+ 4 * KVM_MAX_MCE_BANKS
- 1:
1230 return get_msr_mce(vcpu
, msr
, pdata
);
1233 pr_unimpl(vcpu
, "unhandled rdmsr: 0x%x\n", msr
);
1236 pr_unimpl(vcpu
, "ignored rdmsr: 0x%x\n", msr
);
1244 EXPORT_SYMBOL_GPL(kvm_get_msr_common
);
1247 * Read or write a bunch of msrs. All parameters are kernel addresses.
1249 * @return number of msrs set successfully.
1251 static int __msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs
*msrs
,
1252 struct kvm_msr_entry
*entries
,
1253 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1254 unsigned index
, u64
*data
))
1260 down_read(&vcpu
->kvm
->slots_lock
);
1261 for (i
= 0; i
< msrs
->nmsrs
; ++i
)
1262 if (do_msr(vcpu
, entries
[i
].index
, &entries
[i
].data
))
1264 up_read(&vcpu
->kvm
->slots_lock
);
1272 * Read or write a bunch of msrs. Parameters are user addresses.
1274 * @return number of msrs set successfully.
1276 static int msr_io(struct kvm_vcpu
*vcpu
, struct kvm_msrs __user
*user_msrs
,
1277 int (*do_msr
)(struct kvm_vcpu
*vcpu
,
1278 unsigned index
, u64
*data
),
1281 struct kvm_msrs msrs
;
1282 struct kvm_msr_entry
*entries
;
1287 if (copy_from_user(&msrs
, user_msrs
, sizeof msrs
))
1291 if (msrs
.nmsrs
>= MAX_IO_MSRS
)
1295 size
= sizeof(struct kvm_msr_entry
) * msrs
.nmsrs
;
1296 entries
= vmalloc(size
);
1301 if (copy_from_user(entries
, user_msrs
->entries
, size
))
1304 r
= n
= __msr_io(vcpu
, &msrs
, entries
, do_msr
);
1309 if (writeback
&& copy_to_user(user_msrs
->entries
, entries
, size
))
1320 int kvm_dev_ioctl_check_extension(long ext
)
1325 case KVM_CAP_IRQCHIP
:
1327 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL
:
1328 case KVM_CAP_SET_TSS_ADDR
:
1329 case KVM_CAP_EXT_CPUID
:
1330 case KVM_CAP_CLOCKSOURCE
:
1332 case KVM_CAP_NOP_IO_DELAY
:
1333 case KVM_CAP_MP_STATE
:
1334 case KVM_CAP_SYNC_MMU
:
1335 case KVM_CAP_REINJECT_CONTROL
:
1336 case KVM_CAP_IRQ_INJECT_STATUS
:
1337 case KVM_CAP_ASSIGN_DEV_IRQ
:
1339 case KVM_CAP_IOEVENTFD
:
1341 case KVM_CAP_PIT_STATE2
:
1342 case KVM_CAP_SET_IDENTITY_MAP_ADDR
:
1343 case KVM_CAP_XEN_HVM
:
1344 case KVM_CAP_ADJUST_CLOCK
:
1347 case KVM_CAP_COALESCED_MMIO
:
1348 r
= KVM_COALESCED_MMIO_PAGE_OFFSET
;
1351 r
= !kvm_x86_ops
->cpu_has_accelerated_tpr();
1353 case KVM_CAP_NR_VCPUS
:
1356 case KVM_CAP_NR_MEMSLOTS
:
1357 r
= KVM_MEMORY_SLOTS
;
1359 case KVM_CAP_PV_MMU
: /* obsolete */
1366 r
= KVM_MAX_MCE_BANKS
;
1376 long kvm_arch_dev_ioctl(struct file
*filp
,
1377 unsigned int ioctl
, unsigned long arg
)
1379 void __user
*argp
= (void __user
*)arg
;
1383 case KVM_GET_MSR_INDEX_LIST
: {
1384 struct kvm_msr_list __user
*user_msr_list
= argp
;
1385 struct kvm_msr_list msr_list
;
1389 if (copy_from_user(&msr_list
, user_msr_list
, sizeof msr_list
))
1392 msr_list
.nmsrs
= num_msrs_to_save
+ ARRAY_SIZE(emulated_msrs
);
1393 if (copy_to_user(user_msr_list
, &msr_list
, sizeof msr_list
))
1396 if (n
< msr_list
.nmsrs
)
1399 if (copy_to_user(user_msr_list
->indices
, &msrs_to_save
,
1400 num_msrs_to_save
* sizeof(u32
)))
1402 if (copy_to_user(user_msr_list
->indices
+ num_msrs_to_save
,
1404 ARRAY_SIZE(emulated_msrs
) * sizeof(u32
)))
1409 case KVM_GET_SUPPORTED_CPUID
: {
1410 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1411 struct kvm_cpuid2 cpuid
;
1414 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1416 r
= kvm_dev_ioctl_get_supported_cpuid(&cpuid
,
1417 cpuid_arg
->entries
);
1422 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1427 case KVM_X86_GET_MCE_CAP_SUPPORTED
: {
1430 mce_cap
= KVM_MCE_CAP_SUPPORTED
;
1432 if (copy_to_user(argp
, &mce_cap
, sizeof mce_cap
))
1444 void kvm_arch_vcpu_load(struct kvm_vcpu
*vcpu
, int cpu
)
1446 kvm_x86_ops
->vcpu_load(vcpu
, cpu
);
1447 if (unlikely(per_cpu(cpu_tsc_khz
, cpu
) == 0)) {
1448 unsigned long khz
= cpufreq_quick_get(cpu
);
1451 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
1453 kvm_request_guest_time_update(vcpu
);
1456 void kvm_arch_vcpu_put(struct kvm_vcpu
*vcpu
)
1458 kvm_x86_ops
->vcpu_put(vcpu
);
1459 kvm_put_guest_fpu(vcpu
);
1462 static int is_efer_nx(void)
1464 unsigned long long efer
= 0;
1466 rdmsrl_safe(MSR_EFER
, &efer
);
1467 return efer
& EFER_NX
;
1470 static void cpuid_fix_nx_cap(struct kvm_vcpu
*vcpu
)
1473 struct kvm_cpuid_entry2
*e
, *entry
;
1476 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
1477 e
= &vcpu
->arch
.cpuid_entries
[i
];
1478 if (e
->function
== 0x80000001) {
1483 if (entry
&& (entry
->edx
& (1 << 20)) && !is_efer_nx()) {
1484 entry
->edx
&= ~(1 << 20);
1485 printk(KERN_INFO
"kvm: guest NX capability removed\n");
1489 /* when an old userspace process fills a new kernel module */
1490 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu
*vcpu
,
1491 struct kvm_cpuid
*cpuid
,
1492 struct kvm_cpuid_entry __user
*entries
)
1495 struct kvm_cpuid_entry
*cpuid_entries
;
1498 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1501 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry
) * cpuid
->nent
);
1505 if (copy_from_user(cpuid_entries
, entries
,
1506 cpuid
->nent
* sizeof(struct kvm_cpuid_entry
)))
1508 for (i
= 0; i
< cpuid
->nent
; i
++) {
1509 vcpu
->arch
.cpuid_entries
[i
].function
= cpuid_entries
[i
].function
;
1510 vcpu
->arch
.cpuid_entries
[i
].eax
= cpuid_entries
[i
].eax
;
1511 vcpu
->arch
.cpuid_entries
[i
].ebx
= cpuid_entries
[i
].ebx
;
1512 vcpu
->arch
.cpuid_entries
[i
].ecx
= cpuid_entries
[i
].ecx
;
1513 vcpu
->arch
.cpuid_entries
[i
].edx
= cpuid_entries
[i
].edx
;
1514 vcpu
->arch
.cpuid_entries
[i
].index
= 0;
1515 vcpu
->arch
.cpuid_entries
[i
].flags
= 0;
1516 vcpu
->arch
.cpuid_entries
[i
].padding
[0] = 0;
1517 vcpu
->arch
.cpuid_entries
[i
].padding
[1] = 0;
1518 vcpu
->arch
.cpuid_entries
[i
].padding
[2] = 0;
1520 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1521 cpuid_fix_nx_cap(vcpu
);
1523 kvm_apic_set_version(vcpu
);
1526 vfree(cpuid_entries
);
1531 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu
*vcpu
,
1532 struct kvm_cpuid2
*cpuid
,
1533 struct kvm_cpuid_entry2 __user
*entries
)
1538 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1541 if (copy_from_user(&vcpu
->arch
.cpuid_entries
, entries
,
1542 cpuid
->nent
* sizeof(struct kvm_cpuid_entry2
)))
1544 vcpu
->arch
.cpuid_nent
= cpuid
->nent
;
1545 kvm_apic_set_version(vcpu
);
1552 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu
*vcpu
,
1553 struct kvm_cpuid2
*cpuid
,
1554 struct kvm_cpuid_entry2 __user
*entries
)
1559 if (cpuid
->nent
< vcpu
->arch
.cpuid_nent
)
1562 if (copy_to_user(entries
, &vcpu
->arch
.cpuid_entries
,
1563 vcpu
->arch
.cpuid_nent
* sizeof(struct kvm_cpuid_entry2
)))
1568 cpuid
->nent
= vcpu
->arch
.cpuid_nent
;
1572 static void do_cpuid_1_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1575 entry
->function
= function
;
1576 entry
->index
= index
;
1577 cpuid_count(entry
->function
, entry
->index
,
1578 &entry
->eax
, &entry
->ebx
, &entry
->ecx
, &entry
->edx
);
1582 #define F(x) bit(X86_FEATURE_##x)
1584 static void do_cpuid_ent(struct kvm_cpuid_entry2
*entry
, u32 function
,
1585 u32 index
, int *nent
, int maxnent
)
1587 unsigned f_nx
= is_efer_nx() ? F(NX
) : 0;
1588 unsigned f_gbpages
= kvm_x86_ops
->gb_page_enable() ? F(GBPAGES
) : 0;
1589 #ifdef CONFIG_X86_64
1590 unsigned f_lm
= F(LM
);
1596 const u32 kvm_supported_word0_x86_features
=
1597 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1598 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1599 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SEP
) |
1600 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1601 F(PAT
) | F(PSE36
) | 0 /* PSN */ | F(CLFLSH
) |
1602 0 /* Reserved, DS, ACPI */ | F(MMX
) |
1603 F(FXSR
) | F(XMM
) | F(XMM2
) | F(SELFSNOOP
) |
1604 0 /* HTT, TM, Reserved, PBE */;
1605 /* cpuid 0x80000001.edx */
1606 const u32 kvm_supported_word1_x86_features
=
1607 F(FPU
) | F(VME
) | F(DE
) | F(PSE
) |
1608 F(TSC
) | F(MSR
) | F(PAE
) | F(MCE
) |
1609 F(CX8
) | F(APIC
) | 0 /* Reserved */ | F(SYSCALL
) |
1610 F(MTRR
) | F(PGE
) | F(MCA
) | F(CMOV
) |
1611 F(PAT
) | F(PSE36
) | 0 /* Reserved */ |
1612 f_nx
| 0 /* Reserved */ | F(MMXEXT
) | F(MMX
) |
1613 F(FXSR
) | F(FXSR_OPT
) | f_gbpages
| 0 /* RDTSCP */ |
1614 0 /* Reserved */ | f_lm
| F(3DNOWEXT
) | F(3DNOW
);
1616 const u32 kvm_supported_word4_x86_features
=
1617 F(XMM3
) | 0 /* Reserved, DTES64, MONITOR */ |
1618 0 /* DS-CPL, VMX, SMX, EST */ |
1619 0 /* TM2 */ | F(SSSE3
) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
1620 0 /* Reserved */ | F(CX16
) | 0 /* xTPR Update, PDCM */ |
1621 0 /* Reserved, DCA */ | F(XMM4_1
) |
1622 F(XMM4_2
) | F(X2APIC
) | F(MOVBE
) | F(POPCNT
) |
1623 0 /* Reserved, XSAVE, OSXSAVE */;
1624 /* cpuid 0x80000001.ecx */
1625 const u32 kvm_supported_word6_x86_features
=
1626 F(LAHF_LM
) | F(CMP_LEGACY
) | F(SVM
) | 0 /* ExtApicSpace */ |
1627 F(CR8_LEGACY
) | F(ABM
) | F(SSE4A
) | F(MISALIGNSSE
) |
1628 F(3DNOWPREFETCH
) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5
) |
1629 0 /* SKINIT */ | 0 /* WDT */;
1631 /* all calls to cpuid_count() should be made on the same cpu */
1633 do_cpuid_1_ent(entry
, function
, index
);
1638 entry
->eax
= min(entry
->eax
, (u32
)0xb);
1641 entry
->edx
&= kvm_supported_word0_x86_features
;
1642 entry
->ecx
&= kvm_supported_word4_x86_features
;
1643 /* we support x2apic emulation even if host does not support
1644 * it since we emulate x2apic in software */
1645 entry
->ecx
|= F(X2APIC
);
1647 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1648 * may return different values. This forces us to get_cpu() before
1649 * issuing the first command, and also to emulate this annoying behavior
1650 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1652 int t
, times
= entry
->eax
& 0xff;
1654 entry
->flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1655 entry
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
1656 for (t
= 1; t
< times
&& *nent
< maxnent
; ++t
) {
1657 do_cpuid_1_ent(&entry
[t
], function
, 0);
1658 entry
[t
].flags
|= KVM_CPUID_FLAG_STATEFUL_FUNC
;
1663 /* function 4 and 0xb have additional index. */
1667 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1668 /* read more entries until cache_type is zero */
1669 for (i
= 1; *nent
< maxnent
; ++i
) {
1670 cache_type
= entry
[i
- 1].eax
& 0x1f;
1673 do_cpuid_1_ent(&entry
[i
], function
, i
);
1675 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1683 entry
->flags
|= KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1684 /* read more entries until level_type is zero */
1685 for (i
= 1; *nent
< maxnent
; ++i
) {
1686 level_type
= entry
[i
- 1].ecx
& 0xff00;
1689 do_cpuid_1_ent(&entry
[i
], function
, i
);
1691 KVM_CPUID_FLAG_SIGNIFCANT_INDEX
;
1697 entry
->eax
= min(entry
->eax
, 0x8000001a);
1700 entry
->edx
&= kvm_supported_word1_x86_features
;
1701 entry
->ecx
&= kvm_supported_word6_x86_features
;
1709 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2
*cpuid
,
1710 struct kvm_cpuid_entry2 __user
*entries
)
1712 struct kvm_cpuid_entry2
*cpuid_entries
;
1713 int limit
, nent
= 0, r
= -E2BIG
;
1716 if (cpuid
->nent
< 1)
1718 if (cpuid
->nent
> KVM_MAX_CPUID_ENTRIES
)
1719 cpuid
->nent
= KVM_MAX_CPUID_ENTRIES
;
1721 cpuid_entries
= vmalloc(sizeof(struct kvm_cpuid_entry2
) * cpuid
->nent
);
1725 do_cpuid_ent(&cpuid_entries
[0], 0, 0, &nent
, cpuid
->nent
);
1726 limit
= cpuid_entries
[0].eax
;
1727 for (func
= 1; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1728 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1729 &nent
, cpuid
->nent
);
1731 if (nent
>= cpuid
->nent
)
1734 do_cpuid_ent(&cpuid_entries
[nent
], 0x80000000, 0, &nent
, cpuid
->nent
);
1735 limit
= cpuid_entries
[nent
- 1].eax
;
1736 for (func
= 0x80000001; func
<= limit
&& nent
< cpuid
->nent
; ++func
)
1737 do_cpuid_ent(&cpuid_entries
[nent
], func
, 0,
1738 &nent
, cpuid
->nent
);
1740 if (nent
>= cpuid
->nent
)
1744 if (copy_to_user(entries
, cpuid_entries
,
1745 nent
* sizeof(struct kvm_cpuid_entry2
)))
1751 vfree(cpuid_entries
);
1756 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu
*vcpu
,
1757 struct kvm_lapic_state
*s
)
1760 memcpy(s
->regs
, vcpu
->arch
.apic
->regs
, sizeof *s
);
1766 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu
*vcpu
,
1767 struct kvm_lapic_state
*s
)
1770 memcpy(vcpu
->arch
.apic
->regs
, s
->regs
, sizeof *s
);
1771 kvm_apic_post_state_restore(vcpu
);
1772 update_cr8_intercept(vcpu
);
1778 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu
*vcpu
,
1779 struct kvm_interrupt
*irq
)
1781 if (irq
->irq
< 0 || irq
->irq
>= 256)
1783 if (irqchip_in_kernel(vcpu
->kvm
))
1787 kvm_queue_interrupt(vcpu
, irq
->irq
, false);
1794 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu
*vcpu
)
1797 kvm_inject_nmi(vcpu
);
1803 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu
*vcpu
,
1804 struct kvm_tpr_access_ctl
*tac
)
1808 vcpu
->arch
.tpr_access_reporting
= !!tac
->enabled
;
1812 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu
*vcpu
,
1816 unsigned bank_num
= mcg_cap
& 0xff, bank
;
1819 if (!bank_num
|| bank_num
>= KVM_MAX_MCE_BANKS
)
1821 if (mcg_cap
& ~(KVM_MCE_CAP_SUPPORTED
| 0xff | 0xff0000))
1824 vcpu
->arch
.mcg_cap
= mcg_cap
;
1825 /* Init IA32_MCG_CTL to all 1s */
1826 if (mcg_cap
& MCG_CTL_P
)
1827 vcpu
->arch
.mcg_ctl
= ~(u64
)0;
1828 /* Init IA32_MCi_CTL to all 1s */
1829 for (bank
= 0; bank
< bank_num
; bank
++)
1830 vcpu
->arch
.mce_banks
[bank
*4] = ~(u64
)0;
1835 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu
*vcpu
,
1836 struct kvm_x86_mce
*mce
)
1838 u64 mcg_cap
= vcpu
->arch
.mcg_cap
;
1839 unsigned bank_num
= mcg_cap
& 0xff;
1840 u64
*banks
= vcpu
->arch
.mce_banks
;
1842 if (mce
->bank
>= bank_num
|| !(mce
->status
& MCI_STATUS_VAL
))
1845 * if IA32_MCG_CTL is not all 1s, the uncorrected error
1846 * reporting is disabled
1848 if ((mce
->status
& MCI_STATUS_UC
) && (mcg_cap
& MCG_CTL_P
) &&
1849 vcpu
->arch
.mcg_ctl
!= ~(u64
)0)
1851 banks
+= 4 * mce
->bank
;
1853 * if IA32_MCi_CTL is not all 1s, the uncorrected error
1854 * reporting is disabled for the bank
1856 if ((mce
->status
& MCI_STATUS_UC
) && banks
[0] != ~(u64
)0)
1858 if (mce
->status
& MCI_STATUS_UC
) {
1859 if ((vcpu
->arch
.mcg_status
& MCG_STATUS_MCIP
) ||
1860 !(vcpu
->arch
.cr4
& X86_CR4_MCE
)) {
1861 printk(KERN_DEBUG
"kvm: set_mce: "
1862 "injects mce exception while "
1863 "previous one is in progress!\n");
1864 set_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
);
1867 if (banks
[1] & MCI_STATUS_VAL
)
1868 mce
->status
|= MCI_STATUS_OVER
;
1869 banks
[2] = mce
->addr
;
1870 banks
[3] = mce
->misc
;
1871 vcpu
->arch
.mcg_status
= mce
->mcg_status
;
1872 banks
[1] = mce
->status
;
1873 kvm_queue_exception(vcpu
, MC_VECTOR
);
1874 } else if (!(banks
[1] & MCI_STATUS_VAL
)
1875 || !(banks
[1] & MCI_STATUS_UC
)) {
1876 if (banks
[1] & MCI_STATUS_VAL
)
1877 mce
->status
|= MCI_STATUS_OVER
;
1878 banks
[2] = mce
->addr
;
1879 banks
[3] = mce
->misc
;
1880 banks
[1] = mce
->status
;
1882 banks
[1] |= MCI_STATUS_OVER
;
1886 long kvm_arch_vcpu_ioctl(struct file
*filp
,
1887 unsigned int ioctl
, unsigned long arg
)
1889 struct kvm_vcpu
*vcpu
= filp
->private_data
;
1890 void __user
*argp
= (void __user
*)arg
;
1892 struct kvm_lapic_state
*lapic
= NULL
;
1895 case KVM_GET_LAPIC
: {
1896 lapic
= kzalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1901 r
= kvm_vcpu_ioctl_get_lapic(vcpu
, lapic
);
1905 if (copy_to_user(argp
, lapic
, sizeof(struct kvm_lapic_state
)))
1910 case KVM_SET_LAPIC
: {
1911 lapic
= kmalloc(sizeof(struct kvm_lapic_state
), GFP_KERNEL
);
1916 if (copy_from_user(lapic
, argp
, sizeof(struct kvm_lapic_state
)))
1918 r
= kvm_vcpu_ioctl_set_lapic(vcpu
, lapic
);
1924 case KVM_INTERRUPT
: {
1925 struct kvm_interrupt irq
;
1928 if (copy_from_user(&irq
, argp
, sizeof irq
))
1930 r
= kvm_vcpu_ioctl_interrupt(vcpu
, &irq
);
1937 r
= kvm_vcpu_ioctl_nmi(vcpu
);
1943 case KVM_SET_CPUID
: {
1944 struct kvm_cpuid __user
*cpuid_arg
= argp
;
1945 struct kvm_cpuid cpuid
;
1948 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1950 r
= kvm_vcpu_ioctl_set_cpuid(vcpu
, &cpuid
, cpuid_arg
->entries
);
1955 case KVM_SET_CPUID2
: {
1956 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1957 struct kvm_cpuid2 cpuid
;
1960 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1962 r
= kvm_vcpu_ioctl_set_cpuid2(vcpu
, &cpuid
,
1963 cpuid_arg
->entries
);
1968 case KVM_GET_CPUID2
: {
1969 struct kvm_cpuid2 __user
*cpuid_arg
= argp
;
1970 struct kvm_cpuid2 cpuid
;
1973 if (copy_from_user(&cpuid
, cpuid_arg
, sizeof cpuid
))
1975 r
= kvm_vcpu_ioctl_get_cpuid2(vcpu
, &cpuid
,
1976 cpuid_arg
->entries
);
1980 if (copy_to_user(cpuid_arg
, &cpuid
, sizeof cpuid
))
1986 r
= msr_io(vcpu
, argp
, kvm_get_msr
, 1);
1989 r
= msr_io(vcpu
, argp
, do_set_msr
, 0);
1991 case KVM_TPR_ACCESS_REPORTING
: {
1992 struct kvm_tpr_access_ctl tac
;
1995 if (copy_from_user(&tac
, argp
, sizeof tac
))
1997 r
= vcpu_ioctl_tpr_access_reporting(vcpu
, &tac
);
2001 if (copy_to_user(argp
, &tac
, sizeof tac
))
2006 case KVM_SET_VAPIC_ADDR
: {
2007 struct kvm_vapic_addr va
;
2010 if (!irqchip_in_kernel(vcpu
->kvm
))
2013 if (copy_from_user(&va
, argp
, sizeof va
))
2016 kvm_lapic_set_vapic_addr(vcpu
, va
.vapic_addr
);
2019 case KVM_X86_SETUP_MCE
: {
2023 if (copy_from_user(&mcg_cap
, argp
, sizeof mcg_cap
))
2025 r
= kvm_vcpu_ioctl_x86_setup_mce(vcpu
, mcg_cap
);
2028 case KVM_X86_SET_MCE
: {
2029 struct kvm_x86_mce mce
;
2032 if (copy_from_user(&mce
, argp
, sizeof mce
))
2034 r
= kvm_vcpu_ioctl_x86_set_mce(vcpu
, &mce
);
2045 static int kvm_vm_ioctl_set_tss_addr(struct kvm
*kvm
, unsigned long addr
)
2049 if (addr
> (unsigned int)(-3 * PAGE_SIZE
))
2051 ret
= kvm_x86_ops
->set_tss_addr(kvm
, addr
);
2055 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm
*kvm
,
2058 kvm
->arch
.ept_identity_map_addr
= ident_addr
;
2062 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm
*kvm
,
2063 u32 kvm_nr_mmu_pages
)
2065 if (kvm_nr_mmu_pages
< KVM_MIN_ALLOC_MMU_PAGES
)
2068 down_write(&kvm
->slots_lock
);
2069 spin_lock(&kvm
->mmu_lock
);
2071 kvm_mmu_change_mmu_pages(kvm
, kvm_nr_mmu_pages
);
2072 kvm
->arch
.n_requested_mmu_pages
= kvm_nr_mmu_pages
;
2074 spin_unlock(&kvm
->mmu_lock
);
2075 up_write(&kvm
->slots_lock
);
2079 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm
*kvm
)
2081 return kvm
->arch
.n_alloc_mmu_pages
;
2084 gfn_t
unalias_gfn(struct kvm
*kvm
, gfn_t gfn
)
2087 struct kvm_mem_alias
*alias
;
2089 for (i
= 0; i
< kvm
->arch
.naliases
; ++i
) {
2090 alias
= &kvm
->arch
.aliases
[i
];
2091 if (gfn
>= alias
->base_gfn
2092 && gfn
< alias
->base_gfn
+ alias
->npages
)
2093 return alias
->target_gfn
+ gfn
- alias
->base_gfn
;
2099 * Set a new alias region. Aliases map a portion of physical memory into
2100 * another portion. This is useful for memory windows, for example the PC
2103 static int kvm_vm_ioctl_set_memory_alias(struct kvm
*kvm
,
2104 struct kvm_memory_alias
*alias
)
2107 struct kvm_mem_alias
*p
;
2110 /* General sanity checks */
2111 if (alias
->memory_size
& (PAGE_SIZE
- 1))
2113 if (alias
->guest_phys_addr
& (PAGE_SIZE
- 1))
2115 if (alias
->slot
>= KVM_ALIAS_SLOTS
)
2117 if (alias
->guest_phys_addr
+ alias
->memory_size
2118 < alias
->guest_phys_addr
)
2120 if (alias
->target_phys_addr
+ alias
->memory_size
2121 < alias
->target_phys_addr
)
2124 down_write(&kvm
->slots_lock
);
2125 spin_lock(&kvm
->mmu_lock
);
2127 p
= &kvm
->arch
.aliases
[alias
->slot
];
2128 p
->base_gfn
= alias
->guest_phys_addr
>> PAGE_SHIFT
;
2129 p
->npages
= alias
->memory_size
>> PAGE_SHIFT
;
2130 p
->target_gfn
= alias
->target_phys_addr
>> PAGE_SHIFT
;
2132 for (n
= KVM_ALIAS_SLOTS
; n
> 0; --n
)
2133 if (kvm
->arch
.aliases
[n
- 1].npages
)
2135 kvm
->arch
.naliases
= n
;
2137 spin_unlock(&kvm
->mmu_lock
);
2138 kvm_mmu_zap_all(kvm
);
2140 up_write(&kvm
->slots_lock
);
2148 static int kvm_vm_ioctl_get_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2153 switch (chip
->chip_id
) {
2154 case KVM_IRQCHIP_PIC_MASTER
:
2155 memcpy(&chip
->chip
.pic
,
2156 &pic_irqchip(kvm
)->pics
[0],
2157 sizeof(struct kvm_pic_state
));
2159 case KVM_IRQCHIP_PIC_SLAVE
:
2160 memcpy(&chip
->chip
.pic
,
2161 &pic_irqchip(kvm
)->pics
[1],
2162 sizeof(struct kvm_pic_state
));
2164 case KVM_IRQCHIP_IOAPIC
:
2165 r
= kvm_get_ioapic(kvm
, &chip
->chip
.ioapic
);
2174 static int kvm_vm_ioctl_set_irqchip(struct kvm
*kvm
, struct kvm_irqchip
*chip
)
2179 switch (chip
->chip_id
) {
2180 case KVM_IRQCHIP_PIC_MASTER
:
2181 spin_lock(&pic_irqchip(kvm
)->lock
);
2182 memcpy(&pic_irqchip(kvm
)->pics
[0],
2184 sizeof(struct kvm_pic_state
));
2185 spin_unlock(&pic_irqchip(kvm
)->lock
);
2187 case KVM_IRQCHIP_PIC_SLAVE
:
2188 spin_lock(&pic_irqchip(kvm
)->lock
);
2189 memcpy(&pic_irqchip(kvm
)->pics
[1],
2191 sizeof(struct kvm_pic_state
));
2192 spin_unlock(&pic_irqchip(kvm
)->lock
);
2194 case KVM_IRQCHIP_IOAPIC
:
2195 r
= kvm_set_ioapic(kvm
, &chip
->chip
.ioapic
);
2201 kvm_pic_update_irq(pic_irqchip(kvm
));
2205 static int kvm_vm_ioctl_get_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2209 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2210 memcpy(ps
, &kvm
->arch
.vpit
->pit_state
, sizeof(struct kvm_pit_state
));
2211 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2215 static int kvm_vm_ioctl_set_pit(struct kvm
*kvm
, struct kvm_pit_state
*ps
)
2219 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2220 memcpy(&kvm
->arch
.vpit
->pit_state
, ps
, sizeof(struct kvm_pit_state
));
2221 kvm_pit_load_count(kvm
, 0, ps
->channels
[0].count
, 0);
2222 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2226 static int kvm_vm_ioctl_get_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2230 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2231 memcpy(ps
->channels
, &kvm
->arch
.vpit
->pit_state
.channels
,
2232 sizeof(ps
->channels
));
2233 ps
->flags
= kvm
->arch
.vpit
->pit_state
.flags
;
2234 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2238 static int kvm_vm_ioctl_set_pit2(struct kvm
*kvm
, struct kvm_pit_state2
*ps
)
2240 int r
= 0, start
= 0;
2241 u32 prev_legacy
, cur_legacy
;
2242 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2243 prev_legacy
= kvm
->arch
.vpit
->pit_state
.flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2244 cur_legacy
= ps
->flags
& KVM_PIT_FLAGS_HPET_LEGACY
;
2245 if (!prev_legacy
&& cur_legacy
)
2247 memcpy(&kvm
->arch
.vpit
->pit_state
.channels
, &ps
->channels
,
2248 sizeof(kvm
->arch
.vpit
->pit_state
.channels
));
2249 kvm
->arch
.vpit
->pit_state
.flags
= ps
->flags
;
2250 kvm_pit_load_count(kvm
, 0, kvm
->arch
.vpit
->pit_state
.channels
[0].count
, start
);
2251 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2255 static int kvm_vm_ioctl_reinject(struct kvm
*kvm
,
2256 struct kvm_reinject_control
*control
)
2258 if (!kvm
->arch
.vpit
)
2260 mutex_lock(&kvm
->arch
.vpit
->pit_state
.lock
);
2261 kvm
->arch
.vpit
->pit_state
.pit_timer
.reinject
= control
->pit_reinject
;
2262 mutex_unlock(&kvm
->arch
.vpit
->pit_state
.lock
);
2267 * Get (and clear) the dirty memory log for a memory slot.
2269 int kvm_vm_ioctl_get_dirty_log(struct kvm
*kvm
,
2270 struct kvm_dirty_log
*log
)
2274 struct kvm_memory_slot
*memslot
;
2277 down_write(&kvm
->slots_lock
);
2279 r
= kvm_get_dirty_log(kvm
, log
, &is_dirty
);
2283 /* If nothing is dirty, don't bother messing with page tables. */
2285 spin_lock(&kvm
->mmu_lock
);
2286 kvm_mmu_slot_remove_write_access(kvm
, log
->slot
);
2287 spin_unlock(&kvm
->mmu_lock
);
2288 memslot
= &kvm
->memslots
[log
->slot
];
2289 n
= ALIGN(memslot
->npages
, BITS_PER_LONG
) / 8;
2290 memset(memslot
->dirty_bitmap
, 0, n
);
2294 up_write(&kvm
->slots_lock
);
2298 long kvm_arch_vm_ioctl(struct file
*filp
,
2299 unsigned int ioctl
, unsigned long arg
)
2301 struct kvm
*kvm
= filp
->private_data
;
2302 void __user
*argp
= (void __user
*)arg
;
2305 * This union makes it completely explicit to gcc-3.x
2306 * that these two variables' stack usage should be
2307 * combined, not added together.
2310 struct kvm_pit_state ps
;
2311 struct kvm_pit_state2 ps2
;
2312 struct kvm_memory_alias alias
;
2313 struct kvm_pit_config pit_config
;
2317 case KVM_SET_TSS_ADDR
:
2318 r
= kvm_vm_ioctl_set_tss_addr(kvm
, arg
);
2322 case KVM_SET_IDENTITY_MAP_ADDR
: {
2326 if (copy_from_user(&ident_addr
, argp
, sizeof ident_addr
))
2328 r
= kvm_vm_ioctl_set_identity_map_addr(kvm
, ident_addr
);
2333 case KVM_SET_MEMORY_REGION
: {
2334 struct kvm_memory_region kvm_mem
;
2335 struct kvm_userspace_memory_region kvm_userspace_mem
;
2338 if (copy_from_user(&kvm_mem
, argp
, sizeof kvm_mem
))
2340 kvm_userspace_mem
.slot
= kvm_mem
.slot
;
2341 kvm_userspace_mem
.flags
= kvm_mem
.flags
;
2342 kvm_userspace_mem
.guest_phys_addr
= kvm_mem
.guest_phys_addr
;
2343 kvm_userspace_mem
.memory_size
= kvm_mem
.memory_size
;
2344 r
= kvm_vm_ioctl_set_memory_region(kvm
, &kvm_userspace_mem
, 0);
2349 case KVM_SET_NR_MMU_PAGES
:
2350 r
= kvm_vm_ioctl_set_nr_mmu_pages(kvm
, arg
);
2354 case KVM_GET_NR_MMU_PAGES
:
2355 r
= kvm_vm_ioctl_get_nr_mmu_pages(kvm
);
2357 case KVM_SET_MEMORY_ALIAS
:
2359 if (copy_from_user(&u
.alias
, argp
, sizeof(struct kvm_memory_alias
)))
2361 r
= kvm_vm_ioctl_set_memory_alias(kvm
, &u
.alias
);
2365 case KVM_CREATE_IRQCHIP
:
2367 kvm
->arch
.vpic
= kvm_create_pic(kvm
);
2368 if (kvm
->arch
.vpic
) {
2369 r
= kvm_ioapic_init(kvm
);
2371 kfree(kvm
->arch
.vpic
);
2372 kvm
->arch
.vpic
= NULL
;
2377 r
= kvm_setup_default_irq_routing(kvm
);
2379 kfree(kvm
->arch
.vpic
);
2380 kfree(kvm
->arch
.vioapic
);
2384 case KVM_CREATE_PIT
:
2385 u
.pit_config
.flags
= KVM_PIT_SPEAKER_DUMMY
;
2387 case KVM_CREATE_PIT2
:
2389 if (copy_from_user(&u
.pit_config
, argp
,
2390 sizeof(struct kvm_pit_config
)))
2393 down_write(&kvm
->slots_lock
);
2396 goto create_pit_unlock
;
2398 kvm
->arch
.vpit
= kvm_create_pit(kvm
, u
.pit_config
.flags
);
2402 up_write(&kvm
->slots_lock
);
2404 case KVM_IRQ_LINE_STATUS
:
2405 case KVM_IRQ_LINE
: {
2406 struct kvm_irq_level irq_event
;
2409 if (copy_from_user(&irq_event
, argp
, sizeof irq_event
))
2411 if (irqchip_in_kernel(kvm
)) {
2413 status
= kvm_set_irq(kvm
, KVM_USERSPACE_IRQ_SOURCE_ID
,
2414 irq_event
.irq
, irq_event
.level
);
2415 if (ioctl
== KVM_IRQ_LINE_STATUS
) {
2416 irq_event
.status
= status
;
2417 if (copy_to_user(argp
, &irq_event
,
2425 case KVM_GET_IRQCHIP
: {
2426 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2427 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2433 if (copy_from_user(chip
, argp
, sizeof *chip
))
2434 goto get_irqchip_out
;
2436 if (!irqchip_in_kernel(kvm
))
2437 goto get_irqchip_out
;
2438 r
= kvm_vm_ioctl_get_irqchip(kvm
, chip
);
2440 goto get_irqchip_out
;
2442 if (copy_to_user(argp
, chip
, sizeof *chip
))
2443 goto get_irqchip_out
;
2451 case KVM_SET_IRQCHIP
: {
2452 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
2453 struct kvm_irqchip
*chip
= kmalloc(sizeof(*chip
), GFP_KERNEL
);
2459 if (copy_from_user(chip
, argp
, sizeof *chip
))
2460 goto set_irqchip_out
;
2462 if (!irqchip_in_kernel(kvm
))
2463 goto set_irqchip_out
;
2464 r
= kvm_vm_ioctl_set_irqchip(kvm
, chip
);
2466 goto set_irqchip_out
;
2476 if (copy_from_user(&u
.ps
, argp
, sizeof(struct kvm_pit_state
)))
2479 if (!kvm
->arch
.vpit
)
2481 r
= kvm_vm_ioctl_get_pit(kvm
, &u
.ps
);
2485 if (copy_to_user(argp
, &u
.ps
, sizeof(struct kvm_pit_state
)))
2492 if (copy_from_user(&u
.ps
, argp
, sizeof u
.ps
))
2495 if (!kvm
->arch
.vpit
)
2497 r
= kvm_vm_ioctl_set_pit(kvm
, &u
.ps
);
2503 case KVM_GET_PIT2
: {
2505 if (!kvm
->arch
.vpit
)
2507 r
= kvm_vm_ioctl_get_pit2(kvm
, &u
.ps2
);
2511 if (copy_to_user(argp
, &u
.ps2
, sizeof(u
.ps2
)))
2516 case KVM_SET_PIT2
: {
2518 if (copy_from_user(&u
.ps2
, argp
, sizeof(u
.ps2
)))
2521 if (!kvm
->arch
.vpit
)
2523 r
= kvm_vm_ioctl_set_pit2(kvm
, &u
.ps2
);
2529 case KVM_REINJECT_CONTROL
: {
2530 struct kvm_reinject_control control
;
2532 if (copy_from_user(&control
, argp
, sizeof(control
)))
2534 r
= kvm_vm_ioctl_reinject(kvm
, &control
);
2540 case KVM_XEN_HVM_CONFIG
: {
2542 if (copy_from_user(&kvm
->arch
.xen_hvm_config
, argp
,
2543 sizeof(struct kvm_xen_hvm_config
)))
2546 if (kvm
->arch
.xen_hvm_config
.flags
)
2551 case KVM_SET_CLOCK
: {
2552 struct timespec now
;
2553 struct kvm_clock_data user_ns
;
2558 if (copy_from_user(&user_ns
, argp
, sizeof(user_ns
)))
2567 now_ns
= timespec_to_ns(&now
);
2568 delta
= user_ns
.clock
- now_ns
;
2569 kvm
->arch
.kvmclock_offset
= delta
;
2572 case KVM_GET_CLOCK
: {
2573 struct timespec now
;
2574 struct kvm_clock_data user_ns
;
2578 now_ns
= timespec_to_ns(&now
);
2579 user_ns
.clock
= kvm
->arch
.kvmclock_offset
+ now_ns
;
2583 if (copy_to_user(argp
, &user_ns
, sizeof(user_ns
)))
2596 static void kvm_init_msr_list(void)
2601 /* skip the first msrs in the list. KVM-specific */
2602 for (i
= j
= KVM_SAVE_MSRS_BEGIN
; i
< ARRAY_SIZE(msrs_to_save
); i
++) {
2603 if (rdmsr_safe(msrs_to_save
[i
], &dummy
[0], &dummy
[1]) < 0)
2606 msrs_to_save
[j
] = msrs_to_save
[i
];
2609 num_msrs_to_save
= j
;
2612 static int vcpu_mmio_write(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
,
2615 if (vcpu
->arch
.apic
&&
2616 !kvm_iodevice_write(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2619 return kvm_io_bus_write(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2622 static int vcpu_mmio_read(struct kvm_vcpu
*vcpu
, gpa_t addr
, int len
, void *v
)
2624 if (vcpu
->arch
.apic
&&
2625 !kvm_iodevice_read(&vcpu
->arch
.apic
->dev
, addr
, len
, v
))
2628 return kvm_io_bus_read(&vcpu
->kvm
->mmio_bus
, addr
, len
, v
);
2631 static int kvm_read_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2632 struct kvm_vcpu
*vcpu
)
2635 int r
= X86EMUL_CONTINUE
;
2638 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2639 unsigned offset
= addr
& (PAGE_SIZE
-1);
2640 unsigned toread
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2643 if (gpa
== UNMAPPED_GVA
) {
2644 r
= X86EMUL_PROPAGATE_FAULT
;
2647 ret
= kvm_read_guest(vcpu
->kvm
, gpa
, data
, toread
);
2649 r
= X86EMUL_UNHANDLEABLE
;
2661 static int kvm_write_guest_virt(gva_t addr
, void *val
, unsigned int bytes
,
2662 struct kvm_vcpu
*vcpu
)
2665 int r
= X86EMUL_CONTINUE
;
2668 gpa_t gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2669 unsigned offset
= addr
& (PAGE_SIZE
-1);
2670 unsigned towrite
= min(bytes
, (unsigned)PAGE_SIZE
- offset
);
2673 if (gpa
== UNMAPPED_GVA
) {
2674 r
= X86EMUL_PROPAGATE_FAULT
;
2677 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, data
, towrite
);
2679 r
= X86EMUL_UNHANDLEABLE
;
2692 static int emulator_read_emulated(unsigned long addr
,
2695 struct kvm_vcpu
*vcpu
)
2699 if (vcpu
->mmio_read_completed
) {
2700 memcpy(val
, vcpu
->mmio_data
, bytes
);
2701 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
,
2702 vcpu
->mmio_phys_addr
, *(u64
*)val
);
2703 vcpu
->mmio_read_completed
= 0;
2704 return X86EMUL_CONTINUE
;
2707 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2709 /* For APIC access vmexit */
2710 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2713 if (kvm_read_guest_virt(addr
, val
, bytes
, vcpu
)
2714 == X86EMUL_CONTINUE
)
2715 return X86EMUL_CONTINUE
;
2716 if (gpa
== UNMAPPED_GVA
)
2717 return X86EMUL_PROPAGATE_FAULT
;
2721 * Is this MMIO handled locally?
2723 if (!vcpu_mmio_read(vcpu
, gpa
, bytes
, val
)) {
2724 trace_kvm_mmio(KVM_TRACE_MMIO_READ
, bytes
, gpa
, *(u64
*)val
);
2725 return X86EMUL_CONTINUE
;
2728 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED
, bytes
, gpa
, 0);
2730 vcpu
->mmio_needed
= 1;
2731 vcpu
->mmio_phys_addr
= gpa
;
2732 vcpu
->mmio_size
= bytes
;
2733 vcpu
->mmio_is_write
= 0;
2735 return X86EMUL_UNHANDLEABLE
;
2738 int emulator_write_phys(struct kvm_vcpu
*vcpu
, gpa_t gpa
,
2739 const void *val
, int bytes
)
2743 ret
= kvm_write_guest(vcpu
->kvm
, gpa
, val
, bytes
);
2746 kvm_mmu_pte_write(vcpu
, gpa
, val
, bytes
, 1);
2750 static int emulator_write_emulated_onepage(unsigned long addr
,
2753 struct kvm_vcpu
*vcpu
)
2757 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2759 if (gpa
== UNMAPPED_GVA
) {
2760 kvm_inject_page_fault(vcpu
, addr
, 2);
2761 return X86EMUL_PROPAGATE_FAULT
;
2764 /* For APIC access vmexit */
2765 if ((gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2768 if (emulator_write_phys(vcpu
, gpa
, val
, bytes
))
2769 return X86EMUL_CONTINUE
;
2772 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE
, bytes
, gpa
, *(u64
*)val
);
2774 * Is this MMIO handled locally?
2776 if (!vcpu_mmio_write(vcpu
, gpa
, bytes
, val
))
2777 return X86EMUL_CONTINUE
;
2779 vcpu
->mmio_needed
= 1;
2780 vcpu
->mmio_phys_addr
= gpa
;
2781 vcpu
->mmio_size
= bytes
;
2782 vcpu
->mmio_is_write
= 1;
2783 memcpy(vcpu
->mmio_data
, val
, bytes
);
2785 return X86EMUL_CONTINUE
;
2788 int emulator_write_emulated(unsigned long addr
,
2791 struct kvm_vcpu
*vcpu
)
2793 /* Crossing a page boundary? */
2794 if (((addr
+ bytes
- 1) ^ addr
) & PAGE_MASK
) {
2797 now
= -addr
& ~PAGE_MASK
;
2798 rc
= emulator_write_emulated_onepage(addr
, val
, now
, vcpu
);
2799 if (rc
!= X86EMUL_CONTINUE
)
2805 return emulator_write_emulated_onepage(addr
, val
, bytes
, vcpu
);
2807 EXPORT_SYMBOL_GPL(emulator_write_emulated
);
2809 static int emulator_cmpxchg_emulated(unsigned long addr
,
2813 struct kvm_vcpu
*vcpu
)
2815 printk_once(KERN_WARNING
"kvm: emulating exchange as write\n");
2816 #ifndef CONFIG_X86_64
2817 /* guests cmpxchg8b have to be emulated atomically */
2824 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, addr
);
2826 if (gpa
== UNMAPPED_GVA
||
2827 (gpa
& PAGE_MASK
) == APIC_DEFAULT_PHYS_BASE
)
2830 if (((gpa
+ bytes
- 1) & PAGE_MASK
) != (gpa
& PAGE_MASK
))
2835 page
= gfn_to_page(vcpu
->kvm
, gpa
>> PAGE_SHIFT
);
2837 kaddr
= kmap_atomic(page
, KM_USER0
);
2838 set_64bit((u64
*)(kaddr
+ offset_in_page(gpa
)), val
);
2839 kunmap_atomic(kaddr
, KM_USER0
);
2840 kvm_release_page_dirty(page
);
2845 return emulator_write_emulated(addr
, new, bytes
, vcpu
);
2848 static unsigned long get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
2850 return kvm_x86_ops
->get_segment_base(vcpu
, seg
);
2853 int emulate_invlpg(struct kvm_vcpu
*vcpu
, gva_t address
)
2855 kvm_mmu_invlpg(vcpu
, address
);
2856 return X86EMUL_CONTINUE
;
2859 int emulate_clts(struct kvm_vcpu
*vcpu
)
2861 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
& ~X86_CR0_TS
);
2862 return X86EMUL_CONTINUE
;
2865 int emulator_get_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long *dest
)
2867 struct kvm_vcpu
*vcpu
= ctxt
->vcpu
;
2871 *dest
= kvm_x86_ops
->get_dr(vcpu
, dr
);
2872 return X86EMUL_CONTINUE
;
2874 pr_unimpl(vcpu
, "%s: unexpected dr %u\n", __func__
, dr
);
2875 return X86EMUL_UNHANDLEABLE
;
2879 int emulator_set_dr(struct x86_emulate_ctxt
*ctxt
, int dr
, unsigned long value
)
2881 unsigned long mask
= (ctxt
->mode
== X86EMUL_MODE_PROT64
) ? ~0ULL : ~0U;
2884 kvm_x86_ops
->set_dr(ctxt
->vcpu
, dr
, value
& mask
, &exception
);
2886 /* FIXME: better handling */
2887 return X86EMUL_UNHANDLEABLE
;
2889 return X86EMUL_CONTINUE
;
2892 void kvm_report_emulation_failure(struct kvm_vcpu
*vcpu
, const char *context
)
2895 unsigned long rip
= kvm_rip_read(vcpu
);
2896 unsigned long rip_linear
;
2898 if (!printk_ratelimit())
2901 rip_linear
= rip
+ get_segment_base(vcpu
, VCPU_SREG_CS
);
2903 kvm_read_guest_virt(rip_linear
, (void *)opcodes
, 4, vcpu
);
2905 printk(KERN_ERR
"emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2906 context
, rip
, opcodes
[0], opcodes
[1], opcodes
[2], opcodes
[3]);
2908 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure
);
2910 static struct x86_emulate_ops emulate_ops
= {
2911 .read_std
= kvm_read_guest_virt
,
2912 .read_emulated
= emulator_read_emulated
,
2913 .write_emulated
= emulator_write_emulated
,
2914 .cmpxchg_emulated
= emulator_cmpxchg_emulated
,
2917 static void cache_all_regs(struct kvm_vcpu
*vcpu
)
2919 kvm_register_read(vcpu
, VCPU_REGS_RAX
);
2920 kvm_register_read(vcpu
, VCPU_REGS_RSP
);
2921 kvm_register_read(vcpu
, VCPU_REGS_RIP
);
2922 vcpu
->arch
.regs_dirty
= ~0;
2925 int emulate_instruction(struct kvm_vcpu
*vcpu
,
2931 struct decode_cache
*c
;
2932 struct kvm_run
*run
= vcpu
->run
;
2934 kvm_clear_exception_queue(vcpu
);
2935 vcpu
->arch
.mmio_fault_cr2
= cr2
;
2937 * TODO: fix emulate.c to use guest_read/write_register
2938 * instead of direct ->regs accesses, can save hundred cycles
2939 * on Intel for instructions that don't read/change RSP, for
2942 cache_all_regs(vcpu
);
2944 vcpu
->mmio_is_write
= 0;
2945 vcpu
->arch
.pio
.string
= 0;
2947 if (!(emulation_type
& EMULTYPE_NO_DECODE
)) {
2949 kvm_x86_ops
->get_cs_db_l_bits(vcpu
, &cs_db
, &cs_l
);
2951 vcpu
->arch
.emulate_ctxt
.vcpu
= vcpu
;
2952 vcpu
->arch
.emulate_ctxt
.eflags
= kvm_get_rflags(vcpu
);
2953 vcpu
->arch
.emulate_ctxt
.mode
=
2954 (vcpu
->arch
.emulate_ctxt
.eflags
& X86_EFLAGS_VM
)
2955 ? X86EMUL_MODE_REAL
: cs_l
2956 ? X86EMUL_MODE_PROT64
: cs_db
2957 ? X86EMUL_MODE_PROT32
: X86EMUL_MODE_PROT16
;
2959 r
= x86_decode_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
2961 /* Only allow emulation of specific instructions on #UD
2962 * (namely VMMCALL, sysenter, sysexit, syscall)*/
2963 c
= &vcpu
->arch
.emulate_ctxt
.decode
;
2964 if (emulation_type
& EMULTYPE_TRAP_UD
) {
2966 return EMULATE_FAIL
;
2968 case 0x01: /* VMMCALL */
2969 if (c
->modrm_mod
!= 3 || c
->modrm_rm
!= 1)
2970 return EMULATE_FAIL
;
2972 case 0x34: /* sysenter */
2973 case 0x35: /* sysexit */
2974 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2975 return EMULATE_FAIL
;
2977 case 0x05: /* syscall */
2978 if (c
->modrm_mod
!= 0 || c
->modrm_rm
!= 0)
2979 return EMULATE_FAIL
;
2982 return EMULATE_FAIL
;
2985 if (!(c
->modrm_reg
== 0 || c
->modrm_reg
== 3))
2986 return EMULATE_FAIL
;
2989 ++vcpu
->stat
.insn_emulation
;
2991 ++vcpu
->stat
.insn_emulation_fail
;
2992 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
2993 return EMULATE_DONE
;
2994 return EMULATE_FAIL
;
2998 if (emulation_type
& EMULTYPE_SKIP
) {
2999 kvm_rip_write(vcpu
, vcpu
->arch
.emulate_ctxt
.decode
.eip
);
3000 return EMULATE_DONE
;
3003 r
= x86_emulate_insn(&vcpu
->arch
.emulate_ctxt
, &emulate_ops
);
3004 shadow_mask
= vcpu
->arch
.emulate_ctxt
.interruptibility
;
3007 kvm_x86_ops
->set_interrupt_shadow(vcpu
, shadow_mask
);
3009 if (vcpu
->arch
.pio
.string
)
3010 return EMULATE_DO_MMIO
;
3012 if ((r
|| vcpu
->mmio_is_write
) && run
) {
3013 run
->exit_reason
= KVM_EXIT_MMIO
;
3014 run
->mmio
.phys_addr
= vcpu
->mmio_phys_addr
;
3015 memcpy(run
->mmio
.data
, vcpu
->mmio_data
, 8);
3016 run
->mmio
.len
= vcpu
->mmio_size
;
3017 run
->mmio
.is_write
= vcpu
->mmio_is_write
;
3021 if (kvm_mmu_unprotect_page_virt(vcpu
, cr2
))
3022 return EMULATE_DONE
;
3023 if (!vcpu
->mmio_needed
) {
3024 kvm_report_emulation_failure(vcpu
, "mmio");
3025 return EMULATE_FAIL
;
3027 return EMULATE_DO_MMIO
;
3030 kvm_set_rflags(vcpu
, vcpu
->arch
.emulate_ctxt
.eflags
);
3032 if (vcpu
->mmio_is_write
) {
3033 vcpu
->mmio_needed
= 0;
3034 return EMULATE_DO_MMIO
;
3037 return EMULATE_DONE
;
3039 EXPORT_SYMBOL_GPL(emulate_instruction
);
3041 static int pio_copy_data(struct kvm_vcpu
*vcpu
)
3043 void *p
= vcpu
->arch
.pio_data
;
3044 gva_t q
= vcpu
->arch
.pio
.guest_gva
;
3048 bytes
= vcpu
->arch
.pio
.size
* vcpu
->arch
.pio
.cur_count
;
3049 if (vcpu
->arch
.pio
.in
)
3050 ret
= kvm_write_guest_virt(q
, p
, bytes
, vcpu
);
3052 ret
= kvm_read_guest_virt(q
, p
, bytes
, vcpu
);
3056 int complete_pio(struct kvm_vcpu
*vcpu
)
3058 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3065 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3066 memcpy(&val
, vcpu
->arch
.pio_data
, io
->size
);
3067 kvm_register_write(vcpu
, VCPU_REGS_RAX
, val
);
3071 r
= pio_copy_data(vcpu
);
3078 delta
*= io
->cur_count
;
3080 * The size of the register should really depend on
3081 * current address size.
3083 val
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3085 kvm_register_write(vcpu
, VCPU_REGS_RCX
, val
);
3091 val
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
3093 kvm_register_write(vcpu
, VCPU_REGS_RDI
, val
);
3095 val
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3097 kvm_register_write(vcpu
, VCPU_REGS_RSI
, val
);
3101 io
->count
-= io
->cur_count
;
3107 static int kernel_pio(struct kvm_vcpu
*vcpu
, void *pd
)
3109 /* TODO: String I/O for in kernel device */
3112 if (vcpu
->arch
.pio
.in
)
3113 r
= kvm_io_bus_read(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3114 vcpu
->arch
.pio
.size
, pd
);
3116 r
= kvm_io_bus_write(&vcpu
->kvm
->pio_bus
, vcpu
->arch
.pio
.port
,
3117 vcpu
->arch
.pio
.size
, pd
);
3121 static int pio_string_write(struct kvm_vcpu
*vcpu
)
3123 struct kvm_pio_request
*io
= &vcpu
->arch
.pio
;
3124 void *pd
= vcpu
->arch
.pio_data
;
3127 for (i
= 0; i
< io
->cur_count
; i
++) {
3128 if (kvm_io_bus_write(&vcpu
->kvm
->pio_bus
,
3129 io
->port
, io
->size
, pd
)) {
3138 int kvm_emulate_pio(struct kvm_vcpu
*vcpu
, int in
, int size
, unsigned port
)
3142 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3143 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3144 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3145 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3146 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= 1;
3147 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3148 vcpu
->arch
.pio
.in
= in
;
3149 vcpu
->arch
.pio
.string
= 0;
3150 vcpu
->arch
.pio
.down
= 0;
3151 vcpu
->arch
.pio
.rep
= 0;
3153 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3156 val
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3157 memcpy(vcpu
->arch
.pio_data
, &val
, 4);
3159 if (!kernel_pio(vcpu
, vcpu
->arch
.pio_data
)) {
3165 EXPORT_SYMBOL_GPL(kvm_emulate_pio
);
3167 int kvm_emulate_pio_string(struct kvm_vcpu
*vcpu
, int in
,
3168 int size
, unsigned long count
, int down
,
3169 gva_t address
, int rep
, unsigned port
)
3171 unsigned now
, in_page
;
3174 vcpu
->run
->exit_reason
= KVM_EXIT_IO
;
3175 vcpu
->run
->io
.direction
= in
? KVM_EXIT_IO_IN
: KVM_EXIT_IO_OUT
;
3176 vcpu
->run
->io
.size
= vcpu
->arch
.pio
.size
= size
;
3177 vcpu
->run
->io
.data_offset
= KVM_PIO_PAGE_OFFSET
* PAGE_SIZE
;
3178 vcpu
->run
->io
.count
= vcpu
->arch
.pio
.count
= vcpu
->arch
.pio
.cur_count
= count
;
3179 vcpu
->run
->io
.port
= vcpu
->arch
.pio
.port
= port
;
3180 vcpu
->arch
.pio
.in
= in
;
3181 vcpu
->arch
.pio
.string
= 1;
3182 vcpu
->arch
.pio
.down
= down
;
3183 vcpu
->arch
.pio
.rep
= rep
;
3185 trace_kvm_pio(vcpu
->run
->io
.direction
== KVM_EXIT_IO_OUT
, port
,
3189 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3194 in_page
= PAGE_SIZE
- offset_in_page(address
);
3196 in_page
= offset_in_page(address
) + size
;
3197 now
= min(count
, (unsigned long)in_page
/ size
);
3202 * String I/O in reverse. Yuck. Kill the guest, fix later.
3204 pr_unimpl(vcpu
, "guest string pio down\n");
3205 kvm_inject_gp(vcpu
, 0);
3208 vcpu
->run
->io
.count
= now
;
3209 vcpu
->arch
.pio
.cur_count
= now
;
3211 if (vcpu
->arch
.pio
.cur_count
== vcpu
->arch
.pio
.count
)
3212 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3214 vcpu
->arch
.pio
.guest_gva
= address
;
3216 if (!vcpu
->arch
.pio
.in
) {
3217 /* string PIO write */
3218 ret
= pio_copy_data(vcpu
);
3219 if (ret
== X86EMUL_PROPAGATE_FAULT
) {
3220 kvm_inject_gp(vcpu
, 0);
3223 if (ret
== 0 && !pio_string_write(vcpu
)) {
3225 if (vcpu
->arch
.pio
.count
== 0)
3229 /* no string PIO read support yet */
3233 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string
);
3235 static void bounce_off(void *info
)
3240 static int kvmclock_cpufreq_notifier(struct notifier_block
*nb
, unsigned long val
,
3243 struct cpufreq_freqs
*freq
= data
;
3245 struct kvm_vcpu
*vcpu
;
3246 int i
, send_ipi
= 0;
3248 if (val
== CPUFREQ_PRECHANGE
&& freq
->old
> freq
->new)
3250 if (val
== CPUFREQ_POSTCHANGE
&& freq
->old
< freq
->new)
3252 per_cpu(cpu_tsc_khz
, freq
->cpu
) = freq
->new;
3254 spin_lock(&kvm_lock
);
3255 list_for_each_entry(kvm
, &vm_list
, vm_list
) {
3256 kvm_for_each_vcpu(i
, vcpu
, kvm
) {
3257 if (vcpu
->cpu
!= freq
->cpu
)
3259 if (!kvm_request_guest_time_update(vcpu
))
3261 if (vcpu
->cpu
!= smp_processor_id())
3265 spin_unlock(&kvm_lock
);
3267 if (freq
->old
< freq
->new && send_ipi
) {
3269 * We upscale the frequency. Must make the guest
3270 * doesn't see old kvmclock values while running with
3271 * the new frequency, otherwise we risk the guest sees
3272 * time go backwards.
3274 * In case we update the frequency for another cpu
3275 * (which might be in guest context) send an interrupt
3276 * to kick the cpu out of guest context. Next time
3277 * guest context is entered kvmclock will be updated,
3278 * so the guest will not see stale values.
3280 smp_call_function_single(freq
->cpu
, bounce_off
, NULL
, 1);
3285 static struct notifier_block kvmclock_cpufreq_notifier_block
= {
3286 .notifier_call
= kvmclock_cpufreq_notifier
3289 static void kvm_timer_init(void)
3293 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
3294 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block
,
3295 CPUFREQ_TRANSITION_NOTIFIER
);
3296 for_each_online_cpu(cpu
) {
3297 unsigned long khz
= cpufreq_get(cpu
);
3300 per_cpu(cpu_tsc_khz
, cpu
) = khz
;
3303 for_each_possible_cpu(cpu
)
3304 per_cpu(cpu_tsc_khz
, cpu
) = tsc_khz
;
3308 int kvm_arch_init(void *opaque
)
3311 struct kvm_x86_ops
*ops
= (struct kvm_x86_ops
*)opaque
;
3314 printk(KERN_ERR
"kvm: already loaded the other module\n");
3319 if (!ops
->cpu_has_kvm_support()) {
3320 printk(KERN_ERR
"kvm: no hardware support\n");
3324 if (ops
->disabled_by_bios()) {
3325 printk(KERN_ERR
"kvm: disabled by bios\n");
3330 r
= kvm_mmu_module_init();
3334 kvm_init_msr_list();
3337 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
3338 kvm_mmu_set_base_ptes(PT_PRESENT_MASK
);
3339 kvm_mmu_set_mask_ptes(PT_USER_MASK
, PT_ACCESSED_MASK
,
3340 PT_DIRTY_MASK
, PT64_NX_MASK
, 0);
3350 void kvm_arch_exit(void)
3352 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
))
3353 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block
,
3354 CPUFREQ_TRANSITION_NOTIFIER
);
3356 kvm_mmu_module_exit();
3359 int kvm_emulate_halt(struct kvm_vcpu
*vcpu
)
3361 ++vcpu
->stat
.halt_exits
;
3362 if (irqchip_in_kernel(vcpu
->kvm
)) {
3363 vcpu
->arch
.mp_state
= KVM_MP_STATE_HALTED
;
3366 vcpu
->run
->exit_reason
= KVM_EXIT_HLT
;
3370 EXPORT_SYMBOL_GPL(kvm_emulate_halt
);
3372 static inline gpa_t
hc_gpa(struct kvm_vcpu
*vcpu
, unsigned long a0
,
3375 if (is_long_mode(vcpu
))
3378 return a0
| ((gpa_t
)a1
<< 32);
3381 int kvm_emulate_hypercall(struct kvm_vcpu
*vcpu
)
3383 unsigned long nr
, a0
, a1
, a2
, a3
, ret
;
3386 nr
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3387 a0
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3388 a1
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3389 a2
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
3390 a3
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
3392 trace_kvm_hypercall(nr
, a0
, a1
, a2
, a3
);
3394 if (!is_long_mode(vcpu
)) {
3402 if (kvm_x86_ops
->get_cpl(vcpu
) != 0) {
3408 case KVM_HC_VAPIC_POLL_IRQ
:
3412 r
= kvm_pv_mmu_op(vcpu
, a0
, hc_gpa(vcpu
, a1
, a2
), &ret
);
3419 kvm_register_write(vcpu
, VCPU_REGS_RAX
, ret
);
3420 ++vcpu
->stat
.hypercalls
;
3423 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall
);
3425 int kvm_fix_hypercall(struct kvm_vcpu
*vcpu
)
3427 char instruction
[3];
3429 unsigned long rip
= kvm_rip_read(vcpu
);
3433 * Blow out the MMU to ensure that no other VCPU has an active mapping
3434 * to ensure that the updated hypercall appears atomically across all
3437 kvm_mmu_zap_all(vcpu
->kvm
);
3439 kvm_x86_ops
->patch_hypercall(vcpu
, instruction
);
3440 if (emulator_write_emulated(rip
, instruction
, 3, vcpu
)
3441 != X86EMUL_CONTINUE
)
3447 static u64
mk_cr_64(u64 curr_cr
, u32 new_val
)
3449 return (curr_cr
& ~((1ULL << 32) - 1)) | new_val
;
3452 void realmode_lgdt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3454 struct descriptor_table dt
= { limit
, base
};
3456 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
3459 void realmode_lidt(struct kvm_vcpu
*vcpu
, u16 limit
, unsigned long base
)
3461 struct descriptor_table dt
= { limit
, base
};
3463 kvm_x86_ops
->set_idt(vcpu
, &dt
);
3466 void realmode_lmsw(struct kvm_vcpu
*vcpu
, unsigned long msw
,
3467 unsigned long *rflags
)
3469 kvm_lmsw(vcpu
, msw
);
3470 *rflags
= kvm_get_rflags(vcpu
);
3473 unsigned long realmode_get_cr(struct kvm_vcpu
*vcpu
, int cr
)
3475 unsigned long value
;
3477 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
3480 value
= vcpu
->arch
.cr0
;
3483 value
= vcpu
->arch
.cr2
;
3486 value
= vcpu
->arch
.cr3
;
3489 value
= vcpu
->arch
.cr4
;
3492 value
= kvm_get_cr8(vcpu
);
3495 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3502 void realmode_set_cr(struct kvm_vcpu
*vcpu
, int cr
, unsigned long val
,
3503 unsigned long *rflags
)
3507 kvm_set_cr0(vcpu
, mk_cr_64(vcpu
->arch
.cr0
, val
));
3508 *rflags
= kvm_get_rflags(vcpu
);
3511 vcpu
->arch
.cr2
= val
;
3514 kvm_set_cr3(vcpu
, val
);
3517 kvm_set_cr4(vcpu
, mk_cr_64(vcpu
->arch
.cr4
, val
));
3520 kvm_set_cr8(vcpu
, val
& 0xfUL
);
3523 vcpu_printf(vcpu
, "%s: unexpected cr %u\n", __func__
, cr
);
3527 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu
*vcpu
, int i
)
3529 struct kvm_cpuid_entry2
*e
= &vcpu
->arch
.cpuid_entries
[i
];
3530 int j
, nent
= vcpu
->arch
.cpuid_nent
;
3532 e
->flags
&= ~KVM_CPUID_FLAG_STATE_READ_NEXT
;
3533 /* when no next entry is found, the current entry[i] is reselected */
3534 for (j
= i
+ 1; ; j
= (j
+ 1) % nent
) {
3535 struct kvm_cpuid_entry2
*ej
= &vcpu
->arch
.cpuid_entries
[j
];
3536 if (ej
->function
== e
->function
) {
3537 ej
->flags
|= KVM_CPUID_FLAG_STATE_READ_NEXT
;
3541 return 0; /* silence gcc, even though control never reaches here */
3544 /* find an entry with matching function, matching index (if needed), and that
3545 * should be read next (if it's stateful) */
3546 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2
*e
,
3547 u32 function
, u32 index
)
3549 if (e
->function
!= function
)
3551 if ((e
->flags
& KVM_CPUID_FLAG_SIGNIFCANT_INDEX
) && e
->index
!= index
)
3553 if ((e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
) &&
3554 !(e
->flags
& KVM_CPUID_FLAG_STATE_READ_NEXT
))
3559 struct kvm_cpuid_entry2
*kvm_find_cpuid_entry(struct kvm_vcpu
*vcpu
,
3560 u32 function
, u32 index
)
3563 struct kvm_cpuid_entry2
*best
= NULL
;
3565 for (i
= 0; i
< vcpu
->arch
.cpuid_nent
; ++i
) {
3566 struct kvm_cpuid_entry2
*e
;
3568 e
= &vcpu
->arch
.cpuid_entries
[i
];
3569 if (is_matching_cpuid_entry(e
, function
, index
)) {
3570 if (e
->flags
& KVM_CPUID_FLAG_STATEFUL_FUNC
)
3571 move_to_next_stateful_cpuid_entry(vcpu
, i
);
3576 * Both basic or both extended?
3578 if (((e
->function
^ function
) & 0x80000000) == 0)
3579 if (!best
|| e
->function
> best
->function
)
3585 int cpuid_maxphyaddr(struct kvm_vcpu
*vcpu
)
3587 struct kvm_cpuid_entry2
*best
;
3589 best
= kvm_find_cpuid_entry(vcpu
, 0x80000008, 0);
3591 return best
->eax
& 0xff;
3595 void kvm_emulate_cpuid(struct kvm_vcpu
*vcpu
)
3597 u32 function
, index
;
3598 struct kvm_cpuid_entry2
*best
;
3600 function
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3601 index
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
3602 kvm_register_write(vcpu
, VCPU_REGS_RAX
, 0);
3603 kvm_register_write(vcpu
, VCPU_REGS_RBX
, 0);
3604 kvm_register_write(vcpu
, VCPU_REGS_RCX
, 0);
3605 kvm_register_write(vcpu
, VCPU_REGS_RDX
, 0);
3606 best
= kvm_find_cpuid_entry(vcpu
, function
, index
);
3608 kvm_register_write(vcpu
, VCPU_REGS_RAX
, best
->eax
);
3609 kvm_register_write(vcpu
, VCPU_REGS_RBX
, best
->ebx
);
3610 kvm_register_write(vcpu
, VCPU_REGS_RCX
, best
->ecx
);
3611 kvm_register_write(vcpu
, VCPU_REGS_RDX
, best
->edx
);
3613 kvm_x86_ops
->skip_emulated_instruction(vcpu
);
3614 trace_kvm_cpuid(function
,
3615 kvm_register_read(vcpu
, VCPU_REGS_RAX
),
3616 kvm_register_read(vcpu
, VCPU_REGS_RBX
),
3617 kvm_register_read(vcpu
, VCPU_REGS_RCX
),
3618 kvm_register_read(vcpu
, VCPU_REGS_RDX
));
3620 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid
);
3623 * Check if userspace requested an interrupt window, and that the
3624 * interrupt window is open.
3626 * No need to exit to userspace if we already have an interrupt queued.
3628 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
)
3630 return (!irqchip_in_kernel(vcpu
->kvm
) && !kvm_cpu_has_interrupt(vcpu
) &&
3631 vcpu
->run
->request_interrupt_window
&&
3632 kvm_arch_interrupt_allowed(vcpu
));
3635 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
)
3637 struct kvm_run
*kvm_run
= vcpu
->run
;
3639 kvm_run
->if_flag
= (kvm_get_rflags(vcpu
) & X86_EFLAGS_IF
) != 0;
3640 kvm_run
->cr8
= kvm_get_cr8(vcpu
);
3641 kvm_run
->apic_base
= kvm_get_apic_base(vcpu
);
3642 if (irqchip_in_kernel(vcpu
->kvm
))
3643 kvm_run
->ready_for_interrupt_injection
= 1;
3645 kvm_run
->ready_for_interrupt_injection
=
3646 kvm_arch_interrupt_allowed(vcpu
) &&
3647 !kvm_cpu_has_interrupt(vcpu
) &&
3648 !kvm_event_needs_reinjection(vcpu
);
3651 static void vapic_enter(struct kvm_vcpu
*vcpu
)
3653 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3656 if (!apic
|| !apic
->vapic_addr
)
3659 page
= gfn_to_page(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3661 vcpu
->arch
.apic
->vapic_page
= page
;
3664 static void vapic_exit(struct kvm_vcpu
*vcpu
)
3666 struct kvm_lapic
*apic
= vcpu
->arch
.apic
;
3668 if (!apic
|| !apic
->vapic_addr
)
3671 down_read(&vcpu
->kvm
->slots_lock
);
3672 kvm_release_page_dirty(apic
->vapic_page
);
3673 mark_page_dirty(vcpu
->kvm
, apic
->vapic_addr
>> PAGE_SHIFT
);
3674 up_read(&vcpu
->kvm
->slots_lock
);
3677 static void update_cr8_intercept(struct kvm_vcpu
*vcpu
)
3681 if (!kvm_x86_ops
->update_cr8_intercept
)
3684 if (!vcpu
->arch
.apic
)
3687 if (!vcpu
->arch
.apic
->vapic_addr
)
3688 max_irr
= kvm_lapic_find_highest_irr(vcpu
);
3695 tpr
= kvm_lapic_get_cr8(vcpu
);
3697 kvm_x86_ops
->update_cr8_intercept(vcpu
, tpr
, max_irr
);
3700 static void inject_pending_event(struct kvm_vcpu
*vcpu
)
3702 /* try to reinject previous events if any */
3703 if (vcpu
->arch
.exception
.pending
) {
3704 kvm_x86_ops
->queue_exception(vcpu
, vcpu
->arch
.exception
.nr
,
3705 vcpu
->arch
.exception
.has_error_code
,
3706 vcpu
->arch
.exception
.error_code
);
3710 if (vcpu
->arch
.nmi_injected
) {
3711 kvm_x86_ops
->set_nmi(vcpu
);
3715 if (vcpu
->arch
.interrupt
.pending
) {
3716 kvm_x86_ops
->set_irq(vcpu
);
3720 /* try to inject new event if pending */
3721 if (vcpu
->arch
.nmi_pending
) {
3722 if (kvm_x86_ops
->nmi_allowed(vcpu
)) {
3723 vcpu
->arch
.nmi_pending
= false;
3724 vcpu
->arch
.nmi_injected
= true;
3725 kvm_x86_ops
->set_nmi(vcpu
);
3727 } else if (kvm_cpu_has_interrupt(vcpu
)) {
3728 if (kvm_x86_ops
->interrupt_allowed(vcpu
)) {
3729 kvm_queue_interrupt(vcpu
, kvm_cpu_get_interrupt(vcpu
),
3731 kvm_x86_ops
->set_irq(vcpu
);
3736 static int vcpu_enter_guest(struct kvm_vcpu
*vcpu
)
3739 bool req_int_win
= !irqchip_in_kernel(vcpu
->kvm
) &&
3740 vcpu
->run
->request_interrupt_window
;
3743 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD
, &vcpu
->requests
))
3744 kvm_mmu_unload(vcpu
);
3746 r
= kvm_mmu_reload(vcpu
);
3750 if (vcpu
->requests
) {
3751 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER
, &vcpu
->requests
))
3752 __kvm_migrate_timers(vcpu
);
3753 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE
, &vcpu
->requests
))
3754 kvm_write_guest_time(vcpu
);
3755 if (test_and_clear_bit(KVM_REQ_MMU_SYNC
, &vcpu
->requests
))
3756 kvm_mmu_sync_roots(vcpu
);
3757 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH
, &vcpu
->requests
))
3758 kvm_x86_ops
->tlb_flush(vcpu
);
3759 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS
,
3761 vcpu
->run
->exit_reason
= KVM_EXIT_TPR_ACCESS
;
3765 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT
, &vcpu
->requests
)) {
3766 vcpu
->run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
3774 kvm_x86_ops
->prepare_guest_switch(vcpu
);
3775 kvm_load_guest_fpu(vcpu
);
3777 local_irq_disable();
3779 clear_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3780 smp_mb__after_clear_bit();
3782 if (vcpu
->requests
|| need_resched() || signal_pending(current
)) {
3783 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3790 inject_pending_event(vcpu
);
3792 /* enable NMI/IRQ window open exits if needed */
3793 if (vcpu
->arch
.nmi_pending
)
3794 kvm_x86_ops
->enable_nmi_window(vcpu
);
3795 else if (kvm_cpu_has_interrupt(vcpu
) || req_int_win
)
3796 kvm_x86_ops
->enable_irq_window(vcpu
);
3798 if (kvm_lapic_enabled(vcpu
)) {
3799 update_cr8_intercept(vcpu
);
3800 kvm_lapic_sync_to_vapic(vcpu
);
3803 up_read(&vcpu
->kvm
->slots_lock
);
3807 if (unlikely(vcpu
->arch
.switch_db_regs
)) {
3809 set_debugreg(vcpu
->arch
.eff_db
[0], 0);
3810 set_debugreg(vcpu
->arch
.eff_db
[1], 1);
3811 set_debugreg(vcpu
->arch
.eff_db
[2], 2);
3812 set_debugreg(vcpu
->arch
.eff_db
[3], 3);
3815 trace_kvm_entry(vcpu
->vcpu_id
);
3816 kvm_x86_ops
->run(vcpu
);
3818 if (unlikely(vcpu
->arch
.switch_db_regs
|| test_thread_flag(TIF_DEBUG
))) {
3819 set_debugreg(current
->thread
.debugreg0
, 0);
3820 set_debugreg(current
->thread
.debugreg1
, 1);
3821 set_debugreg(current
->thread
.debugreg2
, 2);
3822 set_debugreg(current
->thread
.debugreg3
, 3);
3823 set_debugreg(current
->thread
.debugreg6
, 6);
3824 set_debugreg(current
->thread
.debugreg7
, 7);
3827 set_bit(KVM_REQ_KICK
, &vcpu
->requests
);
3833 * We must have an instruction between local_irq_enable() and
3834 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3835 * the interrupt shadow. The stat.exits increment will do nicely.
3836 * But we need to prevent reordering, hence this barrier():
3844 down_read(&vcpu
->kvm
->slots_lock
);
3847 * Profile KVM exit RIPs:
3849 if (unlikely(prof_on
== KVM_PROFILING
)) {
3850 unsigned long rip
= kvm_rip_read(vcpu
);
3851 profile_hit(KVM_PROFILING
, (void *)rip
);
3855 kvm_lapic_sync_from_vapic(vcpu
);
3857 r
= kvm_x86_ops
->handle_exit(vcpu
);
3863 static int __vcpu_run(struct kvm_vcpu
*vcpu
)
3867 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
)) {
3868 pr_debug("vcpu %d received sipi with vector # %x\n",
3869 vcpu
->vcpu_id
, vcpu
->arch
.sipi_vector
);
3870 kvm_lapic_reset(vcpu
);
3871 r
= kvm_arch_vcpu_reset(vcpu
);
3874 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
3877 down_read(&vcpu
->kvm
->slots_lock
);
3882 if (vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
)
3883 r
= vcpu_enter_guest(vcpu
);
3885 up_read(&vcpu
->kvm
->slots_lock
);
3886 kvm_vcpu_block(vcpu
);
3887 down_read(&vcpu
->kvm
->slots_lock
);
3888 if (test_and_clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
))
3890 switch(vcpu
->arch
.mp_state
) {
3891 case KVM_MP_STATE_HALTED
:
3892 vcpu
->arch
.mp_state
=
3893 KVM_MP_STATE_RUNNABLE
;
3894 case KVM_MP_STATE_RUNNABLE
:
3896 case KVM_MP_STATE_SIPI_RECEIVED
:
3907 clear_bit(KVM_REQ_PENDING_TIMER
, &vcpu
->requests
);
3908 if (kvm_cpu_has_pending_timer(vcpu
))
3909 kvm_inject_pending_timer_irqs(vcpu
);
3911 if (dm_request_for_irq_injection(vcpu
)) {
3913 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3914 ++vcpu
->stat
.request_irq_exits
;
3916 if (signal_pending(current
)) {
3918 vcpu
->run
->exit_reason
= KVM_EXIT_INTR
;
3919 ++vcpu
->stat
.signal_exits
;
3921 if (need_resched()) {
3922 up_read(&vcpu
->kvm
->slots_lock
);
3924 down_read(&vcpu
->kvm
->slots_lock
);
3928 up_read(&vcpu
->kvm
->slots_lock
);
3929 post_kvm_run_save(vcpu
);
3936 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
3943 if (vcpu
->sigset_active
)
3944 sigprocmask(SIG_SETMASK
, &vcpu
->sigset
, &sigsaved
);
3946 if (unlikely(vcpu
->arch
.mp_state
== KVM_MP_STATE_UNINITIALIZED
)) {
3947 kvm_vcpu_block(vcpu
);
3948 clear_bit(KVM_REQ_UNHALT
, &vcpu
->requests
);
3953 /* re-sync apic's tpr */
3954 if (!irqchip_in_kernel(vcpu
->kvm
))
3955 kvm_set_cr8(vcpu
, kvm_run
->cr8
);
3957 if (vcpu
->arch
.pio
.cur_count
) {
3958 r
= complete_pio(vcpu
);
3962 if (vcpu
->mmio_needed
) {
3963 memcpy(vcpu
->mmio_data
, kvm_run
->mmio
.data
, 8);
3964 vcpu
->mmio_read_completed
= 1;
3965 vcpu
->mmio_needed
= 0;
3967 down_read(&vcpu
->kvm
->slots_lock
);
3968 r
= emulate_instruction(vcpu
, vcpu
->arch
.mmio_fault_cr2
, 0,
3969 EMULTYPE_NO_DECODE
);
3970 up_read(&vcpu
->kvm
->slots_lock
);
3971 if (r
== EMULATE_DO_MMIO
) {
3973 * Read-modify-write. Back to userspace.
3979 if (kvm_run
->exit_reason
== KVM_EXIT_HYPERCALL
)
3980 kvm_register_write(vcpu
, VCPU_REGS_RAX
,
3981 kvm_run
->hypercall
.ret
);
3983 r
= __vcpu_run(vcpu
);
3986 if (vcpu
->sigset_active
)
3987 sigprocmask(SIG_SETMASK
, &sigsaved
, NULL
);
3993 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
3997 regs
->rax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
3998 regs
->rbx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
3999 regs
->rcx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4000 regs
->rdx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4001 regs
->rsi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4002 regs
->rdi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4003 regs
->rsp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4004 regs
->rbp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4005 #ifdef CONFIG_X86_64
4006 regs
->r8
= kvm_register_read(vcpu
, VCPU_REGS_R8
);
4007 regs
->r9
= kvm_register_read(vcpu
, VCPU_REGS_R9
);
4008 regs
->r10
= kvm_register_read(vcpu
, VCPU_REGS_R10
);
4009 regs
->r11
= kvm_register_read(vcpu
, VCPU_REGS_R11
);
4010 regs
->r12
= kvm_register_read(vcpu
, VCPU_REGS_R12
);
4011 regs
->r13
= kvm_register_read(vcpu
, VCPU_REGS_R13
);
4012 regs
->r14
= kvm_register_read(vcpu
, VCPU_REGS_R14
);
4013 regs
->r15
= kvm_register_read(vcpu
, VCPU_REGS_R15
);
4016 regs
->rip
= kvm_rip_read(vcpu
);
4017 regs
->rflags
= kvm_get_rflags(vcpu
);
4024 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu
*vcpu
, struct kvm_regs
*regs
)
4028 kvm_register_write(vcpu
, VCPU_REGS_RAX
, regs
->rax
);
4029 kvm_register_write(vcpu
, VCPU_REGS_RBX
, regs
->rbx
);
4030 kvm_register_write(vcpu
, VCPU_REGS_RCX
, regs
->rcx
);
4031 kvm_register_write(vcpu
, VCPU_REGS_RDX
, regs
->rdx
);
4032 kvm_register_write(vcpu
, VCPU_REGS_RSI
, regs
->rsi
);
4033 kvm_register_write(vcpu
, VCPU_REGS_RDI
, regs
->rdi
);
4034 kvm_register_write(vcpu
, VCPU_REGS_RSP
, regs
->rsp
);
4035 kvm_register_write(vcpu
, VCPU_REGS_RBP
, regs
->rbp
);
4036 #ifdef CONFIG_X86_64
4037 kvm_register_write(vcpu
, VCPU_REGS_R8
, regs
->r8
);
4038 kvm_register_write(vcpu
, VCPU_REGS_R9
, regs
->r9
);
4039 kvm_register_write(vcpu
, VCPU_REGS_R10
, regs
->r10
);
4040 kvm_register_write(vcpu
, VCPU_REGS_R11
, regs
->r11
);
4041 kvm_register_write(vcpu
, VCPU_REGS_R12
, regs
->r12
);
4042 kvm_register_write(vcpu
, VCPU_REGS_R13
, regs
->r13
);
4043 kvm_register_write(vcpu
, VCPU_REGS_R14
, regs
->r14
);
4044 kvm_register_write(vcpu
, VCPU_REGS_R15
, regs
->r15
);
4047 kvm_rip_write(vcpu
, regs
->rip
);
4048 kvm_set_rflags(vcpu
, regs
->rflags
);
4050 vcpu
->arch
.exception
.pending
= false;
4057 void kvm_get_segment(struct kvm_vcpu
*vcpu
,
4058 struct kvm_segment
*var
, int seg
)
4060 kvm_x86_ops
->get_segment(vcpu
, var
, seg
);
4063 void kvm_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
4065 struct kvm_segment cs
;
4067 kvm_get_segment(vcpu
, &cs
, VCPU_SREG_CS
);
4071 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits
);
4073 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu
*vcpu
,
4074 struct kvm_sregs
*sregs
)
4076 struct descriptor_table dt
;
4080 kvm_get_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4081 kvm_get_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4082 kvm_get_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4083 kvm_get_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4084 kvm_get_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4085 kvm_get_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4087 kvm_get_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4088 kvm_get_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4090 kvm_x86_ops
->get_idt(vcpu
, &dt
);
4091 sregs
->idt
.limit
= dt
.limit
;
4092 sregs
->idt
.base
= dt
.base
;
4093 kvm_x86_ops
->get_gdt(vcpu
, &dt
);
4094 sregs
->gdt
.limit
= dt
.limit
;
4095 sregs
->gdt
.base
= dt
.base
;
4097 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4098 sregs
->cr0
= vcpu
->arch
.cr0
;
4099 sregs
->cr2
= vcpu
->arch
.cr2
;
4100 sregs
->cr3
= vcpu
->arch
.cr3
;
4101 sregs
->cr4
= vcpu
->arch
.cr4
;
4102 sregs
->cr8
= kvm_get_cr8(vcpu
);
4103 sregs
->efer
= vcpu
->arch
.shadow_efer
;
4104 sregs
->apic_base
= kvm_get_apic_base(vcpu
);
4106 memset(sregs
->interrupt_bitmap
, 0, sizeof sregs
->interrupt_bitmap
);
4108 if (vcpu
->arch
.interrupt
.pending
&& !vcpu
->arch
.interrupt
.soft
)
4109 set_bit(vcpu
->arch
.interrupt
.nr
,
4110 (unsigned long *)sregs
->interrupt_bitmap
);
4117 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu
*vcpu
,
4118 struct kvm_mp_state
*mp_state
)
4121 mp_state
->mp_state
= vcpu
->arch
.mp_state
;
4126 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu
*vcpu
,
4127 struct kvm_mp_state
*mp_state
)
4130 vcpu
->arch
.mp_state
= mp_state
->mp_state
;
4135 static void kvm_set_segment(struct kvm_vcpu
*vcpu
,
4136 struct kvm_segment
*var
, int seg
)
4138 kvm_x86_ops
->set_segment(vcpu
, var
, seg
);
4141 static void seg_desct_to_kvm_desct(struct desc_struct
*seg_desc
, u16 selector
,
4142 struct kvm_segment
*kvm_desct
)
4144 kvm_desct
->base
= get_desc_base(seg_desc
);
4145 kvm_desct
->limit
= get_desc_limit(seg_desc
);
4147 kvm_desct
->limit
<<= 12;
4148 kvm_desct
->limit
|= 0xfff;
4150 kvm_desct
->selector
= selector
;
4151 kvm_desct
->type
= seg_desc
->type
;
4152 kvm_desct
->present
= seg_desc
->p
;
4153 kvm_desct
->dpl
= seg_desc
->dpl
;
4154 kvm_desct
->db
= seg_desc
->d
;
4155 kvm_desct
->s
= seg_desc
->s
;
4156 kvm_desct
->l
= seg_desc
->l
;
4157 kvm_desct
->g
= seg_desc
->g
;
4158 kvm_desct
->avl
= seg_desc
->avl
;
4160 kvm_desct
->unusable
= 1;
4162 kvm_desct
->unusable
= 0;
4163 kvm_desct
->padding
= 0;
4166 static void get_segment_descriptor_dtable(struct kvm_vcpu
*vcpu
,
4168 struct descriptor_table
*dtable
)
4170 if (selector
& 1 << 2) {
4171 struct kvm_segment kvm_seg
;
4173 kvm_get_segment(vcpu
, &kvm_seg
, VCPU_SREG_LDTR
);
4175 if (kvm_seg
.unusable
)
4178 dtable
->limit
= kvm_seg
.limit
;
4179 dtable
->base
= kvm_seg
.base
;
4182 kvm_x86_ops
->get_gdt(vcpu
, dtable
);
4185 /* allowed just for 8 bytes segments */
4186 static int load_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4187 struct desc_struct
*seg_desc
)
4189 struct descriptor_table dtable
;
4190 u16 index
= selector
>> 3;
4192 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4194 if (dtable
.limit
< index
* 8 + 7) {
4195 kvm_queue_exception_e(vcpu
, GP_VECTOR
, selector
& 0xfffc);
4198 return kvm_read_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4201 /* allowed just for 8 bytes segments */
4202 static int save_guest_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4203 struct desc_struct
*seg_desc
)
4205 struct descriptor_table dtable
;
4206 u16 index
= selector
>> 3;
4208 get_segment_descriptor_dtable(vcpu
, selector
, &dtable
);
4210 if (dtable
.limit
< index
* 8 + 7)
4212 return kvm_write_guest_virt(dtable
.base
+ index
*8, seg_desc
, sizeof(*seg_desc
), vcpu
);
4215 static gpa_t
get_tss_base_addr(struct kvm_vcpu
*vcpu
,
4216 struct desc_struct
*seg_desc
)
4218 u32 base_addr
= get_desc_base(seg_desc
);
4220 return vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, base_addr
);
4223 static u16
get_segment_selector(struct kvm_vcpu
*vcpu
, int seg
)
4225 struct kvm_segment kvm_seg
;
4227 kvm_get_segment(vcpu
, &kvm_seg
, seg
);
4228 return kvm_seg
.selector
;
4231 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu
*vcpu
,
4233 struct kvm_segment
*kvm_seg
)
4235 struct desc_struct seg_desc
;
4237 if (load_guest_segment_descriptor(vcpu
, selector
, &seg_desc
))
4239 seg_desct_to_kvm_desct(&seg_desc
, selector
, kvm_seg
);
4243 static int kvm_load_realmode_segment(struct kvm_vcpu
*vcpu
, u16 selector
, int seg
)
4245 struct kvm_segment segvar
= {
4246 .base
= selector
<< 4,
4248 .selector
= selector
,
4259 kvm_x86_ops
->set_segment(vcpu
, &segvar
, seg
);
4263 static int is_vm86_segment(struct kvm_vcpu
*vcpu
, int seg
)
4265 return (seg
!= VCPU_SREG_LDTR
) &&
4266 (seg
!= VCPU_SREG_TR
) &&
4267 (kvm_get_rflags(vcpu
) & X86_EFLAGS_VM
);
4270 int kvm_load_segment_descriptor(struct kvm_vcpu
*vcpu
, u16 selector
,
4271 int type_bits
, int seg
)
4273 struct kvm_segment kvm_seg
;
4275 if (is_vm86_segment(vcpu
, seg
) || !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4276 return kvm_load_realmode_segment(vcpu
, selector
, seg
);
4277 if (load_segment_descriptor_to_kvm_desct(vcpu
, selector
, &kvm_seg
))
4279 kvm_seg
.type
|= type_bits
;
4281 if (seg
!= VCPU_SREG_SS
&& seg
!= VCPU_SREG_CS
&&
4282 seg
!= VCPU_SREG_LDTR
)
4284 kvm_seg
.unusable
= 1;
4286 kvm_set_segment(vcpu
, &kvm_seg
, seg
);
4290 static void save_state_to_tss32(struct kvm_vcpu
*vcpu
,
4291 struct tss_segment_32
*tss
)
4293 tss
->cr3
= vcpu
->arch
.cr3
;
4294 tss
->eip
= kvm_rip_read(vcpu
);
4295 tss
->eflags
= kvm_get_rflags(vcpu
);
4296 tss
->eax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4297 tss
->ecx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4298 tss
->edx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4299 tss
->ebx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4300 tss
->esp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4301 tss
->ebp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4302 tss
->esi
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4303 tss
->edi
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4304 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4305 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4306 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4307 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4308 tss
->fs
= get_segment_selector(vcpu
, VCPU_SREG_FS
);
4309 tss
->gs
= get_segment_selector(vcpu
, VCPU_SREG_GS
);
4310 tss
->ldt_selector
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4313 static int load_state_from_tss32(struct kvm_vcpu
*vcpu
,
4314 struct tss_segment_32
*tss
)
4316 kvm_set_cr3(vcpu
, tss
->cr3
);
4318 kvm_rip_write(vcpu
, tss
->eip
);
4319 kvm_set_rflags(vcpu
, tss
->eflags
| 2);
4321 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->eax
);
4322 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->ecx
);
4323 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->edx
);
4324 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->ebx
);
4325 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->esp
);
4326 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->ebp
);
4327 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->esi
);
4328 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->edi
);
4330 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt_selector
, 0, VCPU_SREG_LDTR
))
4333 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4336 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4339 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4342 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4345 if (kvm_load_segment_descriptor(vcpu
, tss
->fs
, 1, VCPU_SREG_FS
))
4348 if (kvm_load_segment_descriptor(vcpu
, tss
->gs
, 1, VCPU_SREG_GS
))
4353 static void save_state_to_tss16(struct kvm_vcpu
*vcpu
,
4354 struct tss_segment_16
*tss
)
4356 tss
->ip
= kvm_rip_read(vcpu
);
4357 tss
->flag
= kvm_get_rflags(vcpu
);
4358 tss
->ax
= kvm_register_read(vcpu
, VCPU_REGS_RAX
);
4359 tss
->cx
= kvm_register_read(vcpu
, VCPU_REGS_RCX
);
4360 tss
->dx
= kvm_register_read(vcpu
, VCPU_REGS_RDX
);
4361 tss
->bx
= kvm_register_read(vcpu
, VCPU_REGS_RBX
);
4362 tss
->sp
= kvm_register_read(vcpu
, VCPU_REGS_RSP
);
4363 tss
->bp
= kvm_register_read(vcpu
, VCPU_REGS_RBP
);
4364 tss
->si
= kvm_register_read(vcpu
, VCPU_REGS_RSI
);
4365 tss
->di
= kvm_register_read(vcpu
, VCPU_REGS_RDI
);
4367 tss
->es
= get_segment_selector(vcpu
, VCPU_SREG_ES
);
4368 tss
->cs
= get_segment_selector(vcpu
, VCPU_SREG_CS
);
4369 tss
->ss
= get_segment_selector(vcpu
, VCPU_SREG_SS
);
4370 tss
->ds
= get_segment_selector(vcpu
, VCPU_SREG_DS
);
4371 tss
->ldt
= get_segment_selector(vcpu
, VCPU_SREG_LDTR
);
4374 static int load_state_from_tss16(struct kvm_vcpu
*vcpu
,
4375 struct tss_segment_16
*tss
)
4377 kvm_rip_write(vcpu
, tss
->ip
);
4378 kvm_set_rflags(vcpu
, tss
->flag
| 2);
4379 kvm_register_write(vcpu
, VCPU_REGS_RAX
, tss
->ax
);
4380 kvm_register_write(vcpu
, VCPU_REGS_RCX
, tss
->cx
);
4381 kvm_register_write(vcpu
, VCPU_REGS_RDX
, tss
->dx
);
4382 kvm_register_write(vcpu
, VCPU_REGS_RBX
, tss
->bx
);
4383 kvm_register_write(vcpu
, VCPU_REGS_RSP
, tss
->sp
);
4384 kvm_register_write(vcpu
, VCPU_REGS_RBP
, tss
->bp
);
4385 kvm_register_write(vcpu
, VCPU_REGS_RSI
, tss
->si
);
4386 kvm_register_write(vcpu
, VCPU_REGS_RDI
, tss
->di
);
4388 if (kvm_load_segment_descriptor(vcpu
, tss
->ldt
, 0, VCPU_SREG_LDTR
))
4391 if (kvm_load_segment_descriptor(vcpu
, tss
->es
, 1, VCPU_SREG_ES
))
4394 if (kvm_load_segment_descriptor(vcpu
, tss
->cs
, 9, VCPU_SREG_CS
))
4397 if (kvm_load_segment_descriptor(vcpu
, tss
->ss
, 1, VCPU_SREG_SS
))
4400 if (kvm_load_segment_descriptor(vcpu
, tss
->ds
, 1, VCPU_SREG_DS
))
4405 static int kvm_task_switch_16(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4406 u16 old_tss_sel
, u32 old_tss_base
,
4407 struct desc_struct
*nseg_desc
)
4409 struct tss_segment_16 tss_segment_16
;
4412 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4413 sizeof tss_segment_16
))
4416 save_state_to_tss16(vcpu
, &tss_segment_16
);
4418 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_16
,
4419 sizeof tss_segment_16
))
4422 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4423 &tss_segment_16
, sizeof tss_segment_16
))
4426 if (old_tss_sel
!= 0xffff) {
4427 tss_segment_16
.prev_task_link
= old_tss_sel
;
4429 if (kvm_write_guest(vcpu
->kvm
,
4430 get_tss_base_addr(vcpu
, nseg_desc
),
4431 &tss_segment_16
.prev_task_link
,
4432 sizeof tss_segment_16
.prev_task_link
))
4436 if (load_state_from_tss16(vcpu
, &tss_segment_16
))
4444 static int kvm_task_switch_32(struct kvm_vcpu
*vcpu
, u16 tss_selector
,
4445 u16 old_tss_sel
, u32 old_tss_base
,
4446 struct desc_struct
*nseg_desc
)
4448 struct tss_segment_32 tss_segment_32
;
4451 if (kvm_read_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4452 sizeof tss_segment_32
))
4455 save_state_to_tss32(vcpu
, &tss_segment_32
);
4457 if (kvm_write_guest(vcpu
->kvm
, old_tss_base
, &tss_segment_32
,
4458 sizeof tss_segment_32
))
4461 if (kvm_read_guest(vcpu
->kvm
, get_tss_base_addr(vcpu
, nseg_desc
),
4462 &tss_segment_32
, sizeof tss_segment_32
))
4465 if (old_tss_sel
!= 0xffff) {
4466 tss_segment_32
.prev_task_link
= old_tss_sel
;
4468 if (kvm_write_guest(vcpu
->kvm
,
4469 get_tss_base_addr(vcpu
, nseg_desc
),
4470 &tss_segment_32
.prev_task_link
,
4471 sizeof tss_segment_32
.prev_task_link
))
4475 if (load_state_from_tss32(vcpu
, &tss_segment_32
))
4483 int kvm_task_switch(struct kvm_vcpu
*vcpu
, u16 tss_selector
, int reason
)
4485 struct kvm_segment tr_seg
;
4486 struct desc_struct cseg_desc
;
4487 struct desc_struct nseg_desc
;
4489 u32 old_tss_base
= get_segment_base(vcpu
, VCPU_SREG_TR
);
4490 u16 old_tss_sel
= get_segment_selector(vcpu
, VCPU_SREG_TR
);
4492 old_tss_base
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, old_tss_base
);
4494 /* FIXME: Handle errors. Failure to read either TSS or their
4495 * descriptors should generate a pagefault.
4497 if (load_guest_segment_descriptor(vcpu
, tss_selector
, &nseg_desc
))
4500 if (load_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
))
4503 if (reason
!= TASK_SWITCH_IRET
) {
4506 cpl
= kvm_x86_ops
->get_cpl(vcpu
);
4507 if ((tss_selector
& 3) > nseg_desc
.dpl
|| cpl
> nseg_desc
.dpl
) {
4508 kvm_queue_exception_e(vcpu
, GP_VECTOR
, 0);
4513 if (!nseg_desc
.p
|| get_desc_limit(&nseg_desc
) < 0x67) {
4514 kvm_queue_exception_e(vcpu
, TS_VECTOR
, tss_selector
& 0xfffc);
4518 if (reason
== TASK_SWITCH_IRET
|| reason
== TASK_SWITCH_JMP
) {
4519 cseg_desc
.type
&= ~(1 << 1); //clear the B flag
4520 save_guest_segment_descriptor(vcpu
, old_tss_sel
, &cseg_desc
);
4523 if (reason
== TASK_SWITCH_IRET
) {
4524 u32 eflags
= kvm_get_rflags(vcpu
);
4525 kvm_set_rflags(vcpu
, eflags
& ~X86_EFLAGS_NT
);
4528 /* set back link to prev task only if NT bit is set in eflags
4529 note that old_tss_sel is not used afetr this point */
4530 if (reason
!= TASK_SWITCH_CALL
&& reason
!= TASK_SWITCH_GATE
)
4531 old_tss_sel
= 0xffff;
4533 if (nseg_desc
.type
& 8)
4534 ret
= kvm_task_switch_32(vcpu
, tss_selector
, old_tss_sel
,
4535 old_tss_base
, &nseg_desc
);
4537 ret
= kvm_task_switch_16(vcpu
, tss_selector
, old_tss_sel
,
4538 old_tss_base
, &nseg_desc
);
4540 if (reason
== TASK_SWITCH_CALL
|| reason
== TASK_SWITCH_GATE
) {
4541 u32 eflags
= kvm_get_rflags(vcpu
);
4542 kvm_set_rflags(vcpu
, eflags
| X86_EFLAGS_NT
);
4545 if (reason
!= TASK_SWITCH_IRET
) {
4546 nseg_desc
.type
|= (1 << 1);
4547 save_guest_segment_descriptor(vcpu
, tss_selector
,
4551 kvm_x86_ops
->set_cr0(vcpu
, vcpu
->arch
.cr0
| X86_CR0_TS
);
4552 seg_desct_to_kvm_desct(&nseg_desc
, tss_selector
, &tr_seg
);
4554 kvm_set_segment(vcpu
, &tr_seg
, VCPU_SREG_TR
);
4558 EXPORT_SYMBOL_GPL(kvm_task_switch
);
4560 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu
*vcpu
,
4561 struct kvm_sregs
*sregs
)
4563 int mmu_reset_needed
= 0;
4564 int pending_vec
, max_bits
;
4565 struct descriptor_table dt
;
4569 dt
.limit
= sregs
->idt
.limit
;
4570 dt
.base
= sregs
->idt
.base
;
4571 kvm_x86_ops
->set_idt(vcpu
, &dt
);
4572 dt
.limit
= sregs
->gdt
.limit
;
4573 dt
.base
= sregs
->gdt
.base
;
4574 kvm_x86_ops
->set_gdt(vcpu
, &dt
);
4576 vcpu
->arch
.cr2
= sregs
->cr2
;
4577 mmu_reset_needed
|= vcpu
->arch
.cr3
!= sregs
->cr3
;
4578 vcpu
->arch
.cr3
= sregs
->cr3
;
4580 kvm_set_cr8(vcpu
, sregs
->cr8
);
4582 mmu_reset_needed
|= vcpu
->arch
.shadow_efer
!= sregs
->efer
;
4583 kvm_x86_ops
->set_efer(vcpu
, sregs
->efer
);
4584 kvm_set_apic_base(vcpu
, sregs
->apic_base
);
4586 kvm_x86_ops
->decache_cr4_guest_bits(vcpu
);
4588 mmu_reset_needed
|= vcpu
->arch
.cr0
!= sregs
->cr0
;
4589 kvm_x86_ops
->set_cr0(vcpu
, sregs
->cr0
);
4590 vcpu
->arch
.cr0
= sregs
->cr0
;
4592 mmu_reset_needed
|= vcpu
->arch
.cr4
!= sregs
->cr4
;
4593 kvm_x86_ops
->set_cr4(vcpu
, sregs
->cr4
);
4594 if (!is_long_mode(vcpu
) && is_pae(vcpu
)) {
4595 load_pdptrs(vcpu
, vcpu
->arch
.cr3
);
4596 mmu_reset_needed
= 1;
4599 if (mmu_reset_needed
)
4600 kvm_mmu_reset_context(vcpu
);
4602 max_bits
= (sizeof sregs
->interrupt_bitmap
) << 3;
4603 pending_vec
= find_first_bit(
4604 (const unsigned long *)sregs
->interrupt_bitmap
, max_bits
);
4605 if (pending_vec
< max_bits
) {
4606 kvm_queue_interrupt(vcpu
, pending_vec
, false);
4607 pr_debug("Set back pending irq %d\n", pending_vec
);
4608 if (irqchip_in_kernel(vcpu
->kvm
))
4609 kvm_pic_clear_isr_ack(vcpu
->kvm
);
4612 kvm_set_segment(vcpu
, &sregs
->cs
, VCPU_SREG_CS
);
4613 kvm_set_segment(vcpu
, &sregs
->ds
, VCPU_SREG_DS
);
4614 kvm_set_segment(vcpu
, &sregs
->es
, VCPU_SREG_ES
);
4615 kvm_set_segment(vcpu
, &sregs
->fs
, VCPU_SREG_FS
);
4616 kvm_set_segment(vcpu
, &sregs
->gs
, VCPU_SREG_GS
);
4617 kvm_set_segment(vcpu
, &sregs
->ss
, VCPU_SREG_SS
);
4619 kvm_set_segment(vcpu
, &sregs
->tr
, VCPU_SREG_TR
);
4620 kvm_set_segment(vcpu
, &sregs
->ldt
, VCPU_SREG_LDTR
);
4622 update_cr8_intercept(vcpu
);
4624 /* Older userspace won't unhalt the vcpu on reset. */
4625 if (kvm_vcpu_is_bsp(vcpu
) && kvm_rip_read(vcpu
) == 0xfff0 &&
4626 sregs
->cs
.selector
== 0xf000 && sregs
->cs
.base
== 0xffff0000 &&
4627 !(vcpu
->arch
.cr0
& X86_CR0_PE
))
4628 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4635 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu
*vcpu
,
4636 struct kvm_guest_debug
*dbg
)
4638 unsigned long rflags
;
4644 * Read rflags as long as potentially injected trace flags are still
4647 rflags
= kvm_get_rflags(vcpu
);
4649 vcpu
->guest_debug
= dbg
->control
;
4650 if (!(vcpu
->guest_debug
& KVM_GUESTDBG_ENABLE
))
4651 vcpu
->guest_debug
= 0;
4653 if (vcpu
->guest_debug
& KVM_GUESTDBG_USE_HW_BP
) {
4654 for (i
= 0; i
< KVM_NR_DB_REGS
; ++i
)
4655 vcpu
->arch
.eff_db
[i
] = dbg
->arch
.debugreg
[i
];
4656 vcpu
->arch
.switch_db_regs
=
4657 (dbg
->arch
.debugreg
[7] & DR7_BP_EN_MASK
);
4659 for (i
= 0; i
< KVM_NR_DB_REGS
; i
++)
4660 vcpu
->arch
.eff_db
[i
] = vcpu
->arch
.db
[i
];
4661 vcpu
->arch
.switch_db_regs
= (vcpu
->arch
.dr7
& DR7_BP_EN_MASK
);
4664 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
) {
4665 vcpu
->arch
.singlestep_cs
=
4666 get_segment_selector(vcpu
, VCPU_SREG_CS
);
4667 vcpu
->arch
.singlestep_rip
= kvm_rip_read(vcpu
);
4671 * Trigger an rflags update that will inject or remove the trace
4674 kvm_set_rflags(vcpu
, rflags
);
4676 kvm_x86_ops
->set_guest_debug(vcpu
, dbg
);
4678 if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_DB
)
4679 kvm_queue_exception(vcpu
, DB_VECTOR
);
4680 else if (vcpu
->guest_debug
& KVM_GUESTDBG_INJECT_BP
)
4681 kvm_queue_exception(vcpu
, BP_VECTOR
);
4689 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4690 * we have asm/x86/processor.h
4701 u32 st_space
[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4702 #ifdef CONFIG_X86_64
4703 u32 xmm_space
[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4705 u32 xmm_space
[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4710 * Translate a guest virtual address to a guest physical address.
4712 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu
,
4713 struct kvm_translation
*tr
)
4715 unsigned long vaddr
= tr
->linear_address
;
4719 down_read(&vcpu
->kvm
->slots_lock
);
4720 gpa
= vcpu
->arch
.mmu
.gva_to_gpa(vcpu
, vaddr
);
4721 up_read(&vcpu
->kvm
->slots_lock
);
4722 tr
->physical_address
= gpa
;
4723 tr
->valid
= gpa
!= UNMAPPED_GVA
;
4731 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4733 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4737 memcpy(fpu
->fpr
, fxsave
->st_space
, 128);
4738 fpu
->fcw
= fxsave
->cwd
;
4739 fpu
->fsw
= fxsave
->swd
;
4740 fpu
->ftwx
= fxsave
->twd
;
4741 fpu
->last_opcode
= fxsave
->fop
;
4742 fpu
->last_ip
= fxsave
->rip
;
4743 fpu
->last_dp
= fxsave
->rdp
;
4744 memcpy(fpu
->xmm
, fxsave
->xmm_space
, sizeof fxsave
->xmm_space
);
4751 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu
*vcpu
, struct kvm_fpu
*fpu
)
4753 struct fxsave
*fxsave
= (struct fxsave
*)&vcpu
->arch
.guest_fx_image
;
4757 memcpy(fxsave
->st_space
, fpu
->fpr
, 128);
4758 fxsave
->cwd
= fpu
->fcw
;
4759 fxsave
->swd
= fpu
->fsw
;
4760 fxsave
->twd
= fpu
->ftwx
;
4761 fxsave
->fop
= fpu
->last_opcode
;
4762 fxsave
->rip
= fpu
->last_ip
;
4763 fxsave
->rdp
= fpu
->last_dp
;
4764 memcpy(fxsave
->xmm_space
, fpu
->xmm
, sizeof fxsave
->xmm_space
);
4771 void fx_init(struct kvm_vcpu
*vcpu
)
4773 unsigned after_mxcsr_mask
;
4776 * Touch the fpu the first time in non atomic context as if
4777 * this is the first fpu instruction the exception handler
4778 * will fire before the instruction returns and it'll have to
4779 * allocate ram with GFP_KERNEL.
4782 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4784 /* Initialize guest FPU by resetting ours and saving into guest's */
4786 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4788 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4789 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4792 vcpu
->arch
.cr0
|= X86_CR0_ET
;
4793 after_mxcsr_mask
= offsetof(struct i387_fxsave_struct
, st_space
);
4794 vcpu
->arch
.guest_fx_image
.mxcsr
= 0x1f80;
4795 memset((void *)&vcpu
->arch
.guest_fx_image
+ after_mxcsr_mask
,
4796 0, sizeof(struct i387_fxsave_struct
) - after_mxcsr_mask
);
4798 EXPORT_SYMBOL_GPL(fx_init
);
4800 void kvm_load_guest_fpu(struct kvm_vcpu
*vcpu
)
4802 if (!vcpu
->fpu_active
|| vcpu
->guest_fpu_loaded
)
4805 vcpu
->guest_fpu_loaded
= 1;
4806 kvm_fx_save(&vcpu
->arch
.host_fx_image
);
4807 kvm_fx_restore(&vcpu
->arch
.guest_fx_image
);
4809 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu
);
4811 void kvm_put_guest_fpu(struct kvm_vcpu
*vcpu
)
4813 if (!vcpu
->guest_fpu_loaded
)
4816 vcpu
->guest_fpu_loaded
= 0;
4817 kvm_fx_save(&vcpu
->arch
.guest_fx_image
);
4818 kvm_fx_restore(&vcpu
->arch
.host_fx_image
);
4819 ++vcpu
->stat
.fpu_reload
;
4821 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu
);
4823 void kvm_arch_vcpu_free(struct kvm_vcpu
*vcpu
)
4825 if (vcpu
->arch
.time_page
) {
4826 kvm_release_page_dirty(vcpu
->arch
.time_page
);
4827 vcpu
->arch
.time_page
= NULL
;
4830 kvm_x86_ops
->vcpu_free(vcpu
);
4833 struct kvm_vcpu
*kvm_arch_vcpu_create(struct kvm
*kvm
,
4836 return kvm_x86_ops
->vcpu_create(kvm
, id
);
4839 int kvm_arch_vcpu_setup(struct kvm_vcpu
*vcpu
)
4843 /* We do fxsave: this must be aligned. */
4844 BUG_ON((unsigned long)&vcpu
->arch
.host_fx_image
& 0xF);
4846 vcpu
->arch
.mtrr_state
.have_fixed
= 1;
4848 r
= kvm_arch_vcpu_reset(vcpu
);
4850 r
= kvm_mmu_setup(vcpu
);
4857 kvm_x86_ops
->vcpu_free(vcpu
);
4861 void kvm_arch_vcpu_destroy(struct kvm_vcpu
*vcpu
)
4864 kvm_mmu_unload(vcpu
);
4867 kvm_x86_ops
->vcpu_free(vcpu
);
4870 int kvm_arch_vcpu_reset(struct kvm_vcpu
*vcpu
)
4872 vcpu
->arch
.nmi_pending
= false;
4873 vcpu
->arch
.nmi_injected
= false;
4875 vcpu
->arch
.switch_db_regs
= 0;
4876 memset(vcpu
->arch
.db
, 0, sizeof(vcpu
->arch
.db
));
4877 vcpu
->arch
.dr6
= DR6_FIXED_1
;
4878 vcpu
->arch
.dr7
= DR7_FIXED_1
;
4880 return kvm_x86_ops
->vcpu_reset(vcpu
);
4883 int kvm_arch_hardware_enable(void *garbage
)
4886 * Since this may be called from a hotplug notifcation,
4887 * we can't get the CPU frequency directly.
4889 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC
)) {
4890 int cpu
= raw_smp_processor_id();
4891 per_cpu(cpu_tsc_khz
, cpu
) = 0;
4894 kvm_shared_msr_cpu_online();
4896 return kvm_x86_ops
->hardware_enable(garbage
);
4899 void kvm_arch_hardware_disable(void *garbage
)
4901 kvm_x86_ops
->hardware_disable(garbage
);
4904 int kvm_arch_hardware_setup(void)
4906 return kvm_x86_ops
->hardware_setup();
4909 void kvm_arch_hardware_unsetup(void)
4911 kvm_x86_ops
->hardware_unsetup();
4914 void kvm_arch_check_processor_compat(void *rtn
)
4916 kvm_x86_ops
->check_processor_compatibility(rtn
);
4919 int kvm_arch_vcpu_init(struct kvm_vcpu
*vcpu
)
4925 BUG_ON(vcpu
->kvm
== NULL
);
4928 vcpu
->arch
.mmu
.root_hpa
= INVALID_PAGE
;
4929 if (!irqchip_in_kernel(kvm
) || kvm_vcpu_is_bsp(vcpu
))
4930 vcpu
->arch
.mp_state
= KVM_MP_STATE_RUNNABLE
;
4932 vcpu
->arch
.mp_state
= KVM_MP_STATE_UNINITIALIZED
;
4934 page
= alloc_page(GFP_KERNEL
| __GFP_ZERO
);
4939 vcpu
->arch
.pio_data
= page_address(page
);
4941 r
= kvm_mmu_create(vcpu
);
4943 goto fail_free_pio_data
;
4945 if (irqchip_in_kernel(kvm
)) {
4946 r
= kvm_create_lapic(vcpu
);
4948 goto fail_mmu_destroy
;
4951 vcpu
->arch
.mce_banks
= kzalloc(KVM_MAX_MCE_BANKS
* sizeof(u64
) * 4,
4953 if (!vcpu
->arch
.mce_banks
) {
4955 goto fail_mmu_destroy
;
4957 vcpu
->arch
.mcg_cap
= KVM_MAX_MCE_BANKS
;
4962 kvm_mmu_destroy(vcpu
);
4964 free_page((unsigned long)vcpu
->arch
.pio_data
);
4969 void kvm_arch_vcpu_uninit(struct kvm_vcpu
*vcpu
)
4971 kvm_free_lapic(vcpu
);
4972 down_read(&vcpu
->kvm
->slots_lock
);
4973 kvm_mmu_destroy(vcpu
);
4974 up_read(&vcpu
->kvm
->slots_lock
);
4975 free_page((unsigned long)vcpu
->arch
.pio_data
);
4978 struct kvm
*kvm_arch_create_vm(void)
4980 struct kvm
*kvm
= kzalloc(sizeof(struct kvm
), GFP_KERNEL
);
4983 return ERR_PTR(-ENOMEM
);
4985 INIT_LIST_HEAD(&kvm
->arch
.active_mmu_pages
);
4986 INIT_LIST_HEAD(&kvm
->arch
.assigned_dev_head
);
4988 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4989 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID
, &kvm
->arch
.irq_sources_bitmap
);
4991 rdtscll(kvm
->arch
.vm_init_tsc
);
4996 static void kvm_unload_vcpu_mmu(struct kvm_vcpu
*vcpu
)
4999 kvm_mmu_unload(vcpu
);
5003 static void kvm_free_vcpus(struct kvm
*kvm
)
5006 struct kvm_vcpu
*vcpu
;
5009 * Unpin any mmu pages first.
5011 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5012 kvm_unload_vcpu_mmu(vcpu
);
5013 kvm_for_each_vcpu(i
, vcpu
, kvm
)
5014 kvm_arch_vcpu_free(vcpu
);
5016 mutex_lock(&kvm
->lock
);
5017 for (i
= 0; i
< atomic_read(&kvm
->online_vcpus
); i
++)
5018 kvm
->vcpus
[i
] = NULL
;
5020 atomic_set(&kvm
->online_vcpus
, 0);
5021 mutex_unlock(&kvm
->lock
);
5024 void kvm_arch_sync_events(struct kvm
*kvm
)
5026 kvm_free_all_assigned_devices(kvm
);
5029 void kvm_arch_destroy_vm(struct kvm
*kvm
)
5031 kvm_iommu_unmap_guest(kvm
);
5033 kfree(kvm
->arch
.vpic
);
5034 kfree(kvm
->arch
.vioapic
);
5035 kvm_free_vcpus(kvm
);
5036 kvm_free_physmem(kvm
);
5037 if (kvm
->arch
.apic_access_page
)
5038 put_page(kvm
->arch
.apic_access_page
);
5039 if (kvm
->arch
.ept_identity_pagetable
)
5040 put_page(kvm
->arch
.ept_identity_pagetable
);
5044 int kvm_arch_set_memory_region(struct kvm
*kvm
,
5045 struct kvm_userspace_memory_region
*mem
,
5046 struct kvm_memory_slot old
,
5049 int npages
= mem
->memory_size
>> PAGE_SHIFT
;
5050 struct kvm_memory_slot
*memslot
= &kvm
->memslots
[mem
->slot
];
5052 /*To keep backward compatibility with older userspace,
5053 *x86 needs to hanlde !user_alloc case.
5056 if (npages
&& !old
.rmap
) {
5057 unsigned long userspace_addr
;
5059 down_write(¤t
->mm
->mmap_sem
);
5060 userspace_addr
= do_mmap(NULL
, 0,
5062 PROT_READ
| PROT_WRITE
,
5063 MAP_PRIVATE
| MAP_ANONYMOUS
,
5065 up_write(¤t
->mm
->mmap_sem
);
5067 if (IS_ERR((void *)userspace_addr
))
5068 return PTR_ERR((void *)userspace_addr
);
5070 /* set userspace_addr atomically for kvm_hva_to_rmapp */
5071 spin_lock(&kvm
->mmu_lock
);
5072 memslot
->userspace_addr
= userspace_addr
;
5073 spin_unlock(&kvm
->mmu_lock
);
5075 if (!old
.user_alloc
&& old
.rmap
) {
5078 down_write(¤t
->mm
->mmap_sem
);
5079 ret
= do_munmap(current
->mm
, old
.userspace_addr
,
5080 old
.npages
* PAGE_SIZE
);
5081 up_write(¤t
->mm
->mmap_sem
);
5084 "kvm_vm_ioctl_set_memory_region: "
5085 "failed to munmap memory\n");
5090 spin_lock(&kvm
->mmu_lock
);
5091 if (!kvm
->arch
.n_requested_mmu_pages
) {
5092 unsigned int nr_mmu_pages
= kvm_mmu_calculate_mmu_pages(kvm
);
5093 kvm_mmu_change_mmu_pages(kvm
, nr_mmu_pages
);
5096 kvm_mmu_slot_remove_write_access(kvm
, mem
->slot
);
5097 spin_unlock(&kvm
->mmu_lock
);
5102 void kvm_arch_flush_shadow(struct kvm
*kvm
)
5104 kvm_mmu_zap_all(kvm
);
5105 kvm_reload_remote_mmus(kvm
);
5108 int kvm_arch_vcpu_runnable(struct kvm_vcpu
*vcpu
)
5110 return vcpu
->arch
.mp_state
== KVM_MP_STATE_RUNNABLE
5111 || vcpu
->arch
.mp_state
== KVM_MP_STATE_SIPI_RECEIVED
5112 || vcpu
->arch
.nmi_pending
||
5113 (kvm_arch_interrupt_allowed(vcpu
) &&
5114 kvm_cpu_has_interrupt(vcpu
));
5117 void kvm_vcpu_kick(struct kvm_vcpu
*vcpu
)
5120 int cpu
= vcpu
->cpu
;
5122 if (waitqueue_active(&vcpu
->wq
)) {
5123 wake_up_interruptible(&vcpu
->wq
);
5124 ++vcpu
->stat
.halt_wakeup
;
5128 if (cpu
!= me
&& (unsigned)cpu
< nr_cpu_ids
&& cpu_online(cpu
))
5129 if (!test_and_set_bit(KVM_REQ_KICK
, &vcpu
->requests
))
5130 smp_send_reschedule(cpu
);
5134 int kvm_arch_interrupt_allowed(struct kvm_vcpu
*vcpu
)
5136 return kvm_x86_ops
->interrupt_allowed(vcpu
);
5139 unsigned long kvm_get_rflags(struct kvm_vcpu
*vcpu
)
5141 unsigned long rflags
;
5143 rflags
= kvm_x86_ops
->get_rflags(vcpu
);
5144 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
)
5145 rflags
&= ~(unsigned long)(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
5148 EXPORT_SYMBOL_GPL(kvm_get_rflags
);
5150 void kvm_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
5152 if (vcpu
->guest_debug
& KVM_GUESTDBG_SINGLESTEP
&&
5153 vcpu
->arch
.singlestep_cs
==
5154 get_segment_selector(vcpu
, VCPU_SREG_CS
) &&
5155 vcpu
->arch
.singlestep_rip
== kvm_rip_read(vcpu
))
5156 rflags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
5157 kvm_x86_ops
->set_rflags(vcpu
, rflags
);
5159 EXPORT_SYMBOL_GPL(kvm_set_rflags
);
5161 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit
);
5162 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq
);
5163 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault
);
5164 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr
);
5165 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr
);
5166 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun
);
5167 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit
);
5168 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject
);
5169 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit
);
5170 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga
);
5171 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit
);