drm/i915: Force PSR exit by inactivating it.
[linux-2.6/btrfs-unstable.git] / drivers / gpu / drm / i915 / intel_dvo.c
blob5d7d97522bdcd6a2ecebcd15dbd0b20cd765a90d
1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
27 #include <linux/i2c.h>
28 #include <linux/slab.h>
29 #include <drm/drmP.h>
30 #include <drm/drm_crtc.h>
31 #include "intel_drv.h"
32 #include <drm/i915_drm.h>
33 #include "i915_drv.h"
34 #include "dvo.h"
36 #define SIL164_ADDR 0x38
37 #define CH7xxx_ADDR 0x76
38 #define TFP410_ADDR 0x38
39 #define NS2501_ADDR 0x38
41 static const struct intel_dvo_device intel_dvo_devices[] = {
43 .type = INTEL_DVO_CHIP_TMDS,
44 .name = "sil164",
45 .dvo_reg = DVOC,
46 .slave_addr = SIL164_ADDR,
47 .dev_ops = &sil164_ops,
50 .type = INTEL_DVO_CHIP_TMDS,
51 .name = "ch7xxx",
52 .dvo_reg = DVOC,
53 .slave_addr = CH7xxx_ADDR,
54 .dev_ops = &ch7xxx_ops,
57 .type = INTEL_DVO_CHIP_TMDS,
58 .name = "ch7xxx",
59 .dvo_reg = DVOC,
60 .slave_addr = 0x75, /* For some ch7010 */
61 .dev_ops = &ch7xxx_ops,
64 .type = INTEL_DVO_CHIP_LVDS,
65 .name = "ivch",
66 .dvo_reg = DVOA,
67 .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
68 .dev_ops = &ivch_ops,
71 .type = INTEL_DVO_CHIP_TMDS,
72 .name = "tfp410",
73 .dvo_reg = DVOC,
74 .slave_addr = TFP410_ADDR,
75 .dev_ops = &tfp410_ops,
78 .type = INTEL_DVO_CHIP_LVDS,
79 .name = "ch7017",
80 .dvo_reg = DVOC,
81 .slave_addr = 0x75,
82 .gpio = GMBUS_PORT_DPB,
83 .dev_ops = &ch7017_ops,
86 .type = INTEL_DVO_CHIP_TMDS,
87 .name = "ns2501",
88 .dvo_reg = DVOC,
89 .slave_addr = NS2501_ADDR,
90 .dev_ops = &ns2501_ops,
94 struct intel_dvo {
95 struct intel_encoder base;
97 struct intel_dvo_device dev;
99 struct drm_display_mode *panel_fixed_mode;
100 bool panel_wants_dither;
103 static struct intel_dvo *enc_to_dvo(struct intel_encoder *encoder)
105 return container_of(encoder, struct intel_dvo, base);
108 static struct intel_dvo *intel_attached_dvo(struct drm_connector *connector)
110 return enc_to_dvo(intel_attached_encoder(connector));
113 static bool intel_dvo_connector_get_hw_state(struct intel_connector *connector)
115 struct drm_device *dev = connector->base.dev;
116 struct drm_i915_private *dev_priv = dev->dev_private;
117 struct intel_dvo *intel_dvo = intel_attached_dvo(&connector->base);
118 u32 tmp;
120 tmp = I915_READ(intel_dvo->dev.dvo_reg);
122 if (!(tmp & DVO_ENABLE))
123 return false;
125 return intel_dvo->dev.dev_ops->get_hw_state(&intel_dvo->dev);
128 static bool intel_dvo_get_hw_state(struct intel_encoder *encoder,
129 enum pipe *pipe)
131 struct drm_device *dev = encoder->base.dev;
132 struct drm_i915_private *dev_priv = dev->dev_private;
133 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
134 u32 tmp;
136 tmp = I915_READ(intel_dvo->dev.dvo_reg);
138 if (!(tmp & DVO_ENABLE))
139 return false;
141 *pipe = PORT_TO_PIPE(tmp);
143 return true;
146 static void intel_dvo_get_config(struct intel_encoder *encoder,
147 struct intel_crtc_config *pipe_config)
149 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
150 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
151 u32 tmp, flags = 0;
153 tmp = I915_READ(intel_dvo->dev.dvo_reg);
154 if (tmp & DVO_HSYNC_ACTIVE_HIGH)
155 flags |= DRM_MODE_FLAG_PHSYNC;
156 else
157 flags |= DRM_MODE_FLAG_NHSYNC;
158 if (tmp & DVO_VSYNC_ACTIVE_HIGH)
159 flags |= DRM_MODE_FLAG_PVSYNC;
160 else
161 flags |= DRM_MODE_FLAG_NVSYNC;
163 pipe_config->adjusted_mode.flags |= flags;
165 pipe_config->adjusted_mode.crtc_clock = pipe_config->port_clock;
168 static void intel_disable_dvo(struct intel_encoder *encoder)
170 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
171 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
172 u32 dvo_reg = intel_dvo->dev.dvo_reg;
173 u32 temp = I915_READ(dvo_reg);
175 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
176 I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
177 I915_READ(dvo_reg);
180 static void intel_enable_dvo(struct intel_encoder *encoder)
182 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
183 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
184 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
185 u32 dvo_reg = intel_dvo->dev.dvo_reg;
186 u32 temp = I915_READ(dvo_reg);
188 I915_WRITE(dvo_reg, temp | DVO_ENABLE);
189 I915_READ(dvo_reg);
190 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
191 &crtc->config.requested_mode,
192 &crtc->config.adjusted_mode);
194 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
197 /* Special dpms function to support cloning between dvo/sdvo/crt. */
198 static void intel_dvo_dpms(struct drm_connector *connector, int mode)
200 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
201 struct drm_crtc *crtc;
202 struct intel_crtc_config *config;
204 /* dvo supports only 2 dpms states. */
205 if (mode != DRM_MODE_DPMS_ON)
206 mode = DRM_MODE_DPMS_OFF;
208 if (mode == connector->dpms)
209 return;
211 connector->dpms = mode;
213 /* Only need to change hw state when actually enabled */
214 crtc = intel_dvo->base.base.crtc;
215 if (!crtc) {
216 intel_dvo->base.connectors_active = false;
217 return;
220 /* We call connector dpms manually below in case pipe dpms doesn't
221 * change due to cloning. */
222 if (mode == DRM_MODE_DPMS_ON) {
223 config = &to_intel_crtc(crtc)->config;
225 intel_dvo->base.connectors_active = true;
227 intel_crtc_update_dpms(crtc);
229 intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev,
230 &config->requested_mode,
231 &config->adjusted_mode);
233 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, true);
234 } else {
235 intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, false);
237 intel_dvo->base.connectors_active = false;
239 intel_crtc_update_dpms(crtc);
242 intel_modeset_check_state(connector->dev);
245 static enum drm_mode_status
246 intel_dvo_mode_valid(struct drm_connector *connector,
247 struct drm_display_mode *mode)
249 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
251 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
252 return MODE_NO_DBLESCAN;
254 /* XXX: Validate clock range */
256 if (intel_dvo->panel_fixed_mode) {
257 if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
258 return MODE_PANEL;
259 if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
260 return MODE_PANEL;
263 return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
266 static bool intel_dvo_compute_config(struct intel_encoder *encoder,
267 struct intel_crtc_config *pipe_config)
269 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
270 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
272 /* If we have timings from the BIOS for the panel, put them in
273 * to the adjusted mode. The CRTC will be set up for this mode,
274 * with the panel scaling set up to source from the H/VDisplay
275 * of the original mode.
277 if (intel_dvo->panel_fixed_mode != NULL) {
278 #define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
279 C(hdisplay);
280 C(hsync_start);
281 C(hsync_end);
282 C(htotal);
283 C(vdisplay);
284 C(vsync_start);
285 C(vsync_end);
286 C(vtotal);
287 C(clock);
288 #undef C
290 drm_mode_set_crtcinfo(adjusted_mode, 0);
293 return true;
296 static void intel_dvo_pre_enable(struct intel_encoder *encoder)
298 struct drm_device *dev = encoder->base.dev;
299 struct drm_i915_private *dev_priv = dev->dev_private;
300 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
301 struct drm_display_mode *adjusted_mode = &crtc->config.adjusted_mode;
302 struct intel_dvo *intel_dvo = enc_to_dvo(encoder);
303 int pipe = crtc->pipe;
304 u32 dvo_val;
305 u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
307 switch (dvo_reg) {
308 case DVOA:
309 default:
310 dvo_srcdim_reg = DVOA_SRCDIM;
311 break;
312 case DVOB:
313 dvo_srcdim_reg = DVOB_SRCDIM;
314 break;
315 case DVOC:
316 dvo_srcdim_reg = DVOC_SRCDIM;
317 break;
320 /* Save the data order, since I don't know what it should be set to. */
321 dvo_val = I915_READ(dvo_reg) &
322 (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
323 dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
324 DVO_BLANK_ACTIVE_HIGH;
326 if (pipe == 1)
327 dvo_val |= DVO_PIPE_B_SELECT;
328 dvo_val |= DVO_PIPE_STALL;
329 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
330 dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
331 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
332 dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
334 /*I915_WRITE(DVOB_SRCDIM,
335 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
336 (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
337 I915_WRITE(dvo_srcdim_reg,
338 (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
339 (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
340 /*I915_WRITE(DVOB, dvo_val);*/
341 I915_WRITE(dvo_reg, dvo_val);
345 * Detect the output connection on our DVO device.
347 * Unimplemented.
349 static enum drm_connector_status
350 intel_dvo_detect(struct drm_connector *connector, bool force)
352 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
353 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
354 connector->base.id, connector->name);
355 return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
358 static int intel_dvo_get_modes(struct drm_connector *connector)
360 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
361 struct drm_i915_private *dev_priv = connector->dev->dev_private;
363 /* We should probably have an i2c driver get_modes function for those
364 * devices which will have a fixed set of modes determined by the chip
365 * (TV-out, for example), but for now with just TMDS and LVDS,
366 * that's not the case.
368 intel_ddc_get_modes(connector,
369 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC));
370 if (!list_empty(&connector->probed_modes))
371 return 1;
373 if (intel_dvo->panel_fixed_mode != NULL) {
374 struct drm_display_mode *mode;
375 mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
376 if (mode) {
377 drm_mode_probed_add(connector, mode);
378 return 1;
382 return 0;
385 static void intel_dvo_destroy(struct drm_connector *connector)
387 drm_connector_cleanup(connector);
388 kfree(connector);
391 static const struct drm_connector_funcs intel_dvo_connector_funcs = {
392 .dpms = intel_dvo_dpms,
393 .detect = intel_dvo_detect,
394 .destroy = intel_dvo_destroy,
395 .fill_modes = drm_helper_probe_single_connector_modes,
398 static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
399 .mode_valid = intel_dvo_mode_valid,
400 .get_modes = intel_dvo_get_modes,
401 .best_encoder = intel_best_encoder,
404 static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
406 struct intel_dvo *intel_dvo = enc_to_dvo(to_intel_encoder(encoder));
408 if (intel_dvo->dev.dev_ops->destroy)
409 intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
411 kfree(intel_dvo->panel_fixed_mode);
413 intel_encoder_destroy(encoder);
416 static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
417 .destroy = intel_dvo_enc_destroy,
421 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
423 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
424 * chip being on DVOB/C and having multiple pipes.
426 static struct drm_display_mode *
427 intel_dvo_get_current_mode(struct drm_connector *connector)
429 struct drm_device *dev = connector->dev;
430 struct drm_i915_private *dev_priv = dev->dev_private;
431 struct intel_dvo *intel_dvo = intel_attached_dvo(connector);
432 uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
433 struct drm_display_mode *mode = NULL;
435 /* If the DVO port is active, that'll be the LVDS, so we can pull out
436 * its timings to get how the BIOS set up the panel.
438 if (dvo_val & DVO_ENABLE) {
439 struct drm_crtc *crtc;
440 int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
442 crtc = intel_get_crtc_for_pipe(dev, pipe);
443 if (crtc) {
444 mode = intel_crtc_mode_get(dev, crtc);
445 if (mode) {
446 mode->type |= DRM_MODE_TYPE_PREFERRED;
447 if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
448 mode->flags |= DRM_MODE_FLAG_PHSYNC;
449 if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
450 mode->flags |= DRM_MODE_FLAG_PVSYNC;
455 return mode;
458 void intel_dvo_init(struct drm_device *dev)
460 struct drm_i915_private *dev_priv = dev->dev_private;
461 struct intel_encoder *intel_encoder;
462 struct intel_dvo *intel_dvo;
463 struct intel_connector *intel_connector;
464 int i;
465 int encoder_type = DRM_MODE_ENCODER_NONE;
467 intel_dvo = kzalloc(sizeof(*intel_dvo), GFP_KERNEL);
468 if (!intel_dvo)
469 return;
471 intel_connector = kzalloc(sizeof(*intel_connector), GFP_KERNEL);
472 if (!intel_connector) {
473 kfree(intel_dvo);
474 return;
477 intel_encoder = &intel_dvo->base;
478 drm_encoder_init(dev, &intel_encoder->base,
479 &intel_dvo_enc_funcs, encoder_type);
481 intel_encoder->disable = intel_disable_dvo;
482 intel_encoder->enable = intel_enable_dvo;
483 intel_encoder->get_hw_state = intel_dvo_get_hw_state;
484 intel_encoder->get_config = intel_dvo_get_config;
485 intel_encoder->compute_config = intel_dvo_compute_config;
486 intel_encoder->pre_enable = intel_dvo_pre_enable;
487 intel_connector->get_hw_state = intel_dvo_connector_get_hw_state;
488 intel_connector->unregister = intel_connector_unregister;
490 /* Now, try to find a controller */
491 for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
492 struct drm_connector *connector = &intel_connector->base;
493 const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
494 struct i2c_adapter *i2c;
495 int gpio;
496 bool dvoinit;
498 /* Allow the I2C driver info to specify the GPIO to be used in
499 * special cases, but otherwise default to what's defined
500 * in the spec.
502 if (intel_gmbus_is_port_valid(dvo->gpio))
503 gpio = dvo->gpio;
504 else if (dvo->type == INTEL_DVO_CHIP_LVDS)
505 gpio = GMBUS_PORT_SSC;
506 else
507 gpio = GMBUS_PORT_DPB;
509 /* Set up the I2C bus necessary for the chip we're probing.
510 * It appears that everything is on GPIOE except for panels
511 * on i830 laptops, which are on GPIOB (DVOA).
513 i2c = intel_gmbus_get_adapter(dev_priv, gpio);
515 intel_dvo->dev = *dvo;
517 /* GMBUS NAK handling seems to be unstable, hence let the
518 * transmitter detection run in bit banging mode for now.
520 intel_gmbus_force_bit(i2c, true);
522 dvoinit = dvo->dev_ops->init(&intel_dvo->dev, i2c);
524 intel_gmbus_force_bit(i2c, false);
526 if (!dvoinit)
527 continue;
529 intel_encoder->type = INTEL_OUTPUT_DVO;
530 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
531 switch (dvo->type) {
532 case INTEL_DVO_CHIP_TMDS:
533 intel_encoder->cloneable = (1 << INTEL_OUTPUT_ANALOG) |
534 (1 << INTEL_OUTPUT_DVO);
535 drm_connector_init(dev, connector,
536 &intel_dvo_connector_funcs,
537 DRM_MODE_CONNECTOR_DVII);
538 encoder_type = DRM_MODE_ENCODER_TMDS;
539 break;
540 case INTEL_DVO_CHIP_LVDS:
541 intel_encoder->cloneable = 0;
542 drm_connector_init(dev, connector,
543 &intel_dvo_connector_funcs,
544 DRM_MODE_CONNECTOR_LVDS);
545 encoder_type = DRM_MODE_ENCODER_LVDS;
546 break;
549 drm_connector_helper_add(connector,
550 &intel_dvo_connector_helper_funcs);
551 connector->display_info.subpixel_order = SubPixelHorizontalRGB;
552 connector->interlace_allowed = false;
553 connector->doublescan_allowed = false;
555 intel_connector_attach_encoder(intel_connector, intel_encoder);
556 if (dvo->type == INTEL_DVO_CHIP_LVDS) {
557 /* For our LVDS chipsets, we should hopefully be able
558 * to dig the fixed panel mode out of the BIOS data.
559 * However, it's in a different format from the BIOS
560 * data on chipsets with integrated LVDS (stored in AIM
561 * headers, likely), so for now, just get the current
562 * mode being output through DVO.
564 intel_dvo->panel_fixed_mode =
565 intel_dvo_get_current_mode(connector);
566 intel_dvo->panel_wants_dither = true;
569 drm_sysfs_connector_add(connector);
570 return;
573 drm_encoder_cleanup(&intel_encoder->base);
574 kfree(intel_dvo);
575 kfree(intel_connector);