6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/clkdev.h>
59 #include <linux/delay.h>
60 #include <linux/device.h>
61 #include <linux/dma-mapping.h>
62 #include <linux/i2c.h>
63 #include <linux/interrupt.h>
64 #include <linux/module.h>
65 #include <linux/omap-iommu.h>
66 #include <linux/platform_device.h>
67 #include <linux/regulator/consumer.h>
68 #include <linux/slab.h>
69 #include <linux/sched.h>
70 #include <linux/vmalloc.h>
72 #include <media/v4l2-common.h>
73 #include <media/v4l2-device.h>
78 #include "isppreview.h"
79 #include "ispresizer.h"
85 static unsigned int autoidle
;
86 module_param(autoidle
, int, 0444);
87 MODULE_PARM_DESC(autoidle
, "Enable OMAP3ISP AUTOIDLE support");
89 static void isp_save_ctx(struct isp_device
*isp
);
91 static void isp_restore_ctx(struct isp_device
*isp
);
93 static const struct isp_res_mapping isp_res_maps
[] = {
95 .isp_rev
= ISP_REVISION_2_0
,
96 .map
= 1 << OMAP3_ISP_IOMEM_MAIN
|
97 1 << OMAP3_ISP_IOMEM_CCP2
|
98 1 << OMAP3_ISP_IOMEM_CCDC
|
99 1 << OMAP3_ISP_IOMEM_HIST
|
100 1 << OMAP3_ISP_IOMEM_H3A
|
101 1 << OMAP3_ISP_IOMEM_PREV
|
102 1 << OMAP3_ISP_IOMEM_RESZ
|
103 1 << OMAP3_ISP_IOMEM_SBL
|
104 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1
|
105 1 << OMAP3_ISP_IOMEM_CSIPHY2
|
106 1 << OMAP3_ISP_IOMEM_343X_CONTROL_CSIRXFE
,
109 .isp_rev
= ISP_REVISION_15_0
,
110 .map
= 1 << OMAP3_ISP_IOMEM_MAIN
|
111 1 << OMAP3_ISP_IOMEM_CCP2
|
112 1 << OMAP3_ISP_IOMEM_CCDC
|
113 1 << OMAP3_ISP_IOMEM_HIST
|
114 1 << OMAP3_ISP_IOMEM_H3A
|
115 1 << OMAP3_ISP_IOMEM_PREV
|
116 1 << OMAP3_ISP_IOMEM_RESZ
|
117 1 << OMAP3_ISP_IOMEM_SBL
|
118 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1
|
119 1 << OMAP3_ISP_IOMEM_CSIPHY2
|
120 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2
|
121 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1
|
122 1 << OMAP3_ISP_IOMEM_CSIPHY1
|
123 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2
|
124 1 << OMAP3_ISP_IOMEM_3630_CONTROL_CAMERA_PHY_CTRL
,
128 /* Structure for saving/restoring ISP module registers */
129 static struct isp_reg isp_reg_list
[] = {
130 {OMAP3_ISP_IOMEM_MAIN
, ISP_SYSCONFIG
, 0},
131 {OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
, 0},
132 {OMAP3_ISP_IOMEM_MAIN
, ISP_TCTRL_CTRL
, 0},
137 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
138 * @isp: OMAP3 ISP device
140 * In order to force posting of pending writes, we need to write and
141 * readback the same register, in this case the revision register.
143 * See this link for reference:
144 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
146 void omap3isp_flush(struct isp_device
*isp
)
148 isp_reg_writel(isp
, 0, OMAP3_ISP_IOMEM_MAIN
, ISP_REVISION
);
149 isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_REVISION
);
152 /* -----------------------------------------------------------------------------
156 #define to_isp_xclk(_hw) container_of(_hw, struct isp_xclk, hw)
158 static void isp_xclk_update(struct isp_xclk
*xclk
, u32 divider
)
162 isp_reg_clr_set(xclk
->isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_TCTRL_CTRL
,
163 ISPTCTRL_CTRL_DIVA_MASK
,
164 divider
<< ISPTCTRL_CTRL_DIVA_SHIFT
);
167 isp_reg_clr_set(xclk
->isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_TCTRL_CTRL
,
168 ISPTCTRL_CTRL_DIVB_MASK
,
169 divider
<< ISPTCTRL_CTRL_DIVB_SHIFT
);
174 static int isp_xclk_prepare(struct clk_hw
*hw
)
176 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
178 omap3isp_get(xclk
->isp
);
183 static void isp_xclk_unprepare(struct clk_hw
*hw
)
185 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
187 omap3isp_put(xclk
->isp
);
190 static int isp_xclk_enable(struct clk_hw
*hw
)
192 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
195 spin_lock_irqsave(&xclk
->lock
, flags
);
196 isp_xclk_update(xclk
, xclk
->divider
);
197 xclk
->enabled
= true;
198 spin_unlock_irqrestore(&xclk
->lock
, flags
);
203 static void isp_xclk_disable(struct clk_hw
*hw
)
205 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
208 spin_lock_irqsave(&xclk
->lock
, flags
);
209 isp_xclk_update(xclk
, 0);
210 xclk
->enabled
= false;
211 spin_unlock_irqrestore(&xclk
->lock
, flags
);
214 static unsigned long isp_xclk_recalc_rate(struct clk_hw
*hw
,
215 unsigned long parent_rate
)
217 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
219 return parent_rate
/ xclk
->divider
;
222 static u32
isp_xclk_calc_divider(unsigned long *rate
, unsigned long parent_rate
)
226 if (*rate
>= parent_rate
) {
228 return ISPTCTRL_CTRL_DIV_BYPASS
;
231 divider
= DIV_ROUND_CLOSEST(parent_rate
, *rate
);
232 if (divider
>= ISPTCTRL_CTRL_DIV_BYPASS
)
233 divider
= ISPTCTRL_CTRL_DIV_BYPASS
- 1;
235 *rate
= parent_rate
/ divider
;
239 static long isp_xclk_round_rate(struct clk_hw
*hw
, unsigned long rate
,
240 unsigned long *parent_rate
)
242 isp_xclk_calc_divider(&rate
, *parent_rate
);
246 static int isp_xclk_set_rate(struct clk_hw
*hw
, unsigned long rate
,
247 unsigned long parent_rate
)
249 struct isp_xclk
*xclk
= to_isp_xclk(hw
);
253 divider
= isp_xclk_calc_divider(&rate
, parent_rate
);
255 spin_lock_irqsave(&xclk
->lock
, flags
);
257 xclk
->divider
= divider
;
259 isp_xclk_update(xclk
, divider
);
261 spin_unlock_irqrestore(&xclk
->lock
, flags
);
263 dev_dbg(xclk
->isp
->dev
, "%s: cam_xclk%c set to %lu Hz (div %u)\n",
264 __func__
, xclk
->id
== ISP_XCLK_A
? 'a' : 'b', rate
, divider
);
268 static const struct clk_ops isp_xclk_ops
= {
269 .prepare
= isp_xclk_prepare
,
270 .unprepare
= isp_xclk_unprepare
,
271 .enable
= isp_xclk_enable
,
272 .disable
= isp_xclk_disable
,
273 .recalc_rate
= isp_xclk_recalc_rate
,
274 .round_rate
= isp_xclk_round_rate
,
275 .set_rate
= isp_xclk_set_rate
,
278 static const char *isp_xclk_parent_name
= "cam_mclk";
280 static const struct clk_init_data isp_xclk_init_data
= {
282 .ops
= &isp_xclk_ops
,
283 .parent_names
= &isp_xclk_parent_name
,
287 static int isp_xclk_init(struct isp_device
*isp
)
289 struct isp_platform_data
*pdata
= isp
->pdata
;
290 struct clk_init_data init
;
293 for (i
= 0; i
< ARRAY_SIZE(isp
->xclks
); ++i
) {
294 struct isp_xclk
*xclk
= &isp
->xclks
[i
];
298 xclk
->id
= i
== 0 ? ISP_XCLK_A
: ISP_XCLK_B
;
300 spin_lock_init(&xclk
->lock
);
302 init
.name
= i
== 0 ? "cam_xclka" : "cam_xclkb";
303 init
.ops
= &isp_xclk_ops
;
304 init
.parent_names
= &isp_xclk_parent_name
;
305 init
.num_parents
= 1;
307 xclk
->hw
.init
= &init
;
309 clk
= devm_clk_register(isp
->dev
, &xclk
->hw
);
313 if (pdata
->xclks
[i
].con_id
== NULL
&&
314 pdata
->xclks
[i
].dev_id
== NULL
)
317 xclk
->lookup
= kzalloc(sizeof(*xclk
->lookup
), GFP_KERNEL
);
318 if (xclk
->lookup
== NULL
)
321 xclk
->lookup
->con_id
= pdata
->xclks
[i
].con_id
;
322 xclk
->lookup
->dev_id
= pdata
->xclks
[i
].dev_id
;
323 xclk
->lookup
->clk
= clk
;
325 clkdev_add(xclk
->lookup
);
331 static void isp_xclk_cleanup(struct isp_device
*isp
)
335 for (i
= 0; i
< ARRAY_SIZE(isp
->xclks
); ++i
) {
336 struct isp_xclk
*xclk
= &isp
->xclks
[i
];
339 clkdev_drop(xclk
->lookup
);
343 /* -----------------------------------------------------------------------------
348 * isp_enable_interrupts - Enable ISP interrupts.
349 * @isp: OMAP3 ISP device
351 static void isp_enable_interrupts(struct isp_device
*isp
)
353 static const u32 irq
= IRQ0ENABLE_CSIA_IRQ
354 | IRQ0ENABLE_CSIB_IRQ
355 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
356 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
357 | IRQ0ENABLE_CCDC_VD0_IRQ
358 | IRQ0ENABLE_CCDC_VD1_IRQ
359 | IRQ0ENABLE_HS_VS_IRQ
360 | IRQ0ENABLE_HIST_DONE_IRQ
361 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
362 | IRQ0ENABLE_H3A_AF_DONE_IRQ
363 | IRQ0ENABLE_PRV_DONE_IRQ
364 | IRQ0ENABLE_RSZ_DONE_IRQ
;
366 isp_reg_writel(isp
, irq
, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
);
367 isp_reg_writel(isp
, irq
, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0ENABLE
);
371 * isp_disable_interrupts - Disable ISP interrupts.
372 * @isp: OMAP3 ISP device
374 static void isp_disable_interrupts(struct isp_device
*isp
)
376 isp_reg_writel(isp
, 0, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0ENABLE
);
380 * isp_core_init - ISP core settings
381 * @isp: OMAP3 ISP device
382 * @idle: Consider idle state.
384 * Set the power settings for the ISP and SBL bus and cConfigure the HS/VS
387 * We need to configure the HS/VS interrupt source before interrupts get
388 * enabled, as the sensor might be free-running and the ISP default setting
389 * (HS edge) would put an unnecessary burden on the CPU.
391 static void isp_core_init(struct isp_device
*isp
, int idle
)
394 ((idle
? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY
:
395 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY
) <<
396 ISP_SYSCONFIG_MIDLEMODE_SHIFT
) |
397 ((isp
->revision
== ISP_REVISION_15_0
) ?
398 ISP_SYSCONFIG_AUTOIDLE
: 0),
399 OMAP3_ISP_IOMEM_MAIN
, ISP_SYSCONFIG
);
402 (isp
->autoidle
? ISPCTRL_SBL_AUTOIDLE
: 0) |
403 ISPCTRL_SYNC_DETECT_VSRISE
,
404 OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
);
408 * Configure the bridge and lane shifter. Valid inputs are
410 * CCDC_INPUT_PARALLEL: Parallel interface
411 * CCDC_INPUT_CSI2A: CSI2a receiver
412 * CCDC_INPUT_CCP2B: CCP2b receiver
413 * CCDC_INPUT_CSI2C: CSI2c receiver
415 * The bridge and lane shifter are configured according to the selected input
416 * and the ISP platform data.
418 void omap3isp_configure_bridge(struct isp_device
*isp
,
419 enum ccdc_input_entity input
,
420 const struct isp_parallel_platform_data
*pdata
,
421 unsigned int shift
, unsigned int bridge
)
425 ispctrl_val
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
);
426 ispctrl_val
&= ~ISPCTRL_SHIFT_MASK
;
427 ispctrl_val
&= ~ISPCTRL_PAR_CLK_POL_INV
;
428 ispctrl_val
&= ~ISPCTRL_PAR_SER_CLK_SEL_MASK
;
429 ispctrl_val
&= ~ISPCTRL_PAR_BRIDGE_MASK
;
430 ispctrl_val
|= bridge
;
433 case CCDC_INPUT_PARALLEL
:
434 ispctrl_val
|= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL
;
435 ispctrl_val
|= pdata
->clk_pol
<< ISPCTRL_PAR_CLK_POL_SHIFT
;
436 shift
+= pdata
->data_lane_shift
* 2;
439 case CCDC_INPUT_CSI2A
:
440 ispctrl_val
|= ISPCTRL_PAR_SER_CLK_SEL_CSIA
;
443 case CCDC_INPUT_CCP2B
:
444 ispctrl_val
|= ISPCTRL_PAR_SER_CLK_SEL_CSIB
;
447 case CCDC_INPUT_CSI2C
:
448 ispctrl_val
|= ISPCTRL_PAR_SER_CLK_SEL_CSIC
;
455 ispctrl_val
|= ((shift
/2) << ISPCTRL_SHIFT_SHIFT
) & ISPCTRL_SHIFT_MASK
;
457 isp_reg_writel(isp
, ispctrl_val
, OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
);
460 void omap3isp_hist_dma_done(struct isp_device
*isp
)
462 if (omap3isp_ccdc_busy(&isp
->isp_ccdc
) ||
463 omap3isp_stat_pcr_busy(&isp
->isp_hist
)) {
464 /* Histogram cannot be enabled in this frame anymore */
465 atomic_set(&isp
->isp_hist
.buf_err
, 1);
466 dev_dbg(isp
->dev
, "hist: Out of synchronization with "
467 "CCDC. Ignoring next buffer.\n");
471 static inline void isp_isr_dbg(struct isp_device
*isp
, u32 irqstatus
)
473 static const char *name
[] = {
492 "CCDC_LSC_PREFETCH_COMPLETED",
493 "CCDC_LSC_PREFETCH_ERROR",
509 dev_dbg(isp
->dev
, "ISP IRQ: ");
511 for (i
= 0; i
< ARRAY_SIZE(name
); i
++) {
512 if ((1 << i
) & irqstatus
)
513 printk(KERN_CONT
"%s ", name
[i
]);
515 printk(KERN_CONT
"\n");
518 static void isp_isr_sbl(struct isp_device
*isp
)
520 struct device
*dev
= isp
->dev
;
521 struct isp_pipeline
*pipe
;
525 * Handle shared buffer logic overflows for video buffers.
526 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
528 sbl_pcr
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_PCR
);
529 isp_reg_writel(isp
, sbl_pcr
, OMAP3_ISP_IOMEM_SBL
, ISPSBL_PCR
);
530 sbl_pcr
&= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF
;
533 dev_dbg(dev
, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr
);
535 if (sbl_pcr
& ISPSBL_PCR_CSIB_WBL_OVF
) {
536 pipe
= to_isp_pipeline(&isp
->isp_ccp2
.subdev
.entity
);
541 if (sbl_pcr
& ISPSBL_PCR_CSIA_WBL_OVF
) {
542 pipe
= to_isp_pipeline(&isp
->isp_csi2a
.subdev
.entity
);
547 if (sbl_pcr
& ISPSBL_PCR_CCDC_WBL_OVF
) {
548 pipe
= to_isp_pipeline(&isp
->isp_ccdc
.subdev
.entity
);
553 if (sbl_pcr
& ISPSBL_PCR_PRV_WBL_OVF
) {
554 pipe
= to_isp_pipeline(&isp
->isp_prev
.subdev
.entity
);
559 if (sbl_pcr
& (ISPSBL_PCR_RSZ1_WBL_OVF
560 | ISPSBL_PCR_RSZ2_WBL_OVF
561 | ISPSBL_PCR_RSZ3_WBL_OVF
562 | ISPSBL_PCR_RSZ4_WBL_OVF
)) {
563 pipe
= to_isp_pipeline(&isp
->isp_res
.subdev
.entity
);
568 if (sbl_pcr
& ISPSBL_PCR_H3A_AF_WBL_OVF
)
569 omap3isp_stat_sbl_overflow(&isp
->isp_af
);
571 if (sbl_pcr
& ISPSBL_PCR_H3A_AEAWB_WBL_OVF
)
572 omap3isp_stat_sbl_overflow(&isp
->isp_aewb
);
576 * isp_isr - Interrupt Service Routine for Camera ISP module.
577 * @irq: Not used currently.
578 * @_isp: Pointer to the OMAP3 ISP device
580 * Handles the corresponding callback if plugged in.
582 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
583 * IRQ wasn't handled.
585 static irqreturn_t
isp_isr(int irq
, void *_isp
)
587 static const u32 ccdc_events
= IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ
|
588 IRQ0STATUS_CCDC_LSC_DONE_IRQ
|
589 IRQ0STATUS_CCDC_VD0_IRQ
|
590 IRQ0STATUS_CCDC_VD1_IRQ
|
591 IRQ0STATUS_HS_VS_IRQ
;
592 struct isp_device
*isp
= _isp
;
595 irqstatus
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
);
596 isp_reg_writel(isp
, irqstatus
, OMAP3_ISP_IOMEM_MAIN
, ISP_IRQ0STATUS
);
600 if (irqstatus
& IRQ0STATUS_CSIA_IRQ
)
601 omap3isp_csi2_isr(&isp
->isp_csi2a
);
603 if (irqstatus
& IRQ0STATUS_CSIB_IRQ
)
604 omap3isp_ccp2_isr(&isp
->isp_ccp2
);
606 if (irqstatus
& IRQ0STATUS_CCDC_VD0_IRQ
) {
607 if (isp
->isp_ccdc
.output
& CCDC_OUTPUT_PREVIEW
)
608 omap3isp_preview_isr_frame_sync(&isp
->isp_prev
);
609 if (isp
->isp_ccdc
.output
& CCDC_OUTPUT_RESIZER
)
610 omap3isp_resizer_isr_frame_sync(&isp
->isp_res
);
611 omap3isp_stat_isr_frame_sync(&isp
->isp_aewb
);
612 omap3isp_stat_isr_frame_sync(&isp
->isp_af
);
613 omap3isp_stat_isr_frame_sync(&isp
->isp_hist
);
616 if (irqstatus
& ccdc_events
)
617 omap3isp_ccdc_isr(&isp
->isp_ccdc
, irqstatus
& ccdc_events
);
619 if (irqstatus
& IRQ0STATUS_PRV_DONE_IRQ
) {
620 if (isp
->isp_prev
.output
& PREVIEW_OUTPUT_RESIZER
)
621 omap3isp_resizer_isr_frame_sync(&isp
->isp_res
);
622 omap3isp_preview_isr(&isp
->isp_prev
);
625 if (irqstatus
& IRQ0STATUS_RSZ_DONE_IRQ
)
626 omap3isp_resizer_isr(&isp
->isp_res
);
628 if (irqstatus
& IRQ0STATUS_H3A_AWB_DONE_IRQ
)
629 omap3isp_stat_isr(&isp
->isp_aewb
);
631 if (irqstatus
& IRQ0STATUS_H3A_AF_DONE_IRQ
)
632 omap3isp_stat_isr(&isp
->isp_af
);
634 if (irqstatus
& IRQ0STATUS_HIST_DONE_IRQ
)
635 omap3isp_stat_isr(&isp
->isp_hist
);
639 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
640 isp_isr_dbg(isp
, irqstatus
);
646 /* -----------------------------------------------------------------------------
647 * Pipeline power management
649 * Entities must be powered up when part of a pipeline that contains at least
650 * one open video device node.
652 * To achieve this use the entity use_count field to track the number of users.
653 * For entities corresponding to video device nodes the use_count field stores
654 * the users count of the node. For entities corresponding to subdevs the
655 * use_count field stores the total number of users of all video device nodes
658 * The omap3isp_pipeline_pm_use() function must be called in the open() and
659 * close() handlers of video device nodes. It increments or decrements the use
660 * count of all subdev entities in the pipeline.
662 * To react to link management on powered pipelines, the link setup notification
663 * callback updates the use count of all entities in the source and sink sides
668 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
669 * @entity: The entity
671 * Return the total number of users of all video device nodes in the pipeline.
673 static int isp_pipeline_pm_use_count(struct media_entity
*entity
)
675 struct media_entity_graph graph
;
678 media_entity_graph_walk_start(&graph
, entity
);
680 while ((entity
= media_entity_graph_walk_next(&graph
))) {
681 if (media_entity_type(entity
) == MEDIA_ENT_T_DEVNODE
)
682 use
+= entity
->use_count
;
689 * isp_pipeline_pm_power_one - Apply power change to an entity
690 * @entity: The entity
691 * @change: Use count change
693 * Change the entity use count by @change. If the entity is a subdev update its
694 * power state by calling the core::s_power operation when the use count goes
695 * from 0 to != 0 or from != 0 to 0.
697 * Return 0 on success or a negative error code on failure.
699 static int isp_pipeline_pm_power_one(struct media_entity
*entity
, int change
)
701 struct v4l2_subdev
*subdev
;
704 subdev
= media_entity_type(entity
) == MEDIA_ENT_T_V4L2_SUBDEV
705 ? media_entity_to_v4l2_subdev(entity
) : NULL
;
707 if (entity
->use_count
== 0 && change
> 0 && subdev
!= NULL
) {
708 ret
= v4l2_subdev_call(subdev
, core
, s_power
, 1);
709 if (ret
< 0 && ret
!= -ENOIOCTLCMD
)
713 entity
->use_count
+= change
;
714 WARN_ON(entity
->use_count
< 0);
716 if (entity
->use_count
== 0 && change
< 0 && subdev
!= NULL
)
717 v4l2_subdev_call(subdev
, core
, s_power
, 0);
723 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
724 * @entity: The entity
725 * @change: Use count change
727 * Walk the pipeline to update the use count and the power state of all non-node
730 * Return 0 on success or a negative error code on failure.
732 static int isp_pipeline_pm_power(struct media_entity
*entity
, int change
)
734 struct media_entity_graph graph
;
735 struct media_entity
*first
= entity
;
741 media_entity_graph_walk_start(&graph
, entity
);
743 while (!ret
&& (entity
= media_entity_graph_walk_next(&graph
)))
744 if (media_entity_type(entity
) != MEDIA_ENT_T_DEVNODE
)
745 ret
= isp_pipeline_pm_power_one(entity
, change
);
750 media_entity_graph_walk_start(&graph
, first
);
752 while ((first
= media_entity_graph_walk_next(&graph
))
754 if (media_entity_type(first
) != MEDIA_ENT_T_DEVNODE
)
755 isp_pipeline_pm_power_one(first
, -change
);
761 * omap3isp_pipeline_pm_use - Update the use count of an entity
762 * @entity: The entity
763 * @use: Use (1) or stop using (0) the entity
765 * Update the use count of all entities in the pipeline and power entities on or
768 * Return 0 on success or a negative error code on failure. Powering entities
769 * off is assumed to never fail. No failure can occur when the use parameter is
772 int omap3isp_pipeline_pm_use(struct media_entity
*entity
, int use
)
774 int change
= use
? 1 : -1;
777 mutex_lock(&entity
->parent
->graph_mutex
);
779 /* Apply use count to node. */
780 entity
->use_count
+= change
;
781 WARN_ON(entity
->use_count
< 0);
783 /* Apply power change to connected non-nodes. */
784 ret
= isp_pipeline_pm_power(entity
, change
);
786 entity
->use_count
-= change
;
788 mutex_unlock(&entity
->parent
->graph_mutex
);
794 * isp_pipeline_link_notify - Link management notification callback
795 * @source: Pad at the start of the link
796 * @sink: Pad at the end of the link
797 * @flags: New link flags that will be applied
799 * React to link management on powered pipelines by updating the use count of
800 * all entities in the source and sink sides of the link. Entities are powered
801 * on or off accordingly.
803 * Return 0 on success or a negative error code on failure. Powering entities
804 * off is assumed to never fail. This function will not fail for disconnection
807 static int isp_pipeline_link_notify(struct media_pad
*source
,
808 struct media_pad
*sink
, u32 flags
)
810 int source_use
= isp_pipeline_pm_use_count(source
->entity
);
811 int sink_use
= isp_pipeline_pm_use_count(sink
->entity
);
814 if (!(flags
& MEDIA_LNK_FL_ENABLED
)) {
815 /* Powering off entities is assumed to never fail. */
816 isp_pipeline_pm_power(source
->entity
, -sink_use
);
817 isp_pipeline_pm_power(sink
->entity
, -source_use
);
821 ret
= isp_pipeline_pm_power(source
->entity
, sink_use
);
825 ret
= isp_pipeline_pm_power(sink
->entity
, source_use
);
827 isp_pipeline_pm_power(source
->entity
, -sink_use
);
832 /* -----------------------------------------------------------------------------
833 * Pipeline stream management
837 * isp_pipeline_enable - Enable streaming on a pipeline
838 * @pipe: ISP pipeline
839 * @mode: Stream mode (single shot or continuous)
841 * Walk the entities chain starting at the pipeline output video node and start
842 * all modules in the chain in the given mode.
844 * Return 0 if successful, or the return value of the failed video::s_stream
845 * operation otherwise.
847 static int isp_pipeline_enable(struct isp_pipeline
*pipe
,
848 enum isp_pipeline_stream_state mode
)
850 struct isp_device
*isp
= pipe
->output
->isp
;
851 struct media_entity
*entity
;
852 struct media_pad
*pad
;
853 struct v4l2_subdev
*subdev
;
857 /* If the preview engine crashed it might not respond to read/write
858 * operations on the L4 bus. This would result in a bus fault and a
859 * kernel oops. Refuse to start streaming in that case. This check must
860 * be performed before the loop below to avoid starting entities if the
861 * pipeline won't start anyway (those entities would then likely fail to
862 * stop, making the problem worse).
864 if ((pipe
->entities
& isp
->crashed
) &
865 (1U << isp
->isp_prev
.subdev
.entity
.id
))
868 spin_lock_irqsave(&pipe
->lock
, flags
);
869 pipe
->state
&= ~(ISP_PIPELINE_IDLE_INPUT
| ISP_PIPELINE_IDLE_OUTPUT
);
870 spin_unlock_irqrestore(&pipe
->lock
, flags
);
872 pipe
->do_propagation
= false;
874 entity
= &pipe
->output
->video
.entity
;
876 pad
= &entity
->pads
[0];
877 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
880 pad
= media_entity_remote_pad(pad
);
882 media_entity_type(pad
->entity
) != MEDIA_ENT_T_V4L2_SUBDEV
)
885 entity
= pad
->entity
;
886 subdev
= media_entity_to_v4l2_subdev(entity
);
888 ret
= v4l2_subdev_call(subdev
, video
, s_stream
, mode
);
889 if (ret
< 0 && ret
!= -ENOIOCTLCMD
)
892 if (subdev
== &isp
->isp_ccdc
.subdev
) {
893 v4l2_subdev_call(&isp
->isp_aewb
.subdev
, video
,
895 v4l2_subdev_call(&isp
->isp_af
.subdev
, video
,
897 v4l2_subdev_call(&isp
->isp_hist
.subdev
, video
,
899 pipe
->do_propagation
= true;
906 static int isp_pipeline_wait_resizer(struct isp_device
*isp
)
908 return omap3isp_resizer_busy(&isp
->isp_res
);
911 static int isp_pipeline_wait_preview(struct isp_device
*isp
)
913 return omap3isp_preview_busy(&isp
->isp_prev
);
916 static int isp_pipeline_wait_ccdc(struct isp_device
*isp
)
918 return omap3isp_stat_busy(&isp
->isp_af
)
919 || omap3isp_stat_busy(&isp
->isp_aewb
)
920 || omap3isp_stat_busy(&isp
->isp_hist
)
921 || omap3isp_ccdc_busy(&isp
->isp_ccdc
);
924 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
926 static int isp_pipeline_wait(struct isp_device
*isp
,
927 int(*busy
)(struct isp_device
*isp
))
929 unsigned long timeout
= jiffies
+ ISP_STOP_TIMEOUT
;
931 while (!time_after(jiffies
, timeout
)) {
940 * isp_pipeline_disable - Disable streaming on a pipeline
941 * @pipe: ISP pipeline
943 * Walk the entities chain starting at the pipeline output video node and stop
944 * all modules in the chain. Wait synchronously for the modules to be stopped if
947 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
948 * can't be stopped (in which case a software reset of the ISP is probably
951 static int isp_pipeline_disable(struct isp_pipeline
*pipe
)
953 struct isp_device
*isp
= pipe
->output
->isp
;
954 struct media_entity
*entity
;
955 struct media_pad
*pad
;
956 struct v4l2_subdev
*subdev
;
961 * We need to stop all the modules after CCDC first or they'll
962 * never stop since they may not get a full frame from CCDC.
964 entity
= &pipe
->output
->video
.entity
;
966 pad
= &entity
->pads
[0];
967 if (!(pad
->flags
& MEDIA_PAD_FL_SINK
))
970 pad
= media_entity_remote_pad(pad
);
972 media_entity_type(pad
->entity
) != MEDIA_ENT_T_V4L2_SUBDEV
)
975 entity
= pad
->entity
;
976 subdev
= media_entity_to_v4l2_subdev(entity
);
978 if (subdev
== &isp
->isp_ccdc
.subdev
) {
979 v4l2_subdev_call(&isp
->isp_aewb
.subdev
,
981 v4l2_subdev_call(&isp
->isp_af
.subdev
,
983 v4l2_subdev_call(&isp
->isp_hist
.subdev
,
987 v4l2_subdev_call(subdev
, video
, s_stream
, 0);
989 if (subdev
== &isp
->isp_res
.subdev
)
990 ret
= isp_pipeline_wait(isp
, isp_pipeline_wait_resizer
);
991 else if (subdev
== &isp
->isp_prev
.subdev
)
992 ret
= isp_pipeline_wait(isp
, isp_pipeline_wait_preview
);
993 else if (subdev
== &isp
->isp_ccdc
.subdev
)
994 ret
= isp_pipeline_wait(isp
, isp_pipeline_wait_ccdc
);
999 dev_info(isp
->dev
, "Unable to stop %s\n", subdev
->name
);
1000 /* If the entity failed to stopped, assume it has
1001 * crashed. Mark it as such, the ISP will be reset when
1002 * applications will release it.
1004 isp
->crashed
|= 1U << subdev
->entity
.id
;
1005 failure
= -ETIMEDOUT
;
1013 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
1014 * @pipe: ISP pipeline
1015 * @state: Stream state (stopped, single shot or continuous)
1017 * Set the pipeline to the given stream state. Pipelines can be started in
1018 * single-shot or continuous mode.
1020 * Return 0 if successful, or the return value of the failed video::s_stream
1021 * operation otherwise. The pipeline state is not updated when the operation
1022 * fails, except when stopping the pipeline.
1024 int omap3isp_pipeline_set_stream(struct isp_pipeline
*pipe
,
1025 enum isp_pipeline_stream_state state
)
1029 if (state
== ISP_PIPELINE_STREAM_STOPPED
)
1030 ret
= isp_pipeline_disable(pipe
);
1032 ret
= isp_pipeline_enable(pipe
, state
);
1034 if (ret
== 0 || state
== ISP_PIPELINE_STREAM_STOPPED
)
1035 pipe
->stream_state
= state
;
1041 * isp_pipeline_resume - Resume streaming on a pipeline
1042 * @pipe: ISP pipeline
1044 * Resume video output and input and re-enable pipeline.
1046 static void isp_pipeline_resume(struct isp_pipeline
*pipe
)
1048 int singleshot
= pipe
->stream_state
== ISP_PIPELINE_STREAM_SINGLESHOT
;
1050 omap3isp_video_resume(pipe
->output
, !singleshot
);
1052 omap3isp_video_resume(pipe
->input
, 0);
1053 isp_pipeline_enable(pipe
, pipe
->stream_state
);
1057 * isp_pipeline_suspend - Suspend streaming on a pipeline
1058 * @pipe: ISP pipeline
1062 static void isp_pipeline_suspend(struct isp_pipeline
*pipe
)
1064 isp_pipeline_disable(pipe
);
1068 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
1070 * @me: ISP module's media entity
1072 * Returns 1 if the entity has an enabled link to the output video node or 0
1073 * otherwise. It's true only while pipeline can have no more than one output
1076 static int isp_pipeline_is_last(struct media_entity
*me
)
1078 struct isp_pipeline
*pipe
;
1079 struct media_pad
*pad
;
1083 pipe
= to_isp_pipeline(me
);
1084 if (pipe
->stream_state
== ISP_PIPELINE_STREAM_STOPPED
)
1086 pad
= media_entity_remote_pad(&pipe
->output
->pad
);
1087 return pad
->entity
== me
;
1091 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
1092 * @me: ISP module's media entity
1094 * Suspend the whole pipeline if module's entity has an enabled link to the
1095 * output video node. It works only while pipeline can have no more than one
1098 static void isp_suspend_module_pipeline(struct media_entity
*me
)
1100 if (isp_pipeline_is_last(me
))
1101 isp_pipeline_suspend(to_isp_pipeline(me
));
1105 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
1106 * @me: ISP module's media entity
1108 * Resume the whole pipeline if module's entity has an enabled link to the
1109 * output video node. It works only while pipeline can have no more than one
1112 static void isp_resume_module_pipeline(struct media_entity
*me
)
1114 if (isp_pipeline_is_last(me
))
1115 isp_pipeline_resume(to_isp_pipeline(me
));
1119 * isp_suspend_modules - Suspend ISP submodules.
1120 * @isp: OMAP3 ISP device
1122 * Returns 0 if suspend left in idle state all the submodules properly,
1123 * or returns 1 if a general Reset is required to suspend the submodules.
1125 static int isp_suspend_modules(struct isp_device
*isp
)
1127 unsigned long timeout
;
1129 omap3isp_stat_suspend(&isp
->isp_aewb
);
1130 omap3isp_stat_suspend(&isp
->isp_af
);
1131 omap3isp_stat_suspend(&isp
->isp_hist
);
1132 isp_suspend_module_pipeline(&isp
->isp_res
.subdev
.entity
);
1133 isp_suspend_module_pipeline(&isp
->isp_prev
.subdev
.entity
);
1134 isp_suspend_module_pipeline(&isp
->isp_ccdc
.subdev
.entity
);
1135 isp_suspend_module_pipeline(&isp
->isp_csi2a
.subdev
.entity
);
1136 isp_suspend_module_pipeline(&isp
->isp_ccp2
.subdev
.entity
);
1138 timeout
= jiffies
+ ISP_STOP_TIMEOUT
;
1139 while (omap3isp_stat_busy(&isp
->isp_af
)
1140 || omap3isp_stat_busy(&isp
->isp_aewb
)
1141 || omap3isp_stat_busy(&isp
->isp_hist
)
1142 || omap3isp_preview_busy(&isp
->isp_prev
)
1143 || omap3isp_resizer_busy(&isp
->isp_res
)
1144 || omap3isp_ccdc_busy(&isp
->isp_ccdc
)) {
1145 if (time_after(jiffies
, timeout
)) {
1146 dev_info(isp
->dev
, "can't stop modules.\n");
1156 * isp_resume_modules - Resume ISP submodules.
1157 * @isp: OMAP3 ISP device
1159 static void isp_resume_modules(struct isp_device
*isp
)
1161 omap3isp_stat_resume(&isp
->isp_aewb
);
1162 omap3isp_stat_resume(&isp
->isp_af
);
1163 omap3isp_stat_resume(&isp
->isp_hist
);
1164 isp_resume_module_pipeline(&isp
->isp_res
.subdev
.entity
);
1165 isp_resume_module_pipeline(&isp
->isp_prev
.subdev
.entity
);
1166 isp_resume_module_pipeline(&isp
->isp_ccdc
.subdev
.entity
);
1167 isp_resume_module_pipeline(&isp
->isp_csi2a
.subdev
.entity
);
1168 isp_resume_module_pipeline(&isp
->isp_ccp2
.subdev
.entity
);
1172 * isp_reset - Reset ISP with a timeout wait for idle.
1173 * @isp: OMAP3 ISP device
1175 static int isp_reset(struct isp_device
*isp
)
1177 unsigned long timeout
= 0;
1180 isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_SYSCONFIG
)
1181 | ISP_SYSCONFIG_SOFTRESET
,
1182 OMAP3_ISP_IOMEM_MAIN
, ISP_SYSCONFIG
);
1183 while (!(isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
,
1184 ISP_SYSSTATUS
) & 0x1)) {
1185 if (timeout
++ > 10000) {
1186 dev_alert(isp
->dev
, "cannot reset ISP\n");
1197 * isp_save_context - Saves the values of the ISP module registers.
1198 * @isp: OMAP3 ISP device
1199 * @reg_list: Structure containing pairs of register address and value to
1203 isp_save_context(struct isp_device
*isp
, struct isp_reg
*reg_list
)
1205 struct isp_reg
*next
= reg_list
;
1207 for (; next
->reg
!= ISP_TOK_TERM
; next
++)
1208 next
->val
= isp_reg_readl(isp
, next
->mmio_range
, next
->reg
);
1212 * isp_restore_context - Restores the values of the ISP module registers.
1213 * @isp: OMAP3 ISP device
1214 * @reg_list: Structure containing pairs of register address and value to
1218 isp_restore_context(struct isp_device
*isp
, struct isp_reg
*reg_list
)
1220 struct isp_reg
*next
= reg_list
;
1222 for (; next
->reg
!= ISP_TOK_TERM
; next
++)
1223 isp_reg_writel(isp
, next
->val
, next
->mmio_range
, next
->reg
);
1227 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1228 * @isp: OMAP3 ISP device
1230 * Routine for saving the context of each module in the ISP.
1231 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1233 static void isp_save_ctx(struct isp_device
*isp
)
1235 isp_save_context(isp
, isp_reg_list
);
1236 omap_iommu_save_ctx(isp
->dev
);
1240 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1241 * @isp: OMAP3 ISP device
1243 * Routine for restoring the context of each module in the ISP.
1244 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1246 static void isp_restore_ctx(struct isp_device
*isp
)
1248 isp_restore_context(isp
, isp_reg_list
);
1249 omap_iommu_restore_ctx(isp
->dev
);
1250 omap3isp_ccdc_restore_context(isp
);
1251 omap3isp_preview_restore_context(isp
);
1254 /* -----------------------------------------------------------------------------
1255 * SBL resources management
1257 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1258 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1259 OMAP3_ISP_SBL_PREVIEW_READ | \
1260 OMAP3_ISP_SBL_RESIZER_READ)
1261 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1262 OMAP3_ISP_SBL_CSI2A_WRITE | \
1263 OMAP3_ISP_SBL_CSI2C_WRITE | \
1264 OMAP3_ISP_SBL_CCDC_WRITE | \
1265 OMAP3_ISP_SBL_PREVIEW_WRITE)
1267 void omap3isp_sbl_enable(struct isp_device
*isp
, enum isp_sbl_resource res
)
1271 isp
->sbl_resources
|= res
;
1273 if (isp
->sbl_resources
& OMAP3_ISP_SBL_CSI1_READ
)
1274 sbl
|= ISPCTRL_SBL_SHARED_RPORTA
;
1276 if (isp
->sbl_resources
& OMAP3_ISP_SBL_CCDC_LSC_READ
)
1277 sbl
|= ISPCTRL_SBL_SHARED_RPORTB
;
1279 if (isp
->sbl_resources
& OMAP3_ISP_SBL_CSI2C_WRITE
)
1280 sbl
|= ISPCTRL_SBL_SHARED_WPORTC
;
1282 if (isp
->sbl_resources
& OMAP3_ISP_SBL_RESIZER_WRITE
)
1283 sbl
|= ISPCTRL_SBL_WR0_RAM_EN
;
1285 if (isp
->sbl_resources
& OMAP3_ISP_SBL_WRITE
)
1286 sbl
|= ISPCTRL_SBL_WR1_RAM_EN
;
1288 if (isp
->sbl_resources
& OMAP3_ISP_SBL_READ
)
1289 sbl
|= ISPCTRL_SBL_RD_RAM_EN
;
1291 isp_reg_set(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
, sbl
);
1294 void omap3isp_sbl_disable(struct isp_device
*isp
, enum isp_sbl_resource res
)
1298 isp
->sbl_resources
&= ~res
;
1300 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_CSI1_READ
))
1301 sbl
|= ISPCTRL_SBL_SHARED_RPORTA
;
1303 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_CCDC_LSC_READ
))
1304 sbl
|= ISPCTRL_SBL_SHARED_RPORTB
;
1306 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_CSI2C_WRITE
))
1307 sbl
|= ISPCTRL_SBL_SHARED_WPORTC
;
1309 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_RESIZER_WRITE
))
1310 sbl
|= ISPCTRL_SBL_WR0_RAM_EN
;
1312 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_WRITE
))
1313 sbl
|= ISPCTRL_SBL_WR1_RAM_EN
;
1315 if (!(isp
->sbl_resources
& OMAP3_ISP_SBL_READ
))
1316 sbl
|= ISPCTRL_SBL_RD_RAM_EN
;
1318 isp_reg_clr(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
, sbl
);
1322 * isp_module_sync_idle - Helper to sync module with its idle state
1323 * @me: ISP submodule's media entity
1324 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1325 * @stopping: flag which tells module wants to stop
1327 * This function checks if ISP submodule needs to wait for next interrupt. If
1328 * yes, makes the caller to sleep while waiting for such event.
1330 int omap3isp_module_sync_idle(struct media_entity
*me
, wait_queue_head_t
*wait
,
1333 struct isp_pipeline
*pipe
= to_isp_pipeline(me
);
1335 if (pipe
->stream_state
== ISP_PIPELINE_STREAM_STOPPED
||
1336 (pipe
->stream_state
== ISP_PIPELINE_STREAM_SINGLESHOT
&&
1337 !isp_pipeline_ready(pipe
)))
1341 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1342 * scenario. We'll call it here to avoid race conditions.
1344 atomic_set(stopping
, 1);
1348 * If module is the last one, it's writing to memory. In this case,
1349 * it's necessary to check if the module is already paused due to
1350 * DMA queue underrun or if it has to wait for next interrupt to be
1352 * If it isn't the last one, the function won't sleep but *stopping
1353 * will still be set to warn next submodule caller's interrupt the
1354 * module wants to be idle.
1356 if (isp_pipeline_is_last(me
)) {
1357 struct isp_video
*video
= pipe
->output
;
1358 unsigned long flags
;
1359 spin_lock_irqsave(&video
->queue
->irqlock
, flags
);
1360 if (video
->dmaqueue_flags
& ISP_VIDEO_DMAQUEUE_UNDERRUN
) {
1361 spin_unlock_irqrestore(&video
->queue
->irqlock
, flags
);
1362 atomic_set(stopping
, 0);
1366 spin_unlock_irqrestore(&video
->queue
->irqlock
, flags
);
1367 if (!wait_event_timeout(*wait
, !atomic_read(stopping
),
1368 msecs_to_jiffies(1000))) {
1369 atomic_set(stopping
, 0);
1379 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1380 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1381 * @stopping: flag which tells module wants to stop
1383 * This function checks if ISP submodule was stopping. In case of yes, it
1384 * notices the caller by setting stopping to 0 and waking up the wait queue.
1385 * Returns 1 if it was stopping or 0 otherwise.
1387 int omap3isp_module_sync_is_stopping(wait_queue_head_t
*wait
,
1390 if (atomic_cmpxchg(stopping
, 1, 0)) {
1398 /* --------------------------------------------------------------------------
1402 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1403 ISPCTRL_HIST_CLK_EN | \
1404 ISPCTRL_RSZ_CLK_EN | \
1405 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1406 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1408 static void __isp_subclk_update(struct isp_device
*isp
)
1412 /* AEWB and AF share the same clock. */
1413 if (isp
->subclk_resources
&
1414 (OMAP3_ISP_SUBCLK_AEWB
| OMAP3_ISP_SUBCLK_AF
))
1415 clk
|= ISPCTRL_H3A_CLK_EN
;
1417 if (isp
->subclk_resources
& OMAP3_ISP_SUBCLK_HIST
)
1418 clk
|= ISPCTRL_HIST_CLK_EN
;
1420 if (isp
->subclk_resources
& OMAP3_ISP_SUBCLK_RESIZER
)
1421 clk
|= ISPCTRL_RSZ_CLK_EN
;
1423 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1426 if (isp
->subclk_resources
& OMAP3_ISP_SUBCLK_CCDC
)
1427 clk
|= ISPCTRL_CCDC_CLK_EN
| ISPCTRL_CCDC_RAM_EN
;
1429 if (isp
->subclk_resources
& OMAP3_ISP_SUBCLK_PREVIEW
)
1430 clk
|= ISPCTRL_PREV_CLK_EN
| ISPCTRL_PREV_RAM_EN
;
1432 isp_reg_clr_set(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_CTRL
,
1433 ISPCTRL_CLKS_MASK
, clk
);
1436 void omap3isp_subclk_enable(struct isp_device
*isp
,
1437 enum isp_subclk_resource res
)
1439 isp
->subclk_resources
|= res
;
1441 __isp_subclk_update(isp
);
1444 void omap3isp_subclk_disable(struct isp_device
*isp
,
1445 enum isp_subclk_resource res
)
1447 isp
->subclk_resources
&= ~res
;
1449 __isp_subclk_update(isp
);
1453 * isp_enable_clocks - Enable ISP clocks
1454 * @isp: OMAP3 ISP device
1456 * Return 0 if successful, or clk_prepare_enable return value if any of them
1459 static int isp_enable_clocks(struct isp_device
*isp
)
1464 r
= clk_prepare_enable(isp
->clock
[ISP_CLK_CAM_ICK
]);
1466 dev_err(isp
->dev
, "failed to enable cam_ick clock\n");
1467 goto out_clk_enable_ick
;
1469 r
= clk_set_rate(isp
->clock
[ISP_CLK_CAM_MCLK
], CM_CAM_MCLK_HZ
);
1471 dev_err(isp
->dev
, "clk_set_rate for cam_mclk failed\n");
1472 goto out_clk_enable_mclk
;
1474 r
= clk_prepare_enable(isp
->clock
[ISP_CLK_CAM_MCLK
]);
1476 dev_err(isp
->dev
, "failed to enable cam_mclk clock\n");
1477 goto out_clk_enable_mclk
;
1479 rate
= clk_get_rate(isp
->clock
[ISP_CLK_CAM_MCLK
]);
1480 if (rate
!= CM_CAM_MCLK_HZ
)
1481 dev_warn(isp
->dev
, "unexpected cam_mclk rate:\n"
1483 " actual : %ld\n", CM_CAM_MCLK_HZ
, rate
);
1484 r
= clk_prepare_enable(isp
->clock
[ISP_CLK_CSI2_FCK
]);
1486 dev_err(isp
->dev
, "failed to enable csi2_fck clock\n");
1487 goto out_clk_enable_csi2_fclk
;
1491 out_clk_enable_csi2_fclk
:
1492 clk_disable_unprepare(isp
->clock
[ISP_CLK_CAM_MCLK
]);
1493 out_clk_enable_mclk
:
1494 clk_disable_unprepare(isp
->clock
[ISP_CLK_CAM_ICK
]);
1500 * isp_disable_clocks - Disable ISP clocks
1501 * @isp: OMAP3 ISP device
1503 static void isp_disable_clocks(struct isp_device
*isp
)
1505 clk_disable_unprepare(isp
->clock
[ISP_CLK_CAM_ICK
]);
1506 clk_disable_unprepare(isp
->clock
[ISP_CLK_CAM_MCLK
]);
1507 clk_disable_unprepare(isp
->clock
[ISP_CLK_CSI2_FCK
]);
1510 static const char *isp_clocks
[] = {
1517 static int isp_get_clocks(struct isp_device
*isp
)
1522 for (i
= 0; i
< ARRAY_SIZE(isp_clocks
); ++i
) {
1523 clk
= devm_clk_get(isp
->dev
, isp_clocks
[i
]);
1525 dev_err(isp
->dev
, "clk_get %s failed\n", isp_clocks
[i
]);
1526 return PTR_ERR(clk
);
1529 isp
->clock
[i
] = clk
;
1536 * omap3isp_get - Acquire the ISP resource.
1538 * Initializes the clocks for the first acquire.
1540 * Increment the reference count on the ISP. If the first reference is taken,
1541 * enable clocks and power-up all submodules.
1543 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1545 static struct isp_device
*__omap3isp_get(struct isp_device
*isp
, bool irq
)
1547 struct isp_device
*__isp
= isp
;
1552 mutex_lock(&isp
->isp_mutex
);
1553 if (isp
->ref_count
> 0)
1556 if (isp_enable_clocks(isp
) < 0) {
1561 /* We don't want to restore context before saving it! */
1562 if (isp
->has_context
)
1563 isp_restore_ctx(isp
);
1566 isp_enable_interrupts(isp
);
1571 mutex_unlock(&isp
->isp_mutex
);
1576 struct isp_device
*omap3isp_get(struct isp_device
*isp
)
1578 return __omap3isp_get(isp
, true);
1582 * omap3isp_put - Release the ISP
1584 * Decrement the reference count on the ISP. If the last reference is released,
1585 * power-down all submodules, disable clocks and free temporary buffers.
1587 void omap3isp_put(struct isp_device
*isp
)
1592 mutex_lock(&isp
->isp_mutex
);
1593 BUG_ON(isp
->ref_count
== 0);
1594 if (--isp
->ref_count
== 0) {
1595 isp_disable_interrupts(isp
);
1598 isp
->has_context
= 1;
1600 /* Reset the ISP if an entity has failed to stop. This is the
1601 * only way to recover from such conditions.
1605 isp_disable_clocks(isp
);
1607 mutex_unlock(&isp
->isp_mutex
);
1610 /* --------------------------------------------------------------------------
1611 * Platform device driver
1615 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1616 * @isp: OMAP3 ISP device
1618 #define ISP_PRINT_REGISTER(isp, name)\
1619 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1620 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1621 #define SBL_PRINT_REGISTER(isp, name)\
1622 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1623 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1625 void omap3isp_print_status(struct isp_device
*isp
)
1627 dev_dbg(isp
->dev
, "-------------ISP Register dump--------------\n");
1629 ISP_PRINT_REGISTER(isp
, SYSCONFIG
);
1630 ISP_PRINT_REGISTER(isp
, SYSSTATUS
);
1631 ISP_PRINT_REGISTER(isp
, IRQ0ENABLE
);
1632 ISP_PRINT_REGISTER(isp
, IRQ0STATUS
);
1633 ISP_PRINT_REGISTER(isp
, TCTRL_GRESET_LENGTH
);
1634 ISP_PRINT_REGISTER(isp
, TCTRL_PSTRB_REPLAY
);
1635 ISP_PRINT_REGISTER(isp
, CTRL
);
1636 ISP_PRINT_REGISTER(isp
, TCTRL_CTRL
);
1637 ISP_PRINT_REGISTER(isp
, TCTRL_FRAME
);
1638 ISP_PRINT_REGISTER(isp
, TCTRL_PSTRB_DELAY
);
1639 ISP_PRINT_REGISTER(isp
, TCTRL_STRB_DELAY
);
1640 ISP_PRINT_REGISTER(isp
, TCTRL_SHUT_DELAY
);
1641 ISP_PRINT_REGISTER(isp
, TCTRL_PSTRB_LENGTH
);
1642 ISP_PRINT_REGISTER(isp
, TCTRL_STRB_LENGTH
);
1643 ISP_PRINT_REGISTER(isp
, TCTRL_SHUT_LENGTH
);
1645 SBL_PRINT_REGISTER(isp
, PCR
);
1646 SBL_PRINT_REGISTER(isp
, SDR_REQ_EXP
);
1648 dev_dbg(isp
->dev
, "--------------------------------------------\n");
1654 * Power management support.
1656 * As the ISP can't properly handle an input video stream interruption on a non
1657 * frame boundary, the ISP pipelines need to be stopped before sensors get
1658 * suspended. However, as suspending the sensors can require a running clock,
1659 * which can be provided by the ISP, the ISP can't be completely suspended
1660 * before the sensor.
1662 * To solve this problem power management support is split into prepare/complete
1663 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1664 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1665 * resume(), and the the pipelines are restarted in complete().
1667 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1670 static int isp_pm_prepare(struct device
*dev
)
1672 struct isp_device
*isp
= dev_get_drvdata(dev
);
1675 WARN_ON(mutex_is_locked(&isp
->isp_mutex
));
1677 if (isp
->ref_count
== 0)
1680 reset
= isp_suspend_modules(isp
);
1681 isp_disable_interrupts(isp
);
1689 static int isp_pm_suspend(struct device
*dev
)
1691 struct isp_device
*isp
= dev_get_drvdata(dev
);
1693 WARN_ON(mutex_is_locked(&isp
->isp_mutex
));
1696 isp_disable_clocks(isp
);
1701 static int isp_pm_resume(struct device
*dev
)
1703 struct isp_device
*isp
= dev_get_drvdata(dev
);
1705 if (isp
->ref_count
== 0)
1708 return isp_enable_clocks(isp
);
1711 static void isp_pm_complete(struct device
*dev
)
1713 struct isp_device
*isp
= dev_get_drvdata(dev
);
1715 if (isp
->ref_count
== 0)
1718 isp_restore_ctx(isp
);
1719 isp_enable_interrupts(isp
);
1720 isp_resume_modules(isp
);
1725 #define isp_pm_prepare NULL
1726 #define isp_pm_suspend NULL
1727 #define isp_pm_resume NULL
1728 #define isp_pm_complete NULL
1730 #endif /* CONFIG_PM */
1732 static void isp_unregister_entities(struct isp_device
*isp
)
1734 omap3isp_csi2_unregister_entities(&isp
->isp_csi2a
);
1735 omap3isp_ccp2_unregister_entities(&isp
->isp_ccp2
);
1736 omap3isp_ccdc_unregister_entities(&isp
->isp_ccdc
);
1737 omap3isp_preview_unregister_entities(&isp
->isp_prev
);
1738 omap3isp_resizer_unregister_entities(&isp
->isp_res
);
1739 omap3isp_stat_unregister_entities(&isp
->isp_aewb
);
1740 omap3isp_stat_unregister_entities(&isp
->isp_af
);
1741 omap3isp_stat_unregister_entities(&isp
->isp_hist
);
1743 v4l2_device_unregister(&isp
->v4l2_dev
);
1744 media_device_unregister(&isp
->media_dev
);
1748 * isp_register_subdev_group - Register a group of subdevices
1749 * @isp: OMAP3 ISP device
1750 * @board_info: I2C subdevs board information array
1752 * Register all I2C subdevices in the board_info array. The array must be
1753 * terminated by a NULL entry, and the first entry must be the sensor.
1755 * Return a pointer to the sensor media entity if it has been successfully
1756 * registered, or NULL otherwise.
1758 static struct v4l2_subdev
*
1759 isp_register_subdev_group(struct isp_device
*isp
,
1760 struct isp_subdev_i2c_board_info
*board_info
)
1762 struct v4l2_subdev
*sensor
= NULL
;
1765 if (board_info
->board_info
== NULL
)
1768 for (first
= 1; board_info
->board_info
; ++board_info
, first
= 0) {
1769 struct v4l2_subdev
*subdev
;
1770 struct i2c_adapter
*adapter
;
1772 adapter
= i2c_get_adapter(board_info
->i2c_adapter_id
);
1773 if (adapter
== NULL
) {
1774 dev_err(isp
->dev
, "%s: Unable to get I2C adapter %d for "
1775 "device %s\n", __func__
,
1776 board_info
->i2c_adapter_id
,
1777 board_info
->board_info
->type
);
1781 subdev
= v4l2_i2c_new_subdev_board(&isp
->v4l2_dev
, adapter
,
1782 board_info
->board_info
, NULL
);
1783 if (subdev
== NULL
) {
1784 dev_err(isp
->dev
, "%s: Unable to register subdev %s\n",
1785 __func__
, board_info
->board_info
->type
);
1796 static int isp_register_entities(struct isp_device
*isp
)
1798 struct isp_platform_data
*pdata
= isp
->pdata
;
1799 struct isp_v4l2_subdevs_group
*subdevs
;
1802 isp
->media_dev
.dev
= isp
->dev
;
1803 strlcpy(isp
->media_dev
.model
, "TI OMAP3 ISP",
1804 sizeof(isp
->media_dev
.model
));
1805 isp
->media_dev
.hw_revision
= isp
->revision
;
1806 isp
->media_dev
.link_notify
= isp_pipeline_link_notify
;
1807 ret
= media_device_register(&isp
->media_dev
);
1809 dev_err(isp
->dev
, "%s: Media device registration failed (%d)\n",
1814 isp
->v4l2_dev
.mdev
= &isp
->media_dev
;
1815 ret
= v4l2_device_register(isp
->dev
, &isp
->v4l2_dev
);
1817 dev_err(isp
->dev
, "%s: V4L2 device registration failed (%d)\n",
1822 /* Register internal entities */
1823 ret
= omap3isp_ccp2_register_entities(&isp
->isp_ccp2
, &isp
->v4l2_dev
);
1827 ret
= omap3isp_csi2_register_entities(&isp
->isp_csi2a
, &isp
->v4l2_dev
);
1831 ret
= omap3isp_ccdc_register_entities(&isp
->isp_ccdc
, &isp
->v4l2_dev
);
1835 ret
= omap3isp_preview_register_entities(&isp
->isp_prev
,
1840 ret
= omap3isp_resizer_register_entities(&isp
->isp_res
, &isp
->v4l2_dev
);
1844 ret
= omap3isp_stat_register_entities(&isp
->isp_aewb
, &isp
->v4l2_dev
);
1848 ret
= omap3isp_stat_register_entities(&isp
->isp_af
, &isp
->v4l2_dev
);
1852 ret
= omap3isp_stat_register_entities(&isp
->isp_hist
, &isp
->v4l2_dev
);
1856 /* Register external entities */
1857 for (subdevs
= pdata
->subdevs
; subdevs
&& subdevs
->subdevs
; ++subdevs
) {
1858 struct v4l2_subdev
*sensor
;
1859 struct media_entity
*input
;
1864 sensor
= isp_register_subdev_group(isp
, subdevs
->subdevs
);
1868 sensor
->host_priv
= subdevs
;
1870 /* Connect the sensor to the correct interface module. Parallel
1871 * sensors are connected directly to the CCDC, while serial
1872 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1873 * through CSIPHY1 or CSIPHY2.
1875 switch (subdevs
->interface
) {
1876 case ISP_INTERFACE_PARALLEL
:
1877 input
= &isp
->isp_ccdc
.subdev
.entity
;
1878 pad
= CCDC_PAD_SINK
;
1882 case ISP_INTERFACE_CSI2A_PHY2
:
1883 input
= &isp
->isp_csi2a
.subdev
.entity
;
1884 pad
= CSI2_PAD_SINK
;
1885 flags
= MEDIA_LNK_FL_IMMUTABLE
1886 | MEDIA_LNK_FL_ENABLED
;
1889 case ISP_INTERFACE_CCP2B_PHY1
:
1890 case ISP_INTERFACE_CCP2B_PHY2
:
1891 input
= &isp
->isp_ccp2
.subdev
.entity
;
1892 pad
= CCP2_PAD_SINK
;
1896 case ISP_INTERFACE_CSI2C_PHY1
:
1897 input
= &isp
->isp_csi2c
.subdev
.entity
;
1898 pad
= CSI2_PAD_SINK
;
1899 flags
= MEDIA_LNK_FL_IMMUTABLE
1900 | MEDIA_LNK_FL_ENABLED
;
1904 dev_err(isp
->dev
, "%s: invalid interface type %u\n",
1905 __func__
, subdevs
->interface
);
1910 for (i
= 0; i
< sensor
->entity
.num_pads
; i
++) {
1911 if (sensor
->entity
.pads
[i
].flags
& MEDIA_PAD_FL_SOURCE
)
1914 if (i
== sensor
->entity
.num_pads
) {
1916 "%s: no source pad in external entity\n",
1922 ret
= media_entity_create_link(&sensor
->entity
, i
, input
, pad
,
1928 ret
= v4l2_device_register_subdev_nodes(&isp
->v4l2_dev
);
1932 isp_unregister_entities(isp
);
1937 static void isp_cleanup_modules(struct isp_device
*isp
)
1939 omap3isp_h3a_aewb_cleanup(isp
);
1940 omap3isp_h3a_af_cleanup(isp
);
1941 omap3isp_hist_cleanup(isp
);
1942 omap3isp_resizer_cleanup(isp
);
1943 omap3isp_preview_cleanup(isp
);
1944 omap3isp_ccdc_cleanup(isp
);
1945 omap3isp_ccp2_cleanup(isp
);
1946 omap3isp_csi2_cleanup(isp
);
1949 static int isp_initialize_modules(struct isp_device
*isp
)
1953 ret
= omap3isp_csiphy_init(isp
);
1955 dev_err(isp
->dev
, "CSI PHY initialization failed\n");
1959 ret
= omap3isp_csi2_init(isp
);
1961 dev_err(isp
->dev
, "CSI2 initialization failed\n");
1965 ret
= omap3isp_ccp2_init(isp
);
1967 dev_err(isp
->dev
, "CCP2 initialization failed\n");
1971 ret
= omap3isp_ccdc_init(isp
);
1973 dev_err(isp
->dev
, "CCDC initialization failed\n");
1977 ret
= omap3isp_preview_init(isp
);
1979 dev_err(isp
->dev
, "Preview initialization failed\n");
1983 ret
= omap3isp_resizer_init(isp
);
1985 dev_err(isp
->dev
, "Resizer initialization failed\n");
1989 ret
= omap3isp_hist_init(isp
);
1991 dev_err(isp
->dev
, "Histogram initialization failed\n");
1995 ret
= omap3isp_h3a_aewb_init(isp
);
1997 dev_err(isp
->dev
, "H3A AEWB initialization failed\n");
1998 goto error_h3a_aewb
;
2001 ret
= omap3isp_h3a_af_init(isp
);
2003 dev_err(isp
->dev
, "H3A AF initialization failed\n");
2007 /* Connect the submodules. */
2008 ret
= media_entity_create_link(
2009 &isp
->isp_csi2a
.subdev
.entity
, CSI2_PAD_SOURCE
,
2010 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SINK
, 0);
2014 ret
= media_entity_create_link(
2015 &isp
->isp_ccp2
.subdev
.entity
, CCP2_PAD_SOURCE
,
2016 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SINK
, 0);
2020 ret
= media_entity_create_link(
2021 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SOURCE_VP
,
2022 &isp
->isp_prev
.subdev
.entity
, PREV_PAD_SINK
, 0);
2026 ret
= media_entity_create_link(
2027 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SOURCE_OF
,
2028 &isp
->isp_res
.subdev
.entity
, RESZ_PAD_SINK
, 0);
2032 ret
= media_entity_create_link(
2033 &isp
->isp_prev
.subdev
.entity
, PREV_PAD_SOURCE
,
2034 &isp
->isp_res
.subdev
.entity
, RESZ_PAD_SINK
, 0);
2038 ret
= media_entity_create_link(
2039 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SOURCE_VP
,
2040 &isp
->isp_aewb
.subdev
.entity
, 0,
2041 MEDIA_LNK_FL_ENABLED
| MEDIA_LNK_FL_IMMUTABLE
);
2045 ret
= media_entity_create_link(
2046 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SOURCE_VP
,
2047 &isp
->isp_af
.subdev
.entity
, 0,
2048 MEDIA_LNK_FL_ENABLED
| MEDIA_LNK_FL_IMMUTABLE
);
2052 ret
= media_entity_create_link(
2053 &isp
->isp_ccdc
.subdev
.entity
, CCDC_PAD_SOURCE_VP
,
2054 &isp
->isp_hist
.subdev
.entity
, 0,
2055 MEDIA_LNK_FL_ENABLED
| MEDIA_LNK_FL_IMMUTABLE
);
2062 omap3isp_h3a_af_cleanup(isp
);
2064 omap3isp_h3a_aewb_cleanup(isp
);
2066 omap3isp_hist_cleanup(isp
);
2068 omap3isp_resizer_cleanup(isp
);
2070 omap3isp_preview_cleanup(isp
);
2072 omap3isp_ccdc_cleanup(isp
);
2074 omap3isp_ccp2_cleanup(isp
);
2076 omap3isp_csi2_cleanup(isp
);
2083 * isp_remove - Remove ISP platform device
2084 * @pdev: Pointer to ISP platform device
2088 static int isp_remove(struct platform_device
*pdev
)
2090 struct isp_device
*isp
= platform_get_drvdata(pdev
);
2092 isp_unregister_entities(isp
);
2093 isp_cleanup_modules(isp
);
2094 isp_xclk_cleanup(isp
);
2096 __omap3isp_get(isp
, false);
2097 iommu_detach_device(isp
->domain
, &pdev
->dev
);
2098 iommu_domain_free(isp
->domain
);
2105 static int isp_map_mem_resource(struct platform_device
*pdev
,
2106 struct isp_device
*isp
,
2107 enum isp_mem_resources res
)
2109 struct resource
*mem
;
2111 /* request the mem region for the camera registers */
2113 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, res
);
2115 dev_err(isp
->dev
, "no mem resource?\n");
2119 if (!devm_request_mem_region(isp
->dev
, mem
->start
, resource_size(mem
),
2122 "cannot reserve camera register I/O region\n");
2125 isp
->mmio_base_phys
[res
] = mem
->start
;
2126 isp
->mmio_size
[res
] = resource_size(mem
);
2128 /* map the region */
2129 isp
->mmio_base
[res
] = devm_ioremap_nocache(isp
->dev
,
2130 isp
->mmio_base_phys
[res
],
2131 isp
->mmio_size
[res
]);
2132 if (!isp
->mmio_base
[res
]) {
2133 dev_err(isp
->dev
, "cannot map camera register I/O region\n");
2141 * isp_probe - Probe ISP platform device
2142 * @pdev: Pointer to ISP platform device
2144 * Returns 0 if successful,
2145 * -ENOMEM if no memory available,
2146 * -ENODEV if no platform device resources found
2147 * or no space for remapping registers,
2148 * -EINVAL if couldn't install ISR,
2149 * or clk_get return error value.
2151 static int isp_probe(struct platform_device
*pdev
)
2153 struct isp_platform_data
*pdata
= pdev
->dev
.platform_data
;
2154 struct isp_device
*isp
;
2161 isp
= devm_kzalloc(&pdev
->dev
, sizeof(*isp
), GFP_KERNEL
);
2163 dev_err(&pdev
->dev
, "could not allocate memory\n");
2167 isp
->autoidle
= autoidle
;
2169 mutex_init(&isp
->isp_mutex
);
2170 spin_lock_init(&isp
->stat_lock
);
2172 isp
->dev
= &pdev
->dev
;
2176 isp
->raw_dmamask
= DMA_BIT_MASK(32);
2177 isp
->dev
->dma_mask
= &isp
->raw_dmamask
;
2178 isp
->dev
->coherent_dma_mask
= DMA_BIT_MASK(32);
2180 platform_set_drvdata(pdev
, isp
);
2183 isp
->isp_csiphy1
.vdd
= devm_regulator_get(&pdev
->dev
, "VDD_CSIPHY1");
2184 isp
->isp_csiphy2
.vdd
= devm_regulator_get(&pdev
->dev
, "VDD_CSIPHY2");
2188 * The ISP clock tree is revision-dependent. We thus need to enable ICLK
2189 * manually to read the revision before calling __omap3isp_get().
2191 ret
= isp_map_mem_resource(pdev
, isp
, OMAP3_ISP_IOMEM_MAIN
);
2195 ret
= isp_get_clocks(isp
);
2199 ret
= clk_enable(isp
->clock
[ISP_CLK_CAM_ICK
]);
2203 isp
->revision
= isp_reg_readl(isp
, OMAP3_ISP_IOMEM_MAIN
, ISP_REVISION
);
2204 dev_info(isp
->dev
, "Revision %d.%d found\n",
2205 (isp
->revision
& 0xf0) >> 4, isp
->revision
& 0x0f);
2207 clk_disable(isp
->clock
[ISP_CLK_CAM_ICK
]);
2209 if (__omap3isp_get(isp
, false) == NULL
) {
2214 ret
= isp_reset(isp
);
2218 ret
= isp_xclk_init(isp
);
2222 /* Memory resources */
2223 for (m
= 0; m
< ARRAY_SIZE(isp_res_maps
); m
++)
2224 if (isp
->revision
== isp_res_maps
[m
].isp_rev
)
2227 if (m
== ARRAY_SIZE(isp_res_maps
)) {
2228 dev_err(isp
->dev
, "No resource map found for ISP rev %d.%d\n",
2229 (isp
->revision
& 0xf0) >> 4, isp
->revision
& 0xf);
2234 for (i
= 1; i
< OMAP3_ISP_IOMEM_LAST
; i
++) {
2235 if (isp_res_maps
[m
].map
& 1 << i
) {
2236 ret
= isp_map_mem_resource(pdev
, isp
, i
);
2242 isp
->domain
= iommu_domain_alloc(pdev
->dev
.bus
);
2244 dev_err(isp
->dev
, "can't alloc iommu domain\n");
2249 ret
= iommu_attach_device(isp
->domain
, &pdev
->dev
);
2251 dev_err(&pdev
->dev
, "can't attach iommu device: %d\n", ret
);
2252 ret
= -EPROBE_DEFER
;
2257 isp
->irq_num
= platform_get_irq(pdev
, 0);
2258 if (isp
->irq_num
<= 0) {
2259 dev_err(isp
->dev
, "No IRQ resource\n");
2264 if (devm_request_irq(isp
->dev
, isp
->irq_num
, isp_isr
, IRQF_SHARED
,
2265 "OMAP3 ISP", isp
)) {
2266 dev_err(isp
->dev
, "Unable to request IRQ\n");
2272 ret
= isp_initialize_modules(isp
);
2276 ret
= isp_register_entities(isp
);
2280 isp_core_init(isp
, 1);
2286 isp_cleanup_modules(isp
);
2288 iommu_detach_device(isp
->domain
, &pdev
->dev
);
2290 iommu_domain_free(isp
->domain
);
2293 isp_xclk_cleanup(isp
);
2296 mutex_destroy(&isp
->isp_mutex
);
2301 static const struct dev_pm_ops omap3isp_pm_ops
= {
2302 .prepare
= isp_pm_prepare
,
2303 .suspend
= isp_pm_suspend
,
2304 .resume
= isp_pm_resume
,
2305 .complete
= isp_pm_complete
,
2308 static struct platform_device_id omap3isp_id_table
[] = {
2312 MODULE_DEVICE_TABLE(platform
, omap3isp_id_table
);
2314 static struct platform_driver omap3isp_driver
= {
2316 .remove
= isp_remove
,
2317 .id_table
= omap3isp_id_table
,
2319 .owner
= THIS_MODULE
,
2321 .pm
= &omap3isp_pm_ops
,
2325 module_platform_driver(omap3isp_driver
);
2327 MODULE_AUTHOR("Nokia Corporation");
2328 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2329 MODULE_LICENSE("GPL");
2330 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION
);