1 /***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
22 #include <linux/err.h>
24 #include <linux/init.h>
26 #include <linux/ioport.h>
27 #include <linux/miscdevice.h>
28 #include <linux/module.h>
29 #include <linux/mutex.h>
30 #include <linux/notifier.h>
31 #include <linux/reboot.h>
32 #include <linux/uaccess.h>
33 #include <linux/watchdog.h>
35 #define DRVNAME "f71808e_wdt"
37 #define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
38 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
39 #define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
41 #define SIO_REG_LDSEL 0x07 /* Logical device select */
42 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
43 #define SIO_REG_DEVREV 0x22 /* Device revision */
44 #define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
45 #define SIO_REG_ROM_ADDR_SEL 0x27 /* ROM address select */
46 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
47 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
48 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
49 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
50 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
52 #define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
53 #define SIO_F71808_ID 0x0901 /* Chipset ID */
54 #define SIO_F71858_ID 0x0507 /* Chipset ID */
55 #define SIO_F71862_ID 0x0601 /* Chipset ID */
56 #define SIO_F71882_ID 0x0541 /* Chipset ID */
57 #define SIO_F71889_ID 0x0723 /* Chipset ID */
59 #define F71808FG_REG_WDO_CONF 0xf0
60 #define F71808FG_REG_WDT_CONF 0xf5
61 #define F71808FG_REG_WD_TIME 0xf6
63 #define F71808FG_FLAG_WDOUT_EN 7
65 #define F71808FG_FLAG_WDTMOUT_STS 5
66 #define F71808FG_FLAG_WD_EN 5
67 #define F71808FG_FLAG_WD_PULSE 4
68 #define F71808FG_FLAG_WD_UNIT 3
71 #define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
72 #define WATCHDOG_MAX_TIMEOUT (60 * 255)
73 #define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
75 #define WATCHDOG_F71862FG_PIN 63 /* default watchdog reset output
78 static unsigned short force_id
;
79 module_param(force_id
, ushort
, 0);
80 MODULE_PARM_DESC(force_id
, "Override the detected device ID");
82 static const int max_timeout
= WATCHDOG_MAX_TIMEOUT
;
83 static int timeout
= WATCHDOG_TIMEOUT
; /* default timeout in seconds */
84 module_param(timeout
, int, 0);
85 MODULE_PARM_DESC(timeout
,
86 "Watchdog timeout in seconds. 1<= timeout <="
87 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT
) " (default="
88 __MODULE_STRING(WATCHDOG_TIMEOUT
) ")");
90 static unsigned int pulse_width
= WATCHDOG_PULSE_WIDTH
;
91 module_param(pulse_width
, uint
, 0);
92 MODULE_PARM_DESC(pulse_width
,
93 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
94 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH
) ")");
96 static unsigned int f71862fg_pin
= WATCHDOG_F71862FG_PIN
;
97 module_param(f71862fg_pin
, uint
, 0);
98 MODULE_PARM_DESC(f71862fg_pin
,
99 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
100 " (default=" __MODULE_STRING(WATCHDOG_F71862FG_PIN
)")");
102 static int nowayout
= WATCHDOG_NOWAYOUT
;
103 module_param(nowayout
, bool, 0444);
104 MODULE_PARM_DESC(nowayout
, "Disable watchdog shutdown on close");
106 static unsigned int start_withtimeout
;
107 module_param(start_withtimeout
, uint
, 0);
108 MODULE_PARM_DESC(start_withtimeout
, "Start watchdog timer on module load with"
109 " given initial timeout. Zero (default) disables this feature.");
111 enum chips
{ f71808fg
, f71858fg
, f71862fg
, f71882fg
, f71889fg
};
113 static const char *f71808e_names
[] = {
121 /* Super-I/O Function prototypes */
122 static inline int superio_inb(int base
, int reg
);
123 static inline int superio_inw(int base
, int reg
);
124 static inline void superio_outb(int base
, int reg
, u8 val
);
125 static inline void superio_set_bit(int base
, int reg
, int bit
);
126 static inline void superio_clear_bit(int base
, int reg
, int bit
);
127 static inline int superio_enter(int base
);
128 static inline void superio_select(int base
, int ld
);
129 static inline void superio_exit(int base
);
131 struct watchdog_data
{
132 unsigned short sioaddr
;
134 unsigned long opened
;
137 struct watchdog_info ident
;
139 unsigned short timeout
;
140 u8 timer_val
; /* content for the wd_time register */
142 u8 pulse_val
; /* pulse width flag */
143 char pulse_mode
; /* enable pulse output mode? */
144 char caused_reboot
; /* last reboot was by the watchdog */
147 static struct watchdog_data watchdog
= {
148 .lock
= __MUTEX_INITIALIZER(watchdog
.lock
),
151 /* Super I/O functions */
152 static inline int superio_inb(int base
, int reg
)
155 return inb(base
+ 1);
158 static int superio_inw(int base
, int reg
)
161 val
= superio_inb(base
, reg
) << 8;
162 val
|= superio_inb(base
, reg
+ 1);
166 static inline void superio_outb(int base
, int reg
, u8 val
)
172 static inline void superio_set_bit(int base
, int reg
, int bit
)
174 unsigned long val
= superio_inb(base
, reg
);
175 __set_bit(bit
, &val
);
176 superio_outb(base
, reg
, val
);
179 static inline void superio_clear_bit(int base
, int reg
, int bit
)
181 unsigned long val
= superio_inb(base
, reg
);
182 __clear_bit(bit
, &val
);
183 superio_outb(base
, reg
, val
);
186 static inline int superio_enter(int base
)
188 /* Don't step on other drivers' I/O space by accident */
189 if (!request_muxed_region(base
, 2, DRVNAME
)) {
190 printk(KERN_ERR DRVNAME
": I/O address 0x%04x already in use\n",
195 /* according to the datasheet the key must be send twice! */
196 outb(SIO_UNLOCK_KEY
, base
);
197 outb(SIO_UNLOCK_KEY
, base
);
202 static inline void superio_select(int base
, int ld
)
204 outb(SIO_REG_LDSEL
, base
);
208 static inline void superio_exit(int base
)
210 outb(SIO_LOCK_KEY
, base
);
211 release_region(base
, 2);
214 static int watchdog_set_timeout(int timeout
)
217 || timeout
> max_timeout
) {
218 printk(KERN_ERR DRVNAME
": watchdog timeout out of range\n");
222 mutex_lock(&watchdog
.lock
);
224 watchdog
.timeout
= timeout
;
225 if (timeout
> 0xff) {
226 watchdog
.timer_val
= DIV_ROUND_UP(timeout
, 60);
227 watchdog
.minutes_mode
= true;
229 watchdog
.timer_val
= timeout
;
230 watchdog
.minutes_mode
= false;
233 mutex_unlock(&watchdog
.lock
);
238 static int watchdog_set_pulse_width(unsigned int pw
)
242 mutex_lock(&watchdog
.lock
);
245 watchdog
.pulse_val
= 0;
246 } else if (pw
<= 25) {
247 watchdog
.pulse_val
= 1;
248 } else if (pw
<= 125) {
249 watchdog
.pulse_val
= 2;
250 } else if (pw
<= 5000) {
251 watchdog
.pulse_val
= 3;
253 printk(KERN_ERR DRVNAME
": pulse width out of range\n");
258 watchdog
.pulse_mode
= pw
;
261 mutex_unlock(&watchdog
.lock
);
265 static int watchdog_keepalive(void)
269 mutex_lock(&watchdog
.lock
);
270 err
= superio_enter(watchdog
.sioaddr
);
273 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
275 if (watchdog
.minutes_mode
)
276 /* select minutes for timer units */
277 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
278 F71808FG_FLAG_WD_UNIT
);
280 /* select seconds for timer units */
281 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
282 F71808FG_FLAG_WD_UNIT
);
284 /* Set timer value */
285 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WD_TIME
,
288 superio_exit(watchdog
.sioaddr
);
291 mutex_unlock(&watchdog
.lock
);
295 static int f71862fg_pin_configure(unsigned short ioaddr
)
297 /* When ioaddr is non-zero the calling function has to take care of
298 mutex handling and superio preparation! */
300 if (f71862fg_pin
== 63) {
302 /* SPI must be disabled first to use this pin! */
303 superio_clear_bit(ioaddr
, SIO_REG_ROM_ADDR_SEL
, 6);
304 superio_set_bit(ioaddr
, SIO_REG_MFUNCT3
, 4);
306 } else if (f71862fg_pin
== 56) {
308 superio_set_bit(ioaddr
, SIO_REG_MFUNCT1
, 1);
310 printk(KERN_ERR DRVNAME
": Invalid argument f71862fg_pin=%d\n",
317 static int watchdog_start(void)
319 /* Make sure we don't die as soon as the watchdog is enabled below */
320 int err
= watchdog_keepalive();
324 mutex_lock(&watchdog
.lock
);
325 err
= superio_enter(watchdog
.sioaddr
);
328 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
330 /* Watchdog pin configuration */
331 switch (watchdog
.type
) {
333 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
334 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT2
, 3);
335 superio_clear_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT3
, 3);
339 err
= f71862fg_pin_configure(watchdog
.sioaddr
);
345 /* Set pin 56 to WDTRST# */
346 superio_set_bit(watchdog
.sioaddr
, SIO_REG_MFUNCT1
, 1);
350 /* set pin 40 to WDTRST# */
351 superio_outb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
,
352 superio_inb(watchdog
.sioaddr
, SIO_REG_MFUNCT3
) & 0xcf);
357 * 'default' label to shut up the compiler and catch
364 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
365 superio_set_bit(watchdog
.sioaddr
, SIO_REG_ENABLE
, 0);
366 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDO_CONF
,
367 F71808FG_FLAG_WDOUT_EN
);
369 superio_set_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
370 F71808FG_FLAG_WD_EN
);
372 if (watchdog
.pulse_mode
) {
373 /* Select "pulse" output mode with given duration */
374 u8 wdt_conf
= superio_inb(watchdog
.sioaddr
,
375 F71808FG_REG_WDT_CONF
);
377 /* Set WD_PSWIDTH bits (1:0) */
378 wdt_conf
= (wdt_conf
& 0xfc) | (watchdog
.pulse_val
& 0x03);
379 /* Set WD_PULSE to "pulse" mode */
380 wdt_conf
|= BIT(F71808FG_FLAG_WD_PULSE
);
382 superio_outb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
385 /* Select "level" output mode */
386 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
387 F71808FG_FLAG_WD_PULSE
);
391 superio_exit(watchdog
.sioaddr
);
393 mutex_unlock(&watchdog
.lock
);
398 static int watchdog_stop(void)
402 mutex_lock(&watchdog
.lock
);
403 err
= superio_enter(watchdog
.sioaddr
);
406 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
408 superio_clear_bit(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
,
409 F71808FG_FLAG_WD_EN
);
411 superio_exit(watchdog
.sioaddr
);
414 mutex_unlock(&watchdog
.lock
);
419 static int watchdog_get_status(void)
423 mutex_lock(&watchdog
.lock
);
424 status
= (watchdog
.caused_reboot
) ? WDIOF_CARDRESET
: 0;
425 mutex_unlock(&watchdog
.lock
);
430 static bool watchdog_is_running(void)
433 * if we fail to determine the watchdog's status assume it to be
434 * running to be on the safe side
436 bool is_running
= true;
438 mutex_lock(&watchdog
.lock
);
439 if (superio_enter(watchdog
.sioaddr
))
441 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
443 is_running
= (superio_inb(watchdog
.sioaddr
, SIO_REG_ENABLE
) & BIT(0))
444 && (superio_inb(watchdog
.sioaddr
, F71808FG_REG_WDT_CONF
)
445 & F71808FG_FLAG_WD_EN
);
447 superio_exit(watchdog
.sioaddr
);
450 mutex_unlock(&watchdog
.lock
);
454 /* /dev/watchdog api */
456 static int watchdog_open(struct inode
*inode
, struct file
*file
)
460 /* If the watchdog is alive we don't need to start it again */
461 if (test_and_set_bit(0, &watchdog
.opened
))
464 err
= watchdog_start();
466 clear_bit(0, &watchdog
.opened
);
471 __module_get(THIS_MODULE
);
473 watchdog
.expect_close
= 0;
474 return nonseekable_open(inode
, file
);
477 static int watchdog_release(struct inode
*inode
, struct file
*file
)
479 clear_bit(0, &watchdog
.opened
);
481 if (!watchdog
.expect_close
) {
482 watchdog_keepalive();
483 printk(KERN_CRIT DRVNAME
484 ": Unexpected close, not stopping watchdog!\n");
485 } else if (!nowayout
) {
493 * @file: file handle to the watchdog
494 * @buf: buffer to write
495 * @count: count of bytes
496 * @ppos: pointer to the position to write. No seeks allowed
498 * A write to a watchdog device is defined as a keepalive signal. Any
499 * write of data will do, as we we don't define content meaning.
502 static ssize_t
watchdog_write(struct file
*file
, const char __user
*buf
,
503 size_t count
, loff_t
*ppos
)
509 /* In case it was set long ago */
510 bool expect_close
= false;
512 for (i
= 0; i
!= count
; i
++) {
514 if (get_user(c
, buf
+ i
))
516 expect_close
= (c
== 'V');
519 /* Properly order writes across fork()ed processes */
520 mutex_lock(&watchdog
.lock
);
521 watchdog
.expect_close
= expect_close
;
522 mutex_unlock(&watchdog
.lock
);
525 /* someone wrote to us, we should restart timer */
526 watchdog_keepalive();
533 * @inode: inode of the device
534 * @file: file handle to the device
535 * @cmd: watchdog command
536 * @arg: argument pointer
538 * The watchdog API defines a common set of functions for all watchdogs
539 * according to their available features.
541 static long watchdog_ioctl(struct file
*file
, unsigned int cmd
,
548 struct watchdog_info __user
*ident
;
552 uarg
.i
= (int __user
*)arg
;
555 case WDIOC_GETSUPPORT
:
556 return copy_to_user(uarg
.ident
, &watchdog
.ident
,
557 sizeof(watchdog
.ident
)) ? -EFAULT
: 0;
559 case WDIOC_GETSTATUS
:
560 status
= watchdog_get_status();
563 return put_user(status
, uarg
.i
);
565 case WDIOC_GETBOOTSTATUS
:
566 return put_user(0, uarg
.i
);
568 case WDIOC_SETOPTIONS
:
569 if (get_user(new_options
, uarg
.i
))
572 if (new_options
& WDIOS_DISABLECARD
)
575 if (new_options
& WDIOS_ENABLECARD
)
576 return watchdog_start();
579 case WDIOC_KEEPALIVE
:
580 watchdog_keepalive();
583 case WDIOC_SETTIMEOUT
:
584 if (get_user(new_timeout
, uarg
.i
))
587 if (watchdog_set_timeout(new_timeout
))
590 watchdog_keepalive();
593 case WDIOC_GETTIMEOUT
:
594 return put_user(watchdog
.timeout
, uarg
.i
);
602 static int watchdog_notify_sys(struct notifier_block
*this, unsigned long code
,
605 if (code
== SYS_DOWN
|| code
== SYS_HALT
)
610 static const struct file_operations watchdog_fops
= {
611 .owner
= THIS_MODULE
,
613 .open
= watchdog_open
,
614 .release
= watchdog_release
,
615 .write
= watchdog_write
,
616 .unlocked_ioctl
= watchdog_ioctl
,
619 static struct miscdevice watchdog_miscdev
= {
620 .minor
= WATCHDOG_MINOR
,
622 .fops
= &watchdog_fops
,
625 static struct notifier_block watchdog_notifier
= {
626 .notifier_call
= watchdog_notify_sys
,
629 static int __init
watchdog_init(int sioaddr
)
631 int wdt_conf
, err
= 0;
633 /* No need to lock watchdog.lock here because no entry points
634 * into the module have been registered yet.
636 watchdog
.sioaddr
= sioaddr
;
637 watchdog
.ident
.options
= WDIOC_SETTIMEOUT
639 | WDIOF_KEEPALIVEPING
;
641 snprintf(watchdog
.ident
.identity
,
642 sizeof(watchdog
.ident
.identity
), "%s watchdog",
643 f71808e_names
[watchdog
.type
]);
645 err
= superio_enter(sioaddr
);
648 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
650 wdt_conf
= superio_inb(sioaddr
, F71808FG_REG_WDT_CONF
);
651 watchdog
.caused_reboot
= wdt_conf
& F71808FG_FLAG_WDTMOUT_STS
;
653 superio_exit(sioaddr
);
655 err
= watchdog_set_timeout(timeout
);
658 err
= watchdog_set_pulse_width(pulse_width
);
662 err
= register_reboot_notifier(&watchdog_notifier
);
666 err
= misc_register(&watchdog_miscdev
);
668 printk(KERN_ERR DRVNAME
669 ": cannot register miscdev on minor=%d\n",
670 watchdog_miscdev
.minor
);
674 if (start_withtimeout
) {
675 if (start_withtimeout
<= 0
676 || start_withtimeout
> max_timeout
) {
677 printk(KERN_ERR DRVNAME
678 ": starting timeout out of range\n");
683 err
= watchdog_start();
685 printk(KERN_ERR DRVNAME
686 ": cannot start watchdog timer\n");
690 mutex_lock(&watchdog
.lock
);
691 err
= superio_enter(sioaddr
);
694 superio_select(watchdog
.sioaddr
, SIO_F71808FG_LD_WDT
);
696 if (start_withtimeout
> 0xff) {
697 /* select minutes for timer units */
698 superio_set_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
699 F71808FG_FLAG_WD_UNIT
);
700 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
701 DIV_ROUND_UP(start_withtimeout
, 60));
703 /* select seconds for timer units */
704 superio_clear_bit(sioaddr
, F71808FG_REG_WDT_CONF
,
705 F71808FG_FLAG_WD_UNIT
);
706 superio_outb(sioaddr
, F71808FG_REG_WD_TIME
,
710 superio_exit(sioaddr
);
711 mutex_unlock(&watchdog
.lock
);
714 __module_get(THIS_MODULE
);
716 printk(KERN_INFO DRVNAME
717 ": watchdog started with initial timeout of %u sec\n",
724 mutex_unlock(&watchdog
.lock
);
726 misc_deregister(&watchdog_miscdev
);
728 unregister_reboot_notifier(&watchdog_notifier
);
733 static int __init
f71808e_find(int sioaddr
)
736 int err
= superio_enter(sioaddr
);
740 devid
= superio_inw(sioaddr
, SIO_REG_MANID
);
741 if (devid
!= SIO_FINTEK_ID
) {
742 pr_debug(DRVNAME
": Not a Fintek device\n");
747 devid
= force_id
? force_id
: superio_inw(sioaddr
, SIO_REG_DEVID
);
750 watchdog
.type
= f71808fg
;
753 watchdog
.type
= f71862fg
;
754 err
= f71862fg_pin_configure(0); /* validate module parameter */
757 watchdog
.type
= f71882fg
;
760 watchdog
.type
= f71889fg
;
763 /* Confirmed (by datasheet) not to have a watchdog. */
767 printk(KERN_INFO DRVNAME
": Unrecognized Fintek device: %04x\n",
768 (unsigned int)devid
);
773 printk(KERN_INFO DRVNAME
": Found %s watchdog chip, revision %d\n",
774 f71808e_names
[watchdog
.type
],
775 (int)superio_inb(sioaddr
, SIO_REG_DEVREV
));
777 superio_exit(sioaddr
);
781 static int __init
f71808e_init(void)
783 static const unsigned short addrs
[] = { 0x2e, 0x4e };
787 for (i
= 0; i
< ARRAY_SIZE(addrs
); i
++) {
788 err
= f71808e_find(addrs
[i
]);
792 if (i
== ARRAY_SIZE(addrs
))
795 return watchdog_init(addrs
[i
]);
798 static void __exit
f71808e_exit(void)
800 if (watchdog_is_running()) {
801 printk(KERN_WARNING DRVNAME
802 ": Watchdog timer still running, stopping it\n");
805 misc_deregister(&watchdog_miscdev
);
806 unregister_reboot_notifier(&watchdog_notifier
);
809 MODULE_DESCRIPTION("F71808E Watchdog Driver");
810 MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
811 MODULE_LICENSE("GPL");
813 module_init(f71808e_init
);
814 module_exit(f71808e_exit
);