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ARM: shmobile: r8a7790: Instantiate GIC from C board code in legacy builds
[linux-2.6/btrfs-unstable.git] / arch / arm / mach-shmobile / board-lager.c
blob3f513270fc60fa303451aa44021ea0bcfda3ab51
1 /*
2 * Lager board support
3 *
4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
5 * Copyright (C) 2013 Magnus Damm
6 * Copyright (C) 2014 Cogent Embedded, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
22 #include <linux/gpio.h>
23 #include <linux/gpio_keys.h>
24 #include <linux/i2c.h>
25 #include <linux/input.h>
26 #include <linux/interrupt.h>
27 #include <linux/irq.h>
28 #include <linux/irqchip.h>
29 #include <linux/irqchip/arm-gic.h>
30 #include <linux/kernel.h>
31 #include <linux/leds.h>
32 #include <linux/mfd/tmio.h>
33 #include <linux/mmc/host.h>
34 #include <linux/mmc/sh_mmcif.h>
35 #include <linux/mmc/sh_mobile_sdhi.h>
36 #include <linux/mtd/partitions.h>
37 #include <linux/mtd/mtd.h>
38 #include <linux/pinctrl/machine.h>
39 #include <linux/platform_data/camera-rcar.h>
40 #include <linux/platform_data/gpio-rcar.h>
41 #include <linux/platform_data/rcar-du.h>
42 #include <linux/platform_data/usb-rcar-gen2-phy.h>
43 #include <linux/platform_device.h>
44 #include <linux/phy.h>
45 #include <linux/regulator/driver.h>
46 #include <linux/regulator/fixed.h>
47 #include <linux/regulator/gpio-regulator.h>
48 #include <linux/regulator/machine.h>
49 #include <linux/sh_eth.h>
50 #include <linux/spi/flash.h>
51 #include <linux/spi/rspi.h>
52 #include <linux/spi/spi.h>
53 #include <linux/usb/phy.h>
54 #include <linux/usb/renesas_usbhs.h>
55
56 #include <media/soc_camera.h>
57 #include <asm/mach-types.h>
58 #include <asm/mach/arch.h>
59 #include <sound/rcar_snd.h>
60 #include <sound/simple_card.h>
61
62 #include "common.h"
63 #include "irqs.h"
64 #include "r8a7790.h"
65 #include "rcar-gen2.h"
66
67 /*
68 * SSI-AK4643
69 *
70 * SW1: 1: AK4643
71 * 2: CN22
72 * 3: ADV7511
73 *
74 * this command is required when playback.
75 *
76 * # amixer set "LINEOUT Mixer DACL" on
77 */
78
79 /*
80 * SDHI0 (CN8)
81 *
82 * JP3: pin1
83 * SW20: pin1
84
85 * GP5_24: 1: VDD 3.3V (defult)
86 * 0: VDD 0.0V
87 * GP5_29: 1: VccQ 3.3V (defult)
88 * 0: VccQ 1.8V
89 *
90 */
91
92 /* DU */
93 static struct rcar_du_encoder_data lager_du_encoders[] = {
94 {
95 .type = RCAR_DU_ENCODER_VGA,
96 .output = RCAR_DU_OUTPUT_DPAD0,
97 }, {
98 .type = RCAR_DU_ENCODER_NONE,
99 .output = RCAR_DU_OUTPUT_LVDS1,
100 .connector.lvds.panel = {
101 .width_mm = 210,
102 .height_mm = 158,
103 .mode = {
104 .pixelclock = 65000000,
105 .hactive = 1024,
106 .hfront_porch = 20,
107 .hback_porch = 160,
108 .hsync_len = 136,
109 .vactive = 768,
110 .vfront_porch = 3,
111 .vback_porch = 29,
112 .vsync_len = 6,
113 },
114 },
115 },
116 };
117
118 static const struct rcar_du_platform_data lager_du_pdata __initconst = {
119 .encoders = lager_du_encoders,
120 .num_encoders = ARRAY_SIZE(lager_du_encoders),
121 };
122
123 static const struct resource du_resources[] __initconst = {
124 DEFINE_RES_MEM(0xfeb00000, 0x70000),
125 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
126 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
127 DEFINE_RES_IRQ(gic_spi(256)),
128 DEFINE_RES_IRQ(gic_spi(268)),
129 DEFINE_RES_IRQ(gic_spi(269)),
130 };
131
132 static void __init lager_add_du_device(void)
133 {
134 struct platform_device_info info = {
135 .name = "rcar-du-r8a7790",
136 .id = -1,
137 .res = du_resources,
138 .num_res = ARRAY_SIZE(du_resources),
139 .data = &lager_du_pdata,
140 .size_data = sizeof(lager_du_pdata),
141 .dma_mask = DMA_BIT_MASK(32),
142 };
143
144 platform_device_register_full(&info);
145 }
146
147 /* LEDS */
148 static struct gpio_led lager_leds[] = {
149 {
150 .name = "led8",
151 .gpio = RCAR_GP_PIN(5, 17),
152 .default_state = LEDS_GPIO_DEFSTATE_ON,
153 }, {
154 .name = "led7",
155 .gpio = RCAR_GP_PIN(4, 23),
156 .default_state = LEDS_GPIO_DEFSTATE_ON,
157 }, {
158 .name = "led6",
159 .gpio = RCAR_GP_PIN(4, 22),
160 .default_state = LEDS_GPIO_DEFSTATE_ON,
161 },
162 };
163
164 static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
165 .leds = lager_leds,
166 .num_leds = ARRAY_SIZE(lager_leds),
167 };
168
169 /* GPIO KEY */
170 #define GPIO_KEY(c, g, d, ...) \
171 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
172 .wakeup = 1, .debounce_interval = 20 }
173
174 static struct gpio_keys_button gpio_buttons[] = {
175 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
176 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
177 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
178 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
179 };
180
181 static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
182 .buttons = gpio_buttons,
183 .nbuttons = ARRAY_SIZE(gpio_buttons),
184 };
185
186 /* Fixed 3.3V regulator to be used by MMCIF */
187 static struct regulator_consumer_supply fixed3v3_power_consumers[] =
188 {
189 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
190 };
191
192 /*
193 * SDHI regulator macro
194 *
195 ** FIXME**
196 * Lager board vqmmc is provided via DA9063 PMIC chip,
197 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
198 * but, it doesn't have regulator support at this point.
199 * It uses gpio-regulator for vqmmc as quick-hack.
200 */
201 #define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
202 static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
203 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
204 \
205 static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
206 .constraints = { \
207 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
208 }, \
209 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
210 .num_consumer_supplies = 1, \
211 }; \
212 \
213 static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
214 .supply_name = "SDHI" #idx "Vcc", \
215 .microvolts = 3300000, \
216 .gpio = vdd_pin, \
217 .enable_high = 1, \
218 .init_data = &vcc_sdhi##idx##_init_data, \
219 }; \
220 \
221 static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
222 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
223 \
224 static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
225 .constraints = { \
226 .input_uV = 3300000, \
227 .min_uV = 1800000, \
228 .max_uV = 3300000, \
229 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
230 REGULATOR_CHANGE_STATUS, \
231 }, \
232 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
233 .num_consumer_supplies = 1, \
234 }; \
235 \
236 static struct gpio vccq_sdhi##idx##_gpio = \
237 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
238 \
239 static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
240 { .value = 1800000, .gpios = 0 }, \
241 { .value = 3300000, .gpios = 1 }, \
242 }; \
243 \
244 static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
245 .supply_name = "vqmmc", \
246 .gpios = &vccq_sdhi##idx##_gpio, \
247 .nr_gpios = 1, \
248 .states = vccq_sdhi##idx##_states, \
249 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
250 .type = REGULATOR_VOLTAGE, \
251 .init_data = &vccq_sdhi##idx##_init_data, \
252 };
253
254 SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
255 SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
256
257 /* MMCIF */
258 static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
259 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
260 .clk_ctrl2_present = true,
261 .ccs_unsupported = true,
262 };
263
264 static const struct resource mmcif1_resources[] __initconst = {
265 DEFINE_RES_MEM(0xee220000, 0x80),
266 DEFINE_RES_IRQ(gic_spi(170)),
267 };
268
269 /* Ether */
270 static const struct sh_eth_plat_data ether_pdata __initconst = {
271 .phy = 0x1,
272 .phy_irq = irq_pin(0),
273 .edmac_endian = EDMAC_LITTLE_ENDIAN,
274 .phy_interface = PHY_INTERFACE_MODE_RMII,
275 .ether_link_active_low = 1,
276 };
277
278 static const struct resource ether_resources[] __initconst = {
279 DEFINE_RES_MEM(0xee700000, 0x400),
280 DEFINE_RES_IRQ(gic_spi(162)),
281 };
282
283 static const struct platform_device_info ether_info __initconst = {
284 .name = "r8a7790-ether",
285 .id = -1,
286 .res = ether_resources,
287 .num_res = ARRAY_SIZE(ether_resources),
288 .data = &ether_pdata,
289 .size_data = sizeof(ether_pdata),
290 .dma_mask = DMA_BIT_MASK(32),
291 };
292
293 /* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
294 static struct mtd_partition spi_flash_part[] = {
295 /* Reserved for user loader program, read-only */
296 {
297 .name = "loader",
298 .offset = 0,
299 .size = SZ_256K,
300 .mask_flags = MTD_WRITEABLE,
301 },
302 /* Reserved for user program, read-only */
303 {
304 .name = "user",
305 .offset = MTDPART_OFS_APPEND,
306 .size = SZ_4M,
307 .mask_flags = MTD_WRITEABLE,
308 },
309 /* All else is writable (e.g. JFFS2) */
310 {
311 .name = "flash",
312 .offset = MTDPART_OFS_APPEND,
313 .size = MTDPART_SIZ_FULL,
314 .mask_flags = 0,
315 },
316 };
317
318 static const struct flash_platform_data spi_flash_data = {
319 .name = "m25p80",
320 .parts = spi_flash_part,
321 .nr_parts = ARRAY_SIZE(spi_flash_part),
322 .type = "s25fl512s",
323 };
324
325 static const struct rspi_plat_data qspi_pdata __initconst = {
326 .num_chipselect = 1,
327 };
328
329 static const struct spi_board_info spi_info[] __initconst = {
330 {
331 .modalias = "m25p80",
332 .platform_data = &spi_flash_data,
333 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
334 .max_speed_hz = 30000000,
335 .bus_num = 0,
336 .chip_select = 0,
337 },
338 };
339
340 /* QSPI resource */
341 static const struct resource qspi_resources[] __initconst = {
342 DEFINE_RES_MEM(0xe6b10000, 0x1000),
343 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
344 };
345
346 /* VIN */
347 static const struct resource vin_resources[] __initconst = {
348 /* VIN0 */
349 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
350 DEFINE_RES_IRQ(gic_spi(188)),
351 /* VIN1 */
352 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
353 DEFINE_RES_IRQ(gic_spi(189)),
354 };
355
356 static void __init lager_add_vin_device(unsigned idx,
357 struct rcar_vin_platform_data *pdata)
358 {
359 struct platform_device_info vin_info = {
360 .name = "r8a7790-vin",
361 .id = idx,
362 .res = &vin_resources[idx * 2],
363 .num_res = 2,
364 .dma_mask = DMA_BIT_MASK(32),
365 .data = pdata,
366 .size_data = sizeof(*pdata),
367 };
368
369 BUG_ON(idx > 1);
370
371 platform_device_register_full(&vin_info);
372 }
373
374 #define LAGER_CAMERA(idx, name, addr, pdata, flag) \
375 static struct i2c_board_info i2c_cam##idx##_device = { \
376 I2C_BOARD_INFO(name, addr), \
377 }; \
378 \
379 static struct rcar_vin_platform_data vin##idx##_pdata = { \
380 .flags = flag, \
381 }; \
382 \
383 static struct soc_camera_link cam##idx##_link = { \
384 .bus_id = idx, \
385 .board_info = &i2c_cam##idx##_device, \
386 .i2c_adapter_id = 2, \
387 .module_name = name, \
388 .priv = pdata, \
389 }
390
391 /* Camera 0 is not currently supported due to adv7612 support missing */
392 LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
393
394 static void __init lager_add_camera1_device(void)
395 {
396 platform_device_register_data(NULL, "soc-camera-pdrv", 1,
397 &cam1_link, sizeof(cam1_link));
398 lager_add_vin_device(1, &vin1_pdata);
399 }
400
401 /* SATA1 */
402 static const struct resource sata1_resources[] __initconst = {
403 DEFINE_RES_MEM(0xee500000, 0x2000),
404 DEFINE_RES_IRQ(gic_spi(106)),
405 };
406
407 static const struct platform_device_info sata1_info __initconst = {
408 .name = "sata-r8a7790",
409 .id = 1,
410 .res = sata1_resources,
411 .num_res = ARRAY_SIZE(sata1_resources),
412 .dma_mask = DMA_BIT_MASK(32),
413 };
414
415 /* USBHS */
416 static const struct resource usbhs_resources[] __initconst = {
417 DEFINE_RES_MEM(0xe6590000, 0x100),
418 DEFINE_RES_IRQ(gic_spi(107)),
419 };
420
421 struct usbhs_private {
422 struct renesas_usbhs_platform_info info;
423 struct usb_phy *phy;
424 };
425
426 #define usbhs_get_priv(pdev) \
427 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
428
429 static int usbhs_power_ctrl(struct platform_device *pdev,
430 void __iomem *base, int enable)
431 {
432 struct usbhs_private *priv = usbhs_get_priv(pdev);
433
434 if (!priv->phy)
435 return -ENODEV;
436
437 if (enable) {
438 int retval = usb_phy_init(priv->phy);
439
440 if (!retval)
441 retval = usb_phy_set_suspend(priv->phy, 0);
442 return retval;
443 }
444
445 usb_phy_set_suspend(priv->phy, 1);
446 usb_phy_shutdown(priv->phy);
447 return 0;
448 }
449
450 static int usbhs_hardware_init(struct platform_device *pdev)
451 {
452 struct usbhs_private *priv = usbhs_get_priv(pdev);
453 struct usb_phy *phy;
454 int ret;
455
456 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
457 * setting to avoid VBUS short circuit due to wrong cable.
458 * PWEN should be pulled up high if USB Function is selected by SW5
459 */
460 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
461 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
462 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
463 ret = -ENOTSUPP;
464 goto error;
465 }
466
467 phy = usb_get_phy_dev(&pdev->dev, 0);
468 if (IS_ERR(phy)) {
469 ret = PTR_ERR(phy);
470 goto error;
471 }
472
473 priv->phy = phy;
474 return 0;
475 error:
476 gpio_free(RCAR_GP_PIN(5, 18));
477 return ret;
478 }
479
480 static int usbhs_hardware_exit(struct platform_device *pdev)
481 {
482 struct usbhs_private *priv = usbhs_get_priv(pdev);
483
484 if (!priv->phy)
485 return 0;
486
487 usb_put_phy(priv->phy);
488 priv->phy = NULL;
489
490 gpio_free(RCAR_GP_PIN(5, 18));
491 return 0;
492 }
493
494 static int usbhs_get_id(struct platform_device *pdev)
495 {
496 return USBHS_GADGET;
497 }
498
499 static u32 lager_usbhs_pipe_type[] = {
500 USB_ENDPOINT_XFER_CONTROL,
501 USB_ENDPOINT_XFER_ISOC,
502 USB_ENDPOINT_XFER_ISOC,
503 USB_ENDPOINT_XFER_BULK,
504 USB_ENDPOINT_XFER_BULK,
505 USB_ENDPOINT_XFER_BULK,
506 USB_ENDPOINT_XFER_INT,
507 USB_ENDPOINT_XFER_INT,
508 USB_ENDPOINT_XFER_INT,
509 USB_ENDPOINT_XFER_BULK,
510 USB_ENDPOINT_XFER_BULK,
511 USB_ENDPOINT_XFER_BULK,
512 USB_ENDPOINT_XFER_BULK,
513 USB_ENDPOINT_XFER_BULK,
514 USB_ENDPOINT_XFER_BULK,
515 USB_ENDPOINT_XFER_BULK,
516 };
517
518 static struct usbhs_private usbhs_priv __initdata = {
519 .info = {
520 .platform_callback = {
521 .power_ctrl = usbhs_power_ctrl,
522 .hardware_init = usbhs_hardware_init,
523 .hardware_exit = usbhs_hardware_exit,
524 .get_id = usbhs_get_id,
525 },
526 .driver_param = {
527 .buswait_bwait = 4,
528 .pipe_type = lager_usbhs_pipe_type,
529 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
530 },
531 }
532 };
533
534 static void __init lager_register_usbhs(void)
535 {
536 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
537 platform_device_register_resndata(NULL,
538 "renesas_usbhs", -1,
539 usbhs_resources,
540 ARRAY_SIZE(usbhs_resources),
541 &usbhs_priv.info,
542 sizeof(usbhs_priv.info));
543 }
544
545 /* USBHS PHY */
546 static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
547 .chan0_pci = 0, /* Channel 0 is USBHS */
548 .chan2_pci = 1, /* Channel 2 is PCI USB */
549 };
550
551 static const struct resource usbhs_phy_resources[] __initconst = {
552 DEFINE_RES_MEM(0xe6590100, 0x100),
553 };
554
555 /* I2C */
556 static struct i2c_board_info i2c2_devices[] = {
557 {
558 I2C_BOARD_INFO("ak4643", 0x12),
559 }
560 };
561
562 /* Sound */
563 static struct resource rsnd_resources[] __initdata = {
564 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
565 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
566 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
567 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
568 };
569
570 static struct rsnd_ssi_platform_info rsnd_ssi[] = {
571 RSND_SSI(0, gic_spi(370), 0),
572 RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
573 };
574
575 static struct rsnd_src_platform_info rsnd_src[2] = {
576 /* no member at this point */
577 };
578
579 static struct rsnd_dai_platform_info rsnd_dai = {
580 .playback = { .ssi = &rsnd_ssi[0], },
581 .capture = { .ssi = &rsnd_ssi[1], },
582 };
583
584 static struct rcar_snd_info rsnd_info = {
585 .flags = RSND_GEN2,
586 .ssi_info = rsnd_ssi,
587 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
588 .src_info = rsnd_src,
589 .src_info_nr = ARRAY_SIZE(rsnd_src),
590 .dai_info = &rsnd_dai,
591 .dai_info_nr = 1,
592 };
593
594 static struct asoc_simple_card_info rsnd_card_info = {
595 .name = "AK4643",
596 .card = "SSI01-AK4643",
597 .codec = "ak4642-codec.2-0012",
598 .platform = "rcar_sound",
599 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
600 .cpu_dai = {
601 .name = "rcar_sound",
602 },
603 .codec_dai = {
604 .name = "ak4642-hifi",
605 .sysclk = 11289600,
606 },
607 };
608
609 static void __init lager_add_rsnd_device(void)
610 {
611 struct platform_device_info cardinfo = {
612 .name = "asoc-simple-card",
613 .id = -1,
614 .data = &rsnd_card_info,
615 .size_data = sizeof(struct asoc_simple_card_info),
616 .dma_mask = DMA_BIT_MASK(32),
617 };
618
619 i2c_register_board_info(2, i2c2_devices,
620 ARRAY_SIZE(i2c2_devices));
621
622 platform_device_register_resndata(
623 NULL, "rcar_sound", -1,
624 rsnd_resources, ARRAY_SIZE(rsnd_resources),
625 &rsnd_info, sizeof(rsnd_info));
626
627 platform_device_register_full(&cardinfo);
628 }
629
630 /* SDHI0 */
631 static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
632 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
633 MMC_CAP_POWER_OFF_CARD,
634 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
635 TMIO_MMC_WRPROTECT_DISABLE,
636 };
637
638 static struct resource sdhi0_resources[] __initdata = {
639 DEFINE_RES_MEM(0xee100000, 0x200),
640 DEFINE_RES_IRQ(gic_spi(165)),
641 };
642
643 /* SDHI2 */
644 static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
645 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
646 MMC_CAP_POWER_OFF_CARD,
647 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
648 TMIO_MMC_WRPROTECT_DISABLE,
649 };
650
651 static struct resource sdhi2_resources[] __initdata = {
652 DEFINE_RES_MEM(0xee140000, 0x100),
653 DEFINE_RES_IRQ(gic_spi(167)),
654 };
655
656 /* Internal PCI1 */
657 static const struct resource pci1_resources[] __initconst = {
658 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
659 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
660 DEFINE_RES_IRQ(gic_spi(112)),
661 };
662
663 static const struct platform_device_info pci1_info __initconst = {
664 .name = "pci-rcar-gen2",
665 .id = 1,
666 .res = pci1_resources,
667 .num_res = ARRAY_SIZE(pci1_resources),
668 .dma_mask = DMA_BIT_MASK(32),
669 };
670
671 static void __init lager_add_usb1_device(void)
672 {
673 platform_device_register_full(&pci1_info);
674 }
675
676 /* Internal PCI2 */
677 static const struct resource pci2_resources[] __initconst = {
678 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
679 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
680 DEFINE_RES_IRQ(gic_spi(113)),
681 };
682
683 static const struct platform_device_info pci2_info __initconst = {
684 .name = "pci-rcar-gen2",
685 .id = 2,
686 .res = pci2_resources,
687 .num_res = ARRAY_SIZE(pci2_resources),
688 .dma_mask = DMA_BIT_MASK(32),
689 };
690
691 static void __init lager_add_usb2_device(void)
692 {
693 platform_device_register_full(&pci2_info);
694 }
695
696 static const struct pinctrl_map lager_pinctrl_map[] = {
697 /* DU (CN10: ARGB0, CN13: LVDS) */
698 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
699 "du_rgb666", "du"),
700 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
701 "du_sync_1", "du"),
702 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
703 "du_clk_out_0", "du"),
704 /* I2C2 */
705 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
706 "i2c2", "i2c2"),
707 /* QSPI */
708 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
709 "qspi_ctrl", "qspi"),
710 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
711 "qspi_data4", "qspi"),
712 /* SCIF0 (CN19: DEBUG SERIAL0) */
713 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
714 "scif0_data", "scif0"),
715 /* SCIF1 (CN20: DEBUG SERIAL1) */
716 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
717 "scif1_data", "scif1"),
718 /* SDHI0 */
719 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
720 "sdhi0_data4", "sdhi0"),
721 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
722 "sdhi0_ctrl", "sdhi0"),
723 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
724 "sdhi0_cd", "sdhi0"),
725 /* SDHI2 */
726 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
727 "sdhi2_data4", "sdhi2"),
728 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
729 "sdhi2_ctrl", "sdhi2"),
730 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
731 "sdhi2_cd", "sdhi2"),
732 /* SSI (CN17: sound) */
733 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
734 "ssi0129_ctrl", "ssi"),
735 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
736 "ssi0_data", "ssi"),
737 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
738 "ssi1_data", "ssi"),
739 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
740 "audio_clk_a", "audio_clk"),
741 /* MMCIF1 */
742 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
743 "mmc1_data8", "mmc1"),
744 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
745 "mmc1_ctrl", "mmc1"),
746 /* Ether */
747 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
748 "eth_link", "eth"),
749 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
750 "eth_mdio", "eth"),
751 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
752 "eth_rmii", "eth"),
753 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
754 "intc_irq0", "intc"),
755 /* VIN0 */
756 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
757 "vin0_data24", "vin0"),
758 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
759 "vin0_sync", "vin0"),
760 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
761 "vin0_field", "vin0"),
762 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
763 "vin0_clkenb", "vin0"),
764 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
765 "vin0_clk", "vin0"),
766 /* VIN1 */
767 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
768 "vin1_data8", "vin1"),
769 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
770 "vin1_clk", "vin1"),
771 /* USB0 */
772 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
773 "usb0_ovc_vbus", "usb0"),
774 /* USB1 */
775 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
776 "usb1", "usb1"),
777 /* USB2 */
778 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
779 "usb2", "usb2"),
780 };
781
782 static void __init lager_add_standard_devices(void)
783 {
784 int fixed_regulator_idx = 0;
785 int gpio_regulator_idx = 0;
786
787 r8a7790_clock_init();
788
789 pinctrl_register_mappings(lager_pinctrl_map,
790 ARRAY_SIZE(lager_pinctrl_map));
791 r8a7790_pinmux_init();
792
793 r8a7790_add_standard_devices();
794 platform_device_register_data(NULL, "leds-gpio", -1,
795 &lager_leds_pdata,
796 sizeof(lager_leds_pdata));
797 platform_device_register_data(NULL, "gpio-keys", -1,
798 &lager_keys_pdata,
799 sizeof(lager_keys_pdata));
800 regulator_register_always_on(fixed_regulator_idx++,
801 "fixed-3.3V", fixed3v3_power_consumers,
802 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
803 platform_device_register_resndata(NULL, "sh_mmcif", 1,
804 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
805 &mmcif1_pdata, sizeof(mmcif1_pdata));
806
807 platform_device_register_full(&ether_info);
808
809 lager_add_du_device();
810
811 platform_device_register_resndata(NULL, "qspi", 0,
812 qspi_resources,
813 ARRAY_SIZE(qspi_resources),
814 &qspi_pdata, sizeof(qspi_pdata));
815 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
816
817 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
818 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
819 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
820 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
821
822 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
823 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
824 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
825 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
826
827 lager_add_camera1_device();
828
829 platform_device_register_full(&sata1_info);
830
831 platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
832 -1, usbhs_phy_resources,
833 ARRAY_SIZE(usbhs_phy_resources),
834 &usbhs_phy_pdata,
835 sizeof(usbhs_phy_pdata));
836 lager_register_usbhs();
837 lager_add_usb1_device();
838 lager_add_usb2_device();
839
840 lager_add_rsnd_device();
841
842 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
843 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
844 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
845 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
846 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
847 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
848 }
849
850 /*
851 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
852 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
853 * 14-15. We have to set them back to 01 from the default 00 value each time
854 * the PHY is reset. It's also important because the PHY's LED0 signal is
855 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
856 * bounce on and off after each packet, which we apparently want to avoid.
857 */
858 static int lager_ksz8041_fixup(struct phy_device *phydev)
859 {
860 u16 phyctrl1 = phy_read(phydev, 0x1e);
861
862 phyctrl1 &= ~0xc000;
863 phyctrl1 |= 0x4000;
864 return phy_write(phydev, 0x1e, phyctrl1);
865 }
866
867 static void __init lager_init(void)
868 {
869 lager_add_standard_devices();
870
871 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
872
873 if (IS_ENABLED(CONFIG_PHYLIB))
874 phy_register_fixup_for_id("r8a7790-ether-ff:01",
875 lager_ksz8041_fixup);
876 }
877
878 static void __init lager_legacy_init_irq(void)
879 {
880 void __iomem *gic_dist_base = ioremap_nocache(0xf1001000, 0x1000);
881 void __iomem *gic_cpu_base = ioremap_nocache(0xf1002000, 0x1000);
882
883 gic_init(0, 29, gic_dist_base, gic_cpu_base);
884
885 /* Do not invoke DT-based interrupt code via irqchip_init() */
886 }
887
888 static const char * const lager_boards_compat_dt[] __initconst = {
889 "renesas,lager",
890 NULL,
891 };
892
893 DT_MACHINE_START(LAGER_DT, "lager")
894 .smp = smp_ops(r8a7790_smp_ops),
895 .init_early = shmobile_init_delay,
896 .init_irq = lager_legacy_init_irq,
897 .init_time = rcar_gen2_timer_init,
898 .init_machine = lager_init,
899 .init_late = shmobile_init_late,
900 .reserve = rcar_gen2_reserve,
901 .dt_compat = lager_boards_compat_dt,
902 MACHINE_END
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