x86: Xen: Use the core irq stats function
[linux-2.6/btrfs-unstable.git] / drivers / cpufreq / spear-cpufreq.c
blob5c86e3fa55934c686ce5bc44fea45e254977e478
1 /*
2 * drivers/cpufreq/spear-cpufreq.c
4 * CPU Frequency Scaling for SPEAr platform
6 * Copyright (C) 2012 ST Microelectronics
7 * Deepak Sikri <deepak.sikri@st.com>
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
16 #include <linux/clk.h>
17 #include <linux/cpufreq.h>
18 #include <linux/err.h>
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/of_device.h>
22 #include <linux/slab.h>
23 #include <linux/types.h>
25 /* SPEAr CPUFreq driver data structure */
26 static struct {
27 struct clk *clk;
28 unsigned int transition_latency;
29 struct cpufreq_frequency_table *freq_tbl;
30 u32 cnt;
31 } spear_cpufreq;
33 static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq)
35 struct clk *sys_pclk;
36 int pclk;
38 * In SPEAr1340, cpu clk's parent sys clk can take input from
39 * following sources
41 const char *sys_clk_src[] = {
42 "sys_syn_clk",
43 "pll1_clk",
44 "pll2_clk",
45 "pll3_clk",
49 * As sys clk can have multiple source with their own range
50 * limitation so we choose possible sources accordingly
52 if (newfreq <= 300000000)
53 pclk = 0; /* src is sys_syn_clk */
54 else if (newfreq > 300000000 && newfreq <= 500000000)
55 pclk = 3; /* src is pll3_clk */
56 else if (newfreq == 600000000)
57 pclk = 1; /* src is pll1_clk */
58 else
59 return ERR_PTR(-EINVAL);
61 /* Get parent to sys clock */
62 sys_pclk = clk_get(NULL, sys_clk_src[pclk]);
63 if (IS_ERR(sys_pclk))
64 pr_err("Failed to get %s clock\n", sys_clk_src[pclk]);
66 return sys_pclk;
70 * In SPEAr1340, we cannot use newfreq directly because we need to actually
71 * access a source clock (clk) which might not be ancestor of cpu at present.
72 * Hence in SPEAr1340 we would operate on source clock directly before switching
73 * cpu clock to it.
75 static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq)
77 struct clk *sys_clk;
78 int ret = 0;
80 sys_clk = clk_get_parent(spear_cpufreq.clk);
81 if (IS_ERR(sys_clk)) {
82 pr_err("failed to get cpu's parent (sys) clock\n");
83 return PTR_ERR(sys_clk);
86 /* Set the rate of the source clock before changing the parent */
87 ret = clk_set_rate(sys_pclk, newfreq);
88 if (ret) {
89 pr_err("Failed to set sys clk rate to %lu\n", newfreq);
90 return ret;
93 ret = clk_set_parent(sys_clk, sys_pclk);
94 if (ret) {
95 pr_err("Failed to set sys clk parent\n");
96 return ret;
99 return 0;
102 static int spear_cpufreq_target(struct cpufreq_policy *policy,
103 unsigned int index)
105 long newfreq;
106 struct clk *srcclk;
107 int ret, mult = 1;
109 newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000;
111 if (of_machine_is_compatible("st,spear1340")) {
113 * SPEAr1340 is special in the sense that due to the possibility
114 * of multiple clock sources for cpu clk's parent we can have
115 * different clock source for different frequency of cpu clk.
116 * Hence we need to choose one from amongst these possible clock
117 * sources.
119 srcclk = spear1340_cpu_get_possible_parent(newfreq);
120 if (IS_ERR(srcclk)) {
121 pr_err("Failed to get src clk\n");
122 return PTR_ERR(srcclk);
125 /* SPEAr1340: src clk is always 2 * intended cpu clk */
126 mult = 2;
127 } else {
129 * src clock to be altered is ancestor of cpu clock. Hence we
130 * can directly work on cpu clk
132 srcclk = spear_cpufreq.clk;
135 newfreq = clk_round_rate(srcclk, newfreq * mult);
136 if (newfreq <= 0) {
137 pr_err("clk_round_rate failed for cpu src clock\n");
138 return newfreq;
141 if (mult == 2)
142 ret = spear1340_set_cpu_rate(srcclk, newfreq);
143 else
144 ret = clk_set_rate(spear_cpufreq.clk, newfreq);
146 if (ret)
147 pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret);
149 return ret;
152 static int spear_cpufreq_init(struct cpufreq_policy *policy)
154 policy->clk = spear_cpufreq.clk;
155 return cpufreq_generic_init(policy, spear_cpufreq.freq_tbl,
156 spear_cpufreq.transition_latency);
159 static struct cpufreq_driver spear_cpufreq_driver = {
160 .name = "cpufreq-spear",
161 .flags = CPUFREQ_STICKY | CPUFREQ_NEED_INITIAL_FREQ_CHECK,
162 .verify = cpufreq_generic_frequency_table_verify,
163 .target_index = spear_cpufreq_target,
164 .get = cpufreq_generic_get,
165 .init = spear_cpufreq_init,
166 .exit = cpufreq_generic_exit,
167 .attr = cpufreq_generic_attr,
170 static int spear_cpufreq_driver_init(void)
172 struct device_node *np;
173 const struct property *prop;
174 struct cpufreq_frequency_table *freq_tbl;
175 const __be32 *val;
176 int cnt, i, ret;
178 np = of_cpu_device_node_get(0);
179 if (!np) {
180 pr_err("No cpu node found");
181 return -ENODEV;
184 if (of_property_read_u32(np, "clock-latency",
185 &spear_cpufreq.transition_latency))
186 spear_cpufreq.transition_latency = CPUFREQ_ETERNAL;
188 prop = of_find_property(np, "cpufreq_tbl", NULL);
189 if (!prop || !prop->value) {
190 pr_err("Invalid cpufreq_tbl");
191 ret = -ENODEV;
192 goto out_put_node;
195 cnt = prop->length / sizeof(u32);
196 val = prop->value;
198 freq_tbl = kmalloc(sizeof(*freq_tbl) * (cnt + 1), GFP_KERNEL);
199 if (!freq_tbl) {
200 ret = -ENOMEM;
201 goto out_put_node;
204 for (i = 0; i < cnt; i++) {
205 freq_tbl[i].driver_data = i;
206 freq_tbl[i].frequency = be32_to_cpup(val++);
209 freq_tbl[i].driver_data = i;
210 freq_tbl[i].frequency = CPUFREQ_TABLE_END;
212 spear_cpufreq.freq_tbl = freq_tbl;
214 of_node_put(np);
216 spear_cpufreq.clk = clk_get(NULL, "cpu_clk");
217 if (IS_ERR(spear_cpufreq.clk)) {
218 pr_err("Unable to get CPU clock\n");
219 ret = PTR_ERR(spear_cpufreq.clk);
220 goto out_put_mem;
223 ret = cpufreq_register_driver(&spear_cpufreq_driver);
224 if (!ret)
225 return 0;
227 pr_err("failed register driver: %d\n", ret);
228 clk_put(spear_cpufreq.clk);
230 out_put_mem:
231 kfree(freq_tbl);
232 return ret;
234 out_put_node:
235 of_node_put(np);
236 return ret;
238 late_initcall(spear_cpufreq_driver_init);
240 MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>");
241 MODULE_DESCRIPTION("SPEAr CPUFreq driver");
242 MODULE_LICENSE("GPL");