arch/arm/boot/dts/r8a7794-silk.dts

   1 /*
   2  * Device Tree Source for the SILK board
   3  *
   4  * Copyright (C) 2014 Renesas Electronics Corporation
   5  * Copyright (C) 2014-2015 Renesas Solutions Corp.
   6  * Copyright (C) 2014-2015 Cogent Embedded, Inc.
   7  *
   8  * This file is licensed under the terms of the GNU General Public License
   9  * version 2.  This program is licensed "as is" without any warranty of any
  10  * kind, whether express or implied.
  11  */
  12
  13 /dts-v1/;
  14 #include "r8a7794.dtsi"
  15 #include <dt-bindings/gpio/gpio.h>
  16
  17 / {
  18         model = "SILK";
  19         compatible = "renesas,silk", "renesas,r8a7794";
  20
  21         aliases {
  22                 serial0 = &scif2;
  23         };
  24
  25         chosen {
  26                 bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
  27                 stdout-path = &scif2;
  28         };
  29
  30         memory@40000000 {
  31                 device_type = "memory";
  32                 reg = <0 0x40000000 0 0x40000000>;
  33         };
  34
  35         d3_3v: regulator@0 {
  36                 compatible = "regulator-fixed";
  37                 regulator-name = "D3.3V";
  38                 regulator-min-microvolt = <3300000>;
  39                 regulator-max-microvolt = <3300000>;
  40                 regulator-boot-on;
  41                 regulator-always-on;
  42         };
  43
  44         vcc_sdhi1: regulator@3 {
  45                 compatible = "regulator-fixed";
  46
  47                 regulator-name = "SDHI1 Vcc";
  48                 regulator-min-microvolt = <3300000>;
  49                 regulator-max-microvolt = <3300000>;
  50
  51                 gpio = <&gpio4 26 GPIO_ACTIVE_HIGH>;
  52                 enable-active-high;
  53         };
  54
  55         vccq_sdhi1: regulator@4 {
  56                 compatible = "regulator-gpio";
  57
  58                 regulator-name = "SDHI1 VccQ";
  59                 regulator-min-microvolt = <1800000>;
  60                 regulator-max-microvolt = <3300000>;
  61
  62                 gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
  63                 gpios-states = <1>;
  64                 states = <3300000 1
  65                           1800000 0>;
  66         };
  67 };
  68
  69 &extal_clk {
  70         clock-frequency = <20000000>;
  71 };
  72
  73 &pfc {
  74         scif2_pins: serial2 {
  75                 renesas,groups = "scif2_data";
  76                 renesas,function = "scif2";
  77         };
  78
  79         ether_pins: ether {
  80                 renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
  81                 renesas,function = "eth";
  82         };
  83
  84         phy1_pins: phy1 {
  85                 renesas,groups = "intc_irq8";
  86                 renesas,function = "intc";
  87         };
  88
  89         i2c1_pins: i2c1 {
  90                 renesas,groups = "i2c1";
  91                 renesas,function = "i2c1";
  92         };
  93
  94         mmcif0_pins: mmcif0 {
  95                 renesas,groups = "mmc_data8", "mmc_ctrl";
  96                 renesas,function = "mmc";
  97         };
  98
  99         sdhi1_pins: sd1 {
 100                 renesas,groups = "sdhi1_data4", "sdhi1_ctrl";
 101                 renesas,function = "sdhi1";
 102         };
 103
 104         qspi_pins: spi0 {
 105                 renesas,groups = "qspi_ctrl", "qspi_data4";
 106                 renesas,function = "qspi";
 107         };
 108
 109         vin0_pins: vin0 {
 110                 renesas,groups = "vin0_data8", "vin0_clk";
 111                 renesas,function = "vin0";
 112         };
 113
 114         usb0_pins: usb0 {
 115                 renesas,groups = "usb0";
 116                 renesas,function = "usb0";
 117         };
 118
 119         usb1_pins: usb1 {
 120                 renesas,groups = "usb1";
 121                 renesas,function = "usb1";
 122         };
 123 };
 124
 125 &scif2 {
 126         pinctrl-0 = <&scif2_pins>;
 127         pinctrl-names = "default";
 128
 129         status = "okay";
 130 };
 131
 132 &ether {
 133         pinctrl-0 = <&ether_pins &phy1_pins>;
 134         pinctrl-names = "default";
 135
 136         phy-handle = <&phy1>;
 137         renesas,ether-link-active-low;
 138         status = "okay";
 139
 140         phy1: ethernet-phy@1 {
 141                 reg = <1>;
 142                 interrupt-parent = <&irqc0>;
 143                 interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
 144                 micrel,led-mode = <1>;
 145         };
 146 };
 147
 148 &i2c1 {
 149         pinctrl-0 = <&i2c1_pins>;
 150         pinctrl-names = "default";
 151
 152         status = "okay";
 153         clock-frequency = <400000>;
 154
 155         composite-in@20 {
 156                 compatible = "adi,adv7180";
 157                 reg = <0x20>;
 158                 remote = <&vin0>;
 159
 160                 port {
 161                         adv7180: endpoint {
 162                                 bus-width = <8>;
 163                                 remote-endpoint = <&vin0ep>;
 164                         };
 165                 };
 166         };
 167 };
 168
 169 &mmcif0 {
 170         pinctrl-0 = <&mmcif0_pins>;
 171         pinctrl-names = "default";
 172
 173         vmmc-supply = <&d3_3v>;
 174         vqmmc-supply = <&d3_3v>;
 175         bus-width = <8>;
 176         non-removable;
 177         status = "okay";
 178 };
 179
 180 &sdhi1 {
 181         pinctrl-0 = <&sdhi1_pins>;
 182         pinctrl-names = "default";
 183
 184         vmmc-supply = <&vcc_sdhi1>;
 185         vqmmc-supply = <&vccq_sdhi1>;
 186         cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
 187         status = "okay";
 188 };
 189
 190 &qspi {
 191         pinctrl-0 = <&qspi_pins>;
 192         pinctrl-names = "default";
 193
 194         status = "okay";
 195
 196         flash@0 {
 197                 #address-cells = <1>;
 198                 #size-cells = <1>;
 199                 compatible = "spansion,s25fl512s", "jedec,spi-nor";
 200                 reg = <0>;
 201                 spi-max-frequency = <30000000>;
 202                 spi-tx-bus-width = <4>;
 203                 spi-rx-bus-width = <4>;
 204                 spi-cpol;
 205                 spi-cpha;
 206                 m25p,fast-read;
 207
 208                 partition@0 {
 209                         label = "loader";
 210                         reg = <0x00000000 0x00040000>;
 211                         read-only;
 212                 };
 213                 partition@40000 {
 214                         label = "user";
 215                         reg = <0x00040000 0x00400000>;
 216                         read-only;
 217                 };
 218                 partition@440000 {
 219                         label = "flash";
 220                         reg = <0x00440000 0x03bc0000>;
 221                 };
 222         };
 223 };
 224
 225 /* composite video input */
 226 &vin0 {
 227         status = "okay";
 228         pinctrl-0 = <&vin0_pins>;
 229         pinctrl-names = "default";
 230
 231         port {
 232                 #address-cells = <1>;
 233                 #size-cells = <0>;
 234
 235                 vin0ep: endpoint {
 236                         remote-endpoint = <&adv7180>;
 237                         bus-width = <8>;
 238                 };
 239         };
 240 };
 241
 242 &pci0 {
 243         status = "okay";
 244         pinctrl-0 = <&usb0_pins>;
 245         pinctrl-names = "default";
 246 };
 247
 248 &pci1 {
 249         status = "okay";
 250         pinctrl-0 = <&usb1_pins>;
 251         pinctrl-names = "default";
 252 };
 253
 254 &usbphy {
 255         status = "okay";
 256 };