V4L/DVB (4150): Cx88: clear EN_I2SIN_ENABLE bit for ASUS PVR-416 to enable audio
[linux-2.6/btrfs-unstable.git] / drivers / media / video / cx88 / cx88-tvaudio.c
blob1e4278b588d8830c14b60de00b076bbb1cff63c8
1 /*
3 cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
5 (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
6 (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
7 (c) 2003 Gerd Knorr <kraxel@bytesex.org>
9 -----------------------------------------------------------------------
11 Lot of voodoo here. Even the data sheet doesn't help to
12 understand what is going on here, the documentation for the audio
13 part of the cx2388x chip is *very* bad.
15 Some of this comes from party done linux driver sources I got from
16 [undocumented].
18 Some comes from the dscaler sources, one of the dscaler driver guy works
19 for Conexant ...
21 -----------------------------------------------------------------------
23 This program is free software; you can redistribute it and/or modify
24 it under the terms of the GNU General Public License as published by
25 the Free Software Foundation; either version 2 of the License, or
26 (at your option) any later version.
28 This program is distributed in the hope that it will be useful,
29 but WITHOUT ANY WARRANTY; without even the implied warranty of
30 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 GNU General Public License for more details.
33 You should have received a copy of the GNU General Public License
34 along with this program; if not, write to the Free Software
35 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
38 #include <linux/module.h>
39 #include <linux/moduleparam.h>
40 #include <linux/errno.h>
41 #include <linux/kernel.h>
42 #include <linux/slab.h>
43 #include <linux/mm.h>
44 #include <linux/poll.h>
45 #include <linux/pci.h>
46 #include <linux/signal.h>
47 #include <linux/ioport.h>
48 #include <linux/sched.h>
49 #include <linux/types.h>
50 #include <linux/interrupt.h>
51 #include <linux/vmalloc.h>
52 #include <linux/init.h>
53 #include <linux/smp_lock.h>
54 #include <linux/delay.h>
55 #include <linux/config.h>
56 #include <linux/kthread.h>
58 #include "cx88.h"
60 static unsigned int audio_debug = 0;
61 module_param(audio_debug, int, 0644);
62 MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
64 static unsigned int always_analog = 0;
65 module_param(always_analog,int,0644);
66 MODULE_PARM_DESC(always_analog,"force analog audio out");
69 #define dprintk(fmt, arg...) if (audio_debug) \
70 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
72 /* ----------------------------------------------------------- */
74 static char *aud_ctl_names[64] = {
75 [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
76 [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
77 [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
78 [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
79 [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
80 [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
81 [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
82 [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
83 [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
84 [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
85 [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
86 [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
87 [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
88 [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
89 [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
90 [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
91 [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
92 [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
93 [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
94 [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
95 [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
96 [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
97 [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
100 struct rlist {
101 u32 reg;
102 u32 val;
105 static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
107 int i;
109 for (i = 0; l[i].reg; i++) {
110 switch (l[i].reg) {
111 case AUD_PDF_DDS_CNST_BYTE2:
112 case AUD_PDF_DDS_CNST_BYTE1:
113 case AUD_PDF_DDS_CNST_BYTE0:
114 case AUD_QAM_MODE:
115 case AUD_PHACC_FREQ_8MSB:
116 case AUD_PHACC_FREQ_8LSB:
117 cx_writeb(l[i].reg, l[i].val);
118 break;
119 default:
120 cx_write(l[i].reg, l[i].val);
121 break;
126 static void set_audio_start(struct cx88_core *core, u32 mode)
128 /* mute */
129 cx_write(AUD_VOL_CTL, (1 << 6));
131 /* start programming */
132 cx_write(AUD_INIT, mode);
133 cx_write(AUD_INIT_LD, 0x0001);
134 cx_write(AUD_SOFT_RESET, 0x0001);
137 static void set_audio_finish(struct cx88_core *core, u32 ctl)
139 u32 volume;
141 #ifndef CONFIG_VIDEO_CX88_ALSA
142 /* restart dma; This avoids buzz in NICAM and is good in others */
143 cx88_stop_audio_dma(core);
144 #endif
145 cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
146 #ifndef CONFIG_VIDEO_CX88_ALSA
147 cx88_start_audio_dma(core);
148 #endif
150 if (cx88_boards[core->board].blackbird) {
151 /* sets sound input from external adc */
152 switch (core->board) {
153 case CX88_BOARD_HAUPPAUGE_ROSLYN:
154 case CX88_BOARD_KWORLD_MCE200_DELUXE:
155 case CX88_BOARD_KWORLD_HARDWARE_MPEG_TV_XPERT:
156 case CX88_BOARD_PIXELVIEW_PLAYTV_P7000:
157 case CX88_BOARD_ASUS_PVR_416:
158 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
159 break;
160 default:
161 cx_set(AUD_CTL, EN_I2SIN_ENABLE);
164 cx_write(AUD_I2SINPUTCNTL, 4);
165 cx_write(AUD_BAUDRATE, 1);
166 /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
167 cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
168 cx_write(AUD_I2SOUTPUTCNTL, 1);
169 cx_write(AUD_I2SCNTL, 0);
170 /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
172 if ((always_analog) || (!cx88_boards[core->board].blackbird)) {
173 ctl |= EN_DAC_ENABLE;
174 cx_write(AUD_CTL, ctl);
177 /* finish programming */
178 cx_write(AUD_SOFT_RESET, 0x0000);
180 /* unmute */
181 volume = cx_sread(SHADOW_AUD_VOL_CTL);
182 cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
185 /* ----------------------------------------------------------- */
187 static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
188 u32 mode)
190 static const struct rlist btsc[] = {
191 {AUD_AFE_12DB_EN, 0x00000001},
192 {AUD_OUT1_SEL, 0x00000013},
193 {AUD_OUT1_SHIFT, 0x00000000},
194 {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
195 {AUD_DMD_RA_DDS, 0x00c3e7aa},
196 {AUD_DBX_IN_GAIN, 0x00004734},
197 {AUD_DBX_WBE_GAIN, 0x00004640},
198 {AUD_DBX_SE_GAIN, 0x00008d31},
199 {AUD_DCOC_0_SRC, 0x0000001a},
200 {AUD_IIR1_4_SEL, 0x00000021},
201 {AUD_DCOC_PASS_IN, 0x00000003},
202 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
203 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
204 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
205 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
206 {AUD_DN0_FREQ, 0x0000283b},
207 {AUD_DN2_SRC_SEL, 0x00000008},
208 {AUD_DN2_FREQ, 0x00003000},
209 {AUD_DN2_AFC, 0x00000002},
210 {AUD_DN2_SHFT, 0x00000000},
211 {AUD_IIR2_2_SEL, 0x00000020},
212 {AUD_IIR2_2_SHIFT, 0x00000000},
213 {AUD_IIR2_3_SEL, 0x0000001f},
214 {AUD_IIR2_3_SHIFT, 0x00000000},
215 {AUD_CRDC1_SRC_SEL, 0x000003ce},
216 {AUD_CRDC1_SHIFT, 0x00000000},
217 {AUD_CORDIC_SHIFT_1, 0x00000007},
218 {AUD_DCOC_1_SRC, 0x0000001b},
219 {AUD_DCOC1_SHIFT, 0x00000000},
220 {AUD_RDSI_SEL, 0x00000008},
221 {AUD_RDSQ_SEL, 0x00000008},
222 {AUD_RDSI_SHIFT, 0x00000000},
223 {AUD_RDSQ_SHIFT, 0x00000000},
224 {AUD_POLYPH80SCALEFAC, 0x00000003},
225 { /* end of list */ },
227 static const struct rlist btsc_sap[] = {
228 {AUD_AFE_12DB_EN, 0x00000001},
229 {AUD_DBX_IN_GAIN, 0x00007200},
230 {AUD_DBX_WBE_GAIN, 0x00006200},
231 {AUD_DBX_SE_GAIN, 0x00006200},
232 {AUD_IIR1_1_SEL, 0x00000000},
233 {AUD_IIR1_3_SEL, 0x00000001},
234 {AUD_DN1_SRC_SEL, 0x00000007},
235 {AUD_IIR1_4_SHIFT, 0x00000006},
236 {AUD_IIR2_1_SHIFT, 0x00000000},
237 {AUD_IIR2_2_SHIFT, 0x00000000},
238 {AUD_IIR3_0_SHIFT, 0x00000000},
239 {AUD_IIR3_1_SHIFT, 0x00000000},
240 {AUD_IIR3_0_SEL, 0x0000000d},
241 {AUD_IIR3_1_SEL, 0x0000000e},
242 {AUD_DEEMPH1_SRC_SEL, 0x00000014},
243 {AUD_DEEMPH1_SHIFT, 0x00000000},
244 {AUD_DEEMPH1_G0, 0x00004000},
245 {AUD_DEEMPH1_A0, 0x00000000},
246 {AUD_DEEMPH1_B0, 0x00000000},
247 {AUD_DEEMPH1_A1, 0x00000000},
248 {AUD_DEEMPH1_B1, 0x00000000},
249 {AUD_OUT0_SEL, 0x0000003f},
250 {AUD_OUT1_SEL, 0x0000003f},
251 {AUD_DN1_AFC, 0x00000002},
252 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
253 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
254 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
255 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
256 {AUD_IIR1_0_SEL, 0x0000001d},
257 {AUD_IIR1_2_SEL, 0x0000001e},
258 {AUD_IIR2_1_SEL, 0x00000002},
259 {AUD_IIR2_2_SEL, 0x00000004},
260 {AUD_IIR3_2_SEL, 0x0000000f},
261 {AUD_DCOC2_SHIFT, 0x00000001},
262 {AUD_IIR3_2_SHIFT, 0x00000001},
263 {AUD_DEEMPH0_SRC_SEL, 0x00000014},
264 {AUD_CORDIC_SHIFT_1, 0x00000006},
265 {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
266 {AUD_DMD_RA_DDS, 0x00f696e6},
267 {AUD_IIR2_3_SEL, 0x00000025},
268 {AUD_IIR1_4_SEL, 0x00000021},
269 {AUD_DN1_FREQ, 0x0000c965},
270 {AUD_DCOC_PASS_IN, 0x00000003},
271 {AUD_DCOC_0_SRC, 0x0000001a},
272 {AUD_DCOC_1_SRC, 0x0000001b},
273 {AUD_DCOC1_SHIFT, 0x00000000},
274 {AUD_RDSI_SEL, 0x00000009},
275 {AUD_RDSQ_SEL, 0x00000009},
276 {AUD_RDSI_SHIFT, 0x00000000},
277 {AUD_RDSQ_SHIFT, 0x00000000},
278 {AUD_POLYPH80SCALEFAC, 0x00000003},
279 { /* end of list */ },
282 mode |= EN_FMRADIO_EN_RDS;
284 if (sap) {
285 dprintk("%s SAP (status: unknown)\n", __FUNCTION__);
286 set_audio_start(core, SEL_SAP);
287 set_audio_registers(core, btsc_sap);
288 set_audio_finish(core, mode);
289 } else {
290 dprintk("%s (status: known-good)\n", __FUNCTION__);
291 set_audio_start(core, SEL_BTSC);
292 set_audio_registers(core, btsc);
293 set_audio_finish(core, mode);
297 static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
299 static const struct rlist nicam_l[] = {
300 {AUD_AFE_12DB_EN, 0x00000001},
301 {AUD_RATE_ADJ1, 0x00000060},
302 {AUD_RATE_ADJ2, 0x000000F9},
303 {AUD_RATE_ADJ3, 0x000001CC},
304 {AUD_RATE_ADJ4, 0x000002B3},
305 {AUD_RATE_ADJ5, 0x00000726},
306 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
307 {AUD_DEEMPHDENOM2_R, 0x00000000},
308 {AUD_ERRLOGPERIOD_R, 0x00000064},
309 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
310 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
311 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
312 {AUD_POLYPH80SCALEFAC, 0x00000003},
313 {AUD_DMD_RA_DDS, 0x00C00000},
314 {AUD_PLL_INT, 0x0000001E},
315 {AUD_PLL_DDS, 0x00000000},
316 {AUD_PLL_FRAC, 0x0000E542},
317 {AUD_START_TIMER, 0x00000000},
318 {AUD_DEEMPHNUMER1_R, 0x000353DE},
319 {AUD_DEEMPHNUMER2_R, 0x000001B1},
320 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
321 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
322 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
323 {AUD_QAM_MODE, 0x05},
324 {AUD_PHACC_FREQ_8MSB, 0x34},
325 {AUD_PHACC_FREQ_8LSB, 0x4C},
326 {AUD_DEEMPHGAIN_R, 0x00006680},
327 {AUD_RATE_THRES_DMD, 0x000000C0},
328 { /* end of list */ },
331 static const struct rlist nicam_bgdki_common[] = {
332 {AUD_AFE_12DB_EN, 0x00000001},
333 {AUD_RATE_ADJ1, 0x00000010},
334 {AUD_RATE_ADJ2, 0x00000040},
335 {AUD_RATE_ADJ3, 0x00000100},
336 {AUD_RATE_ADJ4, 0x00000400},
337 {AUD_RATE_ADJ5, 0x00001000},
338 {AUD_ERRLOGPERIOD_R, 0x00000fff},
339 {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
340 {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
341 {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
342 {AUD_POLYPH80SCALEFAC, 0x00000003},
343 {AUD_DEEMPHGAIN_R, 0x000023c2},
344 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
345 {AUD_DEEMPHNUMER2_R, 0x0003023e},
346 {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
347 {AUD_DEEMPHDENOM2_R, 0x00000000},
348 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
349 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
350 {AUD_QAM_MODE, 0x05},
351 { /* end of list */ },
354 static const struct rlist nicam_i[] = {
355 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
356 {AUD_PHACC_FREQ_8MSB, 0x3a},
357 {AUD_PHACC_FREQ_8LSB, 0x93},
358 { /* end of list */ },
361 static const struct rlist nicam_default[] = {
362 {AUD_PDF_DDS_CNST_BYTE0, 0x16},
363 {AUD_PHACC_FREQ_8MSB, 0x34},
364 {AUD_PHACC_FREQ_8LSB, 0x4c},
365 { /* end of list */ },
368 set_audio_start(core,SEL_NICAM);
369 switch (core->tvaudio) {
370 case WW_L:
371 dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__);
372 set_audio_registers(core, nicam_l);
373 break;
374 case WW_I:
375 dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__);
376 set_audio_registers(core, nicam_bgdki_common);
377 set_audio_registers(core, nicam_i);
378 break;
379 default:
380 dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__);
381 set_audio_registers(core, nicam_bgdki_common);
382 set_audio_registers(core, nicam_default);
383 break;
386 mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
387 set_audio_finish(core, mode);
390 static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
392 static const struct rlist a2_bgdk_common[] = {
393 {AUD_ERRLOGPERIOD_R, 0x00000064},
394 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
395 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
396 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
397 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
398 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
399 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
400 {AUD_QAM_MODE, 0x05},
401 {AUD_PHACC_FREQ_8MSB, 0x34},
402 {AUD_PHACC_FREQ_8LSB, 0x4c},
403 {AUD_RATE_ADJ1, 0x00000100},
404 {AUD_RATE_ADJ2, 0x00000200},
405 {AUD_RATE_ADJ3, 0x00000300},
406 {AUD_RATE_ADJ4, 0x00000400},
407 {AUD_RATE_ADJ5, 0x00000500},
408 {AUD_THR_FR, 0x00000000},
409 {AAGC_HYST, 0x0000001a},
410 {AUD_PILOT_BQD_1_K0, 0x0000755b},
411 {AUD_PILOT_BQD_1_K1, 0x00551340},
412 {AUD_PILOT_BQD_1_K2, 0x006d30be},
413 {AUD_PILOT_BQD_1_K3, 0xffd394af},
414 {AUD_PILOT_BQD_1_K4, 0x00400000},
415 {AUD_PILOT_BQD_2_K0, 0x00040000},
416 {AUD_PILOT_BQD_2_K1, 0x002a4841},
417 {AUD_PILOT_BQD_2_K2, 0x00400000},
418 {AUD_PILOT_BQD_2_K3, 0x00000000},
419 {AUD_PILOT_BQD_2_K4, 0x00000000},
420 {AUD_MODE_CHG_TIMER, 0x00000040},
421 {AUD_AFE_12DB_EN, 0x00000001},
422 {AUD_CORDIC_SHIFT_0, 0x00000007},
423 {AUD_CORDIC_SHIFT_1, 0x00000007},
424 {AUD_DEEMPH0_G0, 0x00000380},
425 {AUD_DEEMPH1_G0, 0x00000380},
426 {AUD_DCOC_0_SRC, 0x0000001a},
427 {AUD_DCOC0_SHIFT, 0x00000000},
428 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
429 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
430 {AUD_DCOC_PASS_IN, 0x00000003},
431 {AUD_IIR3_0_SEL, 0x00000021},
432 {AUD_DN2_AFC, 0x00000002},
433 {AUD_DCOC_1_SRC, 0x0000001b},
434 {AUD_DCOC1_SHIFT, 0x00000000},
435 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
436 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
437 {AUD_IIR3_1_SEL, 0x00000023},
438 {AUD_RDSI_SEL, 0x00000017},
439 {AUD_RDSI_SHIFT, 0x00000000},
440 {AUD_RDSQ_SEL, 0x00000017},
441 {AUD_RDSQ_SHIFT, 0x00000000},
442 {AUD_PLL_INT, 0x0000001e},
443 {AUD_PLL_DDS, 0x00000000},
444 {AUD_PLL_FRAC, 0x0000e542},
445 {AUD_POLYPH80SCALEFAC, 0x00000001},
446 {AUD_START_TIMER, 0x00000000},
447 { /* end of list */ },
450 static const struct rlist a2_bg[] = {
451 {AUD_DMD_RA_DDS, 0x002a4f2f},
452 {AUD_C1_UP_THR, 0x00007000},
453 {AUD_C1_LO_THR, 0x00005400},
454 {AUD_C2_UP_THR, 0x00005400},
455 {AUD_C2_LO_THR, 0x00003000},
456 { /* end of list */ },
459 static const struct rlist a2_dk[] = {
460 {AUD_DMD_RA_DDS, 0x002a4f2f},
461 {AUD_C1_UP_THR, 0x00007000},
462 {AUD_C1_LO_THR, 0x00005400},
463 {AUD_C2_UP_THR, 0x00005400},
464 {AUD_C2_LO_THR, 0x00003000},
465 {AUD_DN0_FREQ, 0x00003a1c},
466 {AUD_DN2_FREQ, 0x0000d2e0},
467 { /* end of list */ },
470 static const struct rlist a1_i[] = {
471 {AUD_ERRLOGPERIOD_R, 0x00000064},
472 {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
473 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
474 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
475 {AUD_PDF_DDS_CNST_BYTE2, 0x06},
476 {AUD_PDF_DDS_CNST_BYTE1, 0x82},
477 {AUD_PDF_DDS_CNST_BYTE0, 0x12},
478 {AUD_QAM_MODE, 0x05},
479 {AUD_PHACC_FREQ_8MSB, 0x3a},
480 {AUD_PHACC_FREQ_8LSB, 0x93},
481 {AUD_DMD_RA_DDS, 0x002a4f2f},
482 {AUD_PLL_INT, 0x0000001e},
483 {AUD_PLL_DDS, 0x00000004},
484 {AUD_PLL_FRAC, 0x0000e542},
485 {AUD_RATE_ADJ1, 0x00000100},
486 {AUD_RATE_ADJ2, 0x00000200},
487 {AUD_RATE_ADJ3, 0x00000300},
488 {AUD_RATE_ADJ4, 0x00000400},
489 {AUD_RATE_ADJ5, 0x00000500},
490 {AUD_THR_FR, 0x00000000},
491 {AUD_PILOT_BQD_1_K0, 0x0000755b},
492 {AUD_PILOT_BQD_1_K1, 0x00551340},
493 {AUD_PILOT_BQD_1_K2, 0x006d30be},
494 {AUD_PILOT_BQD_1_K3, 0xffd394af},
495 {AUD_PILOT_BQD_1_K4, 0x00400000},
496 {AUD_PILOT_BQD_2_K0, 0x00040000},
497 {AUD_PILOT_BQD_2_K1, 0x002a4841},
498 {AUD_PILOT_BQD_2_K2, 0x00400000},
499 {AUD_PILOT_BQD_2_K3, 0x00000000},
500 {AUD_PILOT_BQD_2_K4, 0x00000000},
501 {AUD_MODE_CHG_TIMER, 0x00000060},
502 {AUD_AFE_12DB_EN, 0x00000001},
503 {AAGC_HYST, 0x0000000a},
504 {AUD_CORDIC_SHIFT_0, 0x00000007},
505 {AUD_CORDIC_SHIFT_1, 0x00000007},
506 {AUD_C1_UP_THR, 0x00007000},
507 {AUD_C1_LO_THR, 0x00005400},
508 {AUD_C2_UP_THR, 0x00005400},
509 {AUD_C2_LO_THR, 0x00003000},
510 {AUD_DCOC_0_SRC, 0x0000001a},
511 {AUD_DCOC0_SHIFT, 0x00000000},
512 {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
513 {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
514 {AUD_DCOC_PASS_IN, 0x00000003},
515 {AUD_IIR3_0_SEL, 0x00000021},
516 {AUD_DN2_AFC, 0x00000002},
517 {AUD_DCOC_1_SRC, 0x0000001b},
518 {AUD_DCOC1_SHIFT, 0x00000000},
519 {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
520 {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
521 {AUD_IIR3_1_SEL, 0x00000023},
522 {AUD_DN0_FREQ, 0x000035a3},
523 {AUD_DN2_FREQ, 0x000029c7},
524 {AUD_CRDC0_SRC_SEL, 0x00000511},
525 {AUD_IIR1_0_SEL, 0x00000001},
526 {AUD_IIR1_1_SEL, 0x00000000},
527 {AUD_IIR3_2_SEL, 0x00000003},
528 {AUD_IIR3_2_SHIFT, 0x00000000},
529 {AUD_IIR3_0_SEL, 0x00000002},
530 {AUD_IIR2_0_SEL, 0x00000021},
531 {AUD_IIR2_0_SHIFT, 0x00000002},
532 {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
533 {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
534 {AUD_POLYPH80SCALEFAC, 0x00000001},
535 {AUD_START_TIMER, 0x00000000},
536 { /* end of list */ },
539 static const struct rlist am_l[] = {
540 {AUD_ERRLOGPERIOD_R, 0x00000064},
541 {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
542 {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
543 {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
544 {AUD_PDF_DDS_CNST_BYTE2, 0x48},
545 {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
546 {AUD_QAM_MODE, 0x00},
547 {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
548 {AUD_PHACC_FREQ_8MSB, 0x3a},
549 {AUD_PHACC_FREQ_8LSB, 0x4a},
550 {AUD_DEEMPHGAIN_R, 0x00006680},
551 {AUD_DEEMPHNUMER1_R, 0x000353DE},
552 {AUD_DEEMPHNUMER2_R, 0x000001B1},
553 {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
554 {AUD_DEEMPHDENOM2_R, 0x00000000},
555 {AUD_FM_MODE_ENABLE, 0x00000007},
556 {AUD_POLYPH80SCALEFAC, 0x00000003},
557 {AUD_AFE_12DB_EN, 0x00000001},
558 {AAGC_GAIN, 0x00000000},
559 {AAGC_HYST, 0x00000018},
560 {AAGC_DEF, 0x00000020},
561 {AUD_DN0_FREQ, 0x00000000},
562 {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
563 {AUD_DCOC_0_SRC, 0x00000021},
564 {AUD_IIR1_0_SEL, 0x00000000},
565 {AUD_IIR1_0_SHIFT, 0x00000007},
566 {AUD_IIR1_1_SEL, 0x00000002},
567 {AUD_IIR1_1_SHIFT, 0x00000000},
568 {AUD_DCOC_1_SRC, 0x00000003},
569 {AUD_DCOC1_SHIFT, 0x00000000},
570 {AUD_DCOC_PASS_IN, 0x00000000},
571 {AUD_IIR1_2_SEL, 0x00000023},
572 {AUD_IIR1_2_SHIFT, 0x00000000},
573 {AUD_IIR1_3_SEL, 0x00000004},
574 {AUD_IIR1_3_SHIFT, 0x00000007},
575 {AUD_IIR1_4_SEL, 0x00000005},
576 {AUD_IIR1_4_SHIFT, 0x00000007},
577 {AUD_IIR3_0_SEL, 0x00000007},
578 {AUD_IIR3_0_SHIFT, 0x00000000},
579 {AUD_DEEMPH0_SRC_SEL, 0x00000011},
580 {AUD_DEEMPH0_SHIFT, 0x00000000},
581 {AUD_DEEMPH0_G0, 0x00007000},
582 {AUD_DEEMPH0_A0, 0x00000000},
583 {AUD_DEEMPH0_B0, 0x00000000},
584 {AUD_DEEMPH0_A1, 0x00000000},
585 {AUD_DEEMPH0_B1, 0x00000000},
586 {AUD_DEEMPH1_SRC_SEL, 0x00000011},
587 {AUD_DEEMPH1_SHIFT, 0x00000000},
588 {AUD_DEEMPH1_G0, 0x00007000},
589 {AUD_DEEMPH1_A0, 0x00000000},
590 {AUD_DEEMPH1_B0, 0x00000000},
591 {AUD_DEEMPH1_A1, 0x00000000},
592 {AUD_DEEMPH1_B1, 0x00000000},
593 {AUD_OUT0_SEL, 0x0000003F},
594 {AUD_OUT1_SEL, 0x0000003F},
595 {AUD_DMD_RA_DDS, 0x00F5C285},
596 {AUD_PLL_INT, 0x0000001E},
597 {AUD_PLL_DDS, 0x00000000},
598 {AUD_PLL_FRAC, 0x0000E542},
599 {AUD_RATE_ADJ1, 0x00000100},
600 {AUD_RATE_ADJ2, 0x00000200},
601 {AUD_RATE_ADJ3, 0x00000300},
602 {AUD_RATE_ADJ4, 0x00000400},
603 {AUD_RATE_ADJ5, 0x00000500},
604 {AUD_RATE_THRES_DMD, 0x000000C0},
605 { /* end of list */ },
608 static const struct rlist a2_deemph50[] = {
609 {AUD_DEEMPH0_G0, 0x00000380},
610 {AUD_DEEMPH1_G0, 0x00000380},
611 {AUD_DEEMPHGAIN_R, 0x000011e1},
612 {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
613 {AUD_DEEMPHNUMER2_R, 0x0003023c},
614 { /* end of list */ },
617 set_audio_start(core, SEL_A2);
618 switch (core->tvaudio) {
619 case WW_BG:
620 dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__);
621 set_audio_registers(core, a2_bgdk_common);
622 set_audio_registers(core, a2_bg);
623 set_audio_registers(core, a2_deemph50);
624 break;
625 case WW_DK:
626 dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__);
627 set_audio_registers(core, a2_bgdk_common);
628 set_audio_registers(core, a2_dk);
629 set_audio_registers(core, a2_deemph50);
630 break;
631 case WW_I:
632 dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__);
633 set_audio_registers(core, a1_i);
634 set_audio_registers(core, a2_deemph50);
635 break;
636 case WW_L:
637 dprintk("%s AM-L (status: devel)\n", __FUNCTION__);
638 set_audio_registers(core, am_l);
639 break;
640 default:
641 dprintk("%s Warning: wrong value\n", __FUNCTION__);
642 return;
643 break;
646 mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
647 set_audio_finish(core, mode);
650 static void set_audio_standard_EIAJ(struct cx88_core *core)
652 static const struct rlist eiaj[] = {
653 /* TODO: eiaj register settings are not there yet ... */
655 { /* end of list */ },
657 dprintk("%s (status: unknown)\n", __FUNCTION__);
659 set_audio_start(core, SEL_EIAJ);
660 set_audio_registers(core, eiaj);
661 set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
664 static void set_audio_standard_FM(struct cx88_core *core,
665 enum cx88_deemph_type deemph)
667 static const struct rlist fm_deemph_50[] = {
668 {AUD_DEEMPH0_G0, 0x0C45},
669 {AUD_DEEMPH0_A0, 0x6262},
670 {AUD_DEEMPH0_B0, 0x1C29},
671 {AUD_DEEMPH0_A1, 0x3FC66},
672 {AUD_DEEMPH0_B1, 0x399A},
674 {AUD_DEEMPH1_G0, 0x0D80},
675 {AUD_DEEMPH1_A0, 0x6262},
676 {AUD_DEEMPH1_B0, 0x1C29},
677 {AUD_DEEMPH1_A1, 0x3FC66},
678 {AUD_DEEMPH1_B1, 0x399A},
680 {AUD_POLYPH80SCALEFAC, 0x0003},
681 { /* end of list */ },
683 static const struct rlist fm_deemph_75[] = {
684 {AUD_DEEMPH0_G0, 0x091B},
685 {AUD_DEEMPH0_A0, 0x6B68},
686 {AUD_DEEMPH0_B0, 0x11EC},
687 {AUD_DEEMPH0_A1, 0x3FC66},
688 {AUD_DEEMPH0_B1, 0x399A},
690 {AUD_DEEMPH1_G0, 0x0AA0},
691 {AUD_DEEMPH1_A0, 0x6B68},
692 {AUD_DEEMPH1_B0, 0x11EC},
693 {AUD_DEEMPH1_A1, 0x3FC66},
694 {AUD_DEEMPH1_B1, 0x399A},
696 {AUD_POLYPH80SCALEFAC, 0x0003},
697 { /* end of list */ },
700 /* It is enough to leave default values? */
701 static const struct rlist fm_no_deemph[] = {
703 {AUD_POLYPH80SCALEFAC, 0x0003},
704 { /* end of list */ },
707 dprintk("%s (status: unknown)\n", __FUNCTION__);
708 set_audio_start(core, SEL_FMRADIO);
710 switch (deemph) {
711 case FM_NO_DEEMPH:
712 set_audio_registers(core, fm_no_deemph);
713 break;
715 case FM_DEEMPH_50:
716 set_audio_registers(core, fm_deemph_50);
717 break;
719 case FM_DEEMPH_75:
720 set_audio_registers(core, fm_deemph_75);
721 break;
724 set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
727 /* ----------------------------------------------------------- */
729 int cx88_detect_nicam(struct cx88_core *core)
731 int i, j = 0;
733 dprintk("start nicam autodetect.\n");
735 for (i = 0; i < 6; i++) {
736 /* if bit1=1 then nicam is detected */
737 j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
739 if (j == 1) {
740 dprintk("nicam is detected.\n");
741 return 1;
744 /* wait a little bit for next reading status */
745 msleep(10);
748 dprintk("nicam is not detected.\n");
749 return 0;
752 void cx88_set_tvaudio(struct cx88_core *core)
754 switch (core->tvaudio) {
755 case WW_BTSC:
756 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
757 break;
758 case WW_BG:
759 case WW_DK:
760 case WW_I:
761 case WW_L:
762 /* prepare all dsp registers */
763 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
765 /* set nicam mode - otherwise
766 AUD_NICAM_STATUS2 contains wrong values */
767 set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
768 if (0 == cx88_detect_nicam(core)) {
769 /* fall back to fm / am mono */
770 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
771 core->use_nicam = 0;
772 } else {
773 core->use_nicam = 1;
775 break;
776 case WW_EIAJ:
777 set_audio_standard_EIAJ(core);
778 break;
779 case WW_FM:
780 set_audio_standard_FM(core, FM_NO_DEEMPH);
781 break;
782 case WW_NONE:
783 default:
784 printk("%s/0: unknown tv audio mode [%d]\n",
785 core->name, core->tvaudio);
786 break;
788 return;
791 void cx88_newstation(struct cx88_core *core)
793 core->audiomode_manual = UNSET;
796 void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
798 static char *m[] = { "stereo", "dual mono", "mono", "sap" };
799 static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
800 u32 reg, mode, pilot;
802 reg = cx_read(AUD_STATUS);
803 mode = reg & 0x03;
804 pilot = (reg >> 2) & 0x03;
806 if (core->astat != reg)
807 dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
808 reg, m[mode], p[pilot],
809 aud_ctl_names[cx_read(AUD_CTL) & 63]);
810 core->astat = reg;
812 /* TODO
813 Reading from AUD_STATUS is not enough
814 for auto-detecting sap/dual-fm/nicam.
815 Add some code here later.
818 # if 0
819 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
820 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
821 t->rxsubchans = V4L2_TUNER_SUB_MONO;
822 t->audmode = V4L2_TUNER_MODE_MONO;
824 switch (core->tvaudio) {
825 case WW_BTSC:
826 t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP;
827 t->rxsubchans = V4L2_TUNER_SUB_STEREO;
828 if (1 == pilot) {
829 /* SAP */
830 t->rxsubchans |= V4L2_TUNER_SUB_SAP;
832 break;
833 case WW_A2_BG:
834 case WW_A2_DK:
835 case WW_A2_M:
836 if (1 == pilot) {
837 /* stereo */
838 t->rxsubchans =
839 V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
840 if (0 == mode)
841 t->audmode = V4L2_TUNER_MODE_STEREO;
843 if (2 == pilot) {
844 /* dual language -- FIXME */
845 t->rxsubchans =
846 V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
847 t->audmode = V4L2_TUNER_MODE_LANG1;
849 break;
850 case WW_NICAM_BGDKL:
851 if (0 == mode) {
852 t->audmode = V4L2_TUNER_MODE_STEREO;
853 t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
855 break;
856 case WW_SYSTEM_L_AM:
857 if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) {
858 t->audmode = V4L2_TUNER_MODE_STEREO;
859 t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
861 break;
862 default:
863 /* nothing */
864 break;
866 # endif
867 return;
870 void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
872 u32 ctl = UNSET;
873 u32 mask = UNSET;
875 if (manual) {
876 core->audiomode_manual = mode;
877 } else {
878 if (UNSET != core->audiomode_manual)
879 return;
881 core->audiomode_current = mode;
883 switch (core->tvaudio) {
884 case WW_BTSC:
885 switch (mode) {
886 case V4L2_TUNER_MODE_MONO:
887 set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
888 break;
889 case V4L2_TUNER_MODE_LANG1:
890 set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
891 break;
892 case V4L2_TUNER_MODE_LANG2:
893 set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
894 break;
895 case V4L2_TUNER_MODE_STEREO:
896 case V4L2_TUNER_MODE_LANG1_LANG2:
897 set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
898 break;
900 break;
901 case WW_BG:
902 case WW_DK:
903 case WW_I:
904 case WW_L:
905 if (1 == core->use_nicam) {
906 switch (mode) {
907 case V4L2_TUNER_MODE_MONO:
908 case V4L2_TUNER_MODE_LANG1:
909 set_audio_standard_NICAM(core,
910 EN_NICAM_FORCE_MONO1);
911 break;
912 case V4L2_TUNER_MODE_LANG2:
913 set_audio_standard_NICAM(core,
914 EN_NICAM_FORCE_MONO2);
915 break;
916 case V4L2_TUNER_MODE_STEREO:
917 case V4L2_TUNER_MODE_LANG1_LANG2:
918 set_audio_standard_NICAM(core,
919 EN_NICAM_FORCE_STEREO);
920 break;
922 } else {
923 if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
924 /* fall back to fm / am mono */
925 set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
926 } else {
927 /* TODO: Add A2 autodection */
928 switch (mode) {
929 case V4L2_TUNER_MODE_MONO:
930 case V4L2_TUNER_MODE_LANG1:
931 set_audio_standard_A2(core,
932 EN_A2_FORCE_MONO1);
933 break;
934 case V4L2_TUNER_MODE_LANG2:
935 set_audio_standard_A2(core,
936 EN_A2_FORCE_MONO2);
937 break;
938 case V4L2_TUNER_MODE_STEREO:
939 case V4L2_TUNER_MODE_LANG1_LANG2:
940 set_audio_standard_A2(core,
941 EN_A2_FORCE_STEREO);
942 break;
946 break;
947 case WW_FM:
948 switch (mode) {
949 case V4L2_TUNER_MODE_MONO:
950 ctl = EN_FMRADIO_FORCE_MONO;
951 mask = 0x3f;
952 break;
953 case V4L2_TUNER_MODE_STEREO:
954 ctl = EN_FMRADIO_AUTO_STEREO;
955 mask = 0x3f;
956 break;
958 break;
961 if (UNSET != ctl) {
962 dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
963 "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
964 mask, ctl, cx_read(AUD_STATUS),
965 cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
966 cx_andor(AUD_CTL, mask, ctl);
968 return;
971 int cx88_audio_thread(void *data)
973 struct cx88_core *core = data;
974 struct v4l2_tuner t;
975 u32 mode = 0;
977 dprintk("cx88: tvaudio thread started\n");
978 for (;;) {
979 msleep_interruptible(1000);
980 if (kthread_should_stop())
981 break;
983 /* just monitor the audio status for now ... */
984 memset(&t, 0, sizeof(t));
985 cx88_get_stereo(core, &t);
987 if (UNSET != core->audiomode_manual)
988 /* manually set, don't do anything. */
989 continue;
991 /* monitor signal */
992 if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
993 mode = V4L2_TUNER_MODE_STEREO;
994 else
995 mode = V4L2_TUNER_MODE_MONO;
996 if (mode == core->audiomode_current)
997 continue;
999 /* automatically switch to best available mode */
1000 cx88_set_stereo(core, mode, 0);
1003 dprintk("cx88: tvaudio thread exiting\n");
1004 return 0;
1007 /* ----------------------------------------------------------- */
1009 EXPORT_SYMBOL(cx88_set_tvaudio);
1010 EXPORT_SYMBOL(cx88_newstation);
1011 EXPORT_SYMBOL(cx88_set_stereo);
1012 EXPORT_SYMBOL(cx88_get_stereo);
1013 EXPORT_SYMBOL(cx88_audio_thread);
1016 * Local variables:
1017 * c-basic-offset: 8
1018 * End:
1019 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off