| blob | cadc6543909d96ef553bcde9935bfecaaca42a26 |
1 /*
2 * MFD core driver for Ricoh RN5T618 PMIC
3 *
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * You should have received a copy of the GNU General Public License
11 * along with this program. If not, see <http://www.gnu.org/licenses/>.
12 */
14 #ifndef __LINUX_MFD_RN5T618_H
15 #define __LINUX_MFD_RN5T618_H
17 #include <linux/regmap.h>
19 #define RN5T618_LSIVER 0x00
20 #define RN5T618_OTPVER 0x01
21 #define RN5T618_IODAC 0x02
22 #define RN5T618_VINDAC 0x03
23 #define RN5T618_OUT32KEN 0x05
24 #define RN5T618_CPUCNT 0x06
25 #define RN5T618_PSWR 0x07
26 #define RN5T618_PONHIS 0x09
27 #define RN5T618_POFFHIS 0x0a
28 #define RN5T618_WATCHDOG 0x0b
29 #define RN5T618_WATCHDOGCNT 0x0c
30 #define RN5T618_PWRFUNC 0x0d
31 #define RN5T618_SLPCNT 0x0e
32 #define RN5T618_REPCNT 0x0f
33 #define RN5T618_PWRONTIMSET 0x10
34 #define RN5T618_NOETIMSETCNT 0x11
35 #define RN5T618_PWRIREN 0x12
36 #define RN5T618_PWRIRQ 0x13
37 #define RN5T618_PWRMON 0x14
38 #define RN5T618_PWRIRSEL 0x15
39 #define RN5T618_DC1_SLOT 0x16
40 #define RN5T618_DC2_SLOT 0x17
41 #define RN5T618_DC3_SLOT 0x18
42 #define RN5T618_DC4_SLOT 0x19
43 #define RN5T618_LDO1_SLOT 0x1b
44 #define RN5T618_LDO2_SLOT 0x1c
45 #define RN5T618_LDO3_SLOT 0x1d
46 #define RN5T618_LDO4_SLOT 0x1e
47 #define RN5T618_LDO5_SLOT 0x1f
48 #define RN5T618_PSO0_SLOT 0x25
49 #define RN5T618_PSO1_SLOT 0x26
50 #define RN5T618_PSO2_SLOT 0x27
51 #define RN5T618_PSO3_SLOT 0x28
52 #define RN5T618_LDORTC1_SLOT 0x2a
53 #define RN5T618_DC1CTL 0x2c
54 #define RN5T618_DC1CTL2 0x2d
55 #define RN5T618_DC2CTL 0x2e
56 #define RN5T618_DC2CTL2 0x2f
57 #define RN5T618_DC3CTL 0x30
58 #define RN5T618_DC3CTL2 0x31
59 #define RN5T618_DC4CTL 0x32
60 #define RN5T618_DC4CTL2 0x33
61 #define RN5T618_DC1DAC 0x36
62 #define RN5T618_DC2DAC 0x37
63 #define RN5T618_DC3DAC 0x38
64 #define RN5T618_DC4DAC 0x39
65 #define RN5T618_DC1DAC_SLP 0x3b
66 #define RN5T618_DC2DAC_SLP 0x3c
67 #define RN5T618_DC3DAC_SLP 0x3d
68 #define RN5T618_DC4DAC_SLP 0x3e
69 #define RN5T618_DCIREN 0x40
70 #define RN5T618_DCIRQ 0x41
71 #define RN5T618_DCIRMON 0x42
72 #define RN5T618_LDOEN1 0x44
73 #define RN5T618_LDOEN2 0x45
74 #define RN5T618_LDODIS 0x46
75 #define RN5T618_LDO1DAC 0x4c
76 #define RN5T618_LDO2DAC 0x4d
77 #define RN5T618_LDO3DAC 0x4e
78 #define RN5T618_LDO4DAC 0x4f
79 #define RN5T618_LDO5DAC 0x50
80 #define RN5T618_LDORTCDAC 0x56
81 #define RN5T618_LDORTC2DAC 0x57
82 #define RN5T618_LDO1DAC_SLP 0x58
83 #define RN5T618_LDO2DAC_SLP 0x59
84 #define RN5T618_LDO3DAC_SLP 0x5a
85 #define RN5T618_LDO4DAC_SLP 0x5b
86 #define RN5T618_LDO5DAC_SLP 0x5c
87 #define RN5T618_ADCCNT1 0x64
88 #define RN5T618_ADCCNT2 0x65
89 #define RN5T618_ADCCNT3 0x66
90 #define RN5T618_ILIMDATAH 0x68
91 #define RN5T618_ILIMDATAL 0x69
92 #define RN5T618_VBATDATAH 0x6a
93 #define RN5T618_VBATDATAL 0x6b
94 #define RN5T618_VADPDATAH 0x6c
95 #define RN5T618_VADPDATAL 0x6d
96 #define RN5T618_VUSBDATAH 0x6e
97 #define RN5T618_VUSBDATAL 0x6f
98 #define RN5T618_VSYSDATAH 0x70
99 #define RN5T618_VSYSDATAL 0x71
100 #define RN5T618_VTHMDATAH 0x72
101 #define RN5T618_VTHMDATAL 0x73
102 #define RN5T618_AIN1DATAH 0x74
103 #define RN5T618_AIN1DATAL 0x75
104 #define RN5T618_AIN0DATAH 0x76
105 #define RN5T618_AIN0DATAL 0x77
106 #define RN5T618_ILIMTHL 0x78
107 #define RN5T618_ILIMTHH 0x79
108 #define RN5T618_VBATTHL 0x7a
109 #define RN5T618_VBATTHH 0x7b
110 #define RN5T618_VADPTHL 0x7c
111 #define RN5T618_VADPTHH 0x7d
112 #define RN5T618_VUSBTHL 0x7e
113 #define RN5T618_VUSBTHH 0x7f
114 #define RN5T618_VSYSTHL 0x80
115 #define RN5T618_VSYSTHH 0x81
116 #define RN5T618_VTHMTHL 0x82
117 #define RN5T618_VTHMTHH 0x83
118 #define RN5T618_AIN1THL 0x84
119 #define RN5T618_AIN1THH 0x85
120 #define RN5T618_AIN0THL 0x86
121 #define RN5T618_AIN0THH 0x87
122 #define RN5T618_EN_ADCIR1 0x88
123 #define RN5T618_EN_ADCIR2 0x89
124 #define RN5T618_EN_ADCIR3 0x8a
125 #define RN5T618_IR_ADC1 0x8c
126 #define RN5T618_IR_ADC2 0x8d
127 #define RN5T618_IR_ADC3 0x8e
128 #define RN5T618_IOSEL 0x90
129 #define RN5T618_IOOUT 0x91
130 #define RN5T618_GPEDGE1 0x92
131 #define RN5T618_GPEDGE2 0x93
132 #define RN5T618_EN_GPIR 0x94
133 #define RN5T618_IR_GPR 0x95
134 #define RN5T618_IR_GPF 0x96
135 #define RN5T618_MON_IOIN 0x97
136 #define RN5T618_GPLED_FUNC 0x98
137 #define RN5T618_INTPOL 0x9c
138 #define RN5T618_INTEN 0x9d
139 #define RN5T618_INTMON 0x9e
140 #define RN5T618_PREVINDAC 0xb0
141 #define RN5T618_BATDAC 0xb1
142 #define RN5T618_CHGCTL1 0xb3
143 #define RN5T618_CHGCTL2 0xb4
144 #define RN5T618_VSYSSET 0xb5
145 #define RN5T618_REGISET1 0xb6
146 #define RN5T618_REGISET2 0xb7
147 #define RN5T618_CHGISET 0xb8
148 #define RN5T618_TIMSET 0xb9
149 #define RN5T618_BATSET1 0xba
150 #define RN5T618_BATSET2 0xbb
151 #define RN5T618_DIESET 0xbc
152 #define RN5T618_CHGSTATE 0xbd
153 #define RN5T618_CHGCTRL_IRFMASK 0xbe
154 #define RN5T618_CHGSTAT_IRFMASK1 0xbf
155 #define RN5T618_CHGSTAT_IRFMASK2 0xc0
156 #define RN5T618_CHGERR_IRFMASK 0xc1
157 #define RN5T618_CHGCTRL_IRR 0xc2
158 #define RN5T618_CHGSTAT_IRR1 0xc3
159 #define RN5T618_CHGSTAT_IRR2 0xc4
160 #define RN5T618_CHGERR_IRR 0xc5
161 #define RN5T618_CHGCTRL_MONI 0xc6
162 #define RN5T618_CHGSTAT_MONI1 0xc7
163 #define RN5T618_CHGSTAT_MONI2 0xc8
164 #define RN5T618_CHGERR_MONI 0xc9
165 #define RN5T618_CHGCTRL_DETMOD1 0xca
166 #define RN5T618_CHGCTRL_DETMOD2 0xcb
167 #define RN5T618_CHGSTAT_DETMOD1 0xcc
168 #define RN5T618_CHGSTAT_DETMOD2 0xcd
169 #define RN5T618_CHGSTAT_DETMOD3 0xce
170 #define RN5T618_CHGERR_DETMOD1 0xcf
171 #define RN5T618_CHGERR_DETMOD2 0xd0
172 #define RN5T618_CHGOSCCTL 0xd4
173 #define RN5T618_CHGOSCSCORESET1 0xd5
174 #define RN5T618_CHGOSCSCORESET2 0xd6
175 #define RN5T618_CHGOSCSCORESET3 0xd7
176 #define RN5T618_CHGOSCFREQSET1 0xd8
177 #define RN5T618_CHGOSCFREQSET2 0xd9
178 #define RN5T618_CONTROL 0xe0
179 #define RN5T618_SOC 0xe1
180 #define RN5T618_RE_CAP_H 0xe2
181 #define RN5T618_RE_CAP_L 0xe3
182 #define RN5T618_FA_CAP_H 0xe4
183 #define RN5T618_FA_CAP_L 0xe5
184 #define RN5T618_AGE 0xe6
185 #define RN5T618_TT_EMPTY_H 0xe7
186 #define RN5T618_TT_EMPTY_L 0xe8
187 #define RN5T618_TT_FULL_H 0xe9
188 #define RN5T618_TT_FULL_L 0xea
189 #define RN5T618_VOLTAGE_1 0xeb
190 #define RN5T618_VOLTAGE_0 0xec
191 #define RN5T618_TEMP_1 0xed
192 #define RN5T618_TEMP_0 0xee
193 #define RN5T618_CC_CTRL 0xef
194 #define RN5T618_CC_COUNT2 0xf0
195 #define RN5T618_CC_COUNT1 0xf1
196 #define RN5T618_CC_COUNT0 0xf2
197 #define RN5T618_CC_SUMREG3 0xf3
198 #define RN5T618_CC_SUMREG2 0xf4
199 #define RN5T618_CC_SUMREG1 0xf5
200 #define RN5T618_CC_SUMREG0 0xf6
201 #define RN5T618_CC_OFFREG1 0xf7
202 #define RN5T618_CC_OFFREG0 0xf8
203 #define RN5T618_CC_GAINREG1 0xf9
204 #define RN5T618_CC_GAINREG0 0xfa
205 #define RN5T618_CC_AVEREG1 0xfb
206 #define RN5T618_CC_AVEREG0 0xfc
207 #define RN5T618_MAX_REG 0xfc
209 #define RN5T618_REPCNT_REPWRON BIT(0)
210 #define RN5T618_SLPCNT_SWPWROFF BIT(0)
211 #define RN5T618_WATCHDOG_WDOGEN BIT(2)
212 #define RN5T618_WATCHDOG_WDOGTIM_M (BIT(0) | BIT(1))
213 #define RN5T618_WATCHDOG_WDOGTIM_S 0
214 #define RN5T618_PWRIRQ_IR_WDOG BIT(6)
217 RN5T618_DCDC1,
218 RN5T618_DCDC2,
219 RN5T618_DCDC3,
220 RN5T618_DCDC4,
221 RN5T618_LDO1,
222 RN5T618_LDO2,
223 RN5T618_LDO3,
224 RN5T618_LDO4,
225 RN5T618_LDO5,
226 RN5T618_LDORTC1,
227 RN5T618_LDORTC2,
228 RN5T618_REG_NUM,
229 };
233 RN5T618,
234 };
239 };