arch/arm/mach-omap2/board-flash.c

   1 /*
   2  * board-flash.c
   3  * Modified from mach-omap2/board-3430sdp-flash.c
   4  *
   5  * Copyright (C) 2009 Nokia Corporation
   6  * Copyright (C) 2009 Texas Instruments
   7  *
   8  * Vimal Singh <vimalsingh@ti.com>
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/mtd/physmap.h>
  18 #include <linux/io.h>
  19 #include <plat/irqs.h>
  20
  21 #include <plat/gpmc.h>
  22 #include <plat/nand.h>
  23 #include <plat/onenand.h>
  24 #include <plat/tc.h>
  25
  26 #include "board-flash.h"
  27
  28 #define REG_FPGA_REV                    0x10
  29 #define REG_FPGA_DIP_SWITCH_INPUT2      0x60
  30 #define MAX_SUPPORTED_GPMC_CONFIG       3
  31
  32 #define DEBUG_BASE              0x08000000 /* debug board */
  33
  34 /* various memory sizes */
  35 #define FLASH_SIZE_SDPV1        SZ_64M  /* NOR flash (64 Meg aligned) */
  36 #define FLASH_SIZE_SDPV2        SZ_128M /* NOR flash (256 Meg aligned) */
  37
  38 static struct physmap_flash_data board_nor_data = {
  39         .width          = 2,
  40 };
  41
  42 static struct resource board_nor_resource = {
  43         .flags          = IORESOURCE_MEM,
  44 };
  45
  46 static struct platform_device board_nor_device = {
  47         .name           = "physmap-flash",
  48         .id             = 0,
  49         .dev            = {
  50                         .platform_data = &board_nor_data,
  51         },
  52         .num_resources  = 1,
  53         .resource       = &board_nor_resource,
  54 };
  55
  56 static void
  57 __init board_nor_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
  58 {
  59         int err;
  60
  61         board_nor_data.parts    = nor_parts;
  62         board_nor_data.nr_parts = nr_parts;
  63
  64         /* Configure start address and size of NOR device */
  65         if (omap_rev() >= OMAP3430_REV_ES1_0) {
  66                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV2 - 1,
  67                                 (unsigned long *)&board_nor_resource.start);
  68                 board_nor_resource.end = board_nor_resource.start
  69                                         + FLASH_SIZE_SDPV2 - 1;
  70         } else {
  71                 err = gpmc_cs_request(cs, FLASH_SIZE_SDPV1 - 1,
  72                                 (unsigned long *)&board_nor_resource.start);
  73                 board_nor_resource.end = board_nor_resource.start
  74                                         + FLASH_SIZE_SDPV1 - 1;
  75         }
  76         if (err < 0) {
  77                 pr_err("NOR: Can't request GPMC CS\n");
  78                 return;
  79         }
  80         if (platform_device_register(&board_nor_device) < 0)
  81                 pr_err("Unable to register NOR device\n");
  82 }
  83
  84 #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  85                 defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  86 static struct omap_onenand_platform_data board_onenand_data = {
  87         .dma_channel    = -1,   /* disable DMA in OMAP OneNAND driver */
  88 };
  89
  90 static void
  91 __init board_onenand_init(struct mtd_partition *onenand_parts,
  92                                 u8 nr_parts, u8 cs)
  93 {
  94         board_onenand_data.cs           = cs;
  95         board_onenand_data.parts        = onenand_parts;
  96         board_onenand_data.nr_parts     = nr_parts;
  97
  98         gpmc_onenand_init(&board_onenand_data);
  99 }
 100 #else
 101 static void
 102 __init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
 103 {
 104 }
 105 #endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
 106
 107 #if defined(CONFIG_MTD_NAND_OMAP2) || \
 108                 defined(CONFIG_MTD_NAND_OMAP2_MODULE)
 109
 110 /* Note that all values in this struct are in nanoseconds */
 111 static struct gpmc_timings nand_timings = {
 112
 113         .sync_clk = 0,
 114
 115         .cs_on = 0,
 116         .cs_rd_off = 36,
 117         .cs_wr_off = 36,
 118
 119         .adv_on = 6,
 120         .adv_rd_off = 24,
 121         .adv_wr_off = 36,
 122
 123         .we_off = 30,
 124         .oe_off = 48,
 125
 126         .access = 54,
 127         .rd_cycle = 72,
 128         .wr_cycle = 72,
 129
 130         .wr_access = 30,
 131         .wr_data_mux_bus = 0,
 132 };
 133
 134 static struct omap_nand_platform_data board_nand_data = {
 135         .nand_setup     = NULL,
 136         .gpmc_t         = &nand_timings,
 137         .dma_channel    = -1,           /* disable DMA in OMAP NAND driver */
 138         .dev_ready      = NULL,
 139         .devsize        = 0,    /* '0' for 8-bit, '1' for 16-bit device */
 140 };
 141
 142 void
 143 __init board_nand_init(struct mtd_partition *nand_parts,
 144                         u8 nr_parts, u8 cs, int nand_type)
 145 {
 146         board_nand_data.cs              = cs;
 147         board_nand_data.parts           = nand_parts;
 148         board_nand_data.nr_parts        = nr_parts;
 149         board_nand_data.devsize         = nand_type;
 150
 151         board_nand_data.ecc_opt = OMAP_ECC_HAMMING_CODE_DEFAULT;
 152         board_nand_data.gpmc_irq = OMAP_GPMC_IRQ_BASE + cs;
 153         gpmc_nand_init(&board_nand_data);
 154 }
 155 #else
 156 void
 157 __init board_nand_init(struct mtd_partition *nand_parts, u8 nr_parts, u8 cs, int nand_type)
 158 {
 159 }
 160 #endif /* CONFIG_MTD_NAND_OMAP2 || CONFIG_MTD_NAND_OMAP2_MODULE */
 161
 162 /**
 163  * get_gpmc0_type - Reads the FPGA DIP_SWITCH_INPUT_REGISTER2 to get
 164  * the various cs values.
 165  */
 166 static u8 get_gpmc0_type(void)
 167 {
 168         u8 cs = 0;
 169         void __iomem *fpga_map_addr;
 170
 171         fpga_map_addr = ioremap(DEBUG_BASE, 4096);
 172         if (!fpga_map_addr)
 173                 return -ENOMEM;
 174
 175         if (!(__raw_readw(fpga_map_addr + REG_FPGA_REV)))
 176                 /* we dont have an DEBUG FPGA??? */
 177                 /* Depend on #defines!! default to strata boot return param */
 178                 goto unmap;
 179
 180         /* S8-DIP-OFF = 1, S8-DIP-ON = 0 */
 181         cs = __raw_readw(fpga_map_addr + REG_FPGA_DIP_SWITCH_INPUT2) & 0xf;
 182
 183         /* ES2.0 SDP's onwards 4 dip switches are provided for CS */
 184         if (omap_rev() >= OMAP3430_REV_ES1_0)
 185                 /* change (S8-1:4=DS-2:0) to (S8-4:1=DS-2:0) */
 186                 cs = ((cs & 8) >> 3) | ((cs & 4) >> 1) |
 187                         ((cs & 2) << 1) | ((cs & 1) << 3);
 188         else
 189                 /* change (S8-1:3=DS-2:0) to (S8-3:1=DS-2:0) */
 190                 cs = ((cs & 4) >> 2) | (cs & 2) | ((cs & 1) << 2);
 191 unmap:
 192         iounmap(fpga_map_addr);
 193         return cs;
 194 }
 195
 196 /**
 197  * board_flash_init - Identify devices connected to GPMC and register.
 198  *
 199  * @return - void.
 200  */
 201 void board_flash_init(struct flash_partitions partition_info[],
 202                         char chip_sel_board[][GPMC_CS_NUM], int nand_type)
 203 {
 204         u8              cs = 0;
 205         u8              norcs = GPMC_CS_NUM + 1;
 206         u8              nandcs = GPMC_CS_NUM + 1;
 207         u8              onenandcs = GPMC_CS_NUM + 1;
 208         u8              idx;
 209         unsigned char   *config_sel = NULL;
 210
 211         /* REVISIT: Is this return correct idx for 2430 SDP?
 212          * for which cs configuration matches for 2430 SDP?
 213          */
 214         idx = get_gpmc0_type();
 215         if (idx >= MAX_SUPPORTED_GPMC_CONFIG) {
 216                 pr_err("%s: Invalid chip select: %d\n", __func__, cs);
 217                 return;
 218         }
 219         config_sel = (unsigned char *)(chip_sel_board[idx]);
 220
 221         while (cs < GPMC_CS_NUM) {
 222                 switch (config_sel[cs]) {
 223                 case PDC_NOR:
 224                         if (norcs > GPMC_CS_NUM)
 225                                 norcs = cs;
 226                         break;
 227                 case PDC_NAND:
 228                         if (nandcs > GPMC_CS_NUM)
 229                                 nandcs = cs;
 230                         break;
 231                 case PDC_ONENAND:
 232                         if (onenandcs > GPMC_CS_NUM)
 233                                 onenandcs = cs;
 234                         break;
 235                 };
 236                 cs++;
 237         }
 238
 239         if (norcs > GPMC_CS_NUM)
 240                 pr_err("NOR: Unable to find configuration in GPMC\n");
 241         else
 242                 board_nor_init(partition_info[0].parts,
 243                                 partition_info[0].nr_parts, norcs);
 244
 245         if (onenandcs > GPMC_CS_NUM)
 246                 pr_err("OneNAND: Unable to find configuration in GPMC\n");
 247         else
 248                 board_onenand_init(partition_info[1].parts,
 249                                         partition_info[1].nr_parts, onenandcs);
 250
 251         if (nandcs > GPMC_CS_NUM)
 252                 pr_err("NAND: Unable to find configuration in GPMC\n");
 253         else
 254                 board_nand_init(partition_info[2].parts,
 255                         partition_info[2].nr_parts, nandcs, nand_type);
 256 }