drivers/media/i2c/smiapp-pll.h

   1 /*
   2  * drivers/media/i2c/smiapp-pll.h
   3  *
   4  * Generic driver for SMIA/SMIA++ compliant camera modules
   5  *
   6  * Copyright (C) 2012 Nokia Corporation
   7  * Contact: Sakari Ailus <sakari.ailus@maxwell.research.nokia.com>
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License
  11  * version 2 as published by the Free Software Foundation.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  16  * General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21  * 02110-1301 USA
  22  *
  23  */
  24
  25 #ifndef SMIAPP_PLL_H
  26 #define SMIAPP_PLL_H
  27
  28 #include <linux/device.h>
  29
  30 /* CSI-2 or CCP-2 */
  31 #define SMIAPP_PLL_BUS_TYPE_CSI2                                0x00
  32 #define SMIAPP_PLL_BUS_TYPE_PARALLEL                            0x01
  33
  34 /* op pix clock is for all lanes in total normally */
  35 #define SMIAPP_PLL_FLAG_OP_PIX_CLOCK_PER_LANE                   (1 << 0)
  36 #define SMIAPP_PLL_FLAG_NO_OP_CLOCKS                            (1 << 1)
  37
  38 struct smiapp_pll {
  39         /* input values */
  40         uint8_t bus_type;
  41         union {
  42                 struct {
  43                         uint8_t lanes;
  44                 } csi2;
  45                 struct {
  46                         uint8_t bus_width;
  47                 } parallel;
  48         };
  49         uint8_t flags;
  50         uint8_t binning_horizontal;
  51         uint8_t binning_vertical;
  52         uint8_t scale_m;
  53         uint8_t scale_n;
  54         uint8_t bits_per_pixel;
  55         uint32_t link_freq;
  56
  57         /* output values */
  58         uint16_t pre_pll_clk_div;
  59         uint16_t pll_multiplier;
  60         uint16_t op_sys_clk_div;
  61         uint16_t op_pix_clk_div;
  62         uint16_t vt_sys_clk_div;
  63         uint16_t vt_pix_clk_div;
  64
  65         uint32_t ext_clk_freq_hz;
  66         uint32_t pll_ip_clk_freq_hz;
  67         uint32_t pll_op_clk_freq_hz;
  68         uint32_t op_sys_clk_freq_hz;
  69         uint32_t op_pix_clk_freq_hz;
  70         uint32_t vt_sys_clk_freq_hz;
  71         uint32_t vt_pix_clk_freq_hz;
  72
  73         uint32_t pixel_rate_csi;
  74 };
  75
  76 struct smiapp_pll_branch_limits {
  77         uint16_t min_sys_clk_div;
  78         uint16_t max_sys_clk_div;
  79         uint32_t min_sys_clk_freq_hz;
  80         uint32_t max_sys_clk_freq_hz;
  81         uint16_t min_pix_clk_div;
  82         uint16_t max_pix_clk_div;
  83         uint32_t min_pix_clk_freq_hz;
  84         uint32_t max_pix_clk_freq_hz;
  85 };
  86
  87 struct smiapp_pll_limits {
  88         /* Strict PLL limits */
  89         uint32_t min_ext_clk_freq_hz;
  90         uint32_t max_ext_clk_freq_hz;
  91         uint16_t min_pre_pll_clk_div;
  92         uint16_t max_pre_pll_clk_div;
  93         uint32_t min_pll_ip_freq_hz;
  94         uint32_t max_pll_ip_freq_hz;
  95         uint16_t min_pll_multiplier;
  96         uint16_t max_pll_multiplier;
  97         uint32_t min_pll_op_freq_hz;
  98         uint32_t max_pll_op_freq_hz;
  99
 100         struct smiapp_pll_branch_limits vt;
 101         struct smiapp_pll_branch_limits op;
 102
 103         /* Other relevant limits */
 104         uint32_t min_line_length_pck_bin;
 105         uint32_t min_line_length_pck;
 106 };
 107
 108 struct device;
 109
 110 int smiapp_pll_calculate(struct device *dev, struct smiapp_pll_limits *limits,
 111                          struct smiapp_pll *pll);
 112
 113 #endif /* SMIAPP_PLL_H */