2 * Copyright (C) 2014 Etnaviv Project
3 * Author: Christian Gmeiner <christian.gmeiner@gmail.com>
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include "etnaviv_gpu.h"
19 #include "etnaviv_gem.h"
20 #include "etnaviv_mmu.h"
22 #include "common.xml.h"
23 #include "state.xml.h"
24 #include "cmdstream.xml.h"
27 * Command Buffer helper:
31 static inline void OUT(struct etnaviv_cmdbuf
*buffer
, u32 data
)
33 u32
*vaddr
= (u32
*)buffer
->vaddr
;
35 BUG_ON(buffer
->user_size
>= buffer
->size
);
37 vaddr
[buffer
->user_size
/ 4] = data
;
38 buffer
->user_size
+= 4;
41 static inline void CMD_LOAD_STATE(struct etnaviv_cmdbuf
*buffer
,
44 u32 index
= reg
>> VIV_FE_LOAD_STATE_HEADER_OFFSET__SHR
;
46 buffer
->user_size
= ALIGN(buffer
->user_size
, 8);
48 /* write a register via cmd stream */
49 OUT(buffer
, VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE
|
50 VIV_FE_LOAD_STATE_HEADER_COUNT(1) |
51 VIV_FE_LOAD_STATE_HEADER_OFFSET(index
));
55 static inline void CMD_END(struct etnaviv_cmdbuf
*buffer
)
57 buffer
->user_size
= ALIGN(buffer
->user_size
, 8);
59 OUT(buffer
, VIV_FE_END_HEADER_OP_END
);
62 static inline void CMD_WAIT(struct etnaviv_cmdbuf
*buffer
)
64 buffer
->user_size
= ALIGN(buffer
->user_size
, 8);
66 OUT(buffer
, VIV_FE_WAIT_HEADER_OP_WAIT
| 200);
69 static inline void CMD_LINK(struct etnaviv_cmdbuf
*buffer
,
70 u16 prefetch
, u32 address
)
72 buffer
->user_size
= ALIGN(buffer
->user_size
, 8);
74 OUT(buffer
, VIV_FE_LINK_HEADER_OP_LINK
|
75 VIV_FE_LINK_HEADER_PREFETCH(prefetch
));
79 static inline void CMD_STALL(struct etnaviv_cmdbuf
*buffer
,
82 buffer
->user_size
= ALIGN(buffer
->user_size
, 8);
84 OUT(buffer
, VIV_FE_STALL_HEADER_OP_STALL
);
85 OUT(buffer
, VIV_FE_STALL_TOKEN_FROM(from
) | VIV_FE_STALL_TOKEN_TO(to
));
88 static void etnaviv_cmd_select_pipe(struct etnaviv_cmdbuf
*buffer
, u8 pipe
)
94 * This assumes that if we're switching to 2D, we're switching
95 * away from 3D, and vice versa. Hence, if we're switching to
96 * the 2D core, we need to flush the 3D depth and color caches,
97 * otherwise we need to flush the 2D pixel engine cache.
99 if (pipe
== ETNA_PIPE_2D
)
100 flush
= VIVS_GL_FLUSH_CACHE_DEPTH
| VIVS_GL_FLUSH_CACHE_COLOR
;
102 flush
= VIVS_GL_FLUSH_CACHE_PE2D
;
104 stall
= VIVS_GL_SEMAPHORE_TOKEN_FROM(SYNC_RECIPIENT_FE
) |
105 VIVS_GL_SEMAPHORE_TOKEN_TO(SYNC_RECIPIENT_PE
);
107 CMD_LOAD_STATE(buffer
, VIVS_GL_FLUSH_CACHE
, flush
);
108 CMD_LOAD_STATE(buffer
, VIVS_GL_SEMAPHORE_TOKEN
, stall
);
110 CMD_STALL(buffer
, SYNC_RECIPIENT_FE
, SYNC_RECIPIENT_PE
);
112 CMD_LOAD_STATE(buffer
, VIVS_GL_PIPE_SELECT
,
113 VIVS_GL_PIPE_SELECT_PIPE(pipe
));
116 static u32
gpu_va(struct etnaviv_gpu
*gpu
, struct etnaviv_cmdbuf
*buf
)
118 return buf
->paddr
- gpu
->memory_base
;
121 static void etnaviv_buffer_dump(struct etnaviv_gpu
*gpu
,
122 struct etnaviv_cmdbuf
*buf
, u32 off
, u32 len
)
124 u32 size
= buf
->size
;
125 u32
*ptr
= buf
->vaddr
+ off
;
127 dev_info(gpu
->dev
, "virt %p phys 0x%08x free 0x%08x\n",
128 ptr
, gpu_va(gpu
, buf
) + off
, size
- len
* 4 - off
);
130 print_hex_dump(KERN_INFO
, "cmd ", DUMP_PREFIX_OFFSET
, 16, 4,
135 * Safely replace the WAIT of a waitlink with a new command and argument.
136 * The GPU may be executing this WAIT while we're modifying it, so we have
137 * to write it in a specific order to avoid the GPU branching to somewhere
138 * else. 'wl_offset' is the offset to the first byte of the WAIT command.
140 static void etnaviv_buffer_replace_wait(struct etnaviv_cmdbuf
*buffer
,
141 unsigned int wl_offset
, u32 cmd
, u32 arg
)
143 u32
*lw
= buffer
->vaddr
+ wl_offset
;
152 * Ensure that there is space in the command buffer to contiguously write
153 * 'cmd_dwords' 64-bit words into the buffer, wrapping if necessary.
155 static u32
etnaviv_buffer_reserve(struct etnaviv_gpu
*gpu
,
156 struct etnaviv_cmdbuf
*buffer
, unsigned int cmd_dwords
)
158 if (buffer
->user_size
+ cmd_dwords
* sizeof(u64
) > buffer
->size
)
159 buffer
->user_size
= 0;
161 return gpu_va(gpu
, buffer
) + buffer
->user_size
;
164 u16
etnaviv_buffer_init(struct etnaviv_gpu
*gpu
)
166 struct etnaviv_cmdbuf
*buffer
= gpu
->buffer
;
168 /* initialize buffer */
169 buffer
->user_size
= 0;
172 CMD_LINK(buffer
, 2, gpu_va(gpu
, buffer
) + buffer
->user_size
- 4);
174 return buffer
->user_size
/ 8;
177 void etnaviv_buffer_end(struct etnaviv_gpu
*gpu
)
179 struct etnaviv_cmdbuf
*buffer
= gpu
->buffer
;
181 /* Replace the last WAIT with an END */
182 buffer
->user_size
-= 16;
188 void etnaviv_buffer_queue(struct etnaviv_gpu
*gpu
, unsigned int event
,
189 struct etnaviv_cmdbuf
*cmdbuf
)
191 struct etnaviv_cmdbuf
*buffer
= gpu
->buffer
;
192 unsigned int waitlink_offset
= buffer
->user_size
- 16;
193 u32 back
, link_target
, link_size
, reserve_size
, extra_size
= 0;
195 if (drm_debug
& DRM_UT_DRIVER
)
196 etnaviv_buffer_dump(gpu
, buffer
, 0, 0x50);
199 * If we need to flush the MMU prior to submitting this buffer, we
200 * will need to append a mmu flush load state, followed by a new
201 * link to this buffer - a total of four additional words.
203 if (gpu
->mmu
->need_flush
|| gpu
->switch_context
) {
207 if (gpu
->mmu
->need_flush
)
209 /* pipe switch commands */
210 if (gpu
->switch_context
)
214 reserve_size
= (6 + extra_size
) * 4;
216 link_target
= etnaviv_buffer_reserve(gpu
, buffer
, reserve_size
/ 8);
218 /* save offset back into main buffer */
219 back
= buffer
->user_size
+ reserve_size
- 6 * 4;
222 /* Skip over any extra instructions */
223 link_target
+= extra_size
* sizeof(u32
);
225 if (drm_debug
& DRM_UT_DRIVER
)
226 pr_info("stream link to 0x%08x @ 0x%08x %p\n",
227 link_target
, gpu_va(gpu
, cmdbuf
), cmdbuf
->vaddr
);
229 /* jump back from cmd to main buffer */
230 CMD_LINK(cmdbuf
, link_size
, link_target
);
232 link_target
= gpu_va(gpu
, cmdbuf
);
233 link_size
= cmdbuf
->size
/ 8;
235 if (drm_debug
& DRM_UT_DRIVER
) {
236 print_hex_dump(KERN_INFO
, "cmd ", DUMP_PREFIX_OFFSET
, 16, 4,
237 cmdbuf
->vaddr
, cmdbuf
->size
, 0);
239 pr_info("link op: %p\n", buffer
->vaddr
+ waitlink_offset
);
240 pr_info("addr: 0x%08x\n", link_target
);
241 pr_info("back: 0x%08x\n", gpu_va(gpu
, buffer
) + back
);
242 pr_info("event: %d\n", event
);
245 if (gpu
->mmu
->need_flush
|| gpu
->switch_context
) {
246 u32 new_target
= gpu_va(gpu
, buffer
) + buffer
->user_size
;
248 if (gpu
->mmu
->need_flush
) {
249 /* Add the MMU flush */
250 CMD_LOAD_STATE(buffer
, VIVS_GL_FLUSH_MMU
,
251 VIVS_GL_FLUSH_MMU_FLUSH_FEMMU
|
252 VIVS_GL_FLUSH_MMU_FLUSH_UNK1
|
253 VIVS_GL_FLUSH_MMU_FLUSH_UNK2
|
254 VIVS_GL_FLUSH_MMU_FLUSH_PEMMU
|
255 VIVS_GL_FLUSH_MMU_FLUSH_UNK4
);
257 gpu
->mmu
->need_flush
= false;
260 if (gpu
->switch_context
) {
261 etnaviv_cmd_select_pipe(buffer
, cmdbuf
->exec_state
);
262 gpu
->switch_context
= false;
265 /* And the link to the first buffer */
266 CMD_LINK(buffer
, link_size
, link_target
);
268 /* Update the link target to point to above instructions */
269 link_target
= new_target
;
270 link_size
= extra_size
;
274 CMD_LOAD_STATE(buffer
, VIVS_GL_EVENT
, VIVS_GL_EVENT_EVENT_ID(event
) |
275 VIVS_GL_EVENT_FROM_PE
);
277 /* append WAIT/LINK to main buffer */
279 CMD_LINK(buffer
, 2, gpu_va(gpu
, buffer
) + (buffer
->user_size
- 4));
281 etnaviv_buffer_replace_wait(buffer
, waitlink_offset
,
282 VIV_FE_LINK_HEADER_OP_LINK
|
283 VIV_FE_LINK_HEADER_PREFETCH(link_size
),
286 if (drm_debug
& DRM_UT_DRIVER
)
287 etnaviv_buffer_dump(gpu
, buffer
, 0, 0x50);