arch/arm/mach-mx3/mx31lite.c

   1 /*
   2  *  Copyright (C) 2000 Deep Blue Solutions Ltd
   3  *  Copyright (C) 2002 Shane Nay (shane@minirl.com)
   4  *  Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
   5  *  Copyright (C) 2009 Daniel Mack <daniel@caiaq.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  20  */
  21
  22 #include <linux/types.h>
  23 #include <linux/init.h>
  24 #include <linux/kernel.h>
  25 #include <linux/memory.h>
  26 #include <linux/platform_device.h>
  27 #include <linux/gpio.h>
  28 #include <linux/smsc911x.h>
  29 #include <linux/mfd/mc13783.h>
  30 #include <linux/spi/spi.h>
  31 #include <linux/usb/otg.h>
  32 #include <linux/usb/ulpi.h>
  33 #include <linux/mtd/physmap.h>
  34
  35 #include <asm/mach-types.h>
  36 #include <asm/mach/arch.h>
  37 #include <asm/mach/time.h>
  38 #include <asm/mach/map.h>
  39 #include <asm/page.h>
  40 #include <asm/setup.h>
  41
  42 #include <mach/hardware.h>
  43 #include <mach/common.h>
  44 #include <mach/board-mx31lite.h>
  45 #include <mach/imx-uart.h>
  46 #include <mach/iomux-mx3.h>
  47 #include <mach/irqs.h>
  48 #include <mach/mxc_nand.h>
  49 #include <mach/spi.h>
  50 #include <mach/mxc_ehci.h>
  51 #include <mach/ulpi.h>
  52
  53 #include "devices.h"
  54
  55 /*
  56  * This file contains the module-specific initialization routines.
  57  */
  58
  59 static unsigned int mx31lite_pins[] = {
  60         /* LAN9117 IRQ pin */
  61         IOMUX_MODE(MX31_PIN_SFS6, IOMUX_CONFIG_GPIO),
  62         /* SPI 1 */
  63         MX31_PIN_CSPI2_SCLK__SCLK,
  64         MX31_PIN_CSPI2_MOSI__MOSI,
  65         MX31_PIN_CSPI2_MISO__MISO,
  66         MX31_PIN_CSPI2_SPI_RDY__SPI_RDY,
  67         MX31_PIN_CSPI2_SS0__SS0,
  68         MX31_PIN_CSPI2_SS1__SS1,
  69         MX31_PIN_CSPI2_SS2__SS2,
  70 };
  71
  72 static struct mxc_nand_platform_data mx31lite_nand_board_info = {
  73         .width = 1,
  74         .hw_ecc = 1,
  75 };
  76
  77 static struct smsc911x_platform_config smsc911x_config = {
  78         .irq_polarity   = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  79         .irq_type       = SMSC911X_IRQ_TYPE_PUSH_PULL,
  80         .flags          = SMSC911X_USE_16BIT,
  81 };
  82
  83 static struct resource smsc911x_resources[] = {
  84         {
  85                 .start          = CS4_BASE_ADDR,
  86                 .end            = CS4_BASE_ADDR + 0x100,
  87                 .flags          = IORESOURCE_MEM,
  88         }, {
  89                 .start          = IOMUX_TO_IRQ(MX31_PIN_SFS6),
  90                 .end            = IOMUX_TO_IRQ(MX31_PIN_SFS6),
  91                 .flags          = IORESOURCE_IRQ,
  92         },
  93 };
  94
  95 static struct platform_device smsc911x_device = {
  96         .name           = "smsc911x",
  97         .id             = -1,
  98         .num_resources  = ARRAY_SIZE(smsc911x_resources),
  99         .resource       = smsc911x_resources,
 100         .dev            = {
 101                 .platform_data = &smsc911x_config,
 102         },
 103 };
 104
 105 /*
 106  * SPI
 107  *
 108  * The MC13783 is the only hard-wired SPI device on the module.
 109  */
 110
 111 static int spi_internal_chipselect[] = {
 112         MXC_SPI_CS(0),
 113 };
 114
 115 static struct spi_imx_master spi1_pdata = {
 116         .chipselect     = spi_internal_chipselect,
 117         .num_chipselect = ARRAY_SIZE(spi_internal_chipselect),
 118 };
 119
 120 static struct mc13783_platform_data mc13783_pdata __initdata = {
 121         .flags  = MC13783_USE_RTC |
 122                   MC13783_USE_REGULATOR,
 123 };
 124
 125 static struct spi_board_info mc13783_spi_dev __initdata = {
 126         .modalias       = "mc13783",
 127         .max_speed_hz   = 1000000,
 128         .bus_num        = 1,
 129         .chip_select    = 0,
 130         .platform_data  = &mc13783_pdata,
 131         .irq            = IOMUX_TO_IRQ(MX31_PIN_GPIO1_3),
 132 };
 133
 134 /*
 135  * USB
 136  */
 137
 138 #define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
 139                         PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
 140
 141 static int usbh2_init(struct platform_device *pdev)
 142 {
 143         int pins[] = {
 144                 MX31_PIN_USBH2_DATA0__USBH2_DATA0,
 145                 MX31_PIN_USBH2_DATA1__USBH2_DATA1,
 146                 MX31_PIN_USBH2_CLK__USBH2_CLK,
 147                 MX31_PIN_USBH2_DIR__USBH2_DIR,
 148                 MX31_PIN_USBH2_NXT__USBH2_NXT,
 149                 MX31_PIN_USBH2_STP__USBH2_STP,
 150         };
 151
 152         mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
 153
 154         mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
 155         mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
 156         mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
 157         mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
 158         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
 159         mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
 160         mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
 161         mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
 162         mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
 163         mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
 164         mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
 165         mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
 166
 167         mxc_iomux_set_gpr(MUX_PGP_UH2, true);
 168
 169         /* chip select */
 170         mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
 171                                 "USBH2_CS");
 172         gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
 173         gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
 174
 175         return 0;
 176 }
 177
 178 static struct mxc_usbh_platform_data usbh2_pdata = {
 179         .init   = usbh2_init,
 180         .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
 181         .flags  = MXC_EHCI_POWER_PINS_ENABLED,
 182 };
 183
 184 /*
 185  * NOR flash
 186  */
 187
 188 static struct physmap_flash_data nor_flash_data = {
 189         .width  = 2,
 190 };
 191
 192 static struct resource nor_flash_resource = {
 193         .start  = 0xa0000000,
 194         .end    = 0xa1ffffff,
 195         .flags  = IORESOURCE_MEM,
 196 };
 197
 198 static struct platform_device physmap_flash_device = {
 199         .name   = "physmap-flash",
 200         .id     = 0,
 201         .dev    = {
 202                 .platform_data  = &nor_flash_data,
 203         },
 204         .resource = &nor_flash_resource,
 205         .num_resources = 1,
 206 };
 207
 208
 209
 210 /*
 211  * This structure defines the MX31 memory map.
 212  */
 213 static struct map_desc mx31lite_io_desc[] __initdata = {
 214         {
 215                 .virtual = SPBA0_BASE_ADDR_VIRT,
 216                 .pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
 217                 .length = SPBA0_SIZE,
 218                 .type = MT_DEVICE_NONSHARED
 219         }, {
 220                 .virtual = CS4_BASE_ADDR_VIRT,
 221                 .pfn = __phys_to_pfn(CS4_BASE_ADDR),
 222                 .length = CS4_SIZE,
 223                 .type = MT_DEVICE
 224         }
 225 };
 226
 227 /*
 228  * Set up static virtual mappings.
 229  */
 230 void __init mx31lite_map_io(void)
 231 {
 232         mx31_map_io();
 233         iotable_init(mx31lite_io_desc, ARRAY_SIZE(mx31lite_io_desc));
 234 }
 235
 236 static int mx31lite_baseboard;
 237 core_param(mx31lite_baseboard, mx31lite_baseboard, int, 0444);
 238
 239 static void __init mxc_board_init(void)
 240 {
 241         int ret;
 242
 243         switch (mx31lite_baseboard) {
 244         case MX31LITE_NOBOARD:
 245                 break;
 246         case MX31LITE_DB:
 247                 mx31lite_db_init();
 248                 break;
 249         default:
 250                 printk(KERN_ERR "Illegal mx31lite_baseboard type %d\n",
 251                                 mx31lite_baseboard);
 252         }
 253
 254         mxc_iomux_setup_multiple_pins(mx31lite_pins, ARRAY_SIZE(mx31lite_pins),
 255                                       "mx31lite");
 256
 257         /* NOR and NAND flash */
 258         platform_device_register(&physmap_flash_device);
 259         mxc_register_device(&mxc_nand_device, &mx31lite_nand_board_info);
 260
 261         mxc_register_device(&mxc_spi_device1, &spi1_pdata);
 262         spi_register_board_info(&mc13783_spi_dev, 1);
 263
 264         /* USB */
 265         usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
 266                                 USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
 267
 268         mxc_register_device(&mxc_usbh2, &usbh2_pdata);
 269
 270         /* SMSC9117 IRQ pin */
 271         ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_SFS6), "sms9117-irq");
 272         if (ret)
 273                 pr_warning("could not get LAN irq gpio\n");
 274         else {
 275                 gpio_direction_input(IOMUX_TO_GPIO(MX31_PIN_SFS6));
 276                 platform_device_register(&smsc911x_device);
 277         }
 278 }
 279
 280 static void __init mx31lite_timer_init(void)
 281 {
 282         mx31_clocks_init(26000000);
 283 }
 284
 285 struct sys_timer mx31lite_timer = {
 286         .init   = mx31lite_timer_init,
 287 };
 288
 289 MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM")
 290         /* Maintainer: Freescale Semiconductor, Inc. */
 291         .phys_io        = AIPS1_BASE_ADDR,
 292         .io_pg_offst    = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
 293         .boot_params    = PHYS_OFFSET + 0x100,
 294         .map_io         = mx31lite_map_io,
 295         .init_irq       = mx31_init_irq,
 296         .init_machine   = mxc_board_init,
 297         .timer          = &mx31lite_timer,
 298 MACHINE_END