9 This is a Meta 1.2 FPGA bitstream, just a bare CPU.
15 This is a Meta 2.1 FPGA bitstream, just a bare CPU.
18 bool "Toumaz Xenif TZ1090 SoC (Comet)"
19 select METAG_LNKGET_AROUND_CACHE
21 select METAG_SMP_WRITE_REORDERING
24 select PINCTRL_TZ1090_PDC
26 This is a Toumaz Technology Xenif TZ1090 (A.K.A. Comet) SoC containing
31 menu "SoC configuration"
35 # Meta 2.x specific options
37 config METAG_META21_MMU
38 bool "Meta 2.x MMU mode"
41 Use the Meta 2.x MMU in extended mode.
43 config METAG_UNALIGNED
44 bool "Meta 2.x unaligned access checking"
47 All memory accesses will be checked for alignment and an exception
48 raised on unaligned accesses. This feature does cost performance
49 but without it there will be no notification of this type of error.
52 bool "Meta on-chip memory support for userland"
53 select GENERIC_ALLOCATOR
56 Allow the on-chip memories of Meta SoCs to be used by user
61 config METAG_HALT_ON_PANIC
62 bool "Halt the core on panic"
64 Halt the core when a panic occurs. This is useful when running
65 pre-production silicon or in an FPGA environment.