cpufreq: intel_pstate: Fix policy data management in passive mode
[linux-2.6/btrfs-unstable.git] / arch / parisc / kernel / processor.c
blob85de47f4eb594564bc9639ff76a099b5ff9aa8c7
1 /*
2 * Initial setup-routines for HP 9000 based hardware.
4 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
5 * Modifications for PA-RISC (C) 1999-2008 Helge Deller <deller@gmx.de>
6 * Modifications copyright 1999 SuSE GmbH (Philipp Rumpf)
7 * Modifications copyright 2000 Martin K. Petersen <mkp@mkp.net>
8 * Modifications copyright 2000 Philipp Rumpf <prumpf@tux.org>
9 * Modifications copyright 2001 Ryan Bradetich <rbradetich@uswest.net>
11 * Initial PA-RISC Version: 04-23-1999 by Helge Deller
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2, or (at your option)
16 * any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include <linux/delay.h>
29 #include <linux/init.h>
30 #include <linux/mm.h>
31 #include <linux/module.h>
32 #include <linux/seq_file.h>
33 #include <linux/slab.h>
34 #include <linux/cpu.h>
35 #include <asm/param.h>
36 #include <asm/cache.h>
37 #include <asm/hardware.h> /* for register_parisc_driver() stuff */
38 #include <asm/processor.h>
39 #include <asm/page.h>
40 #include <asm/pdc.h>
41 #include <asm/pdcpat.h>
42 #include <asm/irq.h> /* for struct irq_region */
43 #include <asm/parisc-device.h>
45 struct system_cpuinfo_parisc boot_cpu_data __read_mostly;
46 EXPORT_SYMBOL(boot_cpu_data);
47 #ifdef CONFIG_PA8X00
48 int _parisc_requires_coherency __read_mostly;
49 EXPORT_SYMBOL(_parisc_requires_coherency);
50 #endif
52 DEFINE_PER_CPU(struct cpuinfo_parisc, cpu_data);
55 ** PARISC CPU driver - claim "device" and initialize CPU data structures.
57 ** Consolidate per CPU initialization into (mostly) one module.
58 ** Monarch CPU will initialize boot_cpu_data which shouldn't
59 ** change once the system has booted.
61 ** The callback *should* do per-instance initialization of
62 ** everything including the monarch. "Per CPU" init code in
63 ** setup.c:start_parisc() has migrated here and start_parisc()
64 ** will call register_parisc_driver(&cpu_driver) before calling do_inventory().
66 ** The goal of consolidating CPU initialization into one place is
67 ** to make sure all CPUs get initialized the same way.
68 ** The code path not shared is how PDC hands control of the CPU to the OS.
69 ** The initialization of OS data structures is the same (done below).
72 /**
73 * init_cpu_profiler - enable/setup per cpu profiling hooks.
74 * @cpunum: The processor instance.
76 * FIXME: doesn't do much yet...
78 static void
79 init_percpu_prof(unsigned long cpunum)
84 /**
85 * processor_probe - Determine if processor driver should claim this device.
86 * @dev: The device which has been found.
88 * Determine if processor driver should claim this chip (return 0) or not
89 * (return 1). If so, initialize the chip and tell other partners in crime
90 * they have work to do.
92 static int processor_probe(struct parisc_device *dev)
94 unsigned long txn_addr;
95 unsigned long cpuid;
96 struct cpuinfo_parisc *p;
97 struct pdc_pat_cpu_num cpu_info __maybe_unused;
99 #ifdef CONFIG_SMP
100 if (num_online_cpus() >= nr_cpu_ids) {
101 printk(KERN_INFO "num_online_cpus() >= nr_cpu_ids\n");
102 return 1;
104 #else
105 if (boot_cpu_data.cpu_count > 0) {
106 printk(KERN_INFO "CONFIG_SMP=n ignoring additional CPUs\n");
107 return 1;
109 #endif
111 /* logical CPU ID and update global counter
112 * May get overwritten by PAT code.
114 cpuid = boot_cpu_data.cpu_count;
115 txn_addr = dev->hpa.start; /* for legacy PDC */
117 #ifdef CONFIG_64BIT
118 if (is_pdc_pat()) {
119 ulong status;
120 unsigned long bytecnt;
121 pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell;
123 pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL);
124 if (!pa_pdc_cell)
125 panic("couldn't allocate memory for PDC_PAT_CELL!");
127 status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc,
128 dev->mod_index, PA_VIEW, pa_pdc_cell);
130 BUG_ON(PDC_OK != status);
132 /* verify it's the same as what do_pat_inventory() found */
133 BUG_ON(dev->mod_info != pa_pdc_cell->mod_info);
134 BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location);
136 txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */
138 kfree(pa_pdc_cell);
140 /* get the cpu number */
141 status = pdc_pat_cpu_get_number(&cpu_info, dev->hpa.start);
142 BUG_ON(PDC_OK != status);
144 pr_info("Logical CPU #%lu is physical cpu #%lu at location "
145 "0x%lx with hpa %pa\n",
146 cpuid, cpu_info.cpu_num, cpu_info.cpu_loc,
147 &dev->hpa.start);
149 #undef USE_PAT_CPUID
150 #ifdef USE_PAT_CPUID
151 /* We need contiguous numbers for cpuid. Firmware's notion
152 * of cpuid is for physical CPUs and we just don't care yet.
153 * We'll care when we need to query PAT PDC about a CPU *after*
154 * boot time (ie shutdown a CPU from an OS perspective).
156 if (cpu_info.cpu_num >= NR_CPUS) {
157 printk(KERN_WARNING "IGNORING CPU at %pa,"
158 " cpu_slot_id > NR_CPUS"
159 " (%ld > %d)\n",
160 &dev->hpa.start, cpu_info.cpu_num, NR_CPUS);
161 /* Ignore CPU since it will only crash */
162 boot_cpu_data.cpu_count--;
163 return 1;
164 } else {
165 cpuid = cpu_info.cpu_num;
167 #endif
169 #endif
171 p = &per_cpu(cpu_data, cpuid);
172 boot_cpu_data.cpu_count++;
174 /* initialize counters - CPU 0 gets it_value set in time_init() */
175 if (cpuid)
176 memset(p, 0, sizeof(struct cpuinfo_parisc));
178 p->loops_per_jiffy = loops_per_jiffy;
179 p->dev = dev; /* Save IODC data in case we need it */
180 p->hpa = dev->hpa.start; /* save CPU hpa */
181 p->cpuid = cpuid; /* save CPU id */
182 p->txn_addr = txn_addr; /* save CPU IRQ address */
183 #ifdef CONFIG_SMP
185 ** FIXME: review if any other initialization is clobbered
186 ** for boot_cpu by the above memset().
188 init_percpu_prof(cpuid);
189 #endif
192 ** CONFIG_SMP: init_smp_config() will attempt to get CPUs into
193 ** OS control. RENDEZVOUS is the default state - see mem_set above.
194 ** p->state = STATE_RENDEZVOUS;
197 #if 0
198 /* CPU 0 IRQ table is statically allocated/initialized */
199 if (cpuid) {
200 struct irqaction actions[];
203 ** itimer and ipi IRQ handlers are statically initialized in
204 ** arch/parisc/kernel/irq.c. ie Don't need to register them.
206 actions = kmalloc(sizeof(struct irqaction)*MAX_CPU_IRQ, GFP_ATOMIC);
207 if (!actions) {
208 /* not getting it's own table, share with monarch */
209 actions = cpu_irq_actions[0];
212 cpu_irq_actions[cpuid] = actions;
214 #endif
217 * Bring this CPU up now! (ignore bootstrap cpuid == 0)
219 #ifdef CONFIG_SMP
220 if (cpuid) {
221 set_cpu_present(cpuid, true);
222 cpu_up(cpuid);
224 #endif
226 return 0;
230 * collect_boot_cpu_data - Fill the boot_cpu_data structure.
232 * This function collects and stores the generic processor information
233 * in the boot_cpu_data structure.
235 void __init collect_boot_cpu_data(void)
237 memset(&boot_cpu_data, 0, sizeof(boot_cpu_data));
239 boot_cpu_data.cpu_hz = 100 * PAGE0->mem_10msec; /* Hz of this PARISC */
241 /* get CPU-Model Information... */
242 #define p ((unsigned long *)&boot_cpu_data.pdc.model)
243 if (pdc_model_info(&boot_cpu_data.pdc.model) == PDC_OK)
244 printk(KERN_INFO
245 "model %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx %08lx\n",
246 p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
247 #undef p
249 if (pdc_model_versions(&boot_cpu_data.pdc.versions, 0) == PDC_OK)
250 printk(KERN_INFO "vers %08lx\n",
251 boot_cpu_data.pdc.versions);
253 if (pdc_model_cpuid(&boot_cpu_data.pdc.cpuid) == PDC_OK)
254 printk(KERN_INFO "CPUID vers %ld rev %ld (0x%08lx)\n",
255 (boot_cpu_data.pdc.cpuid >> 5) & 127,
256 boot_cpu_data.pdc.cpuid & 31,
257 boot_cpu_data.pdc.cpuid);
259 if (pdc_model_capabilities(&boot_cpu_data.pdc.capabilities) == PDC_OK)
260 printk(KERN_INFO "capabilities 0x%lx\n",
261 boot_cpu_data.pdc.capabilities);
263 if (pdc_model_sysmodel(boot_cpu_data.pdc.sys_model_name) == PDC_OK)
264 printk(KERN_INFO "model %s\n",
265 boot_cpu_data.pdc.sys_model_name);
267 boot_cpu_data.hversion = boot_cpu_data.pdc.model.hversion;
268 boot_cpu_data.sversion = boot_cpu_data.pdc.model.sversion;
270 boot_cpu_data.cpu_type = parisc_get_cpu_type(boot_cpu_data.hversion);
271 boot_cpu_data.cpu_name = cpu_name_version[boot_cpu_data.cpu_type][0];
272 boot_cpu_data.family_name = cpu_name_version[boot_cpu_data.cpu_type][1];
274 #ifdef CONFIG_PA8X00
275 _parisc_requires_coherency = (boot_cpu_data.cpu_type == mako) ||
276 (boot_cpu_data.cpu_type == mako2);
277 #endif
282 * init_per_cpu - Handle individual processor initializations.
283 * @cpunum: logical processor number.
285 * This function handles initialization for *every* CPU
286 * in the system:
288 * o Set "default" CPU width for trap handlers
290 * o Enable FP coprocessor
291 * REVISIT: this could be done in the "code 22" trap handler.
292 * (frowands idea - that way we know which processes need FP
293 * registers saved on the interrupt stack.)
294 * NEWS FLASH: wide kernels need FP coprocessor enabled to handle
295 * formatted printing of %lx for example (double divides I think)
297 * o Enable CPU profiling hooks.
299 int init_per_cpu(int cpunum)
301 int ret;
302 struct pdc_coproc_cfg coproc_cfg;
304 set_firmware_width();
305 ret = pdc_coproc_cfg(&coproc_cfg);
307 if(ret >= 0 && coproc_cfg.ccr_functional) {
308 mtctl(coproc_cfg.ccr_functional, 10); /* 10 == Coprocessor Control Reg */
310 /* FWIW, FP rev/model is a more accurate way to determine
311 ** CPU type. CPU rev/model has some ambiguous cases.
313 per_cpu(cpu_data, cpunum).fp_rev = coproc_cfg.revision;
314 per_cpu(cpu_data, cpunum).fp_model = coproc_cfg.model;
316 if (cpunum == 0)
317 printk(KERN_INFO "FP[%d] enabled: Rev %ld Model %ld\n",
318 cpunum, coproc_cfg.revision, coproc_cfg.model);
321 ** store status register to stack (hopefully aligned)
322 ** and clear the T-bit.
324 asm volatile ("fstd %fr0,8(%sp)");
326 } else {
327 printk(KERN_WARNING "WARNING: No FP CoProcessor?!"
328 " (coproc_cfg.ccr_functional == 0x%lx, expected 0xc0)\n"
329 #ifdef CONFIG_64BIT
330 "Halting Machine - FP required\n"
331 #endif
332 , coproc_cfg.ccr_functional);
333 #ifdef CONFIG_64BIT
334 mdelay(100); /* previous chars get pushed to console */
335 panic("FP CoProc not reported");
336 #endif
339 /* FUTURE: Enable Performance Monitor : ccr bit 0x20 */
340 init_percpu_prof(cpunum);
342 return ret;
346 * Display CPU info for all CPUs.
349 show_cpuinfo (struct seq_file *m, void *v)
351 unsigned long cpu;
353 for_each_online_cpu(cpu) {
354 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu);
355 #ifdef CONFIG_SMP
356 if (0 == cpuinfo->hpa)
357 continue;
358 #endif
359 seq_printf(m, "processor\t: %lu\n"
360 "cpu family\t: PA-RISC %s\n",
361 cpu, boot_cpu_data.family_name);
363 seq_printf(m, "cpu\t\t: %s\n", boot_cpu_data.cpu_name );
365 /* cpu MHz */
366 seq_printf(m, "cpu MHz\t\t: %d.%06d\n",
367 boot_cpu_data.cpu_hz / 1000000,
368 boot_cpu_data.cpu_hz % 1000000 );
370 seq_printf(m, "capabilities\t:");
371 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS32)
372 seq_puts(m, " os32");
373 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_OS64)
374 seq_puts(m, " os64");
375 if (boot_cpu_data.pdc.capabilities & PDC_MODEL_IOPDIR_FDC)
376 seq_puts(m, " iopdir_fdc");
377 switch (boot_cpu_data.pdc.capabilities & PDC_MODEL_NVA_MASK) {
378 case PDC_MODEL_NVA_SUPPORTED:
379 seq_puts(m, " nva_supported");
380 break;
381 case PDC_MODEL_NVA_SLOW:
382 seq_puts(m, " nva_slow");
383 break;
384 case PDC_MODEL_NVA_UNSUPPORTED:
385 seq_puts(m, " needs_equivalent_aliasing");
386 break;
388 seq_printf(m, " (0x%02lx)\n", boot_cpu_data.pdc.capabilities);
390 seq_printf(m, "model\t\t: %s\n"
391 "model name\t: %s\n",
392 boot_cpu_data.pdc.sys_model_name,
393 cpuinfo->dev ?
394 cpuinfo->dev->name : "Unknown");
396 seq_printf(m, "hversion\t: 0x%08x\n"
397 "sversion\t: 0x%08x\n",
398 boot_cpu_data.hversion,
399 boot_cpu_data.sversion );
401 /* print cachesize info */
402 show_cache_info(m);
404 seq_printf(m, "bogomips\t: %lu.%02lu\n",
405 cpuinfo->loops_per_jiffy / (500000 / HZ),
406 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100);
408 seq_printf(m, "software id\t: %ld\n\n",
409 boot_cpu_data.pdc.model.sw_id);
411 return 0;
414 static const struct parisc_device_id processor_tbl[] = {
415 { HPHW_NPROC, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, SVERSION_ANY_ID },
416 { 0, }
419 static struct parisc_driver cpu_driver = {
420 .name = "CPU",
421 .id_table = processor_tbl,
422 .probe = processor_probe
426 * processor_init - Processor initialization procedure.
428 * Register this driver.
430 void __init processor_init(void)
432 register_parisc_driver(&cpu_driver);