drivers/net/wireless/p54/p54common.h

   1 #ifndef P54COMMON_H
   2 #define P54COMMON_H
   3
   4 /*
   5  * Common code specific definitions for mac80211 Prism54 drivers
   6  *
   7  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   8  * Copyright (c) 2007, Christian Lamparter <chunkeey@web.de>
   9  *
  10  * Based on:
  11  * - the islsm (softmac prism54) driver, which is:
  12  *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
  13  *
  14  * - LMAC API interface header file for STLC4560 (lmac_longbow.h)
  15  *   Copyright (C) 2007 Conexant Systems, Inc.
  16  *
  17  * This program is free software; you can redistribute it and/or modify
  18  * it under the terms of the GNU General Public License version 2 as
  19  * published by the Free Software Foundation.
  20  */
  21
  22 struct bootrec {
  23         __le32 code;
  24         __le32 len;
  25         u32 data[10];
  26 } __attribute__((packed));
  27
  28 #define PDR_SYNTH_FRONTEND_MASK         0x0007
  29 #define PDR_SYNTH_IQ_CAL_MASK           0x0018
  30 #define PDR_SYNTH_IQ_CAL_PA_DETECTOR    0x0000
  31 #define PDR_SYNTH_IQ_CAL_DISABLED       0x0008
  32 #define PDR_SYNTH_IQ_CAL_ZIF            0x0010
  33 #define PDR_SYNTH_FAA_SWITCH_MASK       0x0020
  34 #define PDR_SYNTH_FAA_SWITCH_ENABLED    0x0020
  35 #define PDR_SYNTH_24_GHZ_MASK           0x0040
  36 #define PDR_SYNTH_24_GHZ_DISABLED       0x0040
  37 #define PDR_SYNTH_5_GHZ_MASK            0x0080
  38 #define PDR_SYNTH_5_GHZ_DISABLED        0x0080
  39 #define PDR_SYNTH_RX_DIV_MASK           0x0100
  40 #define PDR_SYNTH_RX_DIV_SUPPORTED      0x0100
  41 #define PDR_SYNTH_TX_DIV_MASK           0x0200
  42 #define PDR_SYNTH_TX_DIV_SUPPORTED      0x0200
  43
  44 struct bootrec_exp_if {
  45         __le16 role;
  46         __le16 if_id;
  47         __le16 variant;
  48         __le16 btm_compat;
  49         __le16 top_compat;
  50 } __attribute__((packed));
  51
  52 #define BR_DESC_PRIV_CAP_WEP            BIT(0)
  53 #define BR_DESC_PRIV_CAP_TKIP           BIT(1)
  54 #define BR_DESC_PRIV_CAP_MICHAEL        BIT(2)
  55 #define BR_DESC_PRIV_CAP_CCX_CP         BIT(3)
  56 #define BR_DESC_PRIV_CAP_CCX_MIC        BIT(4)
  57 #define BR_DESC_PRIV_CAP_AESCCMP        BIT(5)
  58
  59 struct bootrec_desc {
  60         __le16 modes;
  61         __le16 flags;
  62         __le32 rx_start;
  63         __le32 rx_end;
  64         u8 headroom;
  65         u8 tailroom;
  66         u8 tx_queues;
  67         u8 tx_depth;
  68         u8 privacy_caps;
  69         u8 rx_keycache_size;
  70         u8 time_size;
  71         u8 padding;
  72         u8 rates[16];
  73         u8 padding2[4];
  74         __le16 rx_mtu;
  75 } __attribute__((packed));
  76
  77 #define BR_CODE_MIN                     0x80000000
  78 #define BR_CODE_COMPONENT_ID            0x80000001
  79 #define BR_CODE_COMPONENT_VERSION       0x80000002
  80 #define BR_CODE_DEPENDENT_IF            0x80000003
  81 #define BR_CODE_EXPOSED_IF              0x80000004
  82 #define BR_CODE_DESCR                   0x80000101
  83 #define BR_CODE_MAX                     0x8FFFFFFF
  84 #define BR_CODE_END_OF_BRA              0xFF0000FF
  85 #define LEGACY_BR_CODE_END_OF_BRA       0xFFFFFFFF
  86
  87 #define P54_HDR_FLAG_DATA_ALIGN         BIT(14)
  88 #define P54_HDR_FLAG_DATA_OUT_PROMISC   BIT(0)
  89 #define P54_HDR_FLAG_DATA_OUT_TIMESTAMP BIT(1)
  90 #define P54_HDR_FLAG_DATA_OUT_SEQNR     BIT(2)
  91 #define P54_HDR_FLAG_DATA_OUT_BIT3      BIT(3)
  92 #define P54_HDR_FLAG_DATA_OUT_BURST     BIT(4)
  93 #define P54_HDR_FLAG_DATA_OUT_NOCANCEL  BIT(5)
  94 #define P54_HDR_FLAG_DATA_OUT_CLEARTIM  BIT(6)
  95 #define P54_HDR_FLAG_DATA_OUT_HITCHHIKE BIT(7)
  96 #define P54_HDR_FLAG_DATA_OUT_COMPRESS  BIT(8)
  97 #define P54_HDR_FLAG_DATA_OUT_CONCAT    BIT(9)
  98 #define P54_HDR_FLAG_DATA_OUT_PCS_ACCEPT BIT(10)
  99 #define P54_HDR_FLAG_DATA_OUT_WAITEOSP  BIT(11)
 100
 101 #define P54_HDR_FLAG_DATA_IN_FCS_GOOD   BIT(0)
 102 #define P54_HDR_FLAG_DATA_IN_MATCH_MAC  BIT(1)
 103 #define P54_HDR_FLAG_DATA_IN_MCBC       BIT(2)
 104 #define P54_HDR_FLAG_DATA_IN_BEACON     BIT(3)
 105 #define P54_HDR_FLAG_DATA_IN_MATCH_BSS  BIT(4)
 106 #define P54_HDR_FLAG_DATA_IN_BCAST_BSS  BIT(5)
 107 #define P54_HDR_FLAG_DATA_IN_DATA       BIT(6)
 108 #define P54_HDR_FLAG_DATA_IN_TRUNCATED  BIT(7)
 109 #define P54_HDR_FLAG_DATA_IN_BIT8       BIT(8)
 110 #define P54_HDR_FLAG_DATA_IN_TRANSPARENT BIT(9)
 111
 112 /* PDA defines are Copyright (C) 2005 Nokia Corporation (taken from islsm_pda.h) */
 113
 114 struct pda_entry {
 115         __le16 len;     /* includes both code and data */
 116         __le16 code;
 117         u8 data[0];
 118 } __attribute__ ((packed));
 119
 120 struct eeprom_pda_wrap {
 121         __le32 magic;
 122         __le16 pad;
 123         __le16 len;
 124         __le32 arm_opcode;
 125         u8 data[0];
 126 } __attribute__ ((packed));
 127
 128 struct pda_iq_autocal_entry {
 129         __le16 freq;
 130         __le16 iq_param[4];
 131 } __attribute__ ((packed));
 132
 133 struct pda_channel_output_limit {
 134         __le16 freq;
 135         u8 val_bpsk;
 136         u8 val_qpsk;
 137         u8 val_16qam;
 138         u8 val_64qam;
 139         u8 rate_set_mask;
 140         u8 rate_set_size;
 141 } __attribute__ ((packed));
 142
 143 struct pda_pa_curve_data_sample_rev0 {
 144         u8 rf_power;
 145         u8 pa_detector;
 146         u8 pcv;
 147 } __attribute__ ((packed));
 148
 149 struct pda_pa_curve_data_sample_rev1 {
 150         u8 rf_power;
 151         u8 pa_detector;
 152         u8 data_barker;
 153         u8 data_bpsk;
 154         u8 data_qpsk;
 155         u8 data_16qam;
 156         u8 data_64qam;
 157 } __attribute__ ((packed));
 158
 159 struct p54_pa_curve_data_sample {
 160         u8 rf_power;
 161         u8 pa_detector;
 162         u8 data_barker;
 163         u8 data_bpsk;
 164         u8 data_qpsk;
 165         u8 data_16qam;
 166         u8 data_64qam;
 167         u8 padding;
 168 } __attribute__ ((packed));
 169
 170 struct pda_pa_curve_data {
 171         u8 cal_method_rev;
 172         u8 channels;
 173         u8 points_per_channel;
 174         u8 padding;
 175         u8 data[0];
 176 } __attribute__ ((packed));
 177
 178 struct pda_rssi_cal_entry {
 179         __le16 mul;
 180         __le16 add;
 181 } __attribute__ ((packed));
 182
 183 struct pda_country {
 184         u8 regdomain;
 185         u8 alpha2[2];
 186         u8 flags;
 187 } __attribute__ ((packed));
 188
 189 /*
 190  * this defines the PDR codes used to build PDAs as defined in document
 191  * number 553155. The current implementation mirrors version 1.1 of the
 192  * document and lists only PDRs supported by the ARM platform.
 193  */
 194
 195 /* common and choice range (0x0000 - 0x0fff) */
 196 #define PDR_END                                 0x0000
 197 #define PDR_MANUFACTURING_PART_NUMBER           0x0001
 198 #define PDR_PDA_VERSION                         0x0002
 199 #define PDR_NIC_SERIAL_NUMBER                   0x0003
 200
 201 #define PDR_MAC_ADDRESS                         0x0101
 202 #define PDR_REGULATORY_DOMAIN_LIST              0x0103
 203 #define PDR_TEMPERATURE_TYPE                    0x0107
 204
 205 #define PDR_PRISM_PCI_IDENTIFIER                0x0402
 206
 207 /* ARM range (0x1000 - 0x1fff) */
 208 #define PDR_COUNTRY_INFORMATION                 0x1000
 209 #define PDR_INTERFACE_LIST                      0x1001
 210 #define PDR_HARDWARE_PLATFORM_COMPONENT_ID      0x1002
 211 #define PDR_OEM_NAME                            0x1003
 212 #define PDR_PRODUCT_NAME                        0x1004
 213 #define PDR_UTF8_OEM_NAME                       0x1005
 214 #define PDR_UTF8_PRODUCT_NAME                   0x1006
 215 #define PDR_COUNTRY_LIST                        0x1007
 216 #define PDR_DEFAULT_COUNTRY                     0x1008
 217
 218 #define PDR_ANTENNA_GAIN                        0x1100
 219
 220 #define PDR_PRISM_INDIGO_PA_CALIBRATION_DATA    0x1901
 221 #define PDR_RSSI_LINEAR_APPROXIMATION           0x1902
 222 #define PDR_PRISM_PA_CAL_OUTPUT_POWER_LIMITS    0x1903
 223 #define PDR_PRISM_PA_CAL_CURVE_DATA             0x1904
 224 #define PDR_RSSI_LINEAR_APPROXIMATION_DUAL_BAND 0x1905
 225 #define PDR_PRISM_ZIF_TX_IQ_CALIBRATION         0x1906
 226 #define PDR_REGULATORY_POWER_LIMITS             0x1907
 227 #define PDR_RSSI_LINEAR_APPROXIMATION_EXTENDED  0x1908
 228 #define PDR_RADIATED_TRANSMISSION_CORRECTION    0x1909
 229 #define PDR_PRISM_TX_IQ_CALIBRATION             0x190a
 230
 231 /* reserved range (0x2000 - 0x7fff) */
 232
 233 /* customer range (0x8000 - 0xffff) */
 234 #define PDR_BASEBAND_REGISTERS                  0x8000
 235 #define PDR_PER_CHANNEL_BASEBAND_REGISTERS      0x8001
 236
 237 /* PDR definitions for default country & country list */
 238 #define PDR_COUNTRY_CERT_CODE           0x80
 239 #define PDR_COUNTRY_CERT_CODE_REAL      0x00
 240 #define PDR_COUNTRY_CERT_CODE_PSEUDO    0x80
 241 #define PDR_COUNTRY_CERT_BAND           0x40
 242 #define PDR_COUNTRY_CERT_BAND_2GHZ      0x00
 243 #define PDR_COUNTRY_CERT_BAND_5GHZ      0x40
 244 #define PDR_COUNTRY_CERT_IODOOR         0x30
 245 #define PDR_COUNTRY_CERT_IODOOR_BOTH    0x00
 246 #define PDR_COUNTRY_CERT_IODOOR_INDOOR  0x20
 247 #define PDR_COUNTRY_CERT_IODOOR_OUTDOOR 0x30
 248 #define PDR_COUNTRY_CERT_INDEX          0x0F
 249
 250 /* stored in skb->cb */
 251 struct memrecord {
 252         u32 start_addr;
 253         u32 end_addr;
 254 };
 255
 256 struct p54_eeprom_lm86 {
 257         union {
 258                 struct {
 259                         __le16 offset;
 260                         __le16 len;
 261                         u8 data[0];
 262                 } v1;
 263                 struct {
 264                         __le32 offset;
 265                         __le16 len;
 266                         u8 magic2;
 267                         u8 pad;
 268                         u8 magic[4];
 269                         u8 data[0];
 270                 } v2;
 271         }  __attribute__ ((packed));
 272 } __attribute__ ((packed));
 273
 274 enum p54_rx_decrypt_status {
 275         P54_DECRYPT_NONE = 0,
 276         P54_DECRYPT_OK,
 277         P54_DECRYPT_NOKEY,
 278         P54_DECRYPT_NOMICHAEL,
 279         P54_DECRYPT_NOCKIPMIC,
 280         P54_DECRYPT_FAIL_WEP,
 281         P54_DECRYPT_FAIL_TKIP,
 282         P54_DECRYPT_FAIL_MICHAEL,
 283         P54_DECRYPT_FAIL_CKIPKP,
 284         P54_DECRYPT_FAIL_CKIPMIC,
 285         P54_DECRYPT_FAIL_AESCCMP
 286 };
 287
 288 struct p54_rx_data {
 289         __le16 flags;
 290         __le16 len;
 291         __le16 freq;
 292         u8 antenna;
 293         u8 rate;
 294         u8 rssi;
 295         u8 quality;
 296         u8 decrypt_status;
 297         u8 rssi_raw;
 298         __le32 tsf32;
 299         __le32 unalloc0;
 300         u8 align[0];
 301 } __attribute__ ((packed));
 302
 303 enum p54_trap_type {
 304         P54_TRAP_SCAN = 0,
 305         P54_TRAP_TIMER,
 306         P54_TRAP_BEACON_TX,
 307         P54_TRAP_FAA_RADIO_ON,
 308         P54_TRAP_FAA_RADIO_OFF,
 309         P54_TRAP_RADAR,
 310         P54_TRAP_NO_BEACON,
 311         P54_TRAP_TBTT,
 312         P54_TRAP_SCO_ENTER,
 313         P54_TRAP_SCO_EXIT
 314 };
 315
 316 struct p54_trap {
 317         __le16 event;
 318         __le16 frequency;
 319 } __attribute__ ((packed));
 320
 321 enum p54_frame_sent_status {
 322         P54_TX_OK = 0,
 323         P54_TX_FAILED,
 324         P54_TX_PSM,
 325         P54_TX_PSM_CANCELLED = 4
 326 };
 327
 328 struct p54_frame_sent {
 329         u8 status;
 330         u8 tries;
 331         u8 ack_rssi;
 332         u8 quality;
 333         __le16 seq;
 334         u8 antenna;
 335         u8 padding;
 336 } __attribute__ ((packed));
 337
 338 enum p54_tx_data_crypt {
 339         P54_CRYPTO_NONE = 0,
 340         P54_CRYPTO_WEP,
 341         P54_CRYPTO_TKIP,
 342         P54_CRYPTO_TKIPMICHAEL,
 343         P54_CRYPTO_CCX_WEPMIC,
 344         P54_CRYPTO_CCX_KPMIC,
 345         P54_CRYPTO_CCX_KP,
 346         P54_CRYPTO_AESCCMP
 347 };
 348
 349 enum p54_tx_data_queue {
 350         P54_QUEUE_BEACON        = 0,
 351         P54_QUEUE_FWSCAN        = 1,
 352         P54_QUEUE_MGMT          = 2,
 353         P54_QUEUE_CAB           = 3,
 354         P54_QUEUE_DATA          = 4,
 355
 356         P54_QUEUE_AC_NUM        = 4,
 357         P54_QUEUE_AC_VO         = 4,
 358         P54_QUEUE_AC_VI         = 5,
 359         P54_QUEUE_AC_BE         = 6,
 360         P54_QUEUE_AC_BK         = 7,
 361
 362         /* keep last */
 363         P54_QUEUE_NUM           = 8,
 364 };
 365
 366 struct p54_tx_data {
 367         u8 rateset[8];
 368         u8 rts_rate_idx;
 369         u8 crypt_offset;
 370         u8 key_type;
 371         u8 key_len;
 372         u8 key[16];
 373         u8 hw_queue;
 374         u8 backlog;
 375         __le16 durations[4];
 376         u8 tx_antenna;
 377         u8 output_power;
 378         u8 cts_rate;
 379         u8 unalloc2[3];
 380         u8 align[0];
 381 } __attribute__ ((packed));
 382
 383 /* unit is ms */
 384 #define P54_TX_FRAME_LIFETIME 2000
 385 #define P54_TX_TIMEOUT 4000
 386 #define P54_STATISTICS_UPDATE 5000
 387
 388 #define P54_FILTER_TYPE_NONE            0
 389 #define P54_FILTER_TYPE_STATION         BIT(0)
 390 #define P54_FILTER_TYPE_IBSS            BIT(1)
 391 #define P54_FILTER_TYPE_AP              BIT(2)
 392 #define P54_FILTER_TYPE_TRANSPARENT     BIT(3)
 393 #define P54_FILTER_TYPE_PROMISCUOUS     BIT(4)
 394 #define P54_FILTER_TYPE_HIBERNATE       BIT(5)
 395 #define P54_FILTER_TYPE_NOACK           BIT(6)
 396 #define P54_FILTER_TYPE_RX_DISABLED     BIT(7)
 397
 398 struct p54_setup_mac {
 399         __le16 mac_mode;
 400         u8 mac_addr[ETH_ALEN];
 401         u8 bssid[ETH_ALEN];
 402         u8 rx_antenna;
 403         u8 rx_align;
 404         union {
 405                 struct {
 406                         __le32 basic_rate_mask;
 407                         u8 rts_rates[8];
 408                         __le32 rx_addr;
 409                         __le16 max_rx;
 410                         __le16 rxhw;
 411                         __le16 wakeup_timer;
 412                         __le16 unalloc0;
 413                 } v1 __attribute__ ((packed));
 414                 struct {
 415                         __le32 rx_addr;
 416                         __le16 max_rx;
 417                         __le16 rxhw;
 418                         __le16 timer;
 419                         __le16 truncate;
 420                         __le32 basic_rate_mask;
 421                         u8 sbss_offset;
 422                         u8 mcast_window;
 423                         u8 rx_rssi_threshold;
 424                         u8 rx_ed_threshold;
 425                         __le32 ref_clock;
 426                         __le16 lpf_bandwidth;
 427                         __le16 osc_start_delay;
 428                 } v2 __attribute__ ((packed));
 429         } __attribute__ ((packed));
 430 } __attribute__ ((packed));
 431
 432 #define P54_SETUP_V1_LEN 40
 433 #define P54_SETUP_V2_LEN (sizeof(struct p54_setup_mac))
 434
 435 #define P54_SCAN_EXIT   BIT(0)
 436 #define P54_SCAN_TRAP   BIT(1)
 437 #define P54_SCAN_ACTIVE BIT(2)
 438 #define P54_SCAN_FILTER BIT(3)
 439
 440 struct p54_scan {
 441         __le16 mode;
 442         __le16 dwell;
 443         u8 padding1[20];
 444         struct pda_iq_autocal_entry iq_autocal;
 445         u8 pa_points_per_curve;
 446         u8 val_barker;
 447         u8 val_bpsk;
 448         u8 val_qpsk;
 449         u8 val_16qam;
 450         u8 val_64qam;
 451         struct p54_pa_curve_data_sample curve_data[8];
 452         u8 dup_bpsk;
 453         u8 dup_qpsk;
 454         u8 dup_16qam;
 455         u8 dup_64qam;
 456         union {
 457                 struct pda_rssi_cal_entry v1_rssi;
 458
 459                 struct {
 460                         __le32 basic_rate_mask;
 461                         u8 rts_rates[8];
 462                         struct pda_rssi_cal_entry rssi;
 463                 } v2 __attribute__ ((packed));
 464         } __attribute__ ((packed));
 465 } __attribute__ ((packed));
 466
 467 #define P54_SCAN_V1_LEN 0x70
 468 #define P54_SCAN_V2_LEN 0x7c
 469
 470 struct p54_led {
 471         __le16 mode;
 472         __le16 led_temporary;
 473         __le16 led_permanent;
 474         __le16 duration;
 475 } __attribute__ ((packed));
 476
 477 struct p54_edcf {
 478         u8 flags;
 479         u8 slottime;
 480         u8 sifs;
 481         u8 eofpad;
 482         struct p54_edcf_queue_param queue[8];
 483         u8 mapping[4];
 484         __le16 frameburst;
 485         __le16 round_trip_delay;
 486 } __attribute__ ((packed));
 487
 488 struct p54_statistics {
 489         __le32 rx_success;
 490         __le32 rx_bad_fcs;
 491         __le32 rx_abort;
 492         __le32 rx_abort_phy;
 493         __le32 rts_success;
 494         __le32 rts_fail;
 495         __le32 tsf32;
 496         __le32 airtime;
 497         __le32 noise;
 498         __le32 sample_noise[8];
 499         __le32 sample_cca;
 500         __le32 sample_tx;
 501 } __attribute__ ((packed));
 502
 503 struct p54_xbow_synth {
 504         __le16 magic1;
 505         __le16 magic2;
 506         __le16 freq;
 507         u32 padding[5];
 508 } __attribute__ ((packed));
 509
 510 struct p54_timer {
 511         __le32 interval;
 512 } __attribute__ ((packed));
 513
 514 struct p54_keycache {
 515         u8 entry;
 516         u8 key_id;
 517         u8 mac[ETH_ALEN];
 518         u8 padding[2];
 519         u8 key_type;
 520         u8 key_len;
 521         u8 key[24];
 522 } __attribute__ ((packed));
 523
 524 struct p54_burst {
 525         u8 flags;
 526         u8 queue;
 527         u8 backlog;
 528         u8 pad;
 529         __le16 durations[32];
 530 } __attribute__ ((packed));
 531
 532 struct p54_psm_interval {
 533         __le16 interval;
 534         __le16 periods;
 535 } __attribute__ ((packed));
 536
 537 #define P54_PSM_CAM                     0
 538 #define P54_PSM                         BIT(0)
 539 #define P54_PSM_DTIM                    BIT(1)
 540 #define P54_PSM_MCBC                    BIT(2)
 541 #define P54_PSM_CHECKSUM                BIT(3)
 542 #define P54_PSM_SKIP_MORE_DATA          BIT(4)
 543 #define P54_PSM_BEACON_TIMEOUT          BIT(5)
 544 #define P54_PSM_HFOSLEEP                BIT(6)
 545 #define P54_PSM_AUTOSWITCH_SLEEP        BIT(7)
 546 #define P54_PSM_LPIT                    BIT(8)
 547 #define P54_PSM_BF_UCAST_SKIP           BIT(9)
 548 #define P54_PSM_BF_MCAST_SKIP           BIT(10)
 549
 550 struct p54_psm {
 551         __le16 mode;
 552         __le16 aid;
 553         struct p54_psm_interval intervals[4];
 554         u8 beacon_rssi_skip_max;
 555         u8 rssi_delta_threshold;
 556         u8 nr;
 557         u8 exclude[1];
 558 } __attribute__ ((packed));
 559
 560 #define MC_FILTER_ADDRESS_NUM 4
 561
 562 struct p54_group_address_table {
 563         __le16 filter_enable;
 564         __le16 num_address;
 565         u8 mac_list[MC_FILTER_ADDRESS_NUM][ETH_ALEN];
 566 } __attribute__ ((packed));
 567
 568 struct p54_txcancel {
 569         __le32 req_id;
 570 } __attribute__ ((packed));
 571
 572 struct p54_sta_unlock {
 573         u8 addr[ETH_ALEN];
 574         u16 padding;
 575 } __attribute__ ((packed));
 576
 577 #define P54_TIM_CLEAR BIT(15)
 578 struct p54_tim {
 579         u8 count;
 580         u8 padding[3];
 581         __le16 entry[8];
 582 } __attribute__ ((packed));
 583
 584 struct p54_cce_quiet {
 585         __le32 period;
 586 } __attribute__ ((packed));
 587
 588 struct p54_bt_balancer {
 589         __le16 prio_thresh;
 590         __le16 acl_thresh;
 591 } __attribute__ ((packed));
 592
 593 struct p54_arp_table {
 594         __le16 filter_enable;
 595         u8 ipv4_addr[4];
 596 } __attribute__ ((packed));
 597
 598 #endif /* P54COMMON_H */