[media] mn88472: implement signal strength statistics
[linux-2.6/btrfs-unstable.git] / drivers / media / dvb-frontends / mn88472.c
blob25dd7429a891f643b5110bc0aa8bde09a581c133
1 /*
2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 #include "mn88472_priv.h"
19 static int mn88472_get_tune_settings(struct dvb_frontend *fe,
20 struct dvb_frontend_tune_settings *s)
22 s->min_delay_ms = 1000;
23 return 0;
26 static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
28 struct i2c_client *client = fe->demodulator_priv;
29 struct mn88472_dev *dev = i2c_get_clientdata(client);
30 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
31 int ret, i;
32 unsigned int utmp, utmp1;
33 u8 buf[2];
35 if (!dev->active) {
36 ret = -EAGAIN;
37 goto err;
40 switch (c->delivery_system) {
41 case SYS_DVBT:
42 ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
43 if (ret)
44 goto err;
45 if ((utmp & 0x0f) >= 0x09)
46 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
47 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
48 else
49 *status = 0;
50 break;
51 case SYS_DVBT2:
52 ret = regmap_read(dev->regmap[2], 0x92, &utmp);
53 if (ret)
54 goto err;
55 if ((utmp & 0x0f) >= 0x0d)
56 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
57 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
58 else if ((utmp & 0x0f) >= 0x0a)
59 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
60 FE_HAS_VITERBI;
61 else if ((utmp & 0x0f) >= 0x07)
62 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
63 else
64 *status = 0;
65 break;
66 case SYS_DVBC_ANNEX_A:
67 ret = regmap_read(dev->regmap[1], 0x84, &utmp);
68 if (ret)
69 goto err;
70 if ((utmp & 0x0f) >= 0x08)
71 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
72 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
73 else
74 *status = 0;
75 break;
76 default:
77 ret = -EINVAL;
78 goto err;
81 /* Signal strength */
82 if (*status & FE_HAS_SIGNAL) {
83 for (i = 0; i < 2; i++) {
84 ret = regmap_bulk_read(dev->regmap[2], 0x8e + i,
85 &buf[i], 1);
86 if (ret)
87 goto err;
90 utmp1 = buf[0] << 8 | buf[1] << 0 | buf[0] >> 2;
91 dev_dbg(&client->dev, "strength=%u\n", utmp1);
93 c->strength.stat[0].scale = FE_SCALE_RELATIVE;
94 c->strength.stat[0].uvalue = utmp1;
95 } else {
96 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
99 return 0;
100 err:
101 dev_dbg(&client->dev, "failed=%d\n", ret);
102 return ret;
105 static int mn88472_set_frontend(struct dvb_frontend *fe)
107 struct i2c_client *client = fe->demodulator_priv;
108 struct mn88472_dev *dev = i2c_get_clientdata(client);
109 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
110 int ret, i;
111 unsigned int utmp;
112 u32 if_frequency;
113 u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
114 u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
115 u8 reg_bank0_d6_val;
117 dev_dbg(&client->dev,
118 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
119 c->delivery_system, c->modulation, c->frequency,
120 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
122 if (!dev->active) {
123 ret = -EAGAIN;
124 goto err;
127 switch (c->delivery_system) {
128 case SYS_DVBT:
129 delivery_system_val = 0x02;
130 reg_bank0_b4_val = 0x00;
131 reg_bank0_cd_val = 0x1f;
132 reg_bank0_d4_val = 0x0a;
133 reg_bank0_d6_val = 0x48;
134 break;
135 case SYS_DVBT2:
136 delivery_system_val = 0x03;
137 reg_bank0_b4_val = 0xf6;
138 reg_bank0_cd_val = 0x01;
139 reg_bank0_d4_val = 0x09;
140 reg_bank0_d6_val = 0x46;
141 break;
142 case SYS_DVBC_ANNEX_A:
143 delivery_system_val = 0x04;
144 reg_bank0_b4_val = 0x00;
145 reg_bank0_cd_val = 0x17;
146 reg_bank0_d4_val = 0x09;
147 reg_bank0_d6_val = 0x48;
148 break;
149 default:
150 ret = -EINVAL;
151 goto err;
154 switch (c->delivery_system) {
155 case SYS_DVBT:
156 case SYS_DVBT2:
157 switch (c->bandwidth_hz) {
158 case 5000000:
159 bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
160 bandwidth_val = 0x03;
161 break;
162 case 6000000:
163 bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
164 bandwidth_val = 0x02;
165 break;
166 case 7000000:
167 bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
168 bandwidth_val = 0x01;
169 break;
170 case 8000000:
171 bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
172 bandwidth_val = 0x00;
173 break;
174 default:
175 ret = -EINVAL;
176 goto err;
178 break;
179 case SYS_DVBC_ANNEX_A:
180 bandwidth_vals_ptr = NULL;
181 bandwidth_val = 0x00;
182 break;
183 default:
184 break;
187 /* Program tuner */
188 if (fe->ops.tuner_ops.set_params) {
189 ret = fe->ops.tuner_ops.set_params(fe);
190 if (ret)
191 goto err;
194 if (fe->ops.tuner_ops.get_if_frequency) {
195 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
196 if (ret)
197 goto err;
199 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
200 } else {
201 ret = -EINVAL;
202 goto err;
205 ret = regmap_write(dev->regmap[2], 0x00, 0x66);
206 if (ret)
207 goto err;
208 ret = regmap_write(dev->regmap[2], 0x01, 0x00);
209 if (ret)
210 goto err;
211 ret = regmap_write(dev->regmap[2], 0x02, 0x01);
212 if (ret)
213 goto err;
214 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
215 if (ret)
216 goto err;
217 ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
218 if (ret)
219 goto err;
221 /* IF */
222 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
223 buf[0] = (utmp >> 16) & 0xff;
224 buf[1] = (utmp >> 8) & 0xff;
225 buf[2] = (utmp >> 0) & 0xff;
226 for (i = 0; i < 3; i++) {
227 ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
228 if (ret)
229 goto err;
232 /* Bandwidth */
233 if (bandwidth_vals_ptr) {
234 for (i = 0; i < 7; i++) {
235 ret = regmap_write(dev->regmap[2], 0x13 + i,
236 bandwidth_vals_ptr[i]);
237 if (ret)
238 goto err;
242 ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
243 if (ret)
244 goto err;
245 ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
246 if (ret)
247 goto err;
248 ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
249 if (ret)
250 goto err;
251 ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
252 if (ret)
253 goto err;
255 switch (c->delivery_system) {
256 case SYS_DVBT:
257 ret = regmap_write(dev->regmap[0], 0x07, 0x26);
258 if (ret)
259 goto err;
260 ret = regmap_write(dev->regmap[0], 0x00, 0xba);
261 if (ret)
262 goto err;
263 ret = regmap_write(dev->regmap[0], 0x01, 0x13);
264 if (ret)
265 goto err;
266 break;
267 case SYS_DVBT2:
268 ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
269 if (ret)
270 goto err;
271 ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
272 if (ret)
273 goto err;
274 ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
275 if (ret)
276 goto err;
277 ret = regmap_write(dev->regmap[2], 0x32, c->stream_id);
278 if (ret)
279 goto err;
280 break;
281 case SYS_DVBC_ANNEX_A:
282 break;
283 default:
284 break;
287 /* Reset FSM */
288 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
289 if (ret)
290 goto err;
292 return 0;
293 err:
294 dev_dbg(&client->dev, "failed=%d\n", ret);
295 return ret;
298 static int mn88472_init(struct dvb_frontend *fe)
300 struct i2c_client *client = fe->demodulator_priv;
301 struct mn88472_dev *dev = i2c_get_clientdata(client);
302 int ret, len, rem;
303 unsigned int utmp;
304 const struct firmware *firmware;
305 const char *name = MN88472_FIRMWARE;
307 dev_dbg(&client->dev, "\n");
309 /* Power up */
310 ret = regmap_write(dev->regmap[2], 0x05, 0x00);
311 if (ret)
312 goto err;
313 ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
314 if (ret)
315 goto err;
316 ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
317 if (ret)
318 goto err;
320 /* Check if firmware is already running */
321 ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
322 if (ret)
323 goto err;
324 if (!(utmp & 0x01))
325 goto warm;
327 ret = request_firmware(&firmware, name, &client->dev);
328 if (ret) {
329 dev_err(&client->dev, "firmware file '%s' not found\n", name);
330 goto err;
333 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
335 ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
336 if (ret)
337 goto err_release_firmware;
339 for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
340 len = min(dev->i2c_write_max - 1, rem);
341 ret = regmap_bulk_write(dev->regmap[0], 0xf6,
342 &firmware->data[firmware->size - rem],
343 len);
344 if (ret) {
345 dev_err(&client->dev, "firmware download failed %d\n",
346 ret);
347 goto err_release_firmware;
351 /* Parity check of firmware */
352 ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
353 if (ret)
354 goto err_release_firmware;
355 if (utmp & 0x10) {
356 ret = -EINVAL;
357 dev_err(&client->dev, "firmware did not run\n");
358 goto err_release_firmware;
361 ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
362 if (ret)
363 goto err_release_firmware;
365 release_firmware(firmware);
366 warm:
367 /* TS config */
368 switch (dev->ts_mode) {
369 case SERIAL_TS_MODE:
370 utmp = 0x1d;
371 break;
372 case PARALLEL_TS_MODE:
373 utmp = 0x00;
374 break;
375 default:
376 ret = -EINVAL;
377 goto err;
379 ret = regmap_write(dev->regmap[2], 0x08, utmp);
380 if (ret)
381 goto err;
383 switch (dev->ts_clk) {
384 case VARIABLE_TS_CLOCK:
385 utmp = 0xe3;
386 break;
387 case FIXED_TS_CLOCK:
388 utmp = 0xe1;
389 break;
390 default:
391 ret = -EINVAL;
392 goto err;
394 ret = regmap_write(dev->regmap[0], 0xd9, utmp);
395 if (ret)
396 goto err;
398 dev->active = true;
400 return 0;
401 err_release_firmware:
402 release_firmware(firmware);
403 err:
404 dev_dbg(&client->dev, "failed=%d\n", ret);
405 return ret;
408 static int mn88472_sleep(struct dvb_frontend *fe)
410 struct i2c_client *client = fe->demodulator_priv;
411 struct mn88472_dev *dev = i2c_get_clientdata(client);
412 int ret;
414 dev_dbg(&client->dev, "\n");
416 /* Power down */
417 ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
418 if (ret)
419 goto err;
420 ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
421 if (ret)
422 goto err;
423 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
424 if (ret)
425 goto err;
427 return 0;
428 err:
429 dev_dbg(&client->dev, "failed=%d\n", ret);
430 return ret;
433 static const struct dvb_frontend_ops mn88472_ops = {
434 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
435 .info = {
436 .name = "Panasonic MN88472",
437 .symbol_rate_min = 1000000,
438 .symbol_rate_max = 7200000,
439 .caps = FE_CAN_FEC_1_2 |
440 FE_CAN_FEC_2_3 |
441 FE_CAN_FEC_3_4 |
442 FE_CAN_FEC_5_6 |
443 FE_CAN_FEC_7_8 |
444 FE_CAN_FEC_AUTO |
445 FE_CAN_QPSK |
446 FE_CAN_QAM_16 |
447 FE_CAN_QAM_32 |
448 FE_CAN_QAM_64 |
449 FE_CAN_QAM_128 |
450 FE_CAN_QAM_256 |
451 FE_CAN_QAM_AUTO |
452 FE_CAN_TRANSMISSION_MODE_AUTO |
453 FE_CAN_GUARD_INTERVAL_AUTO |
454 FE_CAN_HIERARCHY_AUTO |
455 FE_CAN_MUTE_TS |
456 FE_CAN_2G_MODULATION |
457 FE_CAN_MULTISTREAM
460 .get_tune_settings = mn88472_get_tune_settings,
462 .init = mn88472_init,
463 .sleep = mn88472_sleep,
465 .set_frontend = mn88472_set_frontend,
467 .read_status = mn88472_read_status,
470 static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
472 struct mn88472_dev *dev = i2c_get_clientdata(client);
474 dev_dbg(&client->dev, "\n");
476 return &dev->fe;
479 static int mn88472_probe(struct i2c_client *client,
480 const struct i2c_device_id *id)
482 struct mn88472_config *pdata = client->dev.platform_data;
483 struct mn88472_dev *dev;
484 struct dtv_frontend_properties *c;
485 int ret;
486 unsigned int utmp;
487 static const struct regmap_config regmap_config = {
488 .reg_bits = 8,
489 .val_bits = 8,
492 dev_dbg(&client->dev, "\n");
494 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
495 if (!dev) {
496 ret = -ENOMEM;
497 goto err;
500 dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
501 dev->clk = pdata->xtal;
502 dev->ts_mode = pdata->ts_mode;
503 dev->ts_clk = pdata->ts_clock;
504 dev->client[0] = client;
505 dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
506 if (IS_ERR(dev->regmap[0])) {
507 ret = PTR_ERR(dev->regmap[0]);
508 goto err_kfree;
512 * Chip has three I2C addresses for different register banks. Used
513 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
514 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
516 * Also, register bank 2 do not support sequential I/O. Only single
517 * register write or read is allowed to that bank.
519 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
520 if (!dev->client[1]) {
521 ret = -ENODEV;
522 dev_err(&client->dev, "I2C registration failed\n");
523 if (ret)
524 goto err_regmap_0_regmap_exit;
526 dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
527 if (IS_ERR(dev->regmap[1])) {
528 ret = PTR_ERR(dev->regmap[1]);
529 goto err_client_1_i2c_unregister_device;
531 i2c_set_clientdata(dev->client[1], dev);
533 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
534 if (!dev->client[2]) {
535 ret = -ENODEV;
536 dev_err(&client->dev, "2nd I2C registration failed\n");
537 if (ret)
538 goto err_regmap_1_regmap_exit;
540 dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
541 if (IS_ERR(dev->regmap[2])) {
542 ret = PTR_ERR(dev->regmap[2]);
543 goto err_client_2_i2c_unregister_device;
545 i2c_set_clientdata(dev->client[2], dev);
547 /* Check demod answers with correct chip id */
548 ret = regmap_read(dev->regmap[2], 0xff, &utmp);
549 if (ret)
550 goto err_regmap_2_regmap_exit;
552 dev_dbg(&client->dev, "chip id=%02x\n", utmp);
554 if (utmp != 0x02) {
555 ret = -ENODEV;
556 goto err_regmap_2_regmap_exit;
559 /* Sleep because chip is active by default */
560 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
561 if (ret)
562 goto err_regmap_2_regmap_exit;
564 /* Create dvb frontend */
565 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
566 dev->fe.demodulator_priv = client;
567 *pdata->fe = &dev->fe;
568 i2c_set_clientdata(client, dev);
570 /* Init stats to indicate which stats are supported */
571 c = &dev->fe.dtv_property_cache;
572 c->strength.len = 1;
574 /* Setup callbacks */
575 pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
577 dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
579 return 0;
580 err_regmap_2_regmap_exit:
581 regmap_exit(dev->regmap[2]);
582 err_client_2_i2c_unregister_device:
583 i2c_unregister_device(dev->client[2]);
584 err_regmap_1_regmap_exit:
585 regmap_exit(dev->regmap[1]);
586 err_client_1_i2c_unregister_device:
587 i2c_unregister_device(dev->client[1]);
588 err_regmap_0_regmap_exit:
589 regmap_exit(dev->regmap[0]);
590 err_kfree:
591 kfree(dev);
592 err:
593 dev_dbg(&client->dev, "failed=%d\n", ret);
594 return ret;
597 static int mn88472_remove(struct i2c_client *client)
599 struct mn88472_dev *dev = i2c_get_clientdata(client);
601 dev_dbg(&client->dev, "\n");
603 regmap_exit(dev->regmap[2]);
604 i2c_unregister_device(dev->client[2]);
606 regmap_exit(dev->regmap[1]);
607 i2c_unregister_device(dev->client[1]);
609 regmap_exit(dev->regmap[0]);
611 kfree(dev);
613 return 0;
616 static const struct i2c_device_id mn88472_id_table[] = {
617 {"mn88472", 0},
620 MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
622 static struct i2c_driver mn88472_driver = {
623 .driver = {
624 .name = "mn88472",
625 .suppress_bind_attrs = true,
627 .probe = mn88472_probe,
628 .remove = mn88472_remove,
629 .id_table = mn88472_id_table,
632 module_i2c_driver(mn88472_driver);
634 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
635 MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
636 MODULE_LICENSE("GPL");
637 MODULE_FIRMWARE(MN88472_FIRMWARE);