drivers/net/wireless/p54/p54pci.c

   1
   2 /*
   3  * Linux device driver for PCI based Prism54
   4  *
   5  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
   6  * Copyright (c) 2008, Christian Lamparter <chunkeey@web.de>
   7  *
   8  * Based on the islsm (softmac prism54) driver, which is:
   9  * Copyright 2004-2006 Jean-Baptiste Note <jean-baptiste.note@m4x.org>, et al.
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 #include <linux/init.h>
  17 #include <linux/pci.h>
  18 #include <linux/slab.h>
  19 #include <linux/firmware.h>
  20 #include <linux/etherdevice.h>
  21 #include <linux/delay.h>
  22 #include <linux/completion.h>
  23 #include <net/mac80211.h>
  24
  25 #include "p54.h"
  26 #include "lmac.h"
  27 #include "p54pci.h"
  28
  29 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  30 MODULE_DESCRIPTION("Prism54 PCI wireless driver");
  31 MODULE_LICENSE("GPL");
  32 MODULE_ALIAS("prism54pci");
  33 MODULE_FIRMWARE("isl3886pci");
  34
  35 static DEFINE_PCI_DEVICE_TABLE(p54p_table) = {
  36         /* Intersil PRISM Duette/Prism GT Wireless LAN adapter */
  37         { PCI_DEVICE(0x1260, 0x3890) },
  38         /* 3COM 3CRWE154G72 Wireless LAN adapter */
  39         { PCI_DEVICE(0x10b7, 0x6001) },
  40         /* Intersil PRISM Indigo Wireless LAN adapter */
  41         { PCI_DEVICE(0x1260, 0x3877) },
  42         /* Intersil PRISM Javelin/Xbow Wireless LAN adapter */
  43         { PCI_DEVICE(0x1260, 0x3886) },
  44         /* Intersil PRISM Xbow Wireless LAN adapter (Symbol AP-300) */
  45         { PCI_DEVICE(0x1260, 0xffff) },
  46         /* Standard Microsystems Corp SMC2802W Wireless PCI */
  47         { PCI_DEVICE(0x10b8, 0x2802) },
  48         { },
  49 };
  50
  51 MODULE_DEVICE_TABLE(pci, p54p_table);
  52
  53 static int p54p_upload_firmware(struct ieee80211_hw *dev)
  54 {
  55         struct p54p_priv *priv = dev->priv;
  56         __le32 reg;
  57         int err;
  58         __le32 *data;
  59         u32 remains, left, device_addr;
  60
  61         P54P_WRITE(int_enable, cpu_to_le32(0));
  62         P54P_READ(int_enable);
  63         udelay(10);
  64
  65         reg = P54P_READ(ctrl_stat);
  66         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  67         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RAMBOOT);
  68         P54P_WRITE(ctrl_stat, reg);
  69         P54P_READ(ctrl_stat);
  70         udelay(10);
  71
  72         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
  73         P54P_WRITE(ctrl_stat, reg);
  74         wmb();
  75         udelay(10);
  76
  77         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
  78         P54P_WRITE(ctrl_stat, reg);
  79         wmb();
  80
  81         /* wait for the firmware to reset properly */
  82         mdelay(10);
  83
  84         err = p54_parse_firmware(dev, priv->firmware);
  85         if (err)
  86                 return err;
  87
  88         if (priv->common.fw_interface != FW_LM86) {
  89                 dev_err(&priv->pdev->dev, "wrong firmware, "
  90                         "please get a LM86(PCI) firmware a try again.\n");
  91                 return -EINVAL;
  92         }
  93
  94         data = (__le32 *) priv->firmware->data;
  95         remains = priv->firmware->size;
  96         device_addr = ISL38XX_DEV_FIRMWARE_ADDR;
  97         while (remains) {
  98                 u32 i = 0;
  99                 left = min((u32)0x1000, remains);
 100                 P54P_WRITE(direct_mem_base, cpu_to_le32(device_addr));
 101                 P54P_READ(int_enable);
 102
 103                 device_addr += 0x1000;
 104                 while (i < left) {
 105                         P54P_WRITE(direct_mem_win[i], *data++);
 106                         i += sizeof(u32);
 107                 }
 108
 109                 remains -= left;
 110                 P54P_READ(int_enable);
 111         }
 112
 113         reg = P54P_READ(ctrl_stat);
 114         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_CLKRUN);
 115         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 116         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RAMBOOT);
 117         P54P_WRITE(ctrl_stat, reg);
 118         P54P_READ(ctrl_stat);
 119         udelay(10);
 120
 121         reg |= cpu_to_le32(ISL38XX_CTRL_STAT_RESET);
 122         P54P_WRITE(ctrl_stat, reg);
 123         wmb();
 124         udelay(10);
 125
 126         reg &= cpu_to_le32(~ISL38XX_CTRL_STAT_RESET);
 127         P54P_WRITE(ctrl_stat, reg);
 128         wmb();
 129         udelay(10);
 130
 131         /* wait for the firmware to boot properly */
 132         mdelay(100);
 133
 134         return 0;
 135 }
 136
 137 static void p54p_refill_rx_ring(struct ieee80211_hw *dev,
 138         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 139         struct sk_buff **rx_buf, u32 index)
 140 {
 141         struct p54p_priv *priv = dev->priv;
 142         struct p54p_ring_control *ring_control = priv->ring_control;
 143         u32 limit, idx, i;
 144
 145         idx = le32_to_cpu(ring_control->host_idx[ring_index]);
 146         limit = idx;
 147         limit -= index;
 148         limit = ring_limit - limit;
 149
 150         i = idx % ring_limit;
 151         while (limit-- > 1) {
 152                 struct p54p_desc *desc = &ring[i];
 153
 154                 if (!desc->host_addr) {
 155                         struct sk_buff *skb;
 156                         dma_addr_t mapping;
 157                         skb = dev_alloc_skb(priv->common.rx_mtu + 32);
 158                         if (!skb)
 159                                 break;
 160
 161                         mapping = pci_map_single(priv->pdev,
 162                                                  skb_tail_pointer(skb),
 163                                                  priv->common.rx_mtu + 32,
 164                                                  PCI_DMA_FROMDEVICE);
 165
 166                         if (pci_dma_mapping_error(priv->pdev, mapping)) {
 167                                 dev_kfree_skb_any(skb);
 168                                 dev_err(&priv->pdev->dev,
 169                                         "RX DMA Mapping error\n");
 170                                 break;
 171                         }
 172
 173                         desc->host_addr = cpu_to_le32(mapping);
 174                         desc->device_addr = 0;  // FIXME: necessary?
 175                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 176                         desc->flags = 0;
 177                         rx_buf[i] = skb;
 178                 }
 179
 180                 i++;
 181                 idx++;
 182                 i %= ring_limit;
 183         }
 184
 185         wmb();
 186         ring_control->host_idx[ring_index] = cpu_to_le32(idx);
 187 }
 188
 189 static void p54p_check_rx_ring(struct ieee80211_hw *dev, u32 *index,
 190         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 191         struct sk_buff **rx_buf)
 192 {
 193         struct p54p_priv *priv = dev->priv;
 194         struct p54p_ring_control *ring_control = priv->ring_control;
 195         struct p54p_desc *desc;
 196         u32 idx, i;
 197
 198         i = (*index) % ring_limit;
 199         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 200         idx %= ring_limit;
 201         while (i != idx) {
 202                 u16 len;
 203                 struct sk_buff *skb;
 204                 desc = &ring[i];
 205                 len = le16_to_cpu(desc->len);
 206                 skb = rx_buf[i];
 207
 208                 if (!skb) {
 209                         i++;
 210                         i %= ring_limit;
 211                         continue;
 212                 }
 213
 214                 if (unlikely(len > priv->common.rx_mtu)) {
 215                         if (net_ratelimit())
 216                                 dev_err(&priv->pdev->dev, "rx'd frame size "
 217                                         "exceeds length threshold.\n");
 218
 219                         len = priv->common.rx_mtu;
 220                 }
 221                 skb_put(skb, len);
 222
 223                 if (p54_rx(dev, skb)) {
 224                         pci_unmap_single(priv->pdev,
 225                                          le32_to_cpu(desc->host_addr),
 226                                          priv->common.rx_mtu + 32,
 227                                          PCI_DMA_FROMDEVICE);
 228                         rx_buf[i] = NULL;
 229                         desc->host_addr = 0;
 230                 } else {
 231                         skb_trim(skb, 0);
 232                         desc->len = cpu_to_le16(priv->common.rx_mtu + 32);
 233                 }
 234
 235                 i++;
 236                 i %= ring_limit;
 237         }
 238
 239         p54p_refill_rx_ring(dev, ring_index, ring, ring_limit, rx_buf, *index);
 240 }
 241
 242 static void p54p_check_tx_ring(struct ieee80211_hw *dev, u32 *index,
 243         int ring_index, struct p54p_desc *ring, u32 ring_limit,
 244         struct sk_buff **tx_buf)
 245 {
 246         struct p54p_priv *priv = dev->priv;
 247         struct p54p_ring_control *ring_control = priv->ring_control;
 248         struct p54p_desc *desc;
 249         struct sk_buff *skb;
 250         u32 idx, i;
 251
 252         i = (*index) % ring_limit;
 253         (*index) = idx = le32_to_cpu(ring_control->device_idx[ring_index]);
 254         idx %= ring_limit;
 255
 256         while (i != idx) {
 257                 desc = &ring[i];
 258
 259                 skb = tx_buf[i];
 260                 tx_buf[i] = NULL;
 261
 262                 pci_unmap_single(priv->pdev, le32_to_cpu(desc->host_addr),
 263                                  le16_to_cpu(desc->len), PCI_DMA_TODEVICE);
 264
 265                 desc->host_addr = 0;
 266                 desc->device_addr = 0;
 267                 desc->len = 0;
 268                 desc->flags = 0;
 269
 270                 if (skb && FREE_AFTER_TX(skb))
 271                         p54_free_skb(dev, skb);
 272
 273                 i++;
 274                 i %= ring_limit;
 275         }
 276 }
 277
 278 static void p54p_tasklet(unsigned long dev_id)
 279 {
 280         struct ieee80211_hw *dev = (struct ieee80211_hw *)dev_id;
 281         struct p54p_priv *priv = dev->priv;
 282         struct p54p_ring_control *ring_control = priv->ring_control;
 283
 284         p54p_check_tx_ring(dev, &priv->tx_idx_mgmt, 3, ring_control->tx_mgmt,
 285                            ARRAY_SIZE(ring_control->tx_mgmt),
 286                            priv->tx_buf_mgmt);
 287
 288         p54p_check_tx_ring(dev, &priv->tx_idx_data, 1, ring_control->tx_data,
 289                            ARRAY_SIZE(ring_control->tx_data),
 290                            priv->tx_buf_data);
 291
 292         p54p_check_rx_ring(dev, &priv->rx_idx_mgmt, 2, ring_control->rx_mgmt,
 293                 ARRAY_SIZE(ring_control->rx_mgmt), priv->rx_buf_mgmt);
 294
 295         p54p_check_rx_ring(dev, &priv->rx_idx_data, 0, ring_control->rx_data,
 296                 ARRAY_SIZE(ring_control->rx_data), priv->rx_buf_data);
 297
 298         wmb();
 299         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 300 }
 301
 302 static irqreturn_t p54p_interrupt(int irq, void *dev_id)
 303 {
 304         struct ieee80211_hw *dev = dev_id;
 305         struct p54p_priv *priv = dev->priv;
 306         __le32 reg;
 307
 308         reg = P54P_READ(int_ident);
 309         if (unlikely(reg == cpu_to_le32(0xFFFFFFFF))) {
 310                 goto out;
 311         }
 312         P54P_WRITE(int_ack, reg);
 313
 314         reg &= P54P_READ(int_enable);
 315
 316         if (reg & cpu_to_le32(ISL38XX_INT_IDENT_UPDATE))
 317                 tasklet_schedule(&priv->tasklet);
 318         else if (reg & cpu_to_le32(ISL38XX_INT_IDENT_INIT))
 319                 complete(&priv->boot_comp);
 320
 321 out:
 322         return reg ? IRQ_HANDLED : IRQ_NONE;
 323 }
 324
 325 static void p54p_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 326 {
 327         unsigned long flags;
 328         struct p54p_priv *priv = dev->priv;
 329         struct p54p_ring_control *ring_control = priv->ring_control;
 330         struct p54p_desc *desc;
 331         dma_addr_t mapping;
 332         u32 device_idx, idx, i;
 333
 334         spin_lock_irqsave(&priv->lock, flags);
 335         device_idx = le32_to_cpu(ring_control->device_idx[1]);
 336         idx = le32_to_cpu(ring_control->host_idx[1]);
 337         i = idx % ARRAY_SIZE(ring_control->tx_data);
 338
 339         mapping = pci_map_single(priv->pdev, skb->data, skb->len,
 340                                  PCI_DMA_TODEVICE);
 341         if (pci_dma_mapping_error(priv->pdev, mapping)) {
 342                 spin_unlock_irqrestore(&priv->lock, flags);
 343                 p54_free_skb(dev, skb);
 344                 dev_err(&priv->pdev->dev, "TX DMA mapping error\n");
 345                 return ;
 346         }
 347         priv->tx_buf_data[i] = skb;
 348
 349         desc = &ring_control->tx_data[i];
 350         desc->host_addr = cpu_to_le32(mapping);
 351         desc->device_addr = ((struct p54_hdr *)skb->data)->req_id;
 352         desc->len = cpu_to_le16(skb->len);
 353         desc->flags = 0;
 354
 355         wmb();
 356         ring_control->host_idx[1] = cpu_to_le32(idx + 1);
 357         spin_unlock_irqrestore(&priv->lock, flags);
 358
 359         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 360         P54P_READ(dev_int);
 361 }
 362
 363 static void p54p_stop(struct ieee80211_hw *dev)
 364 {
 365         struct p54p_priv *priv = dev->priv;
 366         struct p54p_ring_control *ring_control = priv->ring_control;
 367         unsigned int i;
 368         struct p54p_desc *desc;
 369
 370         P54P_WRITE(int_enable, cpu_to_le32(0));
 371         P54P_READ(int_enable);
 372         udelay(10);
 373
 374         free_irq(priv->pdev->irq, dev);
 375
 376         tasklet_kill(&priv->tasklet);
 377
 378         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 379
 380         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_data); i++) {
 381                 desc = &ring_control->rx_data[i];
 382                 if (desc->host_addr)
 383                         pci_unmap_single(priv->pdev,
 384                                          le32_to_cpu(desc->host_addr),
 385                                          priv->common.rx_mtu + 32,
 386                                          PCI_DMA_FROMDEVICE);
 387                 kfree_skb(priv->rx_buf_data[i]);
 388                 priv->rx_buf_data[i] = NULL;
 389         }
 390
 391         for (i = 0; i < ARRAY_SIZE(priv->rx_buf_mgmt); i++) {
 392                 desc = &ring_control->rx_mgmt[i];
 393                 if (desc->host_addr)
 394                         pci_unmap_single(priv->pdev,
 395                                          le32_to_cpu(desc->host_addr),
 396                                          priv->common.rx_mtu + 32,
 397                                          PCI_DMA_FROMDEVICE);
 398                 kfree_skb(priv->rx_buf_mgmt[i]);
 399                 priv->rx_buf_mgmt[i] = NULL;
 400         }
 401
 402         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_data); i++) {
 403                 desc = &ring_control->tx_data[i];
 404                 if (desc->host_addr)
 405                         pci_unmap_single(priv->pdev,
 406                                          le32_to_cpu(desc->host_addr),
 407                                          le16_to_cpu(desc->len),
 408                                          PCI_DMA_TODEVICE);
 409
 410                 p54_free_skb(dev, priv->tx_buf_data[i]);
 411                 priv->tx_buf_data[i] = NULL;
 412         }
 413
 414         for (i = 0; i < ARRAY_SIZE(priv->tx_buf_mgmt); i++) {
 415                 desc = &ring_control->tx_mgmt[i];
 416                 if (desc->host_addr)
 417                         pci_unmap_single(priv->pdev,
 418                                          le32_to_cpu(desc->host_addr),
 419                                          le16_to_cpu(desc->len),
 420                                          PCI_DMA_TODEVICE);
 421
 422                 p54_free_skb(dev, priv->tx_buf_mgmt[i]);
 423                 priv->tx_buf_mgmt[i] = NULL;
 424         }
 425
 426         memset(ring_control, 0, sizeof(*ring_control));
 427 }
 428
 429 static int p54p_open(struct ieee80211_hw *dev)
 430 {
 431         struct p54p_priv *priv = dev->priv;
 432         int err;
 433
 434         init_completion(&priv->boot_comp);
 435         err = request_irq(priv->pdev->irq, p54p_interrupt,
 436                           IRQF_SHARED, "p54pci", dev);
 437         if (err) {
 438                 dev_err(&priv->pdev->dev, "failed to register IRQ handler\n");
 439                 return err;
 440         }
 441
 442         memset(priv->ring_control, 0, sizeof(*priv->ring_control));
 443         err = p54p_upload_firmware(dev);
 444         if (err) {
 445                 free_irq(priv->pdev->irq, dev);
 446                 return err;
 447         }
 448         priv->rx_idx_data = priv->tx_idx_data = 0;
 449         priv->rx_idx_mgmt = priv->tx_idx_mgmt = 0;
 450
 451         p54p_refill_rx_ring(dev, 0, priv->ring_control->rx_data,
 452                 ARRAY_SIZE(priv->ring_control->rx_data), priv->rx_buf_data, 0);
 453
 454         p54p_refill_rx_ring(dev, 2, priv->ring_control->rx_mgmt,
 455                 ARRAY_SIZE(priv->ring_control->rx_mgmt), priv->rx_buf_mgmt, 0);
 456
 457         P54P_WRITE(ring_control_base, cpu_to_le32(priv->ring_control_dma));
 458         P54P_READ(ring_control_base);
 459         wmb();
 460         udelay(10);
 461
 462         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_INIT));
 463         P54P_READ(int_enable);
 464         wmb();
 465         udelay(10);
 466
 467         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_RESET));
 468         P54P_READ(dev_int);
 469
 470         if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) {
 471                 wiphy_err(dev->wiphy, "cannot boot firmware!\n");
 472                 p54p_stop(dev);
 473                 return -ETIMEDOUT;
 474         }
 475
 476         P54P_WRITE(int_enable, cpu_to_le32(ISL38XX_INT_IDENT_UPDATE));
 477         P54P_READ(int_enable);
 478         wmb();
 479         udelay(10);
 480
 481         P54P_WRITE(dev_int, cpu_to_le32(ISL38XX_DEV_INT_UPDATE));
 482         P54P_READ(dev_int);
 483         wmb();
 484         udelay(10);
 485
 486         return 0;
 487 }
 488
 489 static int __devinit p54p_probe(struct pci_dev *pdev,
 490                                 const struct pci_device_id *id)
 491 {
 492         struct p54p_priv *priv;
 493         struct ieee80211_hw *dev;
 494         unsigned long mem_addr, mem_len;
 495         int err;
 496
 497         err = pci_enable_device(pdev);
 498         if (err) {
 499                 dev_err(&pdev->dev, "Cannot enable new PCI device\n");
 500                 return err;
 501         }
 502
 503         mem_addr = pci_resource_start(pdev, 0);
 504         mem_len = pci_resource_len(pdev, 0);
 505         if (mem_len < sizeof(struct p54p_csr)) {
 506                 dev_err(&pdev->dev, "Too short PCI resources\n");
 507                 goto err_disable_dev;
 508         }
 509
 510         err = pci_request_regions(pdev, "p54pci");
 511         if (err) {
 512                 dev_err(&pdev->dev, "Cannot obtain PCI resources\n");
 513                 goto err_disable_dev;
 514         }
 515
 516         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) ||
 517             pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
 518                 dev_err(&pdev->dev, "No suitable DMA available\n");
 519                 goto err_free_reg;
 520         }
 521
 522         pci_set_master(pdev);
 523         pci_try_set_mwi(pdev);
 524
 525         pci_write_config_byte(pdev, 0x40, 0);
 526         pci_write_config_byte(pdev, 0x41, 0);
 527
 528         dev = p54_init_common(sizeof(*priv));
 529         if (!dev) {
 530                 dev_err(&pdev->dev, "ieee80211 alloc failed\n");
 531                 err = -ENOMEM;
 532                 goto err_free_reg;
 533         }
 534
 535         priv = dev->priv;
 536         priv->pdev = pdev;
 537
 538         SET_IEEE80211_DEV(dev, &pdev->dev);
 539         pci_set_drvdata(pdev, dev);
 540
 541         priv->map = ioremap(mem_addr, mem_len);
 542         if (!priv->map) {
 543                 dev_err(&pdev->dev, "Cannot map device memory\n");
 544                 err = -ENOMEM;
 545                 goto err_free_dev;
 546         }
 547
 548         priv->ring_control = pci_alloc_consistent(pdev, sizeof(*priv->ring_control),
 549                                                   &priv->ring_control_dma);
 550         if (!priv->ring_control) {
 551                 dev_err(&pdev->dev, "Cannot allocate rings\n");
 552                 err = -ENOMEM;
 553                 goto err_iounmap;
 554         }
 555         priv->common.open = p54p_open;
 556         priv->common.stop = p54p_stop;
 557         priv->common.tx = p54p_tx;
 558
 559         spin_lock_init(&priv->lock);
 560         tasklet_init(&priv->tasklet, p54p_tasklet, (unsigned long)dev);
 561
 562         err = request_firmware(&priv->firmware, "isl3886pci",
 563                                &priv->pdev->dev);
 564         if (err) {
 565                 dev_err(&pdev->dev, "Cannot find firmware (isl3886pci)\n");
 566                 err = request_firmware(&priv->firmware, "isl3886",
 567                                        &priv->pdev->dev);
 568                 if (err)
 569                         goto err_free_common;
 570         }
 571
 572         err = p54p_open(dev);
 573         if (err)
 574                 goto err_free_common;
 575         err = p54_read_eeprom(dev);
 576         p54p_stop(dev);
 577         if (err)
 578                 goto err_free_common;
 579
 580         err = p54_register_common(dev, &pdev->dev);
 581         if (err)
 582                 goto err_free_common;
 583
 584         return 0;
 585
 586  err_free_common:
 587         release_firmware(priv->firmware);
 588         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 589                             priv->ring_control, priv->ring_control_dma);
 590
 591  err_iounmap:
 592         iounmap(priv->map);
 593
 594  err_free_dev:
 595         pci_set_drvdata(pdev, NULL);
 596         p54_free_common(dev);
 597
 598  err_free_reg:
 599         pci_release_regions(pdev);
 600  err_disable_dev:
 601         pci_disable_device(pdev);
 602         return err;
 603 }
 604
 605 static void __devexit p54p_remove(struct pci_dev *pdev)
 606 {
 607         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 608         struct p54p_priv *priv;
 609
 610         if (!dev)
 611                 return;
 612
 613         p54_unregister_common(dev);
 614         priv = dev->priv;
 615         release_firmware(priv->firmware);
 616         pci_free_consistent(pdev, sizeof(*priv->ring_control),
 617                             priv->ring_control, priv->ring_control_dma);
 618         iounmap(priv->map);
 619         pci_release_regions(pdev);
 620         pci_disable_device(pdev);
 621         p54_free_common(dev);
 622 }
 623
 624 #ifdef CONFIG_PM
 625 static int p54p_suspend(struct pci_dev *pdev, pm_message_t state)
 626 {
 627         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 628         struct p54p_priv *priv = dev->priv;
 629
 630         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 631                 ieee80211_stop_queues(dev);
 632                 p54p_stop(dev);
 633         }
 634
 635         pci_save_state(pdev);
 636         pci_set_power_state(pdev, pci_choose_state(pdev, state));
 637         return 0;
 638 }
 639
 640 static int p54p_resume(struct pci_dev *pdev)
 641 {
 642         struct ieee80211_hw *dev = pci_get_drvdata(pdev);
 643         struct p54p_priv *priv = dev->priv;
 644
 645         pci_set_power_state(pdev, PCI_D0);
 646         pci_restore_state(pdev);
 647
 648         if (priv->common.mode != NL80211_IFTYPE_UNSPECIFIED) {
 649                 p54p_open(dev);
 650                 ieee80211_wake_queues(dev);
 651         }
 652
 653         return 0;
 654 }
 655 #endif /* CONFIG_PM */
 656
 657 static struct pci_driver p54p_driver = {
 658         .name           = "p54pci",
 659         .id_table       = p54p_table,
 660         .probe          = p54p_probe,
 661         .remove         = __devexit_p(p54p_remove),
 662 #ifdef CONFIG_PM
 663         .suspend        = p54p_suspend,
 664         .resume         = p54p_resume,
 665 #endif /* CONFIG_PM */
 666 };
 667
 668 static int __init p54p_init(void)
 669 {
 670         return pci_register_driver(&p54p_driver);
 671 }
 672
 673 static void __exit p54p_exit(void)
 674 {
 675         pci_unregister_driver(&p54p_driver);
 676 }
 677
 678 module_init(p54p_init);
 679 module_exit(p54p_exit);