drm/tegra: dsi: Demidlayer
[linux-2.6/btrfs-unstable.git] / drivers / gpu / drm / tegra / gr2d.c
blob02cd3e37a6ec3cf7d1e1d84f65387bb1c12853cc
1 /*
2 * Copyright (c) 2012-2013, NVIDIA Corporation.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
9 #include <linux/clk.h>
11 #include "drm.h"
12 #include "gem.h"
13 #include "gr2d.h"
15 struct gr2d {
16 struct tegra_drm_client client;
17 struct host1x_channel *channel;
18 struct clk *clk;
20 DECLARE_BITMAP(addr_regs, GR2D_NUM_REGS);
23 static inline struct gr2d *to_gr2d(struct tegra_drm_client *client)
25 return container_of(client, struct gr2d, client);
28 static int gr2d_init(struct host1x_client *client)
30 struct tegra_drm_client *drm = host1x_to_drm_client(client);
31 struct drm_device *dev = dev_get_drvdata(client->parent);
32 unsigned long flags = HOST1X_SYNCPT_HAS_BASE;
33 struct gr2d *gr2d = to_gr2d(drm);
35 gr2d->channel = host1x_channel_request(client->dev);
36 if (!gr2d->channel)
37 return -ENOMEM;
39 client->syncpts[0] = host1x_syncpt_request(client->dev, flags);
40 if (!client->syncpts[0]) {
41 host1x_channel_free(gr2d->channel);
42 return -ENOMEM;
45 return tegra_drm_register_client(dev->dev_private, drm);
48 static int gr2d_exit(struct host1x_client *client)
50 struct tegra_drm_client *drm = host1x_to_drm_client(client);
51 struct drm_device *dev = dev_get_drvdata(client->parent);
52 struct gr2d *gr2d = to_gr2d(drm);
53 int err;
55 err = tegra_drm_unregister_client(dev->dev_private, drm);
56 if (err < 0)
57 return err;
59 host1x_syncpt_free(client->syncpts[0]);
60 host1x_channel_free(gr2d->channel);
62 return 0;
65 static const struct host1x_client_ops gr2d_client_ops = {
66 .init = gr2d_init,
67 .exit = gr2d_exit,
70 static int gr2d_open_channel(struct tegra_drm_client *client,
71 struct tegra_drm_context *context)
73 struct gr2d *gr2d = to_gr2d(client);
75 context->channel = host1x_channel_get(gr2d->channel);
76 if (!context->channel)
77 return -ENOMEM;
79 return 0;
82 static void gr2d_close_channel(struct tegra_drm_context *context)
84 host1x_channel_put(context->channel);
87 static int gr2d_is_addr_reg(struct device *dev, u32 class, u32 offset)
89 struct gr2d *gr2d = dev_get_drvdata(dev);
91 switch (class) {
92 case HOST1X_CLASS_HOST1X:
93 if (offset == 0x2b)
94 return 1;
96 break;
98 case HOST1X_CLASS_GR2D:
99 case HOST1X_CLASS_GR2D_SB:
100 if (offset >= GR2D_NUM_REGS)
101 break;
103 if (test_bit(offset, gr2d->addr_regs))
104 return 1;
106 break;
109 return 0;
112 static const struct tegra_drm_client_ops gr2d_ops = {
113 .open_channel = gr2d_open_channel,
114 .close_channel = gr2d_close_channel,
115 .is_addr_reg = gr2d_is_addr_reg,
116 .submit = tegra_drm_submit,
119 static const struct of_device_id gr2d_match[] = {
120 { .compatible = "nvidia,tegra30-gr2d" },
121 { .compatible = "nvidia,tegra20-gr2d" },
122 { },
124 MODULE_DEVICE_TABLE(of, gr2d_match);
126 static const u32 gr2d_addr_regs[] = {
127 GR2D_UA_BASE_ADDR,
128 GR2D_VA_BASE_ADDR,
129 GR2D_PAT_BASE_ADDR,
130 GR2D_DSTA_BASE_ADDR,
131 GR2D_DSTB_BASE_ADDR,
132 GR2D_DSTC_BASE_ADDR,
133 GR2D_SRCA_BASE_ADDR,
134 GR2D_SRCB_BASE_ADDR,
135 GR2D_SRC_BASE_ADDR_SB,
136 GR2D_DSTA_BASE_ADDR_SB,
137 GR2D_DSTB_BASE_ADDR_SB,
138 GR2D_UA_BASE_ADDR_SB,
139 GR2D_VA_BASE_ADDR_SB,
142 static int gr2d_probe(struct platform_device *pdev)
144 struct device *dev = &pdev->dev;
145 struct host1x_syncpt **syncpts;
146 struct gr2d *gr2d;
147 unsigned int i;
148 int err;
150 gr2d = devm_kzalloc(dev, sizeof(*gr2d), GFP_KERNEL);
151 if (!gr2d)
152 return -ENOMEM;
154 syncpts = devm_kzalloc(dev, sizeof(*syncpts), GFP_KERNEL);
155 if (!syncpts)
156 return -ENOMEM;
158 gr2d->clk = devm_clk_get(dev, NULL);
159 if (IS_ERR(gr2d->clk)) {
160 dev_err(dev, "cannot get clock\n");
161 return PTR_ERR(gr2d->clk);
164 err = clk_prepare_enable(gr2d->clk);
165 if (err) {
166 dev_err(dev, "cannot turn on clock\n");
167 return err;
170 INIT_LIST_HEAD(&gr2d->client.base.list);
171 gr2d->client.base.ops = &gr2d_client_ops;
172 gr2d->client.base.dev = dev;
173 gr2d->client.base.class = HOST1X_CLASS_GR2D;
174 gr2d->client.base.syncpts = syncpts;
175 gr2d->client.base.num_syncpts = 1;
177 INIT_LIST_HEAD(&gr2d->client.list);
178 gr2d->client.ops = &gr2d_ops;
180 err = host1x_client_register(&gr2d->client.base);
181 if (err < 0) {
182 dev_err(dev, "failed to register host1x client: %d\n", err);
183 clk_disable_unprepare(gr2d->clk);
184 return err;
187 /* initialize address register map */
188 for (i = 0; i < ARRAY_SIZE(gr2d_addr_regs); i++)
189 set_bit(gr2d_addr_regs[i], gr2d->addr_regs);
191 platform_set_drvdata(pdev, gr2d);
193 return 0;
196 static int gr2d_remove(struct platform_device *pdev)
198 struct gr2d *gr2d = platform_get_drvdata(pdev);
199 int err;
201 err = host1x_client_unregister(&gr2d->client.base);
202 if (err < 0) {
203 dev_err(&pdev->dev, "failed to unregister host1x client: %d\n",
204 err);
205 return err;
208 clk_disable_unprepare(gr2d->clk);
210 return 0;
213 struct platform_driver tegra_gr2d_driver = {
214 .driver = {
215 .name = "tegra-gr2d",
216 .of_match_table = gr2d_match,
218 .probe = gr2d_probe,
219 .remove = gr2d_remove,