1 /******************************************************************************
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
28 *****************************************************************************/
29 #ifndef __iwl_trans_int_pcie_h__
30 #define __iwl_trans_int_pcie_h__
32 /*This file includes the declaration that are internal to the
36 * struct iwl_rx_queue - Rx queue
37 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
38 * @bd_dma: bus address of buffer of receive buffer descriptors (rbd)
41 * @read: Shared index to newest available Rx buffer
42 * @write: Shared index to oldest written Rx packet
43 * @free_count: Number of pre-allocated buffers in rx_free
45 * @rx_free: list of free SKBs for use
46 * @rx_used: List of Rx buffers with no SKB
47 * @need_update: flag to indicate we need to update read/write index
48 * @rb_stts: driver's pointer to receive buffer status
49 * @rb_stts_dma: bus address of receive buffer status
52 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
57 struct iwl_rx_mem_buffer pool
[RX_QUEUE_SIZE
+ RX_FREE_BUFFERS
];
58 struct iwl_rx_mem_buffer
*queue
[RX_QUEUE_SIZE
];
63 struct list_head rx_free
;
64 struct list_head rx_used
;
66 struct iwl_rb_status
*rb_stts
;
67 dma_addr_t rb_stts_dma
;
72 * struct iwl_trans_pcie - PCIe transport specific data
73 * @rxq: all the RX queue data
74 * @rx_replenish: work that will be called when buffers need to be allocated
75 * @trans: pointer to the generic transport area
77 struct iwl_trans_pcie
{
78 struct iwl_rx_queue rxq
;
79 struct work_struct rx_replenish
;
80 struct iwl_trans
*trans
;
83 #define IWL_TRANS_GET_PCIE_TRANS(_iwl_trans) \
84 ((struct iwl_trans_pcie *) ((_iwl_trans)->trans_specific))
86 /*****************************************************
88 ******************************************************/
89 void iwl_bg_rx_replenish(struct work_struct
*data
);
90 void iwl_irq_tasklet(struct iwl_priv
*priv
);
91 void iwlagn_rx_replenish(struct iwl_trans
*trans
);
92 void iwl_rx_queue_update_write_ptr(struct iwl_trans
*trans
,
93 struct iwl_rx_queue
*q
);
95 /*****************************************************
97 ******************************************************/
98 int iwl_reset_ict(struct iwl_priv
*priv
);
99 void iwl_disable_ict(struct iwl_priv
*priv
);
100 int iwl_alloc_isr_ict(struct iwl_priv
*priv
);
101 void iwl_free_isr_ict(struct iwl_priv
*priv
);
102 irqreturn_t
iwl_isr_ict(int irq
, void *data
);
105 /*****************************************************
107 ******************************************************/
108 void iwl_txq_update_write_ptr(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
);
109 void iwlagn_txq_free_tfd(struct iwl_priv
*priv
, struct iwl_tx_queue
*txq
,
111 int iwlagn_txq_attach_buf_to_tfd(struct iwl_priv
*priv
,
112 struct iwl_tx_queue
*txq
,
113 dma_addr_t addr
, u16 len
, u8 reset
);
114 int iwl_queue_init(struct iwl_priv
*priv
, struct iwl_queue
*q
,
115 int count
, int slots_num
, u32 id
);
116 int iwl_trans_pcie_send_cmd(struct iwl_priv
*priv
, struct iwl_host_cmd
*cmd
);
117 int __must_check
iwl_trans_pcie_send_cmd_pdu(struct iwl_priv
*priv
, u8 id
,
118 u32 flags
, u16 len
, const void *data
);
119 void iwl_tx_cmd_complete(struct iwl_priv
*priv
, struct iwl_rx_mem_buffer
*rxb
);
120 void iwl_trans_txq_update_byte_cnt_tbl(struct iwl_priv
*priv
,
121 struct iwl_tx_queue
*txq
,
123 int iwl_trans_pcie_txq_agg_disable(struct iwl_priv
*priv
, u16 txq_id
,
124 u16 ssn_idx
, u8 tx_fifo
);
125 void iwl_trans_set_wr_ptrs(struct iwl_priv
*priv
,
126 int txq_id
, u32 index
);
127 void iwl_trans_tx_queue_set_status(struct iwl_priv
*priv
,
128 struct iwl_tx_queue
*txq
,
129 int tx_fifo_id
, int scd_retry
);
130 void iwl_trans_pcie_txq_agg_setup(struct iwl_priv
*priv
, int sta_id
, int tid
,
133 #endif /* __iwl_trans_int_pcie_h__ */