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raid5: relieve lock contention in get_active_stripe()
[linux-2.6/btrfs-unstable.git] / drivers / net / usb / asix_devices.c
blob386a3df53678a23761308938221f4aa79b520538
1 /*
2 * ASIX AX8817X based USB 2.0 Ethernet Devices
3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
6 * Copyright (c) 2002-2003 TiVo Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 */
22
23 #include "asix.h"
24
25 #define PHY_MODE_MARVELL 0x0000
26 #define MII_MARVELL_LED_CTRL 0x0018
27 #define MII_MARVELL_STATUS 0x001b
28 #define MII_MARVELL_CTRL 0x0014
29
30 #define MARVELL_LED_MANUAL 0x0019
31
32 #define MARVELL_STATUS_HWCFG 0x0004
33
34 #define MARVELL_CTRL_TXDELAY 0x0002
35 #define MARVELL_CTRL_RXDELAY 0x0080
36
37 #define PHY_MODE_RTL8211CL 0x000C
38
39 struct ax88172_int_data {
40 __le16 res1;
41 u8 link;
42 __le16 res2;
43 u8 status;
44 __le16 res3;
45 } __packed;
46
47 static void asix_status(struct usbnet *dev, struct urb *urb)
48 {
49 struct ax88172_int_data *event;
50 int link;
51
52 if (urb->actual_length < 8)
53 return;
54
55 event = urb->transfer_buffer;
56 link = event->link & 0x01;
57 if (netif_carrier_ok(dev->net) != link) {
58 usbnet_link_change(dev, link, 1);
59 netdev_dbg(dev->net, "Link Status is: %d\n", link);
60 }
61 }
62
63 static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
64 {
65 if (is_valid_ether_addr(addr)) {
66 memcpy(dev->net->dev_addr, addr, ETH_ALEN);
67 } else {
68 netdev_info(dev->net, "invalid hw address, using random\n");
69 eth_hw_addr_random(dev->net);
70 }
71 }
72
73 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
74 static u32 asix_get_phyid(struct usbnet *dev)
75 {
76 int phy_reg;
77 u32 phy_id;
78 int i;
79
80 /* Poll for the rare case the FW or phy isn't ready yet. */
81 for (i = 0; i < 100; i++) {
82 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
83 if (phy_reg != 0 && phy_reg != 0xFFFF)
84 break;
85 mdelay(1);
86 }
87
88 if (phy_reg <= 0 || phy_reg == 0xFFFF)
89 return 0;
90
91 phy_id = (phy_reg & 0xffff) << 16;
92
93 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
94 if (phy_reg < 0)
95 return 0;
96
97 phy_id |= (phy_reg & 0xffff);
98
99 return phy_id;
100 }
101
102 static u32 asix_get_link(struct net_device *net)
103 {
104 struct usbnet *dev = netdev_priv(net);
105
106 return mii_link_ok(&dev->mii);
107 }
108
109 static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
110 {
111 struct usbnet *dev = netdev_priv(net);
112
113 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
114 }
115
116 /* We need to override some ethtool_ops so we require our
117 own structure so we don't interfere with other usbnet
118 devices that may be connected at the same time. */
119 static const struct ethtool_ops ax88172_ethtool_ops = {
120 .get_drvinfo = asix_get_drvinfo,
121 .get_link = asix_get_link,
122 .get_msglevel = usbnet_get_msglevel,
123 .set_msglevel = usbnet_set_msglevel,
124 .get_wol = asix_get_wol,
125 .set_wol = asix_set_wol,
126 .get_eeprom_len = asix_get_eeprom_len,
127 .get_eeprom = asix_get_eeprom,
128 .set_eeprom = asix_set_eeprom,
129 .get_settings = usbnet_get_settings,
130 .set_settings = usbnet_set_settings,
131 .nway_reset = usbnet_nway_reset,
132 };
133
134 static void ax88172_set_multicast(struct net_device *net)
135 {
136 struct usbnet *dev = netdev_priv(net);
137 struct asix_data *data = (struct asix_data *)&dev->data;
138 u8 rx_ctl = 0x8c;
139
140 if (net->flags & IFF_PROMISC) {
141 rx_ctl |= 0x01;
142 } else if (net->flags & IFF_ALLMULTI ||
143 netdev_mc_count(net) > AX_MAX_MCAST) {
144 rx_ctl |= 0x02;
145 } else if (netdev_mc_empty(net)) {
146 /* just broadcast and directed */
147 } else {
148 /* We use the 20 byte dev->data
149 * for our 8 byte filter buffer
150 * to avoid allocating memory that
151 * is tricky to free later */
152 struct netdev_hw_addr *ha;
153 u32 crc_bits;
154
155 memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
156
157 /* Build the multicast hash filter. */
158 netdev_for_each_mc_addr(ha, net) {
159 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
160 data->multi_filter[crc_bits >> 3] |=
161 1 << (crc_bits & 7);
162 }
163
164 asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
165 AX_MCAST_FILTER_SIZE, data->multi_filter);
166
167 rx_ctl |= 0x10;
168 }
169
170 asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
171 }
172
173 static int ax88172_link_reset(struct usbnet *dev)
174 {
175 u8 mode;
176 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
177
178 mii_check_media(&dev->mii, 1, 1);
179 mii_ethtool_gset(&dev->mii, &ecmd);
180 mode = AX88172_MEDIUM_DEFAULT;
181
182 if (ecmd.duplex != DUPLEX_FULL)
183 mode |= ~AX88172_MEDIUM_FD;
184
185 netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
186 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
187
188 asix_write_medium_mode(dev, mode);
189
190 return 0;
191 }
192
193 static const struct net_device_ops ax88172_netdev_ops = {
194 .ndo_open = usbnet_open,
195 .ndo_stop = usbnet_stop,
196 .ndo_start_xmit = usbnet_start_xmit,
197 .ndo_tx_timeout = usbnet_tx_timeout,
198 .ndo_change_mtu = usbnet_change_mtu,
199 .ndo_set_mac_address = eth_mac_addr,
200 .ndo_validate_addr = eth_validate_addr,
201 .ndo_do_ioctl = asix_ioctl,
202 .ndo_set_rx_mode = ax88172_set_multicast,
203 };
204
205 static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
206 {
207 int ret = 0;
208 u8 buf[ETH_ALEN];
209 int i;
210 unsigned long gpio_bits = dev->driver_info->data;
211
212 usbnet_get_endpoints(dev,intf);
213
214 /* Toggle the GPIOs in a manufacturer/model specific way */
215 for (i = 2; i >= 0; i--) {
216 ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
217 (gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
218 if (ret < 0)
219 goto out;
220 msleep(5);
221 }
222
223 ret = asix_write_rx_ctl(dev, 0x80);
224 if (ret < 0)
225 goto out;
226
227 /* Get the MAC address */
228 ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
229 if (ret < 0) {
230 netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
231 ret);
232 goto out;
233 }
234
235 asix_set_netdev_dev_addr(dev, buf);
236
237 /* Initialize MII structure */
238 dev->mii.dev = dev->net;
239 dev->mii.mdio_read = asix_mdio_read;
240 dev->mii.mdio_write = asix_mdio_write;
241 dev->mii.phy_id_mask = 0x3f;
242 dev->mii.reg_num_mask = 0x1f;
243 dev->mii.phy_id = asix_get_phy_addr(dev);
244
245 dev->net->netdev_ops = &ax88172_netdev_ops;
246 dev->net->ethtool_ops = &ax88172_ethtool_ops;
247 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
248 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
249
250 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
251 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
252 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
253 mii_nway_restart(&dev->mii);
254
255 return 0;
256
257 out:
258 return ret;
259 }
260
261 static const struct ethtool_ops ax88772_ethtool_ops = {
262 .get_drvinfo = asix_get_drvinfo,
263 .get_link = asix_get_link,
264 .get_msglevel = usbnet_get_msglevel,
265 .set_msglevel = usbnet_set_msglevel,
266 .get_wol = asix_get_wol,
267 .set_wol = asix_set_wol,
268 .get_eeprom_len = asix_get_eeprom_len,
269 .get_eeprom = asix_get_eeprom,
270 .set_eeprom = asix_set_eeprom,
271 .get_settings = usbnet_get_settings,
272 .set_settings = usbnet_set_settings,
273 .nway_reset = usbnet_nway_reset,
274 };
275
276 static int ax88772_link_reset(struct usbnet *dev)
277 {
278 u16 mode;
279 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
280
281 mii_check_media(&dev->mii, 1, 1);
282 mii_ethtool_gset(&dev->mii, &ecmd);
283 mode = AX88772_MEDIUM_DEFAULT;
284
285 if (ethtool_cmd_speed(&ecmd) != SPEED_100)
286 mode &= ~AX_MEDIUM_PS;
287
288 if (ecmd.duplex != DUPLEX_FULL)
289 mode &= ~AX_MEDIUM_FD;
290
291 netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
292 ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
293
294 asix_write_medium_mode(dev, mode);
295
296 return 0;
297 }
298
299 static int ax88772_reset(struct usbnet *dev)
300 {
301 struct asix_data *data = (struct asix_data *)&dev->data;
302 int ret, embd_phy;
303 u16 rx_ctl;
304
305 ret = asix_write_gpio(dev,
306 AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
307 if (ret < 0)
308 goto out;
309
310 embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
311
312 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
313 if (ret < 0) {
314 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
315 goto out;
316 }
317
318 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
319 if (ret < 0)
320 goto out;
321
322 msleep(150);
323
324 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
325 if (ret < 0)
326 goto out;
327
328 msleep(150);
329
330 if (embd_phy) {
331 ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
332 if (ret < 0)
333 goto out;
334 } else {
335 ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
336 if (ret < 0)
337 goto out;
338 }
339
340 msleep(150);
341 rx_ctl = asix_read_rx_ctl(dev);
342 netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
343 ret = asix_write_rx_ctl(dev, 0x0000);
344 if (ret < 0)
345 goto out;
346
347 rx_ctl = asix_read_rx_ctl(dev);
348 netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
349
350 ret = asix_sw_reset(dev, AX_SWRESET_PRL);
351 if (ret < 0)
352 goto out;
353
354 msleep(150);
355
356 ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
357 if (ret < 0)
358 goto out;
359
360 msleep(150);
361
362 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
363 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
364 ADVERTISE_ALL | ADVERTISE_CSMA);
365 mii_nway_restart(&dev->mii);
366
367 ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
368 if (ret < 0)
369 goto out;
370
371 ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
372 AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
373 AX88772_IPG2_DEFAULT, 0, NULL);
374 if (ret < 0) {
375 netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
376 goto out;
377 }
378
379 /* Rewrite MAC address */
380 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
381 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
382 data->mac_addr);
383 if (ret < 0)
384 goto out;
385
386 /* Set RX_CTL to default values with 2k buffer, and enable cactus */
387 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
388 if (ret < 0)
389 goto out;
390
391 rx_ctl = asix_read_rx_ctl(dev);
392 netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
393 rx_ctl);
394
395 rx_ctl = asix_read_medium_status(dev);
396 netdev_dbg(dev->net,
397 "Medium Status is 0x%04x after all initializations\n",
398 rx_ctl);
399
400 return 0;
401
402 out:
403 return ret;
404
405 }
406
407 static const struct net_device_ops ax88772_netdev_ops = {
408 .ndo_open = usbnet_open,
409 .ndo_stop = usbnet_stop,
410 .ndo_start_xmit = usbnet_start_xmit,
411 .ndo_tx_timeout = usbnet_tx_timeout,
412 .ndo_change_mtu = usbnet_change_mtu,
413 .ndo_set_mac_address = asix_set_mac_address,
414 .ndo_validate_addr = eth_validate_addr,
415 .ndo_do_ioctl = asix_ioctl,
416 .ndo_set_rx_mode = asix_set_multicast,
417 };
418
419 static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
420 {
421 int ret, embd_phy, i;
422 u8 buf[ETH_ALEN];
423 u32 phyid;
424
425 usbnet_get_endpoints(dev,intf);
426
427 /* Get the MAC address */
428 if (dev->driver_info->data & FLAG_EEPROM_MAC) {
429 for (i = 0; i < (ETH_ALEN >> 1); i++) {
430 ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
431 0, 2, buf + i * 2);
432 if (ret < 0)
433 break;
434 }
435 } else {
436 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
437 0, 0, ETH_ALEN, buf);
438 }
439
440 if (ret < 0) {
441 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
442 return ret;
443 }
444
445 asix_set_netdev_dev_addr(dev, buf);
446
447 /* Initialize MII structure */
448 dev->mii.dev = dev->net;
449 dev->mii.mdio_read = asix_mdio_read;
450 dev->mii.mdio_write = asix_mdio_write;
451 dev->mii.phy_id_mask = 0x1f;
452 dev->mii.reg_num_mask = 0x1f;
453 dev->mii.phy_id = asix_get_phy_addr(dev);
454
455 dev->net->netdev_ops = &ax88772_netdev_ops;
456 dev->net->ethtool_ops = &ax88772_ethtool_ops;
457 dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
458 dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
459
460 embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
461
462 /* Reset the PHY to normal operation mode */
463 ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
464 if (ret < 0) {
465 netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
466 return ret;
467 }
468
469 ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
470 if (ret < 0)
471 return ret;
472
473 msleep(150);
474
475 ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
476 if (ret < 0)
477 return ret;
478
479 msleep(150);
480
481 ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
482
483 /* Read PHYID register *AFTER* the PHY was reset properly */
484 phyid = asix_get_phyid(dev);
485 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
486
487 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
488 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
489 /* hard_mtu is still the default - the device does not support
490 jumbo eth frames */
491 dev->rx_urb_size = 2048;
492 }
493
494 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
495 if (!dev->driver_priv)
496 return -ENOMEM;
497
498 return 0;
499 }
500
501 static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
502 {
503 if (dev->driver_priv)
504 kfree(dev->driver_priv);
505 }
506
507 static const struct ethtool_ops ax88178_ethtool_ops = {
508 .get_drvinfo = asix_get_drvinfo,
509 .get_link = asix_get_link,
510 .get_msglevel = usbnet_get_msglevel,
511 .set_msglevel = usbnet_set_msglevel,
512 .get_wol = asix_get_wol,
513 .set_wol = asix_set_wol,
514 .get_eeprom_len = asix_get_eeprom_len,
515 .get_eeprom = asix_get_eeprom,
516 .set_eeprom = asix_set_eeprom,
517 .get_settings = usbnet_get_settings,
518 .set_settings = usbnet_set_settings,
519 .nway_reset = usbnet_nway_reset,
520 };
521
522 static int marvell_phy_init(struct usbnet *dev)
523 {
524 struct asix_data *data = (struct asix_data *)&dev->data;
525 u16 reg;
526
527 netdev_dbg(dev->net, "marvell_phy_init()\n");
528
529 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
530 netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
531
532 asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
533 MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
534
535 if (data->ledmode) {
536 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
537 MII_MARVELL_LED_CTRL);
538 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
539
540 reg &= 0xf8ff;
541 reg |= (1 + 0x0100);
542 asix_mdio_write(dev->net, dev->mii.phy_id,
543 MII_MARVELL_LED_CTRL, reg);
544
545 reg = asix_mdio_read(dev->net, dev->mii.phy_id,
546 MII_MARVELL_LED_CTRL);
547 netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
548 reg &= 0xfc0f;
549 }
550
551 return 0;
552 }
553
554 static int rtl8211cl_phy_init(struct usbnet *dev)
555 {
556 struct asix_data *data = (struct asix_data *)&dev->data;
557
558 netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
559
560 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
561 asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
562 asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
563 asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
564 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
565
566 if (data->ledmode == 12) {
567 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
568 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
569 asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
570 }
571
572 return 0;
573 }
574
575 static int marvell_led_status(struct usbnet *dev, u16 speed)
576 {
577 u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
578
579 netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
580
581 /* Clear out the center LED bits - 0x03F0 */
582 reg &= 0xfc0f;
583
584 switch (speed) {
585 case SPEED_1000:
586 reg |= 0x03e0;
587 break;
588 case SPEED_100:
589 reg |= 0x03b0;
590 break;
591 default:
592 reg |= 0x02f0;
593 }
594
595 netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
596 asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
597
598 return 0;
599 }
600
601 static int ax88178_reset(struct usbnet *dev)
602 {
603 struct asix_data *data = (struct asix_data *)&dev->data;
604 int ret;
605 __le16 eeprom;
606 u8 status;
607 int gpio0 = 0;
608 u32 phyid;
609
610 asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
611 netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
612
613 asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
614 asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
615 asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
616
617 netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
618
619 if (eeprom == cpu_to_le16(0xffff)) {
620 data->phymode = PHY_MODE_MARVELL;
621 data->ledmode = 0;
622 gpio0 = 1;
623 } else {
624 data->phymode = le16_to_cpu(eeprom) & 0x7F;
625 data->ledmode = le16_to_cpu(eeprom) >> 8;
626 gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
627 }
628 netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
629
630 /* Power up external GigaPHY through AX88178 GPIO pin */
631 asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
632 if ((le16_to_cpu(eeprom) >> 8) != 1) {
633 asix_write_gpio(dev, 0x003c, 30);
634 asix_write_gpio(dev, 0x001c, 300);
635 asix_write_gpio(dev, 0x003c, 30);
636 } else {
637 netdev_dbg(dev->net, "gpio phymode == 1 path\n");
638 asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
639 asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
640 }
641
642 /* Read PHYID register *AFTER* powering up PHY */
643 phyid = asix_get_phyid(dev);
644 netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
645
646 /* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
647 asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
648
649 asix_sw_reset(dev, 0);
650 msleep(150);
651
652 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
653 msleep(150);
654
655 asix_write_rx_ctl(dev, 0);
656
657 if (data->phymode == PHY_MODE_MARVELL) {
658 marvell_phy_init(dev);
659 msleep(60);
660 } else if (data->phymode == PHY_MODE_RTL8211CL)
661 rtl8211cl_phy_init(dev);
662
663 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
664 BMCR_RESET | BMCR_ANENABLE);
665 asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
666 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
667 asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
668 ADVERTISE_1000FULL);
669
670 mii_nway_restart(&dev->mii);
671
672 ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
673 if (ret < 0)
674 return ret;
675
676 /* Rewrite MAC address */
677 memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
678 ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
679 data->mac_addr);
680 if (ret < 0)
681 return ret;
682
683 ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
684 if (ret < 0)
685 return ret;
686
687 return 0;
688 }
689
690 static int ax88178_link_reset(struct usbnet *dev)
691 {
692 u16 mode;
693 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
694 struct asix_data *data = (struct asix_data *)&dev->data;
695 u32 speed;
696
697 netdev_dbg(dev->net, "ax88178_link_reset()\n");
698
699 mii_check_media(&dev->mii, 1, 1);
700 mii_ethtool_gset(&dev->mii, &ecmd);
701 mode = AX88178_MEDIUM_DEFAULT;
702 speed = ethtool_cmd_speed(&ecmd);
703
704 if (speed == SPEED_1000)
705 mode |= AX_MEDIUM_GM;
706 else if (speed == SPEED_100)
707 mode |= AX_MEDIUM_PS;
708 else
709 mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
710
711 mode |= AX_MEDIUM_ENCK;
712
713 if (ecmd.duplex == DUPLEX_FULL)
714 mode |= AX_MEDIUM_FD;
715 else
716 mode &= ~AX_MEDIUM_FD;
717
718 netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
719 speed, ecmd.duplex, mode);
720
721 asix_write_medium_mode(dev, mode);
722
723 if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
724 marvell_led_status(dev, speed);
725
726 return 0;
727 }
728
729 static void ax88178_set_mfb(struct usbnet *dev)
730 {
731 u16 mfb = AX_RX_CTL_MFB_16384;
732 u16 rxctl;
733 u16 medium;
734 int old_rx_urb_size = dev->rx_urb_size;
735
736 if (dev->hard_mtu < 2048) {
737 dev->rx_urb_size = 2048;
738 mfb = AX_RX_CTL_MFB_2048;
739 } else if (dev->hard_mtu < 4096) {
740 dev->rx_urb_size = 4096;
741 mfb = AX_RX_CTL_MFB_4096;
742 } else if (dev->hard_mtu < 8192) {
743 dev->rx_urb_size = 8192;
744 mfb = AX_RX_CTL_MFB_8192;
745 } else if (dev->hard_mtu < 16384) {
746 dev->rx_urb_size = 16384;
747 mfb = AX_RX_CTL_MFB_16384;
748 }
749
750 rxctl = asix_read_rx_ctl(dev);
751 asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
752
753 medium = asix_read_medium_status(dev);
754 if (dev->net->mtu > 1500)
755 medium |= AX_MEDIUM_JFE;
756 else
757 medium &= ~AX_MEDIUM_JFE;
758 asix_write_medium_mode(dev, medium);
759
760 if (dev->rx_urb_size > old_rx_urb_size)
761 usbnet_unlink_rx_urbs(dev);
762 }
763
764 static int ax88178_change_mtu(struct net_device *net, int new_mtu)
765 {
766 struct usbnet *dev = netdev_priv(net);
767 int ll_mtu = new_mtu + net->hard_header_len + 4;
768
769 netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
770
771 if (new_mtu <= 0 || ll_mtu > 16384)
772 return -EINVAL;
773
774 if ((ll_mtu % dev->maxpacket) == 0)
775 return -EDOM;
776
777 net->mtu = new_mtu;
778 dev->hard_mtu = net->mtu + net->hard_header_len;
779 ax88178_set_mfb(dev);
780
781 /* max qlen depend on hard_mtu and rx_urb_size */
782 usbnet_update_max_qlen(dev);
783
784 return 0;
785 }
786
787 static const struct net_device_ops ax88178_netdev_ops = {
788 .ndo_open = usbnet_open,
789 .ndo_stop = usbnet_stop,
790 .ndo_start_xmit = usbnet_start_xmit,
791 .ndo_tx_timeout = usbnet_tx_timeout,
792 .ndo_set_mac_address = asix_set_mac_address,
793 .ndo_validate_addr = eth_validate_addr,
794 .ndo_set_rx_mode = asix_set_multicast,
795 .ndo_do_ioctl = asix_ioctl,
796 .ndo_change_mtu = ax88178_change_mtu,
797 };
798
799 static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
800 {
801 int ret;
802 u8 buf[ETH_ALEN];
803
804 usbnet_get_endpoints(dev,intf);
805
806 /* Get the MAC address */
807 ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
808 if (ret < 0) {
809 netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
810 return ret;
811 }
812
813 asix_set_netdev_dev_addr(dev, buf);
814
815 /* Initialize MII structure */
816 dev->mii.dev = dev->net;
817 dev->mii.mdio_read = asix_mdio_read;
818 dev->mii.mdio_write = asix_mdio_write;
819 dev->mii.phy_id_mask = 0x1f;
820 dev->mii.reg_num_mask = 0xff;
821 dev->mii.supports_gmii = 1;
822 dev->mii.phy_id = asix_get_phy_addr(dev);
823
824 dev->net->netdev_ops = &ax88178_netdev_ops;
825 dev->net->ethtool_ops = &ax88178_ethtool_ops;
826
827 /* Blink LEDS so users know driver saw dongle */
828 asix_sw_reset(dev, 0);
829 msleep(150);
830
831 asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
832 msleep(150);
833
834 /* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
835 if (dev->driver_info->flags & FLAG_FRAMING_AX) {
836 /* hard_mtu is still the default - the device does not support
837 jumbo eth frames */
838 dev->rx_urb_size = 2048;
839 }
840
841 dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
842 if (!dev->driver_priv)
843 return -ENOMEM;
844
845 return 0;
846 }
847
848 static const struct driver_info ax8817x_info = {
849 .description = "ASIX AX8817x USB 2.0 Ethernet",
850 .bind = ax88172_bind,
851 .status = asix_status,
852 .link_reset = ax88172_link_reset,
853 .reset = ax88172_link_reset,
854 .flags = FLAG_ETHER | FLAG_LINK_INTR,
855 .data = 0x00130103,
856 };
857
858 static const struct driver_info dlink_dub_e100_info = {
859 .description = "DLink DUB-E100 USB Ethernet",
860 .bind = ax88172_bind,
861 .status = asix_status,
862 .link_reset = ax88172_link_reset,
863 .reset = ax88172_link_reset,
864 .flags = FLAG_ETHER | FLAG_LINK_INTR,
865 .data = 0x009f9d9f,
866 };
867
868 static const struct driver_info netgear_fa120_info = {
869 .description = "Netgear FA-120 USB Ethernet",
870 .bind = ax88172_bind,
871 .status = asix_status,
872 .link_reset = ax88172_link_reset,
873 .reset = ax88172_link_reset,
874 .flags = FLAG_ETHER | FLAG_LINK_INTR,
875 .data = 0x00130103,
876 };
877
878 static const struct driver_info hawking_uf200_info = {
879 .description = "Hawking UF200 USB Ethernet",
880 .bind = ax88172_bind,
881 .status = asix_status,
882 .link_reset = ax88172_link_reset,
883 .reset = ax88172_link_reset,
884 .flags = FLAG_ETHER | FLAG_LINK_INTR,
885 .data = 0x001f1d1f,
886 };
887
888 static const struct driver_info ax88772_info = {
889 .description = "ASIX AX88772 USB 2.0 Ethernet",
890 .bind = ax88772_bind,
891 .unbind = ax88772_unbind,
892 .status = asix_status,
893 .link_reset = ax88772_link_reset,
894 .reset = ax88772_reset,
895 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
896 .rx_fixup = asix_rx_fixup_common,
897 .tx_fixup = asix_tx_fixup,
898 };
899
900 static const struct driver_info ax88772b_info = {
901 .description = "ASIX AX88772B USB 2.0 Ethernet",
902 .bind = ax88772_bind,
903 .unbind = ax88772_unbind,
904 .status = asix_status,
905 .link_reset = ax88772_link_reset,
906 .reset = ax88772_reset,
907 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
908 FLAG_MULTI_PACKET,
909 .rx_fixup = asix_rx_fixup_common,
910 .tx_fixup = asix_tx_fixup,
911 .data = FLAG_EEPROM_MAC,
912 };
913
914 static const struct driver_info ax88178_info = {
915 .description = "ASIX AX88178 USB 2.0 Ethernet",
916 .bind = ax88178_bind,
917 .unbind = ax88772_unbind,
918 .status = asix_status,
919 .link_reset = ax88178_link_reset,
920 .reset = ax88178_reset,
921 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR,
922 .rx_fixup = asix_rx_fixup_common,
923 .tx_fixup = asix_tx_fixup,
924 };
925
926 /*
927 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
928 * no-name packaging.
929 * USB device strings are:
930 * 1: Manufacturer: USBLINK
931 * 2: Product: HG20F9 USB2.0
932 * 3: Serial: 000003
933 * Appears to be compatible with Asix 88772B.
934 */
935 static const struct driver_info hg20f9_info = {
936 .description = "HG20F9 USB 2.0 Ethernet",
937 .bind = ax88772_bind,
938 .unbind = ax88772_unbind,
939 .status = asix_status,
940 .link_reset = ax88772_link_reset,
941 .reset = ax88772_reset,
942 .flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
943 FLAG_MULTI_PACKET,
944 .rx_fixup = asix_rx_fixup_common,
945 .tx_fixup = asix_tx_fixup,
946 .data = FLAG_EEPROM_MAC,
947 };
948
949 static const struct usb_device_id products [] = {
950 {
951 // Linksys USB200M
952 USB_DEVICE (0x077b, 0x2226),
953 .driver_info = (unsigned long) &ax8817x_info,
954 }, {
955 // Netgear FA120
956 USB_DEVICE (0x0846, 0x1040),
957 .driver_info = (unsigned long) &netgear_fa120_info,
958 }, {
959 // DLink DUB-E100
960 USB_DEVICE (0x2001, 0x1a00),
961 .driver_info = (unsigned long) &dlink_dub_e100_info,
962 }, {
963 // Intellinet, ST Lab USB Ethernet
964 USB_DEVICE (0x0b95, 0x1720),
965 .driver_info = (unsigned long) &ax8817x_info,
966 }, {
967 // Hawking UF200, TrendNet TU2-ET100
968 USB_DEVICE (0x07b8, 0x420a),
969 .driver_info = (unsigned long) &hawking_uf200_info,
970 }, {
971 // Billionton Systems, USB2AR
972 USB_DEVICE (0x08dd, 0x90ff),
973 .driver_info = (unsigned long) &ax8817x_info,
974 }, {
975 // ATEN UC210T
976 USB_DEVICE (0x0557, 0x2009),
977 .driver_info = (unsigned long) &ax8817x_info,
978 }, {
979 // Buffalo LUA-U2-KTX
980 USB_DEVICE (0x0411, 0x003d),
981 .driver_info = (unsigned long) &ax8817x_info,
982 }, {
983 // Buffalo LUA-U2-GT 10/100/1000
984 USB_DEVICE (0x0411, 0x006e),
985 .driver_info = (unsigned long) &ax88178_info,
986 }, {
987 // Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
988 USB_DEVICE (0x6189, 0x182d),
989 .driver_info = (unsigned long) &ax8817x_info,
990 }, {
991 // Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
992 USB_DEVICE (0x0df6, 0x0056),
993 .driver_info = (unsigned long) &ax88178_info,
994 }, {
995 // corega FEther USB2-TX
996 USB_DEVICE (0x07aa, 0x0017),
997 .driver_info = (unsigned long) &ax8817x_info,
998 }, {
999 // Surecom EP-1427X-2
1000 USB_DEVICE (0x1189, 0x0893),
1001 .driver_info = (unsigned long) &ax8817x_info,
1002 }, {
1003 // goodway corp usb gwusb2e
1004 USB_DEVICE (0x1631, 0x6200),
1005 .driver_info = (unsigned long) &ax8817x_info,
1006 }, {
1007 // JVC MP-PRX1 Port Replicator
1008 USB_DEVICE (0x04f1, 0x3008),
1009 .driver_info = (unsigned long) &ax8817x_info,
1010 }, {
1011 // Lenovo U2L100P 10/100
1012 USB_DEVICE (0x17ef, 0x7203),
1013 .driver_info = (unsigned long) &ax88772_info,
1014 }, {
1015 // ASIX AX88772B 10/100
1016 USB_DEVICE (0x0b95, 0x772b),
1017 .driver_info = (unsigned long) &ax88772b_info,
1018 }, {
1019 // ASIX AX88772 10/100
1020 USB_DEVICE (0x0b95, 0x7720),
1021 .driver_info = (unsigned long) &ax88772_info,
1022 }, {
1023 // ASIX AX88178 10/100/1000
1024 USB_DEVICE (0x0b95, 0x1780),
1025 .driver_info = (unsigned long) &ax88178_info,
1026 }, {
1027 // Logitec LAN-GTJ/U2A
1028 USB_DEVICE (0x0789, 0x0160),
1029 .driver_info = (unsigned long) &ax88178_info,
1030 }, {
1031 // Linksys USB200M Rev 2
1032 USB_DEVICE (0x13b1, 0x0018),
1033 .driver_info = (unsigned long) &ax88772_info,
1034 }, {
1035 // 0Q0 cable ethernet
1036 USB_DEVICE (0x1557, 0x7720),
1037 .driver_info = (unsigned long) &ax88772_info,
1038 }, {
1039 // DLink DUB-E100 H/W Ver B1
1040 USB_DEVICE (0x07d1, 0x3c05),
1041 .driver_info = (unsigned long) &ax88772_info,
1042 }, {
1043 // DLink DUB-E100 H/W Ver B1 Alternate
1044 USB_DEVICE (0x2001, 0x3c05),
1045 .driver_info = (unsigned long) &ax88772_info,
1046 }, {
1047 // DLink DUB-E100 H/W Ver C1
1048 USB_DEVICE (0x2001, 0x1a02),
1049 .driver_info = (unsigned long) &ax88772_info,
1050 }, {
1051 // Linksys USB1000
1052 USB_DEVICE (0x1737, 0x0039),
1053 .driver_info = (unsigned long) &ax88178_info,
1054 }, {
1055 // IO-DATA ETG-US2
1056 USB_DEVICE (0x04bb, 0x0930),
1057 .driver_info = (unsigned long) &ax88178_info,
1058 }, {
1059 // Belkin F5D5055
1060 USB_DEVICE(0x050d, 0x5055),
1061 .driver_info = (unsigned long) &ax88178_info,
1062 }, {
1063 // Apple USB Ethernet Adapter
1064 USB_DEVICE(0x05ac, 0x1402),
1065 .driver_info = (unsigned long) &ax88772_info,
1066 }, {
1067 // Cables-to-Go USB Ethernet Adapter
1068 USB_DEVICE(0x0b95, 0x772a),
1069 .driver_info = (unsigned long) &ax88772_info,
1070 }, {
1071 // ABOCOM for pci
1072 USB_DEVICE(0x14ea, 0xab11),
1073 .driver_info = (unsigned long) &ax88178_info,
1074 }, {
1075 // ASIX 88772a
1076 USB_DEVICE(0x0db0, 0xa877),
1077 .driver_info = (unsigned long) &ax88772_info,
1078 }, {
1079 // Asus USB Ethernet Adapter
1080 USB_DEVICE (0x0b95, 0x7e2b),
1081 .driver_info = (unsigned long) &ax88772_info,
1082 }, {
1083 /* ASIX 88172a demo board */
1084 USB_DEVICE(0x0b95, 0x172a),
1085 .driver_info = (unsigned long) &ax88172a_info,
1086 }, {
1087 /*
1088 * USBLINK HG20F9 "USB 2.0 LAN"
1089 * Appears to have gazumped Linksys's manufacturer ID but
1090 * doesn't (yet) conflict with any known Linksys product.
1091 */
1092 USB_DEVICE(0x066b, 0x20f9),
1093 .driver_info = (unsigned long) &hg20f9_info,
1094 },
1095 { }, // END
1096 };
1097 MODULE_DEVICE_TABLE(usb, products);
1098
1099 static struct usb_driver asix_driver = {
1100 .name = DRIVER_NAME,
1101 .id_table = products,
1102 .probe = usbnet_probe,
1103 .suspend = usbnet_suspend,
1104 .resume = usbnet_resume,
1105 .disconnect = usbnet_disconnect,
1106 .supports_autosuspend = 1,
1107 .disable_hub_initiated_lpm = 1,
1108 };
1109
1110 module_usb_driver(asix_driver);
1111
1112 MODULE_AUTHOR("David Hollis");
1113 MODULE_VERSION(DRIVER_VERSION);
1114 MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1115 MODULE_LICENSE("GPL");
1116
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