drivers/net/ethernet/mellanox/mlx4/en_port.c

   1 /*
   2  * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
   3  *
   4  * This software is available to you under a choice of one of two
   5  * licenses.  You may choose to be licensed under the terms of the GNU
   6  * General Public License (GPL) Version 2, available from the file
   7  * COPYING in the main directory of this source tree, or the
   8  * OpenIB.org BSD license below:
   9  *
  10  *     Redistribution and use in source and binary forms, with or
  11  *     without modification, are permitted provided that the following
  12  *     conditions are met:
  13  *
  14  *      - Redistributions of source code must retain the above
  15  *        copyright notice, this list of conditions and the following
  16  *        disclaimer.
  17  *
  18  *      - Redistributions in binary form must reproduce the above
  19  *        copyright notice, this list of conditions and the following
  20  *        disclaimer in the documentation and/or other materials
  21  *        provided with the distribution.
  22  *
  23  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30  * SOFTWARE.
  31  *
  32  */
  33
  34
  35 #include <linux/if_vlan.h>
  36
  37 #include <linux/mlx4/device.h>
  38 #include <linux/mlx4/cmd.h>
  39
  40 #include "en_port.h"
  41 #include "mlx4_en.h"
  42
  43
  44 int mlx4_SET_VLAN_FLTR(struct mlx4_dev *dev, struct mlx4_en_priv *priv)
  45 {
  46         struct mlx4_cmd_mailbox *mailbox;
  47         struct mlx4_set_vlan_fltr_mbox *filter;
  48         int i;
  49         int j;
  50         int index = 0;
  51         u32 entry;
  52         int err = 0;
  53
  54         mailbox = mlx4_alloc_cmd_mailbox(dev);
  55         if (IS_ERR(mailbox))
  56                 return PTR_ERR(mailbox);
  57
  58         filter = mailbox->buf;
  59         memset(filter, 0, sizeof(*filter));
  60         for (i = VLAN_FLTR_SIZE - 1; i >= 0; i--) {
  61                 entry = 0;
  62                 for (j = 0; j < 32; j++)
  63                         if (test_bit(index++, priv->active_vlans))
  64                                 entry |= 1 << j;
  65                 filter->entry[i] = cpu_to_be32(entry);
  66         }
  67         err = mlx4_cmd(dev, mailbox->dma, priv->port, 0, MLX4_CMD_SET_VLAN_FLTR,
  68                        MLX4_CMD_TIME_CLASS_B, MLX4_CMD_WRAPPED);
  69         mlx4_free_cmd_mailbox(dev, mailbox);
  70         return err;
  71 }
  72
  73 int mlx4_en_QUERY_PORT(struct mlx4_en_dev *mdev, u8 port)
  74 {
  75         struct mlx4_en_query_port_context *qport_context;
  76         struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
  77         struct mlx4_en_port_state *state = &priv->port_state;
  78         struct mlx4_cmd_mailbox *mailbox;
  79         int err;
  80
  81         mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
  82         if (IS_ERR(mailbox))
  83                 return PTR_ERR(mailbox);
  84         memset(mailbox->buf, 0, sizeof(*qport_context));
  85         err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, port, 0,
  86                            MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
  87                            MLX4_CMD_WRAPPED);
  88         if (err)
  89                 goto out;
  90         qport_context = mailbox->buf;
  91
  92         /* This command is always accessed from Ethtool context
  93          * already synchronized, no need in locking */
  94         state->link_state = !!(qport_context->link_up & MLX4_EN_LINK_UP_MASK);
  95         switch (qport_context->link_speed & MLX4_EN_SPEED_MASK) {
  96         case MLX4_EN_1G_SPEED:
  97                 state->link_speed = 1000;
  98                 break;
  99         case MLX4_EN_10G_SPEED_XAUI:
 100         case MLX4_EN_10G_SPEED_XFI:
 101                 state->link_speed = 10000;
 102                 break;
 103         case MLX4_EN_40G_SPEED:
 104                 state->link_speed = 40000;
 105                 break;
 106         default:
 107                 state->link_speed = -1;
 108                 break;
 109         }
 110         state->transciver = qport_context->transceiver;
 111
 112 out:
 113         mlx4_free_cmd_mailbox(mdev->dev, mailbox);
 114         return err;
 115 }
 116
 117 int mlx4_en_DUMP_ETH_STATS(struct mlx4_en_dev *mdev, u8 port, u8 reset)
 118 {
 119         struct mlx4_en_stat_out_mbox *mlx4_en_stats;
 120         struct mlx4_en_priv *priv = netdev_priv(mdev->pndev[port]);
 121         struct net_device_stats *stats = &priv->stats;
 122         struct mlx4_cmd_mailbox *mailbox;
 123         u64 in_mod = reset << 8 | port;
 124         int err;
 125         int i;
 126
 127         mailbox = mlx4_alloc_cmd_mailbox(mdev->dev);
 128         if (IS_ERR(mailbox))
 129                 return PTR_ERR(mailbox);
 130         memset(mailbox->buf, 0, sizeof(*mlx4_en_stats));
 131         err = mlx4_cmd_box(mdev->dev, 0, mailbox->dma, in_mod, 0,
 132                            MLX4_CMD_DUMP_ETH_STATS, MLX4_CMD_TIME_CLASS_B,
 133                            MLX4_CMD_WRAPPED);
 134         if (err)
 135                 goto out;
 136
 137         mlx4_en_stats = mailbox->buf;
 138
 139         spin_lock_bh(&priv->stats_lock);
 140
 141         stats->rx_packets = 0;
 142         stats->rx_bytes = 0;
 143         priv->port_stats.rx_chksum_good = 0;
 144         priv->port_stats.rx_chksum_none = 0;
 145         for (i = 0; i < priv->rx_ring_num; i++) {
 146                 stats->rx_packets += priv->rx_ring[i].packets;
 147                 stats->rx_bytes += priv->rx_ring[i].bytes;
 148                 priv->port_stats.rx_chksum_good += priv->rx_ring[i].csum_ok;
 149                 priv->port_stats.rx_chksum_none += priv->rx_ring[i].csum_none;
 150         }
 151         stats->tx_packets = 0;
 152         stats->tx_bytes = 0;
 153         priv->port_stats.tx_chksum_offload = 0;
 154         for (i = 0; i < priv->tx_ring_num; i++) {
 155                 stats->tx_packets += priv->tx_ring[i].packets;
 156                 stats->tx_bytes += priv->tx_ring[i].bytes;
 157                 priv->port_stats.tx_chksum_offload += priv->tx_ring[i].tx_csum;
 158         }
 159
 160         stats->rx_errors = be64_to_cpu(mlx4_en_stats->PCS) +
 161                            be32_to_cpu(mlx4_en_stats->RdropLength) +
 162                            be32_to_cpu(mlx4_en_stats->RJBBR) +
 163                            be32_to_cpu(mlx4_en_stats->RCRC) +
 164                            be32_to_cpu(mlx4_en_stats->RRUNT);
 165         stats->tx_errors = be32_to_cpu(mlx4_en_stats->TDROP);
 166         stats->multicast = be64_to_cpu(mlx4_en_stats->MCAST_prio_0) +
 167                            be64_to_cpu(mlx4_en_stats->MCAST_prio_1) +
 168                            be64_to_cpu(mlx4_en_stats->MCAST_prio_2) +
 169                            be64_to_cpu(mlx4_en_stats->MCAST_prio_3) +
 170                            be64_to_cpu(mlx4_en_stats->MCAST_prio_4) +
 171                            be64_to_cpu(mlx4_en_stats->MCAST_prio_5) +
 172                            be64_to_cpu(mlx4_en_stats->MCAST_prio_6) +
 173                            be64_to_cpu(mlx4_en_stats->MCAST_prio_7) +
 174                            be64_to_cpu(mlx4_en_stats->MCAST_novlan);
 175         stats->collisions = 0;
 176         stats->rx_length_errors = be32_to_cpu(mlx4_en_stats->RdropLength);
 177         stats->rx_over_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
 178         stats->rx_crc_errors = be32_to_cpu(mlx4_en_stats->RCRC);
 179         stats->rx_frame_errors = 0;
 180         stats->rx_fifo_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
 181         stats->rx_missed_errors = be32_to_cpu(mlx4_en_stats->RdropOvflw);
 182         stats->tx_aborted_errors = 0;
 183         stats->tx_carrier_errors = 0;
 184         stats->tx_fifo_errors = 0;
 185         stats->tx_heartbeat_errors = 0;
 186         stats->tx_window_errors = 0;
 187
 188         priv->pkstats.broadcast =
 189                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_0) +
 190                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_1) +
 191                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_2) +
 192                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_3) +
 193                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_4) +
 194                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_5) +
 195                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_6) +
 196                                 be64_to_cpu(mlx4_en_stats->RBCAST_prio_7) +
 197                                 be64_to_cpu(mlx4_en_stats->RBCAST_novlan);
 198         priv->pkstats.rx_prio[0] = be64_to_cpu(mlx4_en_stats->RTOT_prio_0);
 199         priv->pkstats.rx_prio[1] = be64_to_cpu(mlx4_en_stats->RTOT_prio_1);
 200         priv->pkstats.rx_prio[2] = be64_to_cpu(mlx4_en_stats->RTOT_prio_2);
 201         priv->pkstats.rx_prio[3] = be64_to_cpu(mlx4_en_stats->RTOT_prio_3);
 202         priv->pkstats.rx_prio[4] = be64_to_cpu(mlx4_en_stats->RTOT_prio_4);
 203         priv->pkstats.rx_prio[5] = be64_to_cpu(mlx4_en_stats->RTOT_prio_5);
 204         priv->pkstats.rx_prio[6] = be64_to_cpu(mlx4_en_stats->RTOT_prio_6);
 205         priv->pkstats.rx_prio[7] = be64_to_cpu(mlx4_en_stats->RTOT_prio_7);
 206         priv->pkstats.tx_prio[0] = be64_to_cpu(mlx4_en_stats->TTOT_prio_0);
 207         priv->pkstats.tx_prio[1] = be64_to_cpu(mlx4_en_stats->TTOT_prio_1);
 208         priv->pkstats.tx_prio[2] = be64_to_cpu(mlx4_en_stats->TTOT_prio_2);
 209         priv->pkstats.tx_prio[3] = be64_to_cpu(mlx4_en_stats->TTOT_prio_3);
 210         priv->pkstats.tx_prio[4] = be64_to_cpu(mlx4_en_stats->TTOT_prio_4);
 211         priv->pkstats.tx_prio[5] = be64_to_cpu(mlx4_en_stats->TTOT_prio_5);
 212         priv->pkstats.tx_prio[6] = be64_to_cpu(mlx4_en_stats->TTOT_prio_6);
 213         priv->pkstats.tx_prio[7] = be64_to_cpu(mlx4_en_stats->TTOT_prio_7);
 214         spin_unlock_bh(&priv->stats_lock);
 215
 216 out:
 217         mlx4_free_cmd_mailbox(mdev->dev, mailbox);
 218         return err;
 219 }
 220