sfc: Split MAC stats DMA initiation and completion
[linux-2.6/btrfs-unstable.git] / drivers / net / sfc / efx.c
blob41ca5dbb4c44d3fae6f94da0dbb2c058c137e199
1 /****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2005-2008 Solarflare Communications Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
11 #include <linux/module.h>
12 #include <linux/pci.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/notifier.h>
17 #include <linux/ip.h>
18 #include <linux/tcp.h>
19 #include <linux/in.h>
20 #include <linux/crc32.h>
21 #include <linux/ethtool.h>
22 #include <linux/topology.h>
23 #include "net_driver.h"
24 #include "efx.h"
25 #include "mdio_10g.h"
26 #include "falcon.h"
28 /**************************************************************************
30 * Type name strings
32 **************************************************************************
35 /* Loopback mode names (see LOOPBACK_MODE()) */
36 const unsigned int efx_loopback_mode_max = LOOPBACK_MAX;
37 const char *efx_loopback_mode_names[] = {
38 [LOOPBACK_NONE] = "NONE",
39 [LOOPBACK_GMAC] = "GMAC",
40 [LOOPBACK_XGMII] = "XGMII",
41 [LOOPBACK_XGXS] = "XGXS",
42 [LOOPBACK_XAUI] = "XAUI",
43 [LOOPBACK_GPHY] = "GPHY",
44 [LOOPBACK_PHYXS] = "PHYXS",
45 [LOOPBACK_PCS] = "PCS",
46 [LOOPBACK_PMAPMD] = "PMA/PMD",
47 [LOOPBACK_NETWORK] = "NETWORK",
50 /* Interrupt mode names (see INT_MODE())) */
51 const unsigned int efx_interrupt_mode_max = EFX_INT_MODE_MAX;
52 const char *efx_interrupt_mode_names[] = {
53 [EFX_INT_MODE_MSIX] = "MSI-X",
54 [EFX_INT_MODE_MSI] = "MSI",
55 [EFX_INT_MODE_LEGACY] = "legacy",
58 const unsigned int efx_reset_type_max = RESET_TYPE_MAX;
59 const char *efx_reset_type_names[] = {
60 [RESET_TYPE_INVISIBLE] = "INVISIBLE",
61 [RESET_TYPE_ALL] = "ALL",
62 [RESET_TYPE_WORLD] = "WORLD",
63 [RESET_TYPE_DISABLE] = "DISABLE",
64 [RESET_TYPE_TX_WATCHDOG] = "TX_WATCHDOG",
65 [RESET_TYPE_INT_ERROR] = "INT_ERROR",
66 [RESET_TYPE_RX_RECOVERY] = "RX_RECOVERY",
67 [RESET_TYPE_RX_DESC_FETCH] = "RX_DESC_FETCH",
68 [RESET_TYPE_TX_DESC_FETCH] = "TX_DESC_FETCH",
69 [RESET_TYPE_TX_SKIP] = "TX_SKIP",
72 #define EFX_MAX_MTU (9 * 1024)
74 /* RX slow fill workqueue. If memory allocation fails in the fast path,
75 * a work item is pushed onto this work queue to retry the allocation later,
76 * to avoid the NIC being starved of RX buffers. Since this is a per cpu
77 * workqueue, there is nothing to be gained in making it per NIC
79 static struct workqueue_struct *refill_workqueue;
81 /* Reset workqueue. If any NIC has a hardware failure then a reset will be
82 * queued onto this work queue. This is not a per-nic work queue, because
83 * efx_reset_work() acquires the rtnl lock, so resets are naturally serialised.
85 static struct workqueue_struct *reset_workqueue;
87 /**************************************************************************
89 * Configurable values
91 *************************************************************************/
94 * Use separate channels for TX and RX events
96 * Set this to 1 to use separate channels for TX and RX. It allows us
97 * to control interrupt affinity separately for TX and RX.
99 * This is only used in MSI-X interrupt mode
101 static unsigned int separate_tx_channels;
102 module_param(separate_tx_channels, uint, 0644);
103 MODULE_PARM_DESC(separate_tx_channels,
104 "Use separate channels for TX and RX");
106 /* This is the weight assigned to each of the (per-channel) virtual
107 * NAPI devices.
109 static int napi_weight = 64;
111 /* This is the time (in jiffies) between invocations of the hardware
112 * monitor, which checks for known hardware bugs and resets the
113 * hardware and driver as necessary.
115 unsigned int efx_monitor_interval = 1 * HZ;
117 /* This controls whether or not the driver will initialise devices
118 * with invalid MAC addresses stored in the EEPROM or flash. If true,
119 * such devices will be initialised with a random locally-generated
120 * MAC address. This allows for loading the sfc_mtd driver to
121 * reprogram the flash, even if the flash contents (including the MAC
122 * address) have previously been erased.
124 static unsigned int allow_bad_hwaddr;
126 /* Initial interrupt moderation settings. They can be modified after
127 * module load with ethtool.
129 * The default for RX should strike a balance between increasing the
130 * round-trip latency and reducing overhead.
132 static unsigned int rx_irq_mod_usec = 60;
134 /* Initial interrupt moderation settings. They can be modified after
135 * module load with ethtool.
137 * This default is chosen to ensure that a 10G link does not go idle
138 * while a TX queue is stopped after it has become full. A queue is
139 * restarted when it drops below half full. The time this takes (assuming
140 * worst case 3 descriptors per packet and 1024 descriptors) is
141 * 512 / 3 * 1.2 = 205 usec.
143 static unsigned int tx_irq_mod_usec = 150;
145 /* This is the first interrupt mode to try out of:
146 * 0 => MSI-X
147 * 1 => MSI
148 * 2 => legacy
150 static unsigned int interrupt_mode;
152 /* This is the requested number of CPUs to use for Receive-Side Scaling (RSS),
153 * i.e. the number of CPUs among which we may distribute simultaneous
154 * interrupt handling.
156 * Cards without MSI-X will only target one CPU via legacy or MSI interrupt.
157 * The default (0) means to assign an interrupt to each package (level II cache)
159 static unsigned int rss_cpus;
160 module_param(rss_cpus, uint, 0444);
161 MODULE_PARM_DESC(rss_cpus, "Number of CPUs to use for Receive-Side Scaling");
163 static int phy_flash_cfg;
164 module_param(phy_flash_cfg, int, 0644);
165 MODULE_PARM_DESC(phy_flash_cfg, "Set PHYs into reflash mode initially");
167 static unsigned irq_adapt_low_thresh = 10000;
168 module_param(irq_adapt_low_thresh, uint, 0644);
169 MODULE_PARM_DESC(irq_adapt_low_thresh,
170 "Threshold score for reducing IRQ moderation");
172 static unsigned irq_adapt_high_thresh = 20000;
173 module_param(irq_adapt_high_thresh, uint, 0644);
174 MODULE_PARM_DESC(irq_adapt_high_thresh,
175 "Threshold score for increasing IRQ moderation");
177 /**************************************************************************
179 * Utility functions and prototypes
181 *************************************************************************/
182 static void efx_remove_channel(struct efx_channel *channel);
183 static void efx_remove_port(struct efx_nic *efx);
184 static void efx_fini_napi(struct efx_nic *efx);
185 static void efx_fini_channels(struct efx_nic *efx);
187 #define EFX_ASSERT_RESET_SERIALISED(efx) \
188 do { \
189 if ((efx->state == STATE_RUNNING) || \
190 (efx->state == STATE_DISABLED)) \
191 ASSERT_RTNL(); \
192 } while (0)
194 /**************************************************************************
196 * Event queue processing
198 *************************************************************************/
200 /* Process channel's event queue
202 * This function is responsible for processing the event queue of a
203 * single channel. The caller must guarantee that this function will
204 * never be concurrently called more than once on the same channel,
205 * though different channels may be being processed concurrently.
207 static int efx_process_channel(struct efx_channel *channel, int rx_quota)
209 struct efx_nic *efx = channel->efx;
210 int rx_packets;
212 if (unlikely(efx->reset_pending != RESET_TYPE_NONE ||
213 !channel->enabled))
214 return 0;
216 rx_packets = falcon_process_eventq(channel, rx_quota);
217 if (rx_packets == 0)
218 return 0;
220 /* Deliver last RX packet. */
221 if (channel->rx_pkt) {
222 __efx_rx_packet(channel, channel->rx_pkt,
223 channel->rx_pkt_csummed);
224 channel->rx_pkt = NULL;
227 efx_rx_strategy(channel);
229 efx_fast_push_rx_descriptors(&efx->rx_queue[channel->channel]);
231 return rx_packets;
234 /* Mark channel as finished processing
236 * Note that since we will not receive further interrupts for this
237 * channel before we finish processing and call the eventq_read_ack()
238 * method, there is no need to use the interrupt hold-off timers.
240 static inline void efx_channel_processed(struct efx_channel *channel)
242 /* The interrupt handler for this channel may set work_pending
243 * as soon as we acknowledge the events we've seen. Make sure
244 * it's cleared before then. */
245 channel->work_pending = false;
246 smp_wmb();
248 falcon_eventq_read_ack(channel);
251 /* NAPI poll handler
253 * NAPI guarantees serialisation of polls of the same device, which
254 * provides the guarantee required by efx_process_channel().
256 static int efx_poll(struct napi_struct *napi, int budget)
258 struct efx_channel *channel =
259 container_of(napi, struct efx_channel, napi_str);
260 int rx_packets;
262 EFX_TRACE(channel->efx, "channel %d NAPI poll executing on CPU %d\n",
263 channel->channel, raw_smp_processor_id());
265 rx_packets = efx_process_channel(channel, budget);
267 if (rx_packets < budget) {
268 struct efx_nic *efx = channel->efx;
270 if (channel->used_flags & EFX_USED_BY_RX &&
271 efx->irq_rx_adaptive &&
272 unlikely(++channel->irq_count == 1000)) {
273 if (unlikely(channel->irq_mod_score <
274 irq_adapt_low_thresh)) {
275 if (channel->irq_moderation > 1) {
276 channel->irq_moderation -= 1;
277 falcon_set_int_moderation(channel);
279 } else if (unlikely(channel->irq_mod_score >
280 irq_adapt_high_thresh)) {
281 if (channel->irq_moderation <
282 efx->irq_rx_moderation) {
283 channel->irq_moderation += 1;
284 falcon_set_int_moderation(channel);
287 channel->irq_count = 0;
288 channel->irq_mod_score = 0;
291 /* There is no race here; although napi_disable() will
292 * only wait for napi_complete(), this isn't a problem
293 * since efx_channel_processed() will have no effect if
294 * interrupts have already been disabled.
296 napi_complete(napi);
297 efx_channel_processed(channel);
300 return rx_packets;
303 /* Process the eventq of the specified channel immediately on this CPU
305 * Disable hardware generated interrupts, wait for any existing
306 * processing to finish, then directly poll (and ack ) the eventq.
307 * Finally reenable NAPI and interrupts.
309 * Since we are touching interrupts the caller should hold the suspend lock
311 void efx_process_channel_now(struct efx_channel *channel)
313 struct efx_nic *efx = channel->efx;
315 BUG_ON(!channel->used_flags);
316 BUG_ON(!channel->enabled);
318 /* Disable interrupts and wait for ISRs to complete */
319 falcon_disable_interrupts(efx);
320 if (efx->legacy_irq)
321 synchronize_irq(efx->legacy_irq);
322 if (channel->irq)
323 synchronize_irq(channel->irq);
325 /* Wait for any NAPI processing to complete */
326 napi_disable(&channel->napi_str);
328 /* Poll the channel */
329 efx_process_channel(channel, EFX_EVQ_SIZE);
331 /* Ack the eventq. This may cause an interrupt to be generated
332 * when they are reenabled */
333 efx_channel_processed(channel);
335 napi_enable(&channel->napi_str);
336 falcon_enable_interrupts(efx);
339 /* Create event queue
340 * Event queue memory allocations are done only once. If the channel
341 * is reset, the memory buffer will be reused; this guards against
342 * errors during channel reset and also simplifies interrupt handling.
344 static int efx_probe_eventq(struct efx_channel *channel)
346 EFX_LOG(channel->efx, "chan %d create event queue\n", channel->channel);
348 return falcon_probe_eventq(channel);
351 /* Prepare channel's event queue */
352 static void efx_init_eventq(struct efx_channel *channel)
354 EFX_LOG(channel->efx, "chan %d init event queue\n", channel->channel);
356 channel->eventq_read_ptr = 0;
358 falcon_init_eventq(channel);
361 static void efx_fini_eventq(struct efx_channel *channel)
363 EFX_LOG(channel->efx, "chan %d fini event queue\n", channel->channel);
365 falcon_fini_eventq(channel);
368 static void efx_remove_eventq(struct efx_channel *channel)
370 EFX_LOG(channel->efx, "chan %d remove event queue\n", channel->channel);
372 falcon_remove_eventq(channel);
375 /**************************************************************************
377 * Channel handling
379 *************************************************************************/
381 static int efx_probe_channel(struct efx_channel *channel)
383 struct efx_tx_queue *tx_queue;
384 struct efx_rx_queue *rx_queue;
385 int rc;
387 EFX_LOG(channel->efx, "creating channel %d\n", channel->channel);
389 rc = efx_probe_eventq(channel);
390 if (rc)
391 goto fail1;
393 efx_for_each_channel_tx_queue(tx_queue, channel) {
394 rc = efx_probe_tx_queue(tx_queue);
395 if (rc)
396 goto fail2;
399 efx_for_each_channel_rx_queue(rx_queue, channel) {
400 rc = efx_probe_rx_queue(rx_queue);
401 if (rc)
402 goto fail3;
405 channel->n_rx_frm_trunc = 0;
407 return 0;
409 fail3:
410 efx_for_each_channel_rx_queue(rx_queue, channel)
411 efx_remove_rx_queue(rx_queue);
412 fail2:
413 efx_for_each_channel_tx_queue(tx_queue, channel)
414 efx_remove_tx_queue(tx_queue);
415 fail1:
416 return rc;
420 static void efx_set_channel_names(struct efx_nic *efx)
422 struct efx_channel *channel;
423 const char *type = "";
424 int number;
426 efx_for_each_channel(channel, efx) {
427 number = channel->channel;
428 if (efx->n_channels > efx->n_rx_queues) {
429 if (channel->channel < efx->n_rx_queues) {
430 type = "-rx";
431 } else {
432 type = "-tx";
433 number -= efx->n_rx_queues;
436 snprintf(channel->name, sizeof(channel->name),
437 "%s%s-%d", efx->name, type, number);
441 /* Channels are shutdown and reinitialised whilst the NIC is running
442 * to propagate configuration changes (mtu, checksum offload), or
443 * to clear hardware error conditions
445 static void efx_init_channels(struct efx_nic *efx)
447 struct efx_tx_queue *tx_queue;
448 struct efx_rx_queue *rx_queue;
449 struct efx_channel *channel;
451 /* Calculate the rx buffer allocation parameters required to
452 * support the current MTU, including padding for header
453 * alignment and overruns.
455 efx->rx_buffer_len = (max(EFX_PAGE_IP_ALIGN, NET_IP_ALIGN) +
456 EFX_MAX_FRAME_LEN(efx->net_dev->mtu) +
457 efx->type->rx_buffer_padding);
458 efx->rx_buffer_order = get_order(efx->rx_buffer_len);
460 /* Initialise the channels */
461 efx_for_each_channel(channel, efx) {
462 EFX_LOG(channel->efx, "init chan %d\n", channel->channel);
464 efx_init_eventq(channel);
466 efx_for_each_channel_tx_queue(tx_queue, channel)
467 efx_init_tx_queue(tx_queue);
469 /* The rx buffer allocation strategy is MTU dependent */
470 efx_rx_strategy(channel);
472 efx_for_each_channel_rx_queue(rx_queue, channel)
473 efx_init_rx_queue(rx_queue);
475 WARN_ON(channel->rx_pkt != NULL);
476 efx_rx_strategy(channel);
480 /* This enables event queue processing and packet transmission.
482 * Note that this function is not allowed to fail, since that would
483 * introduce too much complexity into the suspend/resume path.
485 static void efx_start_channel(struct efx_channel *channel)
487 struct efx_rx_queue *rx_queue;
489 EFX_LOG(channel->efx, "starting chan %d\n", channel->channel);
491 /* The interrupt handler for this channel may set work_pending
492 * as soon as we enable it. Make sure it's cleared before
493 * then. Similarly, make sure it sees the enabled flag set. */
494 channel->work_pending = false;
495 channel->enabled = true;
496 smp_wmb();
498 napi_enable(&channel->napi_str);
500 /* Load up RX descriptors */
501 efx_for_each_channel_rx_queue(rx_queue, channel)
502 efx_fast_push_rx_descriptors(rx_queue);
505 /* This disables event queue processing and packet transmission.
506 * This function does not guarantee that all queue processing
507 * (e.g. RX refill) is complete.
509 static void efx_stop_channel(struct efx_channel *channel)
511 struct efx_rx_queue *rx_queue;
513 if (!channel->enabled)
514 return;
516 EFX_LOG(channel->efx, "stop chan %d\n", channel->channel);
518 channel->enabled = false;
519 napi_disable(&channel->napi_str);
521 /* Ensure that any worker threads have exited or will be no-ops */
522 efx_for_each_channel_rx_queue(rx_queue, channel) {
523 spin_lock_bh(&rx_queue->add_lock);
524 spin_unlock_bh(&rx_queue->add_lock);
528 static void efx_fini_channels(struct efx_nic *efx)
530 struct efx_channel *channel;
531 struct efx_tx_queue *tx_queue;
532 struct efx_rx_queue *rx_queue;
533 int rc;
535 EFX_ASSERT_RESET_SERIALISED(efx);
536 BUG_ON(efx->port_enabled);
538 rc = falcon_flush_queues(efx);
539 if (rc)
540 EFX_ERR(efx, "failed to flush queues\n");
541 else
542 EFX_LOG(efx, "successfully flushed all queues\n");
544 efx_for_each_channel(channel, efx) {
545 EFX_LOG(channel->efx, "shut down chan %d\n", channel->channel);
547 efx_for_each_channel_rx_queue(rx_queue, channel)
548 efx_fini_rx_queue(rx_queue);
549 efx_for_each_channel_tx_queue(tx_queue, channel)
550 efx_fini_tx_queue(tx_queue);
551 efx_fini_eventq(channel);
555 static void efx_remove_channel(struct efx_channel *channel)
557 struct efx_tx_queue *tx_queue;
558 struct efx_rx_queue *rx_queue;
560 EFX_LOG(channel->efx, "destroy chan %d\n", channel->channel);
562 efx_for_each_channel_rx_queue(rx_queue, channel)
563 efx_remove_rx_queue(rx_queue);
564 efx_for_each_channel_tx_queue(tx_queue, channel)
565 efx_remove_tx_queue(tx_queue);
566 efx_remove_eventq(channel);
568 channel->used_flags = 0;
571 void efx_schedule_slow_fill(struct efx_rx_queue *rx_queue, int delay)
573 queue_delayed_work(refill_workqueue, &rx_queue->work, delay);
576 /**************************************************************************
578 * Port handling
580 **************************************************************************/
582 /* This ensures that the kernel is kept informed (via
583 * netif_carrier_on/off) of the link status, and also maintains the
584 * link status's stop on the port's TX queue.
586 static void efx_link_status_changed(struct efx_nic *efx)
588 struct efx_link_state *link_state = &efx->link_state;
590 /* SFC Bug 5356: A net_dev notifier is registered, so we must ensure
591 * that no events are triggered between unregister_netdev() and the
592 * driver unloading. A more general condition is that NETDEV_CHANGE
593 * can only be generated between NETDEV_UP and NETDEV_DOWN */
594 if (!netif_running(efx->net_dev))
595 return;
597 if (efx->port_inhibited) {
598 netif_carrier_off(efx->net_dev);
599 return;
602 if (link_state->up != netif_carrier_ok(efx->net_dev)) {
603 efx->n_link_state_changes++;
605 if (link_state->up)
606 netif_carrier_on(efx->net_dev);
607 else
608 netif_carrier_off(efx->net_dev);
611 /* Status message for kernel log */
612 if (link_state->up) {
613 EFX_INFO(efx, "link up at %uMbps %s-duplex (MTU %d)%s\n",
614 link_state->speed, link_state->fd ? "full" : "half",
615 efx->net_dev->mtu,
616 (efx->promiscuous ? " [PROMISC]" : ""));
617 } else {
618 EFX_INFO(efx, "link down\n");
623 static void efx_fini_port(struct efx_nic *efx);
625 /* This call reinitialises the MAC to pick up new PHY settings. The
626 * caller must hold the mac_lock */
627 void __efx_reconfigure_port(struct efx_nic *efx)
629 WARN_ON(!mutex_is_locked(&efx->mac_lock));
631 EFX_LOG(efx, "reconfiguring MAC from PHY settings on CPU %d\n",
632 raw_smp_processor_id());
634 /* Serialise the promiscuous flag with efx_set_multicast_list. */
635 if (efx_dev_registered(efx)) {
636 netif_addr_lock_bh(efx->net_dev);
637 netif_addr_unlock_bh(efx->net_dev);
640 falcon_stop_nic_stats(efx);
641 falcon_deconfigure_mac_wrapper(efx);
643 /* Reconfigure the PHY, disabling transmit in mac level loopback. */
644 if (LOOPBACK_INTERNAL(efx))
645 efx->phy_mode |= PHY_MODE_TX_DISABLED;
646 else
647 efx->phy_mode &= ~PHY_MODE_TX_DISABLED;
648 efx->phy_op->reconfigure(efx);
650 if (falcon_switch_mac(efx))
651 goto fail;
653 efx->mac_op->reconfigure(efx);
655 falcon_start_nic_stats(efx);
657 /* Inform kernel of loss/gain of carrier */
658 efx_link_status_changed(efx);
659 return;
661 fail:
662 EFX_ERR(efx, "failed to reconfigure MAC\n");
663 efx->port_enabled = false;
664 efx_fini_port(efx);
667 /* Reinitialise the MAC to pick up new PHY settings, even if the port is
668 * disabled. */
669 void efx_reconfigure_port(struct efx_nic *efx)
671 EFX_ASSERT_RESET_SERIALISED(efx);
673 mutex_lock(&efx->mac_lock);
674 __efx_reconfigure_port(efx);
675 mutex_unlock(&efx->mac_lock);
678 /* Asynchronous efx_reconfigure_port work item. To speed up efx_flush_all()
679 * we don't efx_reconfigure_port() if the port is disabled. Care is taken
680 * in efx_stop_all() and efx_start_port() to prevent PHY events being lost */
681 static void efx_phy_work(struct work_struct *data)
683 struct efx_nic *efx = container_of(data, struct efx_nic, phy_work);
685 mutex_lock(&efx->mac_lock);
686 if (efx->port_enabled)
687 __efx_reconfigure_port(efx);
688 mutex_unlock(&efx->mac_lock);
691 static void efx_mac_work(struct work_struct *data)
693 struct efx_nic *efx = container_of(data, struct efx_nic, mac_work);
695 mutex_lock(&efx->mac_lock);
696 if (efx->port_enabled)
697 efx->mac_op->irq(efx);
698 mutex_unlock(&efx->mac_lock);
701 static int efx_probe_port(struct efx_nic *efx)
703 int rc;
705 EFX_LOG(efx, "create port\n");
707 /* Connect up MAC/PHY operations table and read MAC address */
708 rc = falcon_probe_port(efx);
709 if (rc)
710 goto err;
712 if (phy_flash_cfg)
713 efx->phy_mode = PHY_MODE_SPECIAL;
715 /* Sanity check MAC address */
716 if (is_valid_ether_addr(efx->mac_address)) {
717 memcpy(efx->net_dev->dev_addr, efx->mac_address, ETH_ALEN);
718 } else {
719 EFX_ERR(efx, "invalid MAC address %pM\n",
720 efx->mac_address);
721 if (!allow_bad_hwaddr) {
722 rc = -EINVAL;
723 goto err;
725 random_ether_addr(efx->net_dev->dev_addr);
726 EFX_INFO(efx, "using locally-generated MAC %pM\n",
727 efx->net_dev->dev_addr);
730 return 0;
732 err:
733 efx_remove_port(efx);
734 return rc;
737 static int efx_init_port(struct efx_nic *efx)
739 int rc;
741 EFX_LOG(efx, "init port\n");
743 mutex_lock(&efx->mac_lock);
745 rc = efx->phy_op->init(efx);
746 if (rc)
747 goto fail1;
748 efx->phy_op->reconfigure(efx);
749 rc = falcon_switch_mac(efx);
750 if (rc)
751 goto fail2;
752 efx->mac_op->reconfigure(efx);
754 efx->port_initialized = true;
756 mutex_unlock(&efx->mac_lock);
757 return 0;
759 fail2:
760 efx->phy_op->fini(efx);
761 fail1:
762 mutex_unlock(&efx->mac_lock);
763 return rc;
766 /* Allow efx_reconfigure_port() to be scheduled, and close the window
767 * between efx_stop_port and efx_flush_all whereby a previously scheduled
768 * efx_phy_work()/efx_mac_work() may have been cancelled */
769 static void efx_start_port(struct efx_nic *efx)
771 EFX_LOG(efx, "start port\n");
772 BUG_ON(efx->port_enabled);
774 mutex_lock(&efx->mac_lock);
775 efx->port_enabled = true;
776 __efx_reconfigure_port(efx);
777 efx->mac_op->irq(efx);
778 mutex_unlock(&efx->mac_lock);
781 /* Prevent efx_phy_work, efx_mac_work, and efx_monitor() from executing,
782 * and efx_set_multicast_list() from scheduling efx_phy_work. efx_phy_work
783 * and efx_mac_work may still be scheduled via NAPI processing until
784 * efx_flush_all() is called */
785 static void efx_stop_port(struct efx_nic *efx)
787 EFX_LOG(efx, "stop port\n");
789 mutex_lock(&efx->mac_lock);
790 efx->port_enabled = false;
791 mutex_unlock(&efx->mac_lock);
793 /* Serialise against efx_set_multicast_list() */
794 if (efx_dev_registered(efx)) {
795 netif_addr_lock_bh(efx->net_dev);
796 netif_addr_unlock_bh(efx->net_dev);
800 static void efx_fini_port(struct efx_nic *efx)
802 EFX_LOG(efx, "shut down port\n");
804 if (!efx->port_initialized)
805 return;
807 efx->phy_op->fini(efx);
808 efx->port_initialized = false;
810 efx->link_state.up = false;
811 efx_link_status_changed(efx);
814 static void efx_remove_port(struct efx_nic *efx)
816 EFX_LOG(efx, "destroying port\n");
818 falcon_remove_port(efx);
821 /**************************************************************************
823 * NIC handling
825 **************************************************************************/
827 /* This configures the PCI device to enable I/O and DMA. */
828 static int efx_init_io(struct efx_nic *efx)
830 struct pci_dev *pci_dev = efx->pci_dev;
831 dma_addr_t dma_mask = efx->type->max_dma_mask;
832 int rc;
834 EFX_LOG(efx, "initialising I/O\n");
836 rc = pci_enable_device(pci_dev);
837 if (rc) {
838 EFX_ERR(efx, "failed to enable PCI device\n");
839 goto fail1;
842 pci_set_master(pci_dev);
844 /* Set the PCI DMA mask. Try all possibilities from our
845 * genuine mask down to 32 bits, because some architectures
846 * (e.g. x86_64 with iommu_sac_force set) will allow 40 bit
847 * masks event though they reject 46 bit masks.
849 while (dma_mask > 0x7fffffffUL) {
850 if (pci_dma_supported(pci_dev, dma_mask) &&
851 ((rc = pci_set_dma_mask(pci_dev, dma_mask)) == 0))
852 break;
853 dma_mask >>= 1;
855 if (rc) {
856 EFX_ERR(efx, "could not find a suitable DMA mask\n");
857 goto fail2;
859 EFX_LOG(efx, "using DMA mask %llx\n", (unsigned long long) dma_mask);
860 rc = pci_set_consistent_dma_mask(pci_dev, dma_mask);
861 if (rc) {
862 /* pci_set_consistent_dma_mask() is not *allowed* to
863 * fail with a mask that pci_set_dma_mask() accepted,
864 * but just in case...
866 EFX_ERR(efx, "failed to set consistent DMA mask\n");
867 goto fail2;
870 efx->membase_phys = pci_resource_start(efx->pci_dev, EFX_MEM_BAR);
871 rc = pci_request_region(pci_dev, EFX_MEM_BAR, "sfc");
872 if (rc) {
873 EFX_ERR(efx, "request for memory BAR failed\n");
874 rc = -EIO;
875 goto fail3;
877 efx->membase = ioremap_nocache(efx->membase_phys,
878 efx->type->mem_map_size);
879 if (!efx->membase) {
880 EFX_ERR(efx, "could not map memory BAR at %llx+%x\n",
881 (unsigned long long)efx->membase_phys,
882 efx->type->mem_map_size);
883 rc = -ENOMEM;
884 goto fail4;
886 EFX_LOG(efx, "memory BAR at %llx+%x (virtual %p)\n",
887 (unsigned long long)efx->membase_phys,
888 efx->type->mem_map_size, efx->membase);
890 return 0;
892 fail4:
893 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
894 fail3:
895 efx->membase_phys = 0;
896 fail2:
897 pci_disable_device(efx->pci_dev);
898 fail1:
899 return rc;
902 static void efx_fini_io(struct efx_nic *efx)
904 EFX_LOG(efx, "shutting down I/O\n");
906 if (efx->membase) {
907 iounmap(efx->membase);
908 efx->membase = NULL;
911 if (efx->membase_phys) {
912 pci_release_region(efx->pci_dev, EFX_MEM_BAR);
913 efx->membase_phys = 0;
916 pci_disable_device(efx->pci_dev);
919 /* Get number of RX queues wanted. Return number of online CPU
920 * packages in the expectation that an IRQ balancer will spread
921 * interrupts across them. */
922 static int efx_wanted_rx_queues(void)
924 cpumask_var_t core_mask;
925 int count;
926 int cpu;
928 if (unlikely(!zalloc_cpumask_var(&core_mask, GFP_KERNEL))) {
929 printk(KERN_WARNING
930 "sfc: RSS disabled due to allocation failure\n");
931 return 1;
934 count = 0;
935 for_each_online_cpu(cpu) {
936 if (!cpumask_test_cpu(cpu, core_mask)) {
937 ++count;
938 cpumask_or(core_mask, core_mask,
939 topology_core_cpumask(cpu));
943 free_cpumask_var(core_mask);
944 return count;
947 /* Probe the number and type of interrupts we are able to obtain, and
948 * the resulting numbers of channels and RX queues.
950 static void efx_probe_interrupts(struct efx_nic *efx)
952 int max_channels =
953 min_t(int, efx->type->phys_addr_channels, EFX_MAX_CHANNELS);
954 int rc, i;
956 if (efx->interrupt_mode == EFX_INT_MODE_MSIX) {
957 struct msix_entry xentries[EFX_MAX_CHANNELS];
958 int wanted_ints;
959 int rx_queues;
961 /* We want one RX queue and interrupt per CPU package
962 * (or as specified by the rss_cpus module parameter).
963 * We will need one channel per interrupt.
965 rx_queues = rss_cpus ? rss_cpus : efx_wanted_rx_queues();
966 wanted_ints = rx_queues + (separate_tx_channels ? 1 : 0);
967 wanted_ints = min(wanted_ints, max_channels);
969 for (i = 0; i < wanted_ints; i++)
970 xentries[i].entry = i;
971 rc = pci_enable_msix(efx->pci_dev, xentries, wanted_ints);
972 if (rc > 0) {
973 EFX_ERR(efx, "WARNING: Insufficient MSI-X vectors"
974 " available (%d < %d).\n", rc, wanted_ints);
975 EFX_ERR(efx, "WARNING: Performance may be reduced.\n");
976 EFX_BUG_ON_PARANOID(rc >= wanted_ints);
977 wanted_ints = rc;
978 rc = pci_enable_msix(efx->pci_dev, xentries,
979 wanted_ints);
982 if (rc == 0) {
983 efx->n_rx_queues = min(rx_queues, wanted_ints);
984 efx->n_channels = wanted_ints;
985 for (i = 0; i < wanted_ints; i++)
986 efx->channel[i].irq = xentries[i].vector;
987 } else {
988 /* Fall back to single channel MSI */
989 efx->interrupt_mode = EFX_INT_MODE_MSI;
990 EFX_ERR(efx, "could not enable MSI-X\n");
994 /* Try single interrupt MSI */
995 if (efx->interrupt_mode == EFX_INT_MODE_MSI) {
996 efx->n_rx_queues = 1;
997 efx->n_channels = 1;
998 rc = pci_enable_msi(efx->pci_dev);
999 if (rc == 0) {
1000 efx->channel[0].irq = efx->pci_dev->irq;
1001 } else {
1002 EFX_ERR(efx, "could not enable MSI\n");
1003 efx->interrupt_mode = EFX_INT_MODE_LEGACY;
1007 /* Assume legacy interrupts */
1008 if (efx->interrupt_mode == EFX_INT_MODE_LEGACY) {
1009 efx->n_rx_queues = 1;
1010 efx->n_channels = 1 + (separate_tx_channels ? 1 : 0);
1011 efx->legacy_irq = efx->pci_dev->irq;
1015 static void efx_remove_interrupts(struct efx_nic *efx)
1017 struct efx_channel *channel;
1019 /* Remove MSI/MSI-X interrupts */
1020 efx_for_each_channel(channel, efx)
1021 channel->irq = 0;
1022 pci_disable_msi(efx->pci_dev);
1023 pci_disable_msix(efx->pci_dev);
1025 /* Remove legacy interrupt */
1026 efx->legacy_irq = 0;
1029 static void efx_set_channels(struct efx_nic *efx)
1031 struct efx_tx_queue *tx_queue;
1032 struct efx_rx_queue *rx_queue;
1034 efx_for_each_tx_queue(tx_queue, efx) {
1035 if (separate_tx_channels)
1036 tx_queue->channel = &efx->channel[efx->n_channels-1];
1037 else
1038 tx_queue->channel = &efx->channel[0];
1039 tx_queue->channel->used_flags |= EFX_USED_BY_TX;
1042 efx_for_each_rx_queue(rx_queue, efx) {
1043 rx_queue->channel = &efx->channel[rx_queue->queue];
1044 rx_queue->channel->used_flags |= EFX_USED_BY_RX;
1048 static int efx_probe_nic(struct efx_nic *efx)
1050 int rc;
1052 EFX_LOG(efx, "creating NIC\n");
1054 /* Carry out hardware-type specific initialisation */
1055 rc = falcon_probe_nic(efx);
1056 if (rc)
1057 return rc;
1059 /* Determine the number of channels and RX queues by trying to hook
1060 * in MSI-X interrupts. */
1061 efx_probe_interrupts(efx);
1063 efx_set_channels(efx);
1065 /* Initialise the interrupt moderation settings */
1066 efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true);
1068 return 0;
1071 static void efx_remove_nic(struct efx_nic *efx)
1073 EFX_LOG(efx, "destroying NIC\n");
1075 efx_remove_interrupts(efx);
1076 falcon_remove_nic(efx);
1079 /**************************************************************************
1081 * NIC startup/shutdown
1083 *************************************************************************/
1085 static int efx_probe_all(struct efx_nic *efx)
1087 struct efx_channel *channel;
1088 int rc;
1090 /* Create NIC */
1091 rc = efx_probe_nic(efx);
1092 if (rc) {
1093 EFX_ERR(efx, "failed to create NIC\n");
1094 goto fail1;
1097 /* Create port */
1098 rc = efx_probe_port(efx);
1099 if (rc) {
1100 EFX_ERR(efx, "failed to create port\n");
1101 goto fail2;
1104 /* Create channels */
1105 efx_for_each_channel(channel, efx) {
1106 rc = efx_probe_channel(channel);
1107 if (rc) {
1108 EFX_ERR(efx, "failed to create channel %d\n",
1109 channel->channel);
1110 goto fail3;
1113 efx_set_channel_names(efx);
1115 return 0;
1117 fail3:
1118 efx_for_each_channel(channel, efx)
1119 efx_remove_channel(channel);
1120 efx_remove_port(efx);
1121 fail2:
1122 efx_remove_nic(efx);
1123 fail1:
1124 return rc;
1127 /* Called after previous invocation(s) of efx_stop_all, restarts the
1128 * port, kernel transmit queue, NAPI processing and hardware interrupts,
1129 * and ensures that the port is scheduled to be reconfigured.
1130 * This function is safe to call multiple times when the NIC is in any
1131 * state. */
1132 static void efx_start_all(struct efx_nic *efx)
1134 struct efx_channel *channel;
1136 EFX_ASSERT_RESET_SERIALISED(efx);
1138 /* Check that it is appropriate to restart the interface. All
1139 * of these flags are safe to read under just the rtnl lock */
1140 if (efx->port_enabled)
1141 return;
1142 if ((efx->state != STATE_RUNNING) && (efx->state != STATE_INIT))
1143 return;
1144 if (efx_dev_registered(efx) && !netif_running(efx->net_dev))
1145 return;
1147 /* Mark the port as enabled so port reconfigurations can start, then
1148 * restart the transmit interface early so the watchdog timer stops */
1149 efx_start_port(efx);
1150 if (efx_dev_registered(efx))
1151 efx_wake_queue(efx);
1153 efx_for_each_channel(channel, efx)
1154 efx_start_channel(channel);
1156 falcon_enable_interrupts(efx);
1158 /* Start hardware monitor if we're in RUNNING */
1159 if (efx->state == STATE_RUNNING)
1160 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1161 efx_monitor_interval);
1163 falcon_start_nic_stats(efx);
1166 /* Flush all delayed work. Should only be called when no more delayed work
1167 * will be scheduled. This doesn't flush pending online resets (efx_reset),
1168 * since we're holding the rtnl_lock at this point. */
1169 static void efx_flush_all(struct efx_nic *efx)
1171 struct efx_rx_queue *rx_queue;
1173 /* Make sure the hardware monitor is stopped */
1174 cancel_delayed_work_sync(&efx->monitor_work);
1176 /* Ensure that all RX slow refills are complete. */
1177 efx_for_each_rx_queue(rx_queue, efx)
1178 cancel_delayed_work_sync(&rx_queue->work);
1180 /* Stop scheduled port reconfigurations */
1181 cancel_work_sync(&efx->mac_work);
1182 cancel_work_sync(&efx->phy_work);
1186 /* Quiesce hardware and software without bringing the link down.
1187 * Safe to call multiple times, when the nic and interface is in any
1188 * state. The caller is guaranteed to subsequently be in a position
1189 * to modify any hardware and software state they see fit without
1190 * taking locks. */
1191 static void efx_stop_all(struct efx_nic *efx)
1193 struct efx_channel *channel;
1195 EFX_ASSERT_RESET_SERIALISED(efx);
1197 /* port_enabled can be read safely under the rtnl lock */
1198 if (!efx->port_enabled)
1199 return;
1201 falcon_stop_nic_stats(efx);
1203 /* Disable interrupts and wait for ISR to complete */
1204 falcon_disable_interrupts(efx);
1205 if (efx->legacy_irq)
1206 synchronize_irq(efx->legacy_irq);
1207 efx_for_each_channel(channel, efx) {
1208 if (channel->irq)
1209 synchronize_irq(channel->irq);
1212 /* Stop all NAPI processing and synchronous rx refills */
1213 efx_for_each_channel(channel, efx)
1214 efx_stop_channel(channel);
1216 /* Stop all asynchronous port reconfigurations. Since all
1217 * event processing has already been stopped, there is no
1218 * window to loose phy events */
1219 efx_stop_port(efx);
1221 /* Flush efx_phy_work, efx_mac_work, refill_workqueue, monitor_work */
1222 efx_flush_all(efx);
1224 /* Isolate the MAC from the TX and RX engines, so that queue
1225 * flushes will complete in a timely fashion. */
1226 falcon_deconfigure_mac_wrapper(efx);
1227 msleep(10); /* Let the Rx FIFO drain */
1228 falcon_drain_tx_fifo(efx);
1230 /* Stop the kernel transmit interface late, so the watchdog
1231 * timer isn't ticking over the flush */
1232 if (efx_dev_registered(efx)) {
1233 efx_stop_queue(efx);
1234 netif_tx_lock_bh(efx->net_dev);
1235 netif_tx_unlock_bh(efx->net_dev);
1239 static void efx_remove_all(struct efx_nic *efx)
1241 struct efx_channel *channel;
1243 efx_for_each_channel(channel, efx)
1244 efx_remove_channel(channel);
1245 efx_remove_port(efx);
1246 efx_remove_nic(efx);
1249 /**************************************************************************
1251 * Interrupt moderation
1253 **************************************************************************/
1255 static unsigned irq_mod_ticks(int usecs, int resolution)
1257 if (usecs <= 0)
1258 return 0; /* cannot receive interrupts ahead of time :-) */
1259 if (usecs < resolution)
1260 return 1; /* never round down to 0 */
1261 return usecs / resolution;
1264 /* Set interrupt moderation parameters */
1265 void efx_init_irq_moderation(struct efx_nic *efx, int tx_usecs, int rx_usecs,
1266 bool rx_adaptive)
1268 struct efx_tx_queue *tx_queue;
1269 struct efx_rx_queue *rx_queue;
1270 unsigned tx_ticks = irq_mod_ticks(tx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1271 unsigned rx_ticks = irq_mod_ticks(rx_usecs, FALCON_IRQ_MOD_RESOLUTION);
1273 EFX_ASSERT_RESET_SERIALISED(efx);
1275 efx_for_each_tx_queue(tx_queue, efx)
1276 tx_queue->channel->irq_moderation = tx_ticks;
1278 efx->irq_rx_adaptive = rx_adaptive;
1279 efx->irq_rx_moderation = rx_ticks;
1280 efx_for_each_rx_queue(rx_queue, efx)
1281 rx_queue->channel->irq_moderation = rx_ticks;
1284 /**************************************************************************
1286 * Hardware monitor
1288 **************************************************************************/
1290 /* Run periodically off the general workqueue. Serialised against
1291 * efx_reconfigure_port via the mac_lock */
1292 static void efx_monitor(struct work_struct *data)
1294 struct efx_nic *efx = container_of(data, struct efx_nic,
1295 monitor_work.work);
1296 int rc;
1298 EFX_TRACE(efx, "hardware monitor executing on CPU %d\n",
1299 raw_smp_processor_id());
1301 /* If the mac_lock is already held then it is likely a port
1302 * reconfiguration is already in place, which will likely do
1303 * most of the work of check_hw() anyway. */
1304 if (!mutex_trylock(&efx->mac_lock))
1305 goto out_requeue;
1306 if (!efx->port_enabled)
1307 goto out_unlock;
1308 rc = falcon_board(efx)->type->monitor(efx);
1309 if (rc) {
1310 EFX_ERR(efx, "Board sensor %s; shutting down PHY\n",
1311 (rc == -ERANGE) ? "reported fault" : "failed");
1312 efx->phy_mode |= PHY_MODE_LOW_POWER;
1313 falcon_sim_phy_event(efx);
1315 efx->phy_op->poll(efx);
1316 efx->mac_op->poll(efx);
1318 out_unlock:
1319 mutex_unlock(&efx->mac_lock);
1320 out_requeue:
1321 queue_delayed_work(efx->workqueue, &efx->monitor_work,
1322 efx_monitor_interval);
1325 /**************************************************************************
1327 * ioctls
1329 *************************************************************************/
1331 /* Net device ioctl
1332 * Context: process, rtnl_lock() held.
1334 static int efx_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
1336 struct efx_nic *efx = netdev_priv(net_dev);
1337 struct mii_ioctl_data *data = if_mii(ifr);
1339 EFX_ASSERT_RESET_SERIALISED(efx);
1341 /* Convert phy_id from older PRTAD/DEVAD format */
1342 if ((cmd == SIOCGMIIREG || cmd == SIOCSMIIREG) &&
1343 (data->phy_id & 0xfc00) == 0x0400)
1344 data->phy_id ^= MDIO_PHY_ID_C45 | 0x0400;
1346 return mdio_mii_ioctl(&efx->mdio, data, cmd);
1349 /**************************************************************************
1351 * NAPI interface
1353 **************************************************************************/
1355 static int efx_init_napi(struct efx_nic *efx)
1357 struct efx_channel *channel;
1359 efx_for_each_channel(channel, efx) {
1360 channel->napi_dev = efx->net_dev;
1361 netif_napi_add(channel->napi_dev, &channel->napi_str,
1362 efx_poll, napi_weight);
1364 return 0;
1367 static void efx_fini_napi(struct efx_nic *efx)
1369 struct efx_channel *channel;
1371 efx_for_each_channel(channel, efx) {
1372 if (channel->napi_dev)
1373 netif_napi_del(&channel->napi_str);
1374 channel->napi_dev = NULL;
1378 /**************************************************************************
1380 * Kernel netpoll interface
1382 *************************************************************************/
1384 #ifdef CONFIG_NET_POLL_CONTROLLER
1386 /* Although in the common case interrupts will be disabled, this is not
1387 * guaranteed. However, all our work happens inside the NAPI callback,
1388 * so no locking is required.
1390 static void efx_netpoll(struct net_device *net_dev)
1392 struct efx_nic *efx = netdev_priv(net_dev);
1393 struct efx_channel *channel;
1395 efx_for_each_channel(channel, efx)
1396 efx_schedule_channel(channel);
1399 #endif
1401 /**************************************************************************
1403 * Kernel net device interface
1405 *************************************************************************/
1407 /* Context: process, rtnl_lock() held. */
1408 static int efx_net_open(struct net_device *net_dev)
1410 struct efx_nic *efx = netdev_priv(net_dev);
1411 EFX_ASSERT_RESET_SERIALISED(efx);
1413 EFX_LOG(efx, "opening device %s on CPU %d\n", net_dev->name,
1414 raw_smp_processor_id());
1416 if (efx->state == STATE_DISABLED)
1417 return -EIO;
1418 if (efx->phy_mode & PHY_MODE_SPECIAL)
1419 return -EBUSY;
1421 efx_start_all(efx);
1422 return 0;
1425 /* Context: process, rtnl_lock() held.
1426 * Note that the kernel will ignore our return code; this method
1427 * should really be a void.
1429 static int efx_net_stop(struct net_device *net_dev)
1431 struct efx_nic *efx = netdev_priv(net_dev);
1433 EFX_LOG(efx, "closing %s on CPU %d\n", net_dev->name,
1434 raw_smp_processor_id());
1436 if (efx->state != STATE_DISABLED) {
1437 /* Stop the device and flush all the channels */
1438 efx_stop_all(efx);
1439 efx_fini_channels(efx);
1440 efx_init_channels(efx);
1443 return 0;
1446 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
1447 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
1449 struct efx_nic *efx = netdev_priv(net_dev);
1450 struct efx_mac_stats *mac_stats = &efx->mac_stats;
1451 struct net_device_stats *stats = &net_dev->stats;
1453 spin_lock_bh(&efx->stats_lock);
1454 falcon_update_nic_stats(efx);
1455 spin_unlock_bh(&efx->stats_lock);
1457 stats->rx_packets = mac_stats->rx_packets;
1458 stats->tx_packets = mac_stats->tx_packets;
1459 stats->rx_bytes = mac_stats->rx_bytes;
1460 stats->tx_bytes = mac_stats->tx_bytes;
1461 stats->multicast = mac_stats->rx_multicast;
1462 stats->collisions = mac_stats->tx_collision;
1463 stats->rx_length_errors = (mac_stats->rx_gtjumbo +
1464 mac_stats->rx_length_error);
1465 stats->rx_over_errors = efx->n_rx_nodesc_drop_cnt;
1466 stats->rx_crc_errors = mac_stats->rx_bad;
1467 stats->rx_frame_errors = mac_stats->rx_align_error;
1468 stats->rx_fifo_errors = mac_stats->rx_overflow;
1469 stats->rx_missed_errors = mac_stats->rx_missed;
1470 stats->tx_window_errors = mac_stats->tx_late_collision;
1472 stats->rx_errors = (stats->rx_length_errors +
1473 stats->rx_over_errors +
1474 stats->rx_crc_errors +
1475 stats->rx_frame_errors +
1476 stats->rx_fifo_errors +
1477 stats->rx_missed_errors +
1478 mac_stats->rx_symbol_error);
1479 stats->tx_errors = (stats->tx_window_errors +
1480 mac_stats->tx_bad);
1482 return stats;
1485 /* Context: netif_tx_lock held, BHs disabled. */
1486 static void efx_watchdog(struct net_device *net_dev)
1488 struct efx_nic *efx = netdev_priv(net_dev);
1490 EFX_ERR(efx, "TX stuck with stop_count=%d port_enabled=%d:"
1491 " resetting channels\n",
1492 atomic_read(&efx->netif_stop_count), efx->port_enabled);
1494 efx_schedule_reset(efx, RESET_TYPE_TX_WATCHDOG);
1498 /* Context: process, rtnl_lock() held. */
1499 static int efx_change_mtu(struct net_device *net_dev, int new_mtu)
1501 struct efx_nic *efx = netdev_priv(net_dev);
1502 int rc = 0;
1504 EFX_ASSERT_RESET_SERIALISED(efx);
1506 if (new_mtu > EFX_MAX_MTU)
1507 return -EINVAL;
1509 efx_stop_all(efx);
1511 EFX_LOG(efx, "changing MTU to %d\n", new_mtu);
1513 efx_fini_channels(efx);
1514 net_dev->mtu = new_mtu;
1515 efx_init_channels(efx);
1517 efx_start_all(efx);
1518 return rc;
1521 static int efx_set_mac_address(struct net_device *net_dev, void *data)
1523 struct efx_nic *efx = netdev_priv(net_dev);
1524 struct sockaddr *addr = data;
1525 char *new_addr = addr->sa_data;
1527 EFX_ASSERT_RESET_SERIALISED(efx);
1529 if (!is_valid_ether_addr(new_addr)) {
1530 EFX_ERR(efx, "invalid ethernet MAC address requested: %pM\n",
1531 new_addr);
1532 return -EINVAL;
1535 memcpy(net_dev->dev_addr, new_addr, net_dev->addr_len);
1537 /* Reconfigure the MAC */
1538 efx_reconfigure_port(efx);
1540 return 0;
1543 /* Context: netif_addr_lock held, BHs disabled. */
1544 static void efx_set_multicast_list(struct net_device *net_dev)
1546 struct efx_nic *efx = netdev_priv(net_dev);
1547 struct dev_mc_list *mc_list = net_dev->mc_list;
1548 union efx_multicast_hash *mc_hash = &efx->multicast_hash;
1549 bool promiscuous = !!(net_dev->flags & IFF_PROMISC);
1550 bool changed = (efx->promiscuous != promiscuous);
1551 u32 crc;
1552 int bit;
1553 int i;
1555 efx->promiscuous = promiscuous;
1557 /* Build multicast hash table */
1558 if (promiscuous || (net_dev->flags & IFF_ALLMULTI)) {
1559 memset(mc_hash, 0xff, sizeof(*mc_hash));
1560 } else {
1561 memset(mc_hash, 0x00, sizeof(*mc_hash));
1562 for (i = 0; i < net_dev->mc_count; i++) {
1563 crc = ether_crc_le(ETH_ALEN, mc_list->dmi_addr);
1564 bit = crc & (EFX_MCAST_HASH_ENTRIES - 1);
1565 set_bit_le(bit, mc_hash->byte);
1566 mc_list = mc_list->next;
1570 if (!efx->port_enabled)
1571 /* Delay pushing settings until efx_start_port() */
1572 return;
1574 if (changed)
1575 queue_work(efx->workqueue, &efx->phy_work);
1577 /* Create and activate new global multicast hash table */
1578 falcon_set_multicast_hash(efx);
1581 static const struct net_device_ops efx_netdev_ops = {
1582 .ndo_open = efx_net_open,
1583 .ndo_stop = efx_net_stop,
1584 .ndo_get_stats = efx_net_stats,
1585 .ndo_tx_timeout = efx_watchdog,
1586 .ndo_start_xmit = efx_hard_start_xmit,
1587 .ndo_validate_addr = eth_validate_addr,
1588 .ndo_do_ioctl = efx_ioctl,
1589 .ndo_change_mtu = efx_change_mtu,
1590 .ndo_set_mac_address = efx_set_mac_address,
1591 .ndo_set_multicast_list = efx_set_multicast_list,
1592 #ifdef CONFIG_NET_POLL_CONTROLLER
1593 .ndo_poll_controller = efx_netpoll,
1594 #endif
1597 static void efx_update_name(struct efx_nic *efx)
1599 strcpy(efx->name, efx->net_dev->name);
1600 efx_mtd_rename(efx);
1601 efx_set_channel_names(efx);
1604 static int efx_netdev_event(struct notifier_block *this,
1605 unsigned long event, void *ptr)
1607 struct net_device *net_dev = ptr;
1609 if (net_dev->netdev_ops == &efx_netdev_ops &&
1610 event == NETDEV_CHANGENAME)
1611 efx_update_name(netdev_priv(net_dev));
1613 return NOTIFY_DONE;
1616 static struct notifier_block efx_netdev_notifier = {
1617 .notifier_call = efx_netdev_event,
1620 static ssize_t
1621 show_phy_type(struct device *dev, struct device_attribute *attr, char *buf)
1623 struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
1624 return sprintf(buf, "%d\n", efx->phy_type);
1626 static DEVICE_ATTR(phy_type, 0644, show_phy_type, NULL);
1628 static int efx_register_netdev(struct efx_nic *efx)
1630 struct net_device *net_dev = efx->net_dev;
1631 int rc;
1633 net_dev->watchdog_timeo = 5 * HZ;
1634 net_dev->irq = efx->pci_dev->irq;
1635 net_dev->netdev_ops = &efx_netdev_ops;
1636 SET_NETDEV_DEV(net_dev, &efx->pci_dev->dev);
1637 SET_ETHTOOL_OPS(net_dev, &efx_ethtool_ops);
1639 /* Clear MAC statistics */
1640 efx->mac_op->update_stats(efx);
1641 memset(&efx->mac_stats, 0, sizeof(efx->mac_stats));
1643 rtnl_lock();
1645 rc = dev_alloc_name(net_dev, net_dev->name);
1646 if (rc < 0)
1647 goto fail_locked;
1648 efx_update_name(efx);
1650 rc = register_netdevice(net_dev);
1651 if (rc)
1652 goto fail_locked;
1654 /* Always start with carrier off; PHY events will detect the link */
1655 netif_carrier_off(efx->net_dev);
1657 rtnl_unlock();
1659 rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1660 if (rc) {
1661 EFX_ERR(efx, "failed to init net dev attributes\n");
1662 goto fail_registered;
1665 return 0;
1667 fail_locked:
1668 rtnl_unlock();
1669 EFX_ERR(efx, "could not register net dev\n");
1670 return rc;
1672 fail_registered:
1673 unregister_netdev(net_dev);
1674 return rc;
1677 static void efx_unregister_netdev(struct efx_nic *efx)
1679 struct efx_tx_queue *tx_queue;
1681 if (!efx->net_dev)
1682 return;
1684 BUG_ON(netdev_priv(efx->net_dev) != efx);
1686 /* Free up any skbs still remaining. This has to happen before
1687 * we try to unregister the netdev as running their destructors
1688 * may be needed to get the device ref. count to 0. */
1689 efx_for_each_tx_queue(tx_queue, efx)
1690 efx_release_tx_buffers(tx_queue);
1692 if (efx_dev_registered(efx)) {
1693 strlcpy(efx->name, pci_name(efx->pci_dev), sizeof(efx->name));
1694 device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_type);
1695 unregister_netdev(efx->net_dev);
1699 /**************************************************************************
1701 * Device reset and suspend
1703 **************************************************************************/
1705 /* Tears down the entire software state and most of the hardware state
1706 * before reset. */
1707 void efx_reset_down(struct efx_nic *efx, enum reset_type method,
1708 struct ethtool_cmd *ecmd)
1710 EFX_ASSERT_RESET_SERIALISED(efx);
1712 efx_stop_all(efx);
1713 mutex_lock(&efx->mac_lock);
1714 mutex_lock(&efx->spi_lock);
1716 efx->phy_op->get_settings(efx, ecmd);
1718 efx_fini_channels(efx);
1719 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
1720 efx->phy_op->fini(efx);
1723 /* This function will always ensure that the locks acquired in
1724 * efx_reset_down() are released. A failure return code indicates
1725 * that we were unable to reinitialise the hardware, and the
1726 * driver should be disabled. If ok is false, then the rx and tx
1727 * engines are not restarted, pending a RESET_DISABLE. */
1728 int efx_reset_up(struct efx_nic *efx, enum reset_type method,
1729 struct ethtool_cmd *ecmd, bool ok)
1731 int rc;
1733 EFX_ASSERT_RESET_SERIALISED(efx);
1735 rc = falcon_init_nic(efx);
1736 if (rc) {
1737 EFX_ERR(efx, "failed to initialise NIC\n");
1738 ok = false;
1741 if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
1742 if (ok) {
1743 rc = efx->phy_op->init(efx);
1744 if (rc)
1745 ok = false;
1747 if (!ok)
1748 efx->port_initialized = false;
1751 if (ok) {
1752 efx_init_channels(efx);
1754 if (efx->phy_op->set_settings(efx, ecmd))
1755 EFX_ERR(efx, "could not restore PHY settings\n");
1758 mutex_unlock(&efx->spi_lock);
1759 mutex_unlock(&efx->mac_lock);
1761 if (ok)
1762 efx_start_all(efx);
1763 return rc;
1766 /* Reset the NIC as transparently as possible. Do not reset the PHY
1767 * Note that the reset may fail, in which case the card will be left
1768 * in a most-probably-unusable state.
1770 * This function will sleep. You cannot reset from within an atomic
1771 * state; use efx_schedule_reset() instead.
1773 * Grabs the rtnl_lock.
1775 static int efx_reset(struct efx_nic *efx)
1777 struct ethtool_cmd ecmd;
1778 enum reset_type method = efx->reset_pending;
1779 int rc = 0;
1781 /* Serialise with kernel interfaces */
1782 rtnl_lock();
1784 /* If we're not RUNNING then don't reset. Leave the reset_pending
1785 * flag set so that efx_pci_probe_main will be retried */
1786 if (efx->state != STATE_RUNNING) {
1787 EFX_INFO(efx, "scheduled reset quenched. NIC not RUNNING\n");
1788 goto out_unlock;
1791 EFX_INFO(efx, "resetting (%s)\n", RESET_TYPE(method));
1793 efx_reset_down(efx, method, &ecmd);
1795 rc = falcon_reset_hw(efx, method);
1796 if (rc) {
1797 EFX_ERR(efx, "failed to reset hardware\n");
1798 goto out_disable;
1801 /* Allow resets to be rescheduled. */
1802 efx->reset_pending = RESET_TYPE_NONE;
1804 /* Reinitialise bus-mastering, which may have been turned off before
1805 * the reset was scheduled. This is still appropriate, even in the
1806 * RESET_TYPE_DISABLE since this driver generally assumes the hardware
1807 * can respond to requests. */
1808 pci_set_master(efx->pci_dev);
1810 /* Leave device stopped if necessary */
1811 if (method == RESET_TYPE_DISABLE) {
1812 efx_reset_up(efx, method, &ecmd, false);
1813 rc = -EIO;
1814 } else {
1815 rc = efx_reset_up(efx, method, &ecmd, true);
1818 out_disable:
1819 if (rc) {
1820 EFX_ERR(efx, "has been disabled\n");
1821 efx->state = STATE_DISABLED;
1822 dev_close(efx->net_dev);
1823 } else {
1824 EFX_LOG(efx, "reset complete\n");
1827 out_unlock:
1828 rtnl_unlock();
1829 return rc;
1832 /* The worker thread exists so that code that cannot sleep can
1833 * schedule a reset for later.
1835 static void efx_reset_work(struct work_struct *data)
1837 struct efx_nic *nic = container_of(data, struct efx_nic, reset_work);
1839 efx_reset(nic);
1842 void efx_schedule_reset(struct efx_nic *efx, enum reset_type type)
1844 enum reset_type method;
1846 if (efx->reset_pending != RESET_TYPE_NONE) {
1847 EFX_INFO(efx, "quenching already scheduled reset\n");
1848 return;
1851 switch (type) {
1852 case RESET_TYPE_INVISIBLE:
1853 case RESET_TYPE_ALL:
1854 case RESET_TYPE_WORLD:
1855 case RESET_TYPE_DISABLE:
1856 method = type;
1857 break;
1858 case RESET_TYPE_RX_RECOVERY:
1859 case RESET_TYPE_RX_DESC_FETCH:
1860 case RESET_TYPE_TX_DESC_FETCH:
1861 case RESET_TYPE_TX_SKIP:
1862 method = RESET_TYPE_INVISIBLE;
1863 break;
1864 default:
1865 method = RESET_TYPE_ALL;
1866 break;
1869 if (method != type)
1870 EFX_LOG(efx, "scheduling %s reset for %s\n",
1871 RESET_TYPE(method), RESET_TYPE(type));
1872 else
1873 EFX_LOG(efx, "scheduling %s reset\n", RESET_TYPE(method));
1875 efx->reset_pending = method;
1877 queue_work(reset_workqueue, &efx->reset_work);
1880 /**************************************************************************
1882 * List of NICs we support
1884 **************************************************************************/
1886 /* PCI device ID table */
1887 static struct pci_device_id efx_pci_table[] __devinitdata = {
1888 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_A_P_DEVID),
1889 .driver_data = (unsigned long) &falcon_a_nic_type},
1890 {PCI_DEVICE(EFX_VENDID_SFC, FALCON_B_P_DEVID),
1891 .driver_data = (unsigned long) &falcon_b_nic_type},
1892 {0} /* end of list */
1895 /**************************************************************************
1897 * Dummy PHY/MAC operations
1899 * Can be used for some unimplemented operations
1900 * Needed so all function pointers are valid and do not have to be tested
1901 * before use
1903 **************************************************************************/
1904 int efx_port_dummy_op_int(struct efx_nic *efx)
1906 return 0;
1908 void efx_port_dummy_op_void(struct efx_nic *efx) {}
1909 void efx_port_dummy_op_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
1913 static struct efx_mac_operations efx_dummy_mac_operations = {
1914 .reconfigure = efx_port_dummy_op_void,
1915 .poll = efx_port_dummy_op_void,
1916 .irq = efx_port_dummy_op_void,
1919 static struct efx_phy_operations efx_dummy_phy_operations = {
1920 .init = efx_port_dummy_op_int,
1921 .reconfigure = efx_port_dummy_op_void,
1922 .poll = efx_port_dummy_op_void,
1923 .fini = efx_port_dummy_op_void,
1924 .clear_interrupt = efx_port_dummy_op_void,
1927 /**************************************************************************
1929 * Data housekeeping
1931 **************************************************************************/
1933 /* This zeroes out and then fills in the invariants in a struct
1934 * efx_nic (including all sub-structures).
1936 static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
1937 struct pci_dev *pci_dev, struct net_device *net_dev)
1939 struct efx_channel *channel;
1940 struct efx_tx_queue *tx_queue;
1941 struct efx_rx_queue *rx_queue;
1942 int i;
1944 /* Initialise common structures */
1945 memset(efx, 0, sizeof(*efx));
1946 spin_lock_init(&efx->biu_lock);
1947 spin_lock_init(&efx->phy_lock);
1948 mutex_init(&efx->spi_lock);
1949 INIT_WORK(&efx->reset_work, efx_reset_work);
1950 INIT_DELAYED_WORK(&efx->monitor_work, efx_monitor);
1951 efx->pci_dev = pci_dev;
1952 efx->state = STATE_INIT;
1953 efx->reset_pending = RESET_TYPE_NONE;
1954 strlcpy(efx->name, pci_name(pci_dev), sizeof(efx->name));
1956 efx->net_dev = net_dev;
1957 efx->rx_checksum_enabled = true;
1958 spin_lock_init(&efx->netif_stop_lock);
1959 spin_lock_init(&efx->stats_lock);
1960 mutex_init(&efx->mac_lock);
1961 efx->mac_op = &efx_dummy_mac_operations;
1962 efx->phy_op = &efx_dummy_phy_operations;
1963 efx->mdio.dev = net_dev;
1964 INIT_WORK(&efx->phy_work, efx_phy_work);
1965 INIT_WORK(&efx->mac_work, efx_mac_work);
1966 atomic_set(&efx->netif_stop_count, 1);
1968 for (i = 0; i < EFX_MAX_CHANNELS; i++) {
1969 channel = &efx->channel[i];
1970 channel->efx = efx;
1971 channel->channel = i;
1972 channel->work_pending = false;
1974 for (i = 0; i < EFX_TX_QUEUE_COUNT; i++) {
1975 tx_queue = &efx->tx_queue[i];
1976 tx_queue->efx = efx;
1977 tx_queue->queue = i;
1978 tx_queue->buffer = NULL;
1979 tx_queue->channel = &efx->channel[0]; /* for safety */
1980 tx_queue->tso_headers_free = NULL;
1982 for (i = 0; i < EFX_MAX_RX_QUEUES; i++) {
1983 rx_queue = &efx->rx_queue[i];
1984 rx_queue->efx = efx;
1985 rx_queue->queue = i;
1986 rx_queue->channel = &efx->channel[0]; /* for safety */
1987 rx_queue->buffer = NULL;
1988 spin_lock_init(&rx_queue->add_lock);
1989 INIT_DELAYED_WORK(&rx_queue->work, efx_rx_work);
1992 efx->type = type;
1994 /* As close as we can get to guaranteeing that we don't overflow */
1995 BUILD_BUG_ON(EFX_EVQ_SIZE < EFX_TXQ_SIZE + EFX_RXQ_SIZE);
1997 EFX_BUG_ON_PARANOID(efx->type->phys_addr_channels > EFX_MAX_CHANNELS);
1999 /* Higher numbered interrupt modes are less capable! */
2000 efx->interrupt_mode = max(efx->type->max_interrupt_mode,
2001 interrupt_mode);
2003 /* Would be good to use the net_dev name, but we're too early */
2004 snprintf(efx->workqueue_name, sizeof(efx->workqueue_name), "sfc%s",
2005 pci_name(pci_dev));
2006 efx->workqueue = create_singlethread_workqueue(efx->workqueue_name);
2007 if (!efx->workqueue)
2008 return -ENOMEM;
2010 return 0;
2013 static void efx_fini_struct(struct efx_nic *efx)
2015 if (efx->workqueue) {
2016 destroy_workqueue(efx->workqueue);
2017 efx->workqueue = NULL;
2021 /**************************************************************************
2023 * PCI interface
2025 **************************************************************************/
2027 /* Main body of final NIC shutdown code
2028 * This is called only at module unload (or hotplug removal).
2030 static void efx_pci_remove_main(struct efx_nic *efx)
2032 falcon_fini_interrupt(efx);
2033 efx_fini_channels(efx);
2034 efx_fini_port(efx);
2035 efx_fini_napi(efx);
2036 efx_remove_all(efx);
2039 /* Final NIC shutdown
2040 * This is called only at module unload (or hotplug removal).
2042 static void efx_pci_remove(struct pci_dev *pci_dev)
2044 struct efx_nic *efx;
2046 efx = pci_get_drvdata(pci_dev);
2047 if (!efx)
2048 return;
2050 /* Mark the NIC as fini, then stop the interface */
2051 rtnl_lock();
2052 efx->state = STATE_FINI;
2053 dev_close(efx->net_dev);
2055 /* Allow any queued efx_resets() to complete */
2056 rtnl_unlock();
2058 efx_unregister_netdev(efx);
2060 efx_mtd_remove(efx);
2062 /* Wait for any scheduled resets to complete. No more will be
2063 * scheduled from this point because efx_stop_all() has been
2064 * called, we are no longer registered with driverlink, and
2065 * the net_device's have been removed. */
2066 cancel_work_sync(&efx->reset_work);
2068 efx_pci_remove_main(efx);
2070 efx_fini_io(efx);
2071 EFX_LOG(efx, "shutdown successful\n");
2073 pci_set_drvdata(pci_dev, NULL);
2074 efx_fini_struct(efx);
2075 free_netdev(efx->net_dev);
2078 /* Main body of NIC initialisation
2079 * This is called at module load (or hotplug insertion, theoretically).
2081 static int efx_pci_probe_main(struct efx_nic *efx)
2083 int rc;
2085 /* Do start-of-day initialisation */
2086 rc = efx_probe_all(efx);
2087 if (rc)
2088 goto fail1;
2090 rc = efx_init_napi(efx);
2091 if (rc)
2092 goto fail2;
2094 rc = falcon_init_nic(efx);
2095 if (rc) {
2096 EFX_ERR(efx, "failed to initialise NIC\n");
2097 goto fail3;
2100 rc = efx_init_port(efx);
2101 if (rc) {
2102 EFX_ERR(efx, "failed to initialise port\n");
2103 goto fail4;
2106 efx_init_channels(efx);
2108 rc = falcon_init_interrupt(efx);
2109 if (rc)
2110 goto fail5;
2112 return 0;
2114 fail5:
2115 efx_fini_channels(efx);
2116 efx_fini_port(efx);
2117 fail4:
2118 fail3:
2119 efx_fini_napi(efx);
2120 fail2:
2121 efx_remove_all(efx);
2122 fail1:
2123 return rc;
2126 /* NIC initialisation
2128 * This is called at module load (or hotplug insertion,
2129 * theoretically). It sets up PCI mappings, tests and resets the NIC,
2130 * sets up and registers the network devices with the kernel and hooks
2131 * the interrupt service routine. It does not prepare the device for
2132 * transmission; this is left to the first time one of the network
2133 * interfaces is brought up (i.e. efx_net_open).
2135 static int __devinit efx_pci_probe(struct pci_dev *pci_dev,
2136 const struct pci_device_id *entry)
2138 struct efx_nic_type *type = (struct efx_nic_type *) entry->driver_data;
2139 struct net_device *net_dev;
2140 struct efx_nic *efx;
2141 int i, rc;
2143 /* Allocate and initialise a struct net_device and struct efx_nic */
2144 net_dev = alloc_etherdev(sizeof(*efx));
2145 if (!net_dev)
2146 return -ENOMEM;
2147 net_dev->features |= (NETIF_F_IP_CSUM | NETIF_F_SG |
2148 NETIF_F_HIGHDMA | NETIF_F_TSO |
2149 NETIF_F_GRO);
2150 /* Mask for features that also apply to VLAN devices */
2151 net_dev->vlan_features |= (NETIF_F_ALL_CSUM | NETIF_F_SG |
2152 NETIF_F_HIGHDMA | NETIF_F_TSO);
2153 efx = netdev_priv(net_dev);
2154 pci_set_drvdata(pci_dev, efx);
2155 rc = efx_init_struct(efx, type, pci_dev, net_dev);
2156 if (rc)
2157 goto fail1;
2159 EFX_INFO(efx, "Solarflare Communications NIC detected\n");
2161 /* Set up basic I/O (BAR mappings etc) */
2162 rc = efx_init_io(efx);
2163 if (rc)
2164 goto fail2;
2166 /* No serialisation is required with the reset path because
2167 * we're in STATE_INIT. */
2168 for (i = 0; i < 5; i++) {
2169 rc = efx_pci_probe_main(efx);
2171 /* Serialise against efx_reset(). No more resets will be
2172 * scheduled since efx_stop_all() has been called, and we
2173 * have not and never have been registered with either
2174 * the rtnetlink or driverlink layers. */
2175 cancel_work_sync(&efx->reset_work);
2177 if (rc == 0) {
2178 if (efx->reset_pending != RESET_TYPE_NONE) {
2179 /* If there was a scheduled reset during
2180 * probe, the NIC is probably hosed anyway */
2181 efx_pci_remove_main(efx);
2182 rc = -EIO;
2183 } else {
2184 break;
2188 /* Retry if a recoverably reset event has been scheduled */
2189 if ((efx->reset_pending != RESET_TYPE_INVISIBLE) &&
2190 (efx->reset_pending != RESET_TYPE_ALL))
2191 goto fail3;
2193 efx->reset_pending = RESET_TYPE_NONE;
2196 if (rc) {
2197 EFX_ERR(efx, "Could not reset NIC\n");
2198 goto fail4;
2201 /* Switch to the running state before we expose the device to the OS,
2202 * so that dev_open()|efx_start_all() will actually start the device */
2203 efx->state = STATE_RUNNING;
2205 rc = efx_register_netdev(efx);
2206 if (rc)
2207 goto fail5;
2209 EFX_LOG(efx, "initialisation successful\n");
2211 rtnl_lock();
2212 efx_mtd_probe(efx); /* allowed to fail */
2213 rtnl_unlock();
2214 return 0;
2216 fail5:
2217 efx_pci_remove_main(efx);
2218 fail4:
2219 fail3:
2220 efx_fini_io(efx);
2221 fail2:
2222 efx_fini_struct(efx);
2223 fail1:
2224 EFX_LOG(efx, "initialisation failed. rc=%d\n", rc);
2225 free_netdev(net_dev);
2226 return rc;
2229 static struct pci_driver efx_pci_driver = {
2230 .name = EFX_DRIVER_NAME,
2231 .id_table = efx_pci_table,
2232 .probe = efx_pci_probe,
2233 .remove = efx_pci_remove,
2236 /**************************************************************************
2238 * Kernel module interface
2240 *************************************************************************/
2242 module_param(interrupt_mode, uint, 0444);
2243 MODULE_PARM_DESC(interrupt_mode,
2244 "Interrupt mode (0=>MSIX 1=>MSI 2=>legacy)");
2246 static int __init efx_init_module(void)
2248 int rc;
2250 printk(KERN_INFO "Solarflare NET driver v" EFX_DRIVER_VERSION "\n");
2252 rc = register_netdevice_notifier(&efx_netdev_notifier);
2253 if (rc)
2254 goto err_notifier;
2256 refill_workqueue = create_workqueue("sfc_refill");
2257 if (!refill_workqueue) {
2258 rc = -ENOMEM;
2259 goto err_refill;
2261 reset_workqueue = create_singlethread_workqueue("sfc_reset");
2262 if (!reset_workqueue) {
2263 rc = -ENOMEM;
2264 goto err_reset;
2267 rc = pci_register_driver(&efx_pci_driver);
2268 if (rc < 0)
2269 goto err_pci;
2271 return 0;
2273 err_pci:
2274 destroy_workqueue(reset_workqueue);
2275 err_reset:
2276 destroy_workqueue(refill_workqueue);
2277 err_refill:
2278 unregister_netdevice_notifier(&efx_netdev_notifier);
2279 err_notifier:
2280 return rc;
2283 static void __exit efx_exit_module(void)
2285 printk(KERN_INFO "Solarflare NET driver unloading\n");
2287 pci_unregister_driver(&efx_pci_driver);
2288 destroy_workqueue(reset_workqueue);
2289 destroy_workqueue(refill_workqueue);
2290 unregister_netdevice_notifier(&efx_netdev_notifier);
2294 module_init(efx_init_module);
2295 module_exit(efx_exit_module);
2297 MODULE_AUTHOR("Michael Brown <mbrown@fensystems.co.uk> and "
2298 "Solarflare Communications");
2299 MODULE_DESCRIPTION("Solarflare Communications network driver");
2300 MODULE_LICENSE("GPL");
2301 MODULE_DEVICE_TABLE(pci, efx_pci_table);