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[ARM] JIVE: Initialise the sleep configuration registers
[linux-2.6/btrfs-unstable.git] / include / linux / ide.h
blob9918772bf274c82e2dcf1b9d9ec1c82c1d5660d5
1 #ifndef _IDE_H
2 #define _IDE_H
3 /*
4 * linux/include/linux/ide.h
5 *
6 * Copyright (C) 1994-2002 Linus Torvalds & authors
7 */
8
9 #include <linux/init.h>
10 #include <linux/ioport.h>
11 #include <linux/hdreg.h>
12 #include <linux/blkdev.h>
13 #include <linux/proc_fs.h>
14 #include <linux/interrupt.h>
15 #include <linux/bitops.h>
16 #include <linux/bio.h>
17 #include <linux/device.h>
18 #include <linux/pci.h>
19 #include <linux/completion.h>
20 #ifdef CONFIG_BLK_DEV_IDEACPI
21 #include <acpi/acpi.h>
22 #endif
23 #include <asm/byteorder.h>
24 #include <asm/system.h>
25 #include <asm/io.h>
26 #include <asm/mutex.h>
27
28 #if defined(CONFIG_CRIS) || defined(CONFIG_FRV)
29 # define SUPPORT_VLB_SYNC 0
30 #else
31 # define SUPPORT_VLB_SYNC 1
32 #endif
33
34 /*
35 * Used to indicate "no IRQ", should be a value that cannot be an IRQ
36 * number.
37 */
38
39 #define IDE_NO_IRQ (-1)
40
41 typedef unsigned char byte; /* used everywhere */
42
43 /*
44 * Probably not wise to fiddle with these
45 */
46 #define ERROR_MAX 8 /* Max read/write errors per sector */
47 #define ERROR_RESET 3 /* Reset controller every 4th retry */
48 #define ERROR_RECAL 1 /* Recalibrate every 2nd retry */
49
50 /*
51 * state flags
52 */
53
54 #define DMA_PIO_RETRY 1 /* retrying in PIO */
55
56 #define HWIF(drive) ((ide_hwif_t *)((drive)->hwif))
57 #define HWGROUP(drive) ((ide_hwgroup_t *)(HWIF(drive)->hwgroup))
58
59 /*
60 * Definitions for accessing IDE controller registers
61 */
62 #define IDE_NR_PORTS (10)
63
64 struct ide_io_ports {
65 unsigned long data_addr;
66
67 union {
68 unsigned long error_addr; /* read: error */
69 unsigned long feature_addr; /* write: feature */
70 };
71
72 unsigned long nsect_addr;
73 unsigned long lbal_addr;
74 unsigned long lbam_addr;
75 unsigned long lbah_addr;
76
77 unsigned long device_addr;
78
79 union {
80 unsigned long status_addr; /*  read: status  */
81 unsigned long command_addr; /* write: command */
82 };
83
84 unsigned long ctl_addr;
85
86 unsigned long irq_addr;
87 };
88
89 #define OK_STAT(stat,good,bad) (((stat)&((good)|(bad)))==(good))
90 #define BAD_R_STAT (BUSY_STAT | ERR_STAT)
91 #define BAD_W_STAT (BAD_R_STAT | WRERR_STAT)
92 #define BAD_STAT (BAD_R_STAT | DRQ_STAT)
93 #define DRIVE_READY (READY_STAT | SEEK_STAT)
94
95 #define BAD_CRC (ABRT_ERR | ICRC_ERR)
96
97 #define SATA_NR_PORTS (3) /* 16 possible ?? */
98
99 #define SATA_STATUS_OFFSET (0)
100 #define SATA_ERROR_OFFSET (1)
101 #define SATA_CONTROL_OFFSET (2)
102
103 /*
104 * Our Physical Region Descriptor (PRD) table should be large enough
105 * to handle the biggest I/O request we are likely to see. Since requests
106 * can have no more than 256 sectors, and since the typical blocksize is
107 * two or more sectors, we could get by with a limit of 128 entries here for
108 * the usual worst case. Most requests seem to include some contiguous blocks,
109 * further reducing the number of table entries required.
110 *
111 * The driver reverts to PIO mode for individual requests that exceed
112 * this limit (possible with 512 byte blocksizes, eg. MSDOS f/s), so handling
113 * 100% of all crazy scenarios here is not necessary.
114 *
115 * As it turns out though, we must allocate a full 4KB page for this,
116 * so the two PRD tables (ide0 & ide1) will each get half of that,
117 * allowing each to have about 256 entries (8 bytes each) from this.
118 */
119 #define PRD_BYTES 8
120 #define PRD_ENTRIES 256
121
122 /*
123 * Some more useful definitions
124 */
125 #define PARTN_BITS 6 /* number of minor dev bits for partitions */
126 #define MAX_DRIVES 2 /* per interface; 2 assumed by lots of code */
127 #define SECTOR_SIZE 512
128 #define SECTOR_WORDS (SECTOR_SIZE / 4) /* number of 32bit words per sector */
129 #define IDE_LARGE_SEEK(b1,b2,t) (((b1) > (b2) + (t)) || ((b2) > (b1) + (t)))
130
131 /*
132 * Timeouts for various operations:
133 */
134 #define WAIT_DRQ (HZ/10) /* 100msec - spec allows up to 20ms */
135 #define WAIT_READY (5*HZ) /* 5sec - some laptops are very slow */
136 #define WAIT_PIDENTIFY (10*HZ) /* 10sec - should be less than 3ms (?), if all ATAPI CD is closed at boot */
137 #define WAIT_WORSTCASE (30*HZ) /* 30sec - worst case when spinning up */
138 #define WAIT_CMD (10*HZ) /* 10sec - maximum wait for an IRQ to happen */
139 #define WAIT_MIN_SLEEP (2*HZ/100) /* 20msec - minimum sleep time */
140
141 /*
142 * Check for an interrupt and acknowledge the interrupt status
143 */
144 struct hwif_s;
145 typedef int (ide_ack_intr_t)(struct hwif_s *);
146
147 /*
148 * hwif_chipset_t is used to keep track of the specific hardware
149 * chipset used by each IDE interface, if known.
150 */
151 enum { ide_unknown, ide_generic, ide_pci,
152 ide_cmd640, ide_dtc2278, ide_ali14xx,
153 ide_qd65xx, ide_umc8672, ide_ht6560b,
154 ide_rz1000, ide_trm290,
155 ide_cmd646, ide_cy82c693, ide_4drives,
156 ide_pmac, ide_acorn,
157 ide_au1xxx, ide_palm3710
158 };
159
160 typedef u8 hwif_chipset_t;
161
162 /*
163 * Structure to hold all information about the location of this port
164 */
165 typedef struct hw_regs_s {
166 union {
167 struct ide_io_ports io_ports;
168 unsigned long io_ports_array[IDE_NR_PORTS];
169 };
170
171 int irq; /* our irq number */
172 ide_ack_intr_t *ack_intr; /* acknowledge interrupt */
173 hwif_chipset_t chipset;
174 struct device *dev;
175 } hw_regs_t;
176
177 void ide_init_port_data(struct hwif_s *, unsigned int);
178 void ide_init_port_hw(struct hwif_s *, hw_regs_t *);
179
180 static inline void ide_std_init_ports(hw_regs_t *hw,
181 unsigned long io_addr,
182 unsigned long ctl_addr)
183 {
184 unsigned int i;
185
186 for (i = 0; i <= 7; i++)
187 hw->io_ports_array[i] = io_addr++;
188
189 hw->io_ports.ctl_addr = ctl_addr;
190 }
191
192 #include <asm/ide.h>
193
194 #if !defined(MAX_HWIFS) || defined(CONFIG_EMBEDDED)
195 #undef MAX_HWIFS
196 #define MAX_HWIFS CONFIG_IDE_MAX_HWIFS
197 #endif
198
199 /* Currently only m68k, apus and m8xx need it */
200 #ifndef IDE_ARCH_ACK_INTR
201 # define ide_ack_intr(hwif) (1)
202 #endif
203
204 /* Currently only Atari needs it */
205 #ifndef IDE_ARCH_LOCK
206 # define ide_release_lock() do {} while (0)
207 # define ide_get_lock(hdlr, data) do {} while (0)
208 #endif /* IDE_ARCH_LOCK */
209
210 /*
211 * Now for the data we need to maintain per-drive: ide_drive_t
212 */
213
214 #define ide_scsi 0x21
215 #define ide_disk 0x20
216 #define ide_optical 0x7
217 #define ide_cdrom 0x5
218 #define ide_tape 0x1
219 #define ide_floppy 0x0
220
221 /*
222 * Special Driver Flags
223 *
224 * set_geometry : respecify drive geometry
225 * recalibrate : seek to cyl 0
226 * set_multmode : set multmode count
227 * set_tune : tune interface for drive
228 * serviced : service command
229 * reserved : unused
230 */
231 typedef union {
232 unsigned all : 8;
233 struct {
234 unsigned set_geometry : 1;
235 unsigned recalibrate : 1;
236 unsigned set_multmode : 1;
237 unsigned set_tune : 1;
238 unsigned serviced : 1;
239 unsigned reserved : 3;
240 } b;
241 } special_t;
242
243 /*
244 * ATA-IDE Select Register, aka Device-Head
245 *
246 * head : always zeros here
247 * unit : drive select number: 0/1
248 * bit5 : always 1
249 * lba : using LBA instead of CHS
250 * bit7 : always 1
251 */
252 typedef union {
253 unsigned all : 8;
254 struct {
255 #if defined(__LITTLE_ENDIAN_BITFIELD)
256 unsigned head : 4;
257 unsigned unit : 1;
258 unsigned bit5 : 1;
259 unsigned lba : 1;
260 unsigned bit7 : 1;
261 #elif defined(__BIG_ENDIAN_BITFIELD)
262 unsigned bit7 : 1;
263 unsigned lba : 1;
264 unsigned bit5 : 1;
265 unsigned unit : 1;
266 unsigned head : 4;
267 #else
268 #error "Please fix <asm/byteorder.h>"
269 #endif
270 } b;
271 } select_t, ata_select_t;
272
273 /*
274 * Status returned from various ide_ functions
275 */
276 typedef enum {
277 ide_stopped, /* no drive operation was started */
278 ide_started, /* a drive operation was started, handler was set */
279 } ide_startstop_t;
280
281 struct ide_driver_s;
282 struct ide_settings_s;
283
284 #ifdef CONFIG_BLK_DEV_IDEACPI
285 struct ide_acpi_drive_link;
286 struct ide_acpi_hwif_link;
287 #endif
288
289 typedef struct ide_drive_s {
290 char name[4]; /* drive name, such as "hda" */
291 char driver_req[10]; /* requests specific driver */
292
293 struct request_queue *queue; /* request queue */
294
295 struct request *rq; /* current request */
296 struct ide_drive_s *next; /* circular list of hwgroup drives */
297 void *driver_data; /* extra driver data */
298 struct hd_driveid *id; /* drive model identification info */
299 #ifdef CONFIG_IDE_PROC_FS
300 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
301 struct ide_settings_s *settings;/* /proc/ide/ drive settings */
302 #endif
303 struct hwif_s *hwif; /* actually (ide_hwif_t *) */
304
305 unsigned long sleep; /* sleep until this time */
306 unsigned long service_start; /* time we started last request */
307 unsigned long service_time; /* service time of last request */
308 unsigned long timeout; /* max time to wait for irq */
309
310 special_t special; /* special action flags */
311 select_t select; /* basic drive/head select reg value */
312
313 u8 keep_settings; /* restore settings after drive reset */
314 u8 using_dma; /* disk is using dma for read/write */
315 u8 retry_pio; /* retrying dma capable host in pio */
316 u8 state; /* retry state */
317 u8 waiting_for_dma; /* dma currently in progress */
318 u8 unmask; /* okay to unmask other irqs */
319 u8 noflush; /* don't attempt flushes */
320 u8 dsc_overlap; /* DSC overlap */
321 u8 nice1; /* give potential excess bandwidth */
322
323 unsigned present : 1; /* drive is physically present */
324 unsigned dead : 1; /* device ejected hint */
325 unsigned id_read : 1; /* 1=id read from disk 0 = synthetic */
326 unsigned noprobe : 1; /* from: hdx=noprobe */
327 unsigned removable : 1; /* 1 if need to do check_media_change */
328 unsigned attach : 1; /* needed for removable devices */
329 unsigned forced_geom : 1; /* 1 if hdx=c,h,s was given at boot */
330 unsigned no_unmask : 1; /* disallow setting unmask bit */
331 unsigned no_io_32bit : 1; /* disallow enabling 32bit I/O */
332 unsigned atapi_overlap : 1; /* ATAPI overlap (not supported) */
333 unsigned doorlocking : 1; /* for removable only: door lock/unlock works */
334 unsigned nodma : 1; /* disallow DMA */
335 unsigned remap_0_to_1 : 1; /* 0=noremap, 1=remap 0->1 (for EZDrive) */
336 unsigned blocked : 1; /* 1=powermanagment told us not to do anything, so sleep nicely */
337 unsigned vdma : 1; /* 1=doing PIO over DMA 0=doing normal DMA */
338 unsigned scsi : 1; /* 0=default, 1=ide-scsi emulation */
339 unsigned sleeping : 1; /* 1=sleeping & sleep field valid */
340 unsigned post_reset : 1;
341 unsigned udma33_warned : 1;
342
343 u8 addressing; /* 0=28-bit, 1=48-bit, 2=48-bit doing 28-bit */
344 u8 quirk_list; /* considered quirky, set for a specific host */
345 u8 init_speed; /* transfer rate set at boot */
346 u8 current_speed; /* current transfer rate set */
347 u8 desired_speed; /* desired transfer rate set */
348 u8 dn; /* now wide spread use */
349 u8 wcache; /* status of write cache */
350 u8 acoustic; /* acoustic management */
351 u8 media; /* disk, cdrom, tape, floppy, ... */
352 u8 ctl; /* "normal" value for Control register */
353 u8 ready_stat; /* min status value for drive ready */
354 u8 mult_count; /* current multiple sector setting */
355 u8 mult_req; /* requested multiple sector setting */
356 u8 tune_req; /* requested drive tuning setting */
357 u8 io_32bit; /* 0=16-bit, 1=32-bit, 2/3=32bit+sync */
358 u8 bad_wstat; /* used for ignoring WRERR_STAT */
359 u8 nowerr; /* used for ignoring WRERR_STAT */
360 u8 sect0; /* offset of first sector for DM6:DDO */
361 u8 head; /* "real" number of heads */
362 u8 sect; /* "real" sectors per track */
363 u8 bios_head; /* BIOS/fdisk/LILO number of heads */
364 u8 bios_sect; /* BIOS/fdisk/LILO sectors per track */
365
366 unsigned int bios_cyl; /* BIOS/fdisk/LILO number of cyls */
367 unsigned int cyl; /* "real" number of cyls */
368 unsigned int drive_data; /* used by set_pio_mode/selectproc */
369 unsigned int failures; /* current failure count */
370 unsigned int max_failures; /* maximum allowed failure count */
371 u64 probed_capacity;/* initial reported media capacity (ide-cd only currently) */
372
373 u64 capacity64; /* total number of sectors */
374
375 int lun; /* logical unit */
376 int crc_count; /* crc counter to reduce drive speed */
377 #ifdef CONFIG_BLK_DEV_IDEACPI
378 struct ide_acpi_drive_link *acpidata;
379 #endif
380 struct list_head list;
381 struct device gendev;
382 struct completion gendev_rel_comp; /* to deal with device release() */
383 } ide_drive_t;
384
385 #define to_ide_device(dev)container_of(dev, ide_drive_t, gendev)
386
387 #define IDE_CHIPSET_PCI_MASK \
388 ((1<<ide_pci)|(1<<ide_cmd646)|(1<<ide_ali14xx))
389 #define IDE_CHIPSET_IS_PCI(c) ((IDE_CHIPSET_PCI_MASK >> (c)) & 1)
390
391 struct ide_port_info;
392
393 struct ide_port_ops {
394 /* host specific initialization of devices on a port */
395 void (*port_init_devs)(struct hwif_s *);
396 /* routine to program host for PIO mode */
397 void (*set_pio_mode)(ide_drive_t *, const u8);
398 /* routine to program host for DMA mode */
399 void (*set_dma_mode)(ide_drive_t *, const u8);
400 /* tweaks hardware to select drive */
401 void (*selectproc)(ide_drive_t *);
402 /* chipset polling based on hba specifics */
403 int (*reset_poll)(ide_drive_t *);
404 /* chipset specific changes to default for device-hba resets */
405 void (*pre_reset)(ide_drive_t *);
406 /* routine to reset controller after a disk reset */
407 void (*resetproc)(ide_drive_t *);
408 /* special host masking for drive selection */
409 void (*maskproc)(ide_drive_t *, int);
410 /* check host's drive quirk list */
411 void (*quirkproc)(ide_drive_t *);
412
413 u8 (*mdma_filter)(ide_drive_t *);
414 u8 (*udma_filter)(ide_drive_t *);
415
416 u8 (*cable_detect)(struct hwif_s *);
417 };
418
419 struct ide_dma_ops {
420 void (*dma_host_set)(struct ide_drive_s *, int);
421 int (*dma_setup)(struct ide_drive_s *);
422 void (*dma_exec_cmd)(struct ide_drive_s *, u8);
423 void (*dma_start)(struct ide_drive_s *);
424 int (*dma_end)(struct ide_drive_s *);
425 int (*dma_test_irq)(struct ide_drive_s *);
426 void (*dma_lost_irq)(struct ide_drive_s *);
427 void (*dma_timeout)(struct ide_drive_s *);
428 };
429
430 struct ide_task_s;
431
432 typedef struct hwif_s {
433 struct hwif_s *next; /* for linked-list in ide_hwgroup_t */
434 struct hwif_s *mate; /* other hwif from same PCI chip */
435 struct hwgroup_s *hwgroup; /* actually (ide_hwgroup_t *) */
436 struct proc_dir_entry *proc; /* /proc/ide/ directory entry */
437
438 char name[6]; /* name of interface, eg. "ide0" */
439
440 struct ide_io_ports io_ports;
441
442 unsigned long sata_scr[SATA_NR_PORTS];
443
444 ide_drive_t drives[MAX_DRIVES]; /* drive info */
445
446 u8 major; /* our major number */
447 u8 index; /* 0 for ide0; 1 for ide1; ... */
448 u8 channel; /* for dual-port chips: 0=primary, 1=secondary */
449 u8 bus_state; /* power state of the IDE bus */
450
451 u32 host_flags;
452
453 u8 pio_mask;
454
455 u8 ultra_mask;
456 u8 mwdma_mask;
457 u8 swdma_mask;
458
459 u8 cbl; /* cable type */
460
461 hwif_chipset_t chipset; /* sub-module for tuning.. */
462
463 struct device *dev;
464
465 ide_ack_intr_t *ack_intr;
466
467 void (*rw_disk)(ide_drive_t *, struct request *);
468
469 const struct ide_port_ops *port_ops;
470 const struct ide_dma_ops *dma_ops;
471
472 void (*tf_load)(ide_drive_t *, struct ide_task_s *);
473 void (*tf_read)(ide_drive_t *, struct ide_task_s *);
474
475 void (*input_data)(ide_drive_t *, struct request *, void *, unsigned);
476 void (*output_data)(ide_drive_t *, struct request *, void *, unsigned);
477
478 void (*ide_dma_clear_irq)(ide_drive_t *drive);
479
480 void (*OUTB)(u8 addr, unsigned long port);
481 void (*OUTBSYNC)(ide_drive_t *drive, u8 addr, unsigned long port);
482
483 u8 (*INB)(unsigned long port);
484
485 /* dma physical region descriptor table (cpu view) */
486 unsigned int *dmatable_cpu;
487 /* dma physical region descriptor table (dma view) */
488 dma_addr_t dmatable_dma;
489 /* Scatter-gather list used to build the above */
490 struct scatterlist *sg_table;
491 int sg_max_nents; /* Maximum number of entries in it */
492 int sg_nents; /* Current number of entries in it */
493 int sg_dma_direction; /* dma transfer direction */
494
495 /* data phase of the active command (currently only valid for PIO/DMA) */
496 int data_phase;
497
498 unsigned int nsect;
499 unsigned int nleft;
500 struct scatterlist *cursg;
501 unsigned int cursg_ofs;
502
503 int rqsize; /* max sectors per request */
504 int irq; /* our irq number */
505
506 unsigned long dma_base; /* base addr for dma ports */
507 unsigned long dma_command; /* dma command register */
508 unsigned long dma_status; /* dma status register */
509
510 unsigned long config_data; /* for use by chipset-specific code */
511 unsigned long select_data; /* for use by chipset-specific code */
512
513 unsigned long extra_base; /* extra addr for dma ports */
514 unsigned extra_ports; /* number of extra dma ports */
515
516 unsigned present : 1; /* this interface exists */
517 unsigned serialized : 1; /* serialized all channel operation */
518 unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
519 unsigned sg_mapped : 1; /* sg_table and sg_nents are ready */
520 unsigned mmio : 1; /* host uses MMIO */
521
522 struct device gendev;
523 struct device *portdev;
524
525 struct completion gendev_rel_comp; /* To deal with device release() */
526
527 void *hwif_data; /* extra hwif data */
528
529 unsigned dma;
530
531 #ifdef CONFIG_BLK_DEV_IDEACPI
532 struct ide_acpi_hwif_link *acpidata;
533 #endif
534 } ____cacheline_internodealigned_in_smp ide_hwif_t;
535
536 /*
537 * internal ide interrupt handler type
538 */
539 typedef ide_startstop_t (ide_handler_t)(ide_drive_t *);
540 typedef int (ide_expiry_t)(ide_drive_t *);
541
542 /* used by ide-cd, ide-floppy, etc. */
543 typedef void (xfer_func_t)(ide_drive_t *, struct request *rq, void *, unsigned);
544
545 typedef struct hwgroup_s {
546 /* irq handler, if active */
547 ide_startstop_t (*handler)(ide_drive_t *);
548
549 /* BOOL: protects all fields below */
550 volatile int busy;
551 /* BOOL: wake us up on timer expiry */
552 unsigned int sleeping : 1;
553 /* BOOL: polling active & poll_timeout field valid */
554 unsigned int polling : 1;
555 /* BOOL: in a polling reset situation. Must not trigger another reset yet */
556 unsigned int resetting : 1;
557
558 /* current drive */
559 ide_drive_t *drive;
560 /* ptr to current hwif in linked-list */
561 ide_hwif_t *hwif;
562
563 /* current request */
564 struct request *rq;
565
566 /* failsafe timer */
567 struct timer_list timer;
568 /* timeout value during long polls */
569 unsigned long poll_timeout;
570 /* queried upon timeouts */
571 int (*expiry)(ide_drive_t *);
572
573 int req_gen;
574 int req_gen_timer;
575 } ide_hwgroup_t;
576
577 typedef struct ide_driver_s ide_driver_t;
578
579 extern struct mutex ide_setting_mtx;
580
581 int set_io_32bit(ide_drive_t *, int);
582 int set_pio_mode(ide_drive_t *, int);
583 int set_using_dma(ide_drive_t *, int);
584
585 /* ATAPI packet command flags */
586 enum {
587 /* set when an error is considered normal - no retry (ide-tape) */
588 PC_FLAG_ABORT = (1 << 0),
589 PC_FLAG_SUPPRESS_ERROR = (1 << 1),
590 PC_FLAG_WAIT_FOR_DSC = (1 << 2),
591 PC_FLAG_DMA_OK = (1 << 3),
592 PC_FLAG_DMA_RECOMMENDED = (1 << 4),
593 PC_FLAG_DMA_IN_PROGRESS = (1 << 5),
594 PC_FLAG_DMA_ERROR = (1 << 6),
595 PC_FLAG_WRITING = (1 << 7),
596 /* command timed out */
597 PC_FLAG_TIMEDOUT = (1 << 8),
598 };
599
600 struct ide_atapi_pc {
601 /* actual packet bytes */
602 u8 c[12];
603 /* incremented on each retry */
604 int retries;
605 int error;
606
607 /* bytes to transfer */
608 int req_xfer;
609 /* bytes actually transferred */
610 int xferred;
611
612 /* data buffer */
613 u8 *buf;
614 /* current buffer position */
615 u8 *cur_pos;
616 int buf_size;
617 /* missing/available data on the current buffer */
618 int b_count;
619
620 /* the corresponding request */
621 struct request *rq;
622
623 unsigned long flags;
624
625 /*
626 * those are more or less driver-specific and some of them are subject
627 * to change/removal later.
628 */
629 u8 pc_buf[256];
630 void (*idefloppy_callback) (ide_drive_t *);
631 ide_startstop_t (*idetape_callback) (ide_drive_t *);
632
633 /* idetape only */
634 struct idetape_bh *bh;
635 char *b_data;
636
637 /* idescsi only for now */
638 struct scatterlist *sg;
639 unsigned int sg_cnt;
640
641 struct scsi_cmnd *scsi_cmd;
642 void (*done) (struct scsi_cmnd *);
643
644 unsigned long timeout;
645 };
646
647 #ifdef CONFIG_IDE_PROC_FS
648 /*
649 * configurable drive settings
650 */
651
652 #define TYPE_INT 0
653 #define TYPE_BYTE 1
654 #define TYPE_SHORT 2
655
656 #define SETTING_READ (1 << 0)
657 #define SETTING_WRITE (1 << 1)
658 #define SETTING_RW (SETTING_READ | SETTING_WRITE)
659
660 typedef int (ide_procset_t)(ide_drive_t *, int);
661 typedef struct ide_settings_s {
662 char *name;
663 int rw;
664 int data_type;
665 int min;
666 int max;
667 int mul_factor;
668 int div_factor;
669 void *data;
670 ide_procset_t *set;
671 int auto_remove;
672 struct ide_settings_s *next;
673 } ide_settings_t;
674
675 int ide_add_setting(ide_drive_t *, const char *, int, int, int, int, int, int, void *, ide_procset_t *set);
676
677 /*
678 * /proc/ide interface
679 */
680 typedef struct {
681 const char *name;
682 mode_t mode;
683 read_proc_t *read_proc;
684 write_proc_t *write_proc;
685 } ide_proc_entry_t;
686
687 void proc_ide_create(void);
688 void proc_ide_destroy(void);
689 void ide_proc_register_port(ide_hwif_t *);
690 void ide_proc_port_register_devices(ide_hwif_t *);
691 void ide_proc_unregister_device(ide_drive_t *);
692 void ide_proc_unregister_port(ide_hwif_t *);
693 void ide_proc_register_driver(ide_drive_t *, ide_driver_t *);
694 void ide_proc_unregister_driver(ide_drive_t *, ide_driver_t *);
695
696 void ide_add_generic_settings(ide_drive_t *);
697
698 read_proc_t proc_ide_read_capacity;
699 read_proc_t proc_ide_read_geometry;
700
701 /*
702 * Standard exit stuff:
703 */
704 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) \
705 { \
706 len -= off; \
707 if (len < count) { \
708 *eof = 1; \
709 if (len <= 0) \
710 return 0; \
711 } else \
712 len = count; \
713 *start = page + off; \
714 return len; \
715 }
716 #else
717 static inline void proc_ide_create(void) { ; }
718 static inline void proc_ide_destroy(void) { ; }
719 static inline void ide_proc_register_port(ide_hwif_t *hwif) { ; }
720 static inline void ide_proc_port_register_devices(ide_hwif_t *hwif) { ; }
721 static inline void ide_proc_unregister_device(ide_drive_t *drive) { ; }
722 static inline void ide_proc_unregister_port(ide_hwif_t *hwif) { ; }
723 static inline void ide_proc_register_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
724 static inline void ide_proc_unregister_driver(ide_drive_t *drive, ide_driver_t *driver) { ; }
725 static inline void ide_add_generic_settings(ide_drive_t *drive) { ; }
726 #define PROC_IDE_READ_RETURN(page,start,off,count,eof,len) return 0;
727 #endif
728
729 /*
730 * Power Management step value (rq->pm->pm_step).
731 *
732 * The step value starts at 0 (ide_pm_state_start_suspend) for a
733 * suspend operation or 1000 (ide_pm_state_start_resume) for a
734 * resume operation.
735 *
736 * For each step, the core calls the subdriver start_power_step() first.
737 * This can return:
738 * - ide_stopped : In this case, the core calls us back again unless
739 * step have been set to ide_power_state_completed.
740 * - ide_started : In this case, the channel is left busy until an
741 * async event (interrupt) occurs.
742 * Typically, start_power_step() will issue a taskfile request with
743 * do_rw_taskfile().
744 *
745 * Upon reception of the interrupt, the core will call complete_power_step()
746 * with the error code if any. This routine should update the step value
747 * and return. It should not start a new request. The core will call
748 * start_power_step for the new step value, unless step have been set to
749 * ide_power_state_completed.
750 *
751 * Subdrivers are expected to define their own additional power
752 * steps from 1..999 for suspend and from 1001..1999 for resume,
753 * other values are reserved for future use.
754 */
755
756 enum {
757 ide_pm_state_completed = -1,
758 ide_pm_state_start_suspend = 0,
759 ide_pm_state_start_resume = 1000,
760 };
761
762 /*
763 * Subdrivers support.
764 *
765 * The gendriver.owner field should be set to the module owner of this driver.
766 * The gendriver.name field should be set to the name of this driver
767 */
768 struct ide_driver_s {
769 const char *version;
770 u8 media;
771 unsigned supports_dsc_overlap : 1;
772 ide_startstop_t (*do_request)(ide_drive_t *, struct request *, sector_t);
773 int (*end_request)(ide_drive_t *, int, int);
774 ide_startstop_t (*error)(ide_drive_t *, struct request *rq, u8, u8);
775 ide_startstop_t (*abort)(ide_drive_t *, struct request *rq);
776 struct device_driver gen_driver;
777 int (*probe)(ide_drive_t *);
778 void (*remove)(ide_drive_t *);
779 void (*resume)(ide_drive_t *);
780 void (*shutdown)(ide_drive_t *);
781 #ifdef CONFIG_IDE_PROC_FS
782 ide_proc_entry_t *proc;
783 #endif
784 };
785
786 #define to_ide_driver(drv) container_of(drv, ide_driver_t, gen_driver)
787
788 int generic_ide_ioctl(ide_drive_t *, struct file *, struct block_device *, unsigned, unsigned long);
789
790 /*
791 * ide_hwifs[] is the master data structure used to keep track
792 * of just about everything in ide.c. Whenever possible, routines
793 * should be using pointers to a drive (ide_drive_t *) or
794 * pointers to a hwif (ide_hwif_t *), rather than indexing this
795 * structure directly (the allocation/layout may change!).
796 *
797 */
798 #ifndef _IDE_C
799 extern ide_hwif_t ide_hwifs[]; /* master data repository */
800 #endif
801 extern int ide_noacpi;
802 extern int ide_acpigtf;
803 extern int ide_acpionboot;
804 extern int noautodma;
805
806 extern int ide_vlb_clk;
807 extern int ide_pci_clk;
808
809 ide_hwif_t *ide_find_port_slot(const struct ide_port_info *);
810
811 static inline ide_hwif_t *ide_find_port(void)
812 {
813 return ide_find_port_slot(NULL);
814 }
815
816 extern int ide_end_request (ide_drive_t *drive, int uptodate, int nrsecs);
817 int ide_end_dequeued_request(ide_drive_t *drive, struct request *rq,
818 int uptodate, int nr_sectors);
819
820 extern void ide_set_handler (ide_drive_t *drive, ide_handler_t *handler, unsigned int timeout, ide_expiry_t *expiry);
821
822 void ide_execute_command(ide_drive_t *, u8, ide_handler_t *, unsigned int,
823 ide_expiry_t *);
824
825 void ide_execute_pkt_cmd(ide_drive_t *);
826
827 void ide_pad_transfer(ide_drive_t *, int, int);
828
829 ide_startstop_t __ide_error(ide_drive_t *, struct request *, u8, u8);
830
831 ide_startstop_t ide_error (ide_drive_t *drive, const char *msg, byte stat);
832
833 ide_startstop_t __ide_abort(ide_drive_t *, struct request *);
834
835 extern ide_startstop_t ide_abort(ide_drive_t *, const char *);
836
837 extern void ide_fix_driveid(struct hd_driveid *);
838
839 extern void ide_fixstring(u8 *, const int, const int);
840
841 int ide_wait_stat(ide_startstop_t *, ide_drive_t *, u8, u8, unsigned long);
842
843 extern ide_startstop_t ide_do_reset (ide_drive_t *);
844
845 extern void ide_init_drive_cmd (struct request *rq);
846
847 /*
848 * "action" parameter type for ide_do_drive_cmd() below.
849 */
850 typedef enum {
851 ide_wait, /* insert rq at end of list, and wait for it */
852 ide_preempt, /* insert rq in front of current request */
853 ide_head_wait, /* insert rq in front of current request and wait for it */
854 ide_end /* insert rq at end of list, but don't wait for it */
855 } ide_action_t;
856
857 extern int ide_do_drive_cmd(ide_drive_t *, struct request *, ide_action_t);
858
859 extern void ide_end_drive_cmd(ide_drive_t *, u8, u8);
860
861 enum {
862 IDE_TFLAG_LBA48 = (1 << 0),
863 IDE_TFLAG_NO_SELECT_MASK = (1 << 1),
864 IDE_TFLAG_FLAGGED = (1 << 2),
865 IDE_TFLAG_OUT_DATA = (1 << 3),
866 IDE_TFLAG_OUT_HOB_FEATURE = (1 << 4),
867 IDE_TFLAG_OUT_HOB_NSECT = (1 << 5),
868 IDE_TFLAG_OUT_HOB_LBAL = (1 << 6),
869 IDE_TFLAG_OUT_HOB_LBAM = (1 << 7),
870 IDE_TFLAG_OUT_HOB_LBAH = (1 << 8),
871 IDE_TFLAG_OUT_HOB = IDE_TFLAG_OUT_HOB_FEATURE |
872 IDE_TFLAG_OUT_HOB_NSECT |
873 IDE_TFLAG_OUT_HOB_LBAL |
874 IDE_TFLAG_OUT_HOB_LBAM |
875 IDE_TFLAG_OUT_HOB_LBAH,
876 IDE_TFLAG_OUT_FEATURE = (1 << 9),
877 IDE_TFLAG_OUT_NSECT = (1 << 10),
878 IDE_TFLAG_OUT_LBAL = (1 << 11),
879 IDE_TFLAG_OUT_LBAM = (1 << 12),
880 IDE_TFLAG_OUT_LBAH = (1 << 13),
881 IDE_TFLAG_OUT_TF = IDE_TFLAG_OUT_FEATURE |
882 IDE_TFLAG_OUT_NSECT |
883 IDE_TFLAG_OUT_LBAL |
884 IDE_TFLAG_OUT_LBAM |
885 IDE_TFLAG_OUT_LBAH,
886 IDE_TFLAG_OUT_DEVICE = (1 << 14),
887 IDE_TFLAG_WRITE = (1 << 15),
888 IDE_TFLAG_FLAGGED_SET_IN_FLAGS = (1 << 16),
889 IDE_TFLAG_IN_DATA = (1 << 17),
890 IDE_TFLAG_CUSTOM_HANDLER = (1 << 18),
891 IDE_TFLAG_DMA_PIO_FALLBACK = (1 << 19),
892 IDE_TFLAG_IN_HOB_FEATURE = (1 << 20),
893 IDE_TFLAG_IN_HOB_NSECT = (1 << 21),
894 IDE_TFLAG_IN_HOB_LBAL = (1 << 22),
895 IDE_TFLAG_IN_HOB_LBAM = (1 << 23),
896 IDE_TFLAG_IN_HOB_LBAH = (1 << 24),
897 IDE_TFLAG_IN_HOB_LBA = IDE_TFLAG_IN_HOB_LBAL |
898 IDE_TFLAG_IN_HOB_LBAM |
899 IDE_TFLAG_IN_HOB_LBAH,
900 IDE_TFLAG_IN_HOB = IDE_TFLAG_IN_HOB_FEATURE |
901 IDE_TFLAG_IN_HOB_NSECT |
902 IDE_TFLAG_IN_HOB_LBA,
903 IDE_TFLAG_IN_NSECT = (1 << 25),
904 IDE_TFLAG_IN_LBAL = (1 << 26),
905 IDE_TFLAG_IN_LBAM = (1 << 27),
906 IDE_TFLAG_IN_LBAH = (1 << 28),
907 IDE_TFLAG_IN_LBA = IDE_TFLAG_IN_LBAL |
908 IDE_TFLAG_IN_LBAM |
909 IDE_TFLAG_IN_LBAH,
910 IDE_TFLAG_IN_TF = IDE_TFLAG_IN_NSECT |
911 IDE_TFLAG_IN_LBA,
912 IDE_TFLAG_IN_DEVICE = (1 << 29),
913 IDE_TFLAG_HOB = IDE_TFLAG_OUT_HOB |
914 IDE_TFLAG_IN_HOB,
915 IDE_TFLAG_TF = IDE_TFLAG_OUT_TF |
916 IDE_TFLAG_IN_TF,
917 IDE_TFLAG_DEVICE = IDE_TFLAG_OUT_DEVICE |
918 IDE_TFLAG_IN_DEVICE,
919 /* force 16-bit I/O operations */
920 IDE_TFLAG_IO_16BIT = (1 << 30),
921 /* ide_task_t was allocated using kmalloc() */
922 IDE_TFLAG_DYN = (1 << 31),
923 };
924
925 struct ide_taskfile {
926 u8 hob_data; /* 0: high data byte (for TASKFILE IOCTL) */
927
928 u8 hob_feature; /* 1-5: additional data to support LBA48 */
929 u8 hob_nsect;
930 u8 hob_lbal;
931 u8 hob_lbam;
932 u8 hob_lbah;
933
934 u8 data; /* 6: low data byte (for TASKFILE IOCTL) */
935
936 union { /*  7: */
937 u8 error; /* read: error */
938 u8 feature; /* write: feature */
939 };
940
941 u8 nsect; /* 8: number of sectors */
942 u8 lbal; /* 9: LBA low */
943 u8 lbam; /* 10: LBA mid */
944 u8 lbah; /* 11: LBA high */
945
946 u8 device; /* 12: device select */
947
948 union { /* 13: */
949 u8 status; /*  read: status  */
950 u8 command; /* write: command */
951 };
952 };
953
954 typedef struct ide_task_s {
955 union {
956 struct ide_taskfile tf;
957 u8 tf_array[14];
958 };
959 u32 tf_flags;
960 int data_phase;
961 struct request *rq; /* copy of request */
962 void *special; /* valid_t generally */
963 } ide_task_t;
964
965 void ide_tf_dump(const char *, struct ide_taskfile *);
966
967 extern void SELECT_DRIVE(ide_drive_t *);
968
969 extern int drive_is_ready(ide_drive_t *);
970
971 void ide_pktcmd_tf_load(ide_drive_t *, u32, u16, u8);
972
973 ide_startstop_t do_rw_taskfile(ide_drive_t *, ide_task_t *);
974
975 void task_end_request(ide_drive_t *, struct request *, u8);
976
977 int ide_raw_taskfile(ide_drive_t *, ide_task_t *, u8 *, u16);
978 int ide_no_data_taskfile(ide_drive_t *, ide_task_t *);
979
980 int ide_taskfile_ioctl(ide_drive_t *, unsigned int, unsigned long);
981 int ide_cmd_ioctl(ide_drive_t *, unsigned int, unsigned long);
982 int ide_task_ioctl(ide_drive_t *, unsigned int, unsigned long);
983
984 extern int system_bus_clock(void);
985
986 extern int ide_driveid_update(ide_drive_t *);
987 extern int ide_config_drive_speed(ide_drive_t *, u8);
988 extern u8 eighty_ninty_three (ide_drive_t *);
989 extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
990
991 extern int ide_wait_not_busy(ide_hwif_t *hwif, unsigned long timeout);
992
993 extern void ide_stall_queue(ide_drive_t *drive, unsigned long timeout);
994
995 extern int ide_spin_wait_hwgroup(ide_drive_t *);
996 extern void ide_timer_expiry(unsigned long);
997 extern irqreturn_t ide_intr(int irq, void *dev_id);
998 extern void do_ide_request(struct request_queue *);
999
1000 void ide_init_disk(struct gendisk *, ide_drive_t *);
1001
1002 #ifdef CONFIG_IDEPCI_PCIBUS_ORDER
1003 extern int __ide_pci_register_driver(struct pci_driver *driver, struct module *owner, const char *mod_name);
1004 #define ide_pci_register_driver(d) __ide_pci_register_driver(d, THIS_MODULE, KBUILD_MODNAME)
1005 #else
1006 #define ide_pci_register_driver(d) pci_register_driver(d)
1007 #endif
1008
1009 void ide_pci_setup_ports(struct pci_dev *, const struct ide_port_info *, int, u8 *);
1010 void ide_setup_pci_noise(struct pci_dev *, const struct ide_port_info *);
1011
1012 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
1013 int ide_pci_set_master(struct pci_dev *, const char *);
1014 unsigned long ide_pci_dma_base(ide_hwif_t *, const struct ide_port_info *);
1015 int ide_hwif_setup_dma(ide_hwif_t *, const struct ide_port_info *);
1016 #else
1017 static inline int ide_hwif_setup_dma(ide_hwif_t *hwif,
1018 const struct ide_port_info *d)
1019 {
1020 return -EINVAL;
1021 }
1022 #endif
1023
1024 extern void default_hwif_iops(ide_hwif_t *);
1025 extern void default_hwif_mmiops(ide_hwif_t *);
1026 extern void default_hwif_transport(ide_hwif_t *);
1027
1028 typedef struct ide_pci_enablebit_s {
1029 u8 reg; /* byte pci reg holding the enable-bit */
1030 u8 mask; /* mask to isolate the enable-bit */
1031 u8 val; /* value of masked reg when "enabled" */
1032 } ide_pci_enablebit_t;
1033
1034 enum {
1035 /* Uses ISA control ports not PCI ones. */
1036 IDE_HFLAG_ISA_PORTS = (1 << 0),
1037 /* single port device */
1038 IDE_HFLAG_SINGLE = (1 << 1),
1039 /* don't use legacy PIO blacklist */
1040 IDE_HFLAG_PIO_NO_BLACKLIST = (1 << 2),
1041 /* set for the second port of QD65xx */
1042 IDE_HFLAG_QD_2ND_PORT = (1 << 3),
1043 /* use PIO8/9 for prefetch off/on */
1044 IDE_HFLAG_ABUSE_PREFETCH = (1 << 4),
1045 /* use PIO6/7 for fast-devsel off/on */
1046 IDE_HFLAG_ABUSE_FAST_DEVSEL = (1 << 5),
1047 /* use 100-102 and 200-202 PIO values to set DMA modes */
1048 IDE_HFLAG_ABUSE_DMA_MODES = (1 << 6),
1049 /*
1050 * keep DMA setting when programming PIO mode, may be used only
1051 * for hosts which have separate PIO and DMA timings (ie. PMAC)
1052 */
1053 IDE_HFLAG_SET_PIO_MODE_KEEP_DMA = (1 << 7),
1054 /* program host for the transfer mode after programming device */
1055 IDE_HFLAG_POST_SET_MODE = (1 << 8),
1056 /* don't program host/device for the transfer mode ("smart" hosts) */
1057 IDE_HFLAG_NO_SET_MODE = (1 << 9),
1058 /* trust BIOS for programming chipset/device for DMA */
1059 IDE_HFLAG_TRUST_BIOS_FOR_DMA = (1 << 10),
1060 /* host is CS5510/CS5520 */
1061 IDE_HFLAG_CS5520 = (1 << 11),
1062 /* ATAPI DMA is unsupported */
1063 IDE_HFLAG_NO_ATAPI_DMA = (1 << 12),
1064 /* set if host is a "non-bootable" controller */
1065 IDE_HFLAG_NON_BOOTABLE = (1 << 13),
1066 /* host doesn't support DMA */
1067 IDE_HFLAG_NO_DMA = (1 << 14),
1068 /* check if host is PCI IDE device before allowing DMA */
1069 IDE_HFLAG_NO_AUTODMA = (1 << 15),
1070 /* host uses MMIO */
1071 IDE_HFLAG_MMIO = (1 << 16),
1072 /* no LBA48 */
1073 IDE_HFLAG_NO_LBA48 = (1 << 17),
1074 /* no LBA48 DMA */
1075 IDE_HFLAG_NO_LBA48_DMA = (1 << 18),
1076 /* data FIFO is cleared by an error */
1077 IDE_HFLAG_ERROR_STOPS_FIFO = (1 << 19),
1078 /* serialize ports */
1079 IDE_HFLAG_SERIALIZE = (1 << 20),
1080 /* use legacy IRQs */
1081 IDE_HFLAG_LEGACY_IRQS = (1 << 21),
1082 /* force use of legacy IRQs */
1083 IDE_HFLAG_FORCE_LEGACY_IRQS = (1 << 22),
1084 /* limit LBA48 requests to 256 sectors */
1085 IDE_HFLAG_RQSIZE_256 = (1 << 23),
1086 /* use 32-bit I/O ops */
1087 IDE_HFLAG_IO_32BIT = (1 << 24),
1088 /* unmask IRQs */
1089 IDE_HFLAG_UNMASK_IRQS = (1 << 25),
1090 IDE_HFLAG_ABUSE_SET_DMA_MODE = (1 << 26),
1091 /* serialize ports if DMA is possible (for sl82c105) */
1092 IDE_HFLAG_SERIALIZE_DMA = (1 << 27),
1093 /* force host out of "simplex" mode */
1094 IDE_HFLAG_CLEAR_SIMPLEX = (1 << 28),
1095 /* DSC overlap is unsupported */
1096 IDE_HFLAG_NO_DSC = (1 << 29),
1097 /* never use 32-bit I/O ops */
1098 IDE_HFLAG_NO_IO_32BIT = (1 << 30),
1099 /* never unmask IRQs */
1100 IDE_HFLAG_NO_UNMASK_IRQS = (1 << 31),
1101 /* host uses VDMA (disabled for now) */
1102 IDE_HFLAG_VDMA = 0,
1103 };
1104
1105 #ifdef CONFIG_BLK_DEV_OFFBOARD
1106 # define IDE_HFLAG_OFF_BOARD 0
1107 #else
1108 # define IDE_HFLAG_OFF_BOARD IDE_HFLAG_NON_BOOTABLE
1109 #endif
1110
1111 struct ide_port_info {
1112 char *name;
1113 unsigned int (*init_chipset)(struct pci_dev *, const char *);
1114 void (*init_iops)(ide_hwif_t *);
1115 void (*init_hwif)(ide_hwif_t *);
1116 int (*init_dma)(ide_hwif_t *,
1117 const struct ide_port_info *);
1118
1119 const struct ide_port_ops *port_ops;
1120 const struct ide_dma_ops *dma_ops;
1121
1122 ide_pci_enablebit_t enablebits[2];
1123 hwif_chipset_t chipset;
1124 u32 host_flags;
1125 u8 pio_mask;
1126 u8 swdma_mask;
1127 u8 mwdma_mask;
1128 u8 udma_mask;
1129 };
1130
1131 int ide_setup_pci_device(struct pci_dev *, const struct ide_port_info *);
1132 int ide_setup_pci_devices(struct pci_dev *, struct pci_dev *, const struct ide_port_info *);
1133
1134 void ide_map_sg(ide_drive_t *, struct request *);
1135 void ide_init_sg_cmd(ide_drive_t *, struct request *);
1136
1137 #define BAD_DMA_DRIVE 0
1138 #define GOOD_DMA_DRIVE 1
1139
1140 struct drive_list_entry {
1141 const char *id_model;
1142 const char *id_firmware;
1143 };
1144
1145 int ide_in_drive_list(struct hd_driveid *, const struct drive_list_entry *);
1146
1147 #ifdef CONFIG_BLK_DEV_IDEDMA
1148 int __ide_dma_bad_drive(ide_drive_t *);
1149 int ide_id_dma_bug(ide_drive_t *);
1150
1151 u8 ide_find_dma_mode(ide_drive_t *, u8);
1152
1153 static inline u8 ide_max_dma_mode(ide_drive_t *drive)
1154 {
1155 return ide_find_dma_mode(drive, XFER_UDMA_6);
1156 }
1157
1158 void ide_dma_off_quietly(ide_drive_t *);
1159 void ide_dma_off(ide_drive_t *);
1160 void ide_dma_on(ide_drive_t *);
1161 int ide_set_dma(ide_drive_t *);
1162 void ide_check_dma_crc(ide_drive_t *);
1163 ide_startstop_t ide_dma_intr(ide_drive_t *);
1164
1165 int ide_build_sglist(ide_drive_t *, struct request *);
1166 void ide_destroy_dmatable(ide_drive_t *);
1167
1168 #ifdef CONFIG_BLK_DEV_IDEDMA_SFF
1169 extern int ide_build_dmatable(ide_drive_t *, struct request *);
1170 int ide_allocate_dma_engine(ide_hwif_t *);
1171 void ide_release_dma_engine(ide_hwif_t *);
1172 void ide_setup_dma(ide_hwif_t *, unsigned long);
1173
1174 void ide_dma_host_set(ide_drive_t *, int);
1175 extern int ide_dma_setup(ide_drive_t *);
1176 void ide_dma_exec_cmd(ide_drive_t *, u8);
1177 extern void ide_dma_start(ide_drive_t *);
1178 extern int __ide_dma_end(ide_drive_t *);
1179 int ide_dma_test_irq(ide_drive_t *);
1180 extern void ide_dma_lost_irq(ide_drive_t *);
1181 extern void ide_dma_timeout(ide_drive_t *);
1182 #endif /* CONFIG_BLK_DEV_IDEDMA_SFF */
1183
1184 #else
1185 static inline int ide_id_dma_bug(ide_drive_t *drive) { return 0; }
1186 static inline u8 ide_find_dma_mode(ide_drive_t *drive, u8 speed) { return 0; }
1187 static inline u8 ide_max_dma_mode(ide_drive_t *drive) { return 0; }
1188 static inline void ide_dma_off_quietly(ide_drive_t *drive) { ; }
1189 static inline void ide_dma_off(ide_drive_t *drive) { ; }
1190 static inline void ide_dma_on(ide_drive_t *drive) { ; }
1191 static inline void ide_dma_verbose(ide_drive_t *drive) { ; }
1192 static inline int ide_set_dma(ide_drive_t *drive) { return 1; }
1193 static inline void ide_check_dma_crc(ide_drive_t *drive) { ; }
1194 #endif /* CONFIG_BLK_DEV_IDEDMA */
1195
1196 #ifndef CONFIG_BLK_DEV_IDEDMA_SFF
1197 static inline void ide_release_dma_engine(ide_hwif_t *hwif) { ; }
1198 #endif
1199
1200 #ifdef CONFIG_BLK_DEV_IDEACPI
1201 extern int ide_acpi_exec_tfs(ide_drive_t *drive);
1202 extern void ide_acpi_get_timing(ide_hwif_t *hwif);
1203 extern void ide_acpi_push_timing(ide_hwif_t *hwif);
1204 extern void ide_acpi_init(ide_hwif_t *hwif);
1205 void ide_acpi_port_init_devices(ide_hwif_t *);
1206 extern void ide_acpi_set_state(ide_hwif_t *hwif, int on);
1207 #else
1208 static inline int ide_acpi_exec_tfs(ide_drive_t *drive) { return 0; }
1209 static inline void ide_acpi_get_timing(ide_hwif_t *hwif) { ; }
1210 static inline void ide_acpi_push_timing(ide_hwif_t *hwif) { ; }
1211 static inline void ide_acpi_init(ide_hwif_t *hwif) { ; }
1212 static inline void ide_acpi_port_init_devices(ide_hwif_t *hwif) { ; }
1213 static inline void ide_acpi_set_state(ide_hwif_t *hwif, int on) {}
1214 #endif
1215
1216 void ide_remove_port_from_hwgroup(ide_hwif_t *);
1217 void ide_unregister(ide_hwif_t *);
1218
1219 void ide_register_region(struct gendisk *);
1220 void ide_unregister_region(struct gendisk *);
1221
1222 void ide_undecoded_slave(ide_drive_t *);
1223
1224 void ide_port_apply_params(ide_hwif_t *);
1225
1226 int ide_device_add_all(u8 *idx, const struct ide_port_info *);
1227 int ide_device_add(u8 idx[4], const struct ide_port_info *);
1228 int ide_legacy_device_add(const struct ide_port_info *, unsigned long);
1229 void ide_port_unregister_devices(ide_hwif_t *);
1230 void ide_port_scan(ide_hwif_t *);
1231
1232 static inline void *ide_get_hwifdata (ide_hwif_t * hwif)
1233 {
1234 return hwif->hwif_data;
1235 }
1236
1237 static inline void ide_set_hwifdata (ide_hwif_t * hwif, void *data)
1238 {
1239 hwif->hwif_data = data;
1240 }
1241
1242 const char *ide_xfer_verbose(u8 mode);
1243 extern void ide_toggle_bounce(ide_drive_t *drive, int on);
1244 extern int ide_set_xfer_rate(ide_drive_t *drive, u8 rate);
1245
1246 static inline int ide_dev_has_iordy(struct hd_driveid *id)
1247 {
1248 return ((id->field_valid & 2) && (id->capability & 8)) ? 1 : 0;
1249 }
1250
1251 static inline int ide_dev_is_sata(struct hd_driveid *id)
1252 {
1253 /*
1254 * See if word 93 is 0 AND drive is at least ATA-5 compatible
1255 * verifying that word 80 by casting it to a signed type --
1256 * this trick allows us to filter out the reserved values of
1257 * 0x0000 and 0xffff along with the earlier ATA revisions...
1258 */
1259 if (id->hw_config == 0 && (short)id->major_rev_num >= 0x0020)
1260 return 1;
1261 return 0;
1262 }
1263
1264 u64 ide_get_lba_addr(struct ide_taskfile *, int);
1265 u8 ide_dump_status(ide_drive_t *, const char *, u8);
1266
1267 typedef struct ide_pio_timings_s {
1268 int setup_time; /* Address setup (ns) minimum */
1269 int active_time; /* Active pulse (ns) minimum */
1270 int cycle_time; /* Cycle time (ns) minimum = */
1271 /* active + recovery (+ setup for some chips) */
1272 } ide_pio_timings_t;
1273
1274 unsigned int ide_pio_cycle_time(ide_drive_t *, u8);
1275 u8 ide_get_best_pio_mode(ide_drive_t *, u8, u8);
1276 extern const ide_pio_timings_t ide_pio_timings[6];
1277
1278 int ide_set_pio_mode(ide_drive_t *, u8);
1279 int ide_set_dma_mode(ide_drive_t *, u8);
1280
1281 void ide_set_pio(ide_drive_t *, u8);
1282
1283 static inline void ide_set_max_pio(ide_drive_t *drive)
1284 {
1285 ide_set_pio(drive, 255);
1286 }
1287
1288 extern spinlock_t ide_lock;
1289 extern struct mutex ide_cfg_mtx;
1290 /*
1291 * Structure locking:
1292 *
1293 * ide_cfg_mtx and ide_lock together protect changes to
1294 * ide_hwif_t->{next,hwgroup}
1295 * ide_drive_t->next
1296 *
1297 * ide_hwgroup_t->busy: ide_lock
1298 * ide_hwgroup_t->hwif: ide_lock
1299 * ide_hwif_t->mate: constant, no locking
1300 * ide_drive_t->hwif: constant, no locking
1301 */
1302
1303 #define local_irq_set(flags) do { local_save_flags((flags)); local_irq_enable_in_hardirq(); } while (0)
1304
1305 extern struct bus_type ide_bus_type;
1306 extern struct class *ide_port_class;
1307
1308 /* check if CACHE FLUSH (EXT) command is supported (bits defined in ATA-6) */
1309 #define ide_id_has_flush_cache(id) ((id)->cfs_enable_2 & 0x3000)
1310
1311 /* some Maxtor disks have bit 13 defined incorrectly so check bit 10 too */
1312 #define ide_id_has_flush_cache_ext(id) \
1313 (((id)->cfs_enable_2 & 0x2400) == 0x2400)
1314
1315 static inline void ide_dump_identify(u8 *id)
1316 {
1317 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
1318 }
1319
1320 static inline int hwif_to_node(ide_hwif_t *hwif)
1321 {
1322 struct pci_dev *dev = to_pci_dev(hwif->dev);
1323 return hwif->dev ? pcibus_to_node(dev->bus) : -1;
1324 }
1325
1326 static inline ide_drive_t *ide_get_paired_drive(ide_drive_t *drive)
1327 {
1328 ide_hwif_t *hwif = HWIF(drive);
1329
1330 return &hwif->drives[(drive->dn ^ 1) & 1];
1331 }
1332
1333 static inline void ide_set_irq(ide_drive_t *drive, int on)
1334 {
1335 ide_hwif_t *hwif = drive->hwif;
1336
1337 hwif->OUTB(drive->ctl | (on ? 0 : 2), hwif->io_ports.ctl_addr);
1338 }
1339
1340 static inline u8 ide_read_status(ide_drive_t *drive)
1341 {
1342 ide_hwif_t *hwif = drive->hwif;
1343
1344 return hwif->INB(hwif->io_ports.status_addr);
1345 }
1346
1347 static inline u8 ide_read_altstatus(ide_drive_t *drive)
1348 {
1349 ide_hwif_t *hwif = drive->hwif;
1350
1351 return hwif->INB(hwif->io_ports.ctl_addr);
1352 }
1353
1354 static inline u8 ide_read_error(ide_drive_t *drive)
1355 {
1356 ide_hwif_t *hwif = drive->hwif;
1357
1358 return hwif->INB(hwif->io_ports.error_addr);
1359 }
1360 #endif /* _IDE_H */
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