qla2xxx: Remove set-but-not-used variables
[linux-2.6/btrfs-unstable.git] / drivers / scsi / qla2xxx / qla_mbx.c
blob65c2dc1e929a95aaf66015e11010d19b3c0f7c08
1 /*
2 * QLogic Fibre Channel HBA Driver
3 * Copyright (c) 2003-2014 QLogic Corporation
5 * See LICENSE.qla2xxx for copyright and licensing details.
6 */
7 #include "qla_def.h"
8 #include "qla_target.h"
10 #include <linux/delay.h>
11 #include <linux/gfp.h>
15 * qla2x00_mailbox_command
16 * Issue mailbox command and waits for completion.
18 * Input:
19 * ha = adapter block pointer.
20 * mcp = driver internal mbx struct pointer.
22 * Output:
23 * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
25 * Returns:
26 * 0 : QLA_SUCCESS = cmd performed success
27 * 1 : QLA_FUNCTION_FAILED (error encountered)
28 * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
30 * Context:
31 * Kernel context.
33 static int
34 qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
36 int rval, i;
37 unsigned long flags = 0;
38 device_reg_t *reg;
39 uint8_t abort_active;
40 uint8_t io_lock_on;
41 uint16_t command = 0;
42 uint16_t *iptr;
43 uint16_t __iomem *optr;
44 uint32_t cnt;
45 uint32_t mboxes;
46 uint16_t __iomem *mbx_reg;
47 unsigned long wait_time;
48 struct qla_hw_data *ha = vha->hw;
49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
52 ql_dbg(ql_dbg_mbx, vha, 0x1000, "Entered %s.\n", __func__);
54 if (ha->pdev->error_state > pci_channel_io_frozen) {
55 ql_log(ql_log_warn, vha, 0x1001,
56 "error_state is greater than pci_channel_io_frozen, "
57 "exiting.\n");
58 return QLA_FUNCTION_TIMEOUT;
61 if (vha->device_flags & DFLG_DEV_FAILED) {
62 ql_log(ql_log_warn, vha, 0x1002,
63 "Device in failed state, exiting.\n");
64 return QLA_FUNCTION_TIMEOUT;
67 reg = ha->iobase;
68 io_lock_on = base_vha->flags.init_done;
70 rval = QLA_SUCCESS;
71 abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
74 if (ha->flags.pci_channel_io_perm_failure) {
75 ql_log(ql_log_warn, vha, 0x1003,
76 "Perm failure on EEH timeout MBX, exiting.\n");
77 return QLA_FUNCTION_TIMEOUT;
80 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
81 /* Setting Link-Down error */
82 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
83 ql_log(ql_log_warn, vha, 0x1004,
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
85 return QLA_FUNCTION_TIMEOUT;
89 * Wait for active mailbox commands to finish by waiting at most tov
90 * seconds. This is to serialize actual issuing of mailbox cmds during
91 * non ISP abort time.
93 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
94 /* Timeout occurred. Return error. */
95 ql_log(ql_log_warn, vha, 0x1005,
96 "Cmd access timeout, cmd=0x%x, Exiting.\n",
97 mcp->mb[0]);
98 return QLA_FUNCTION_TIMEOUT;
101 ha->flags.mbox_busy = 1;
102 /* Save mailbox command for debug */
103 ha->mcp = mcp;
105 ql_dbg(ql_dbg_mbx, vha, 0x1006,
106 "Prepare to issue mbox cmd=0x%x.\n", mcp->mb[0]);
108 spin_lock_irqsave(&ha->hardware_lock, flags);
110 /* Load mailbox registers. */
111 if (IS_P3P_TYPE(ha))
112 optr = (uint16_t __iomem *)&reg->isp82.mailbox_in[0];
113 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha)))
114 optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
115 else
116 optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
118 iptr = mcp->mb;
119 command = mcp->mb[0];
120 mboxes = mcp->out_mb;
122 ql_dbg(ql_dbg_mbx, vha, 0x1111,
123 "Mailbox registers (OUT):\n");
124 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
125 if (IS_QLA2200(ha) && cnt == 8)
126 optr =
127 (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
128 if (mboxes & BIT_0) {
129 ql_dbg(ql_dbg_mbx, vha, 0x1112,
130 "mbox[%d]<-0x%04x\n", cnt, *iptr);
131 WRT_REG_WORD(optr, *iptr);
134 mboxes >>= 1;
135 optr++;
136 iptr++;
139 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1117,
140 "I/O Address = %p.\n", optr);
142 /* Issue set host interrupt command to send cmd out. */
143 ha->flags.mbox_int = 0;
144 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
146 /* Unlock mbx registers and wait for interrupt */
147 ql_dbg(ql_dbg_mbx, vha, 0x100f,
148 "Going to unlock irq & waiting for interrupts. "
149 "jiffies=%lx.\n", jiffies);
151 /* Wait for mbx cmd completion until timeout */
153 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
154 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
156 if (IS_P3P_TYPE(ha)) {
157 if (RD_REG_DWORD(&reg->isp82.hint) &
158 HINT_MBX_INT_PENDING) {
159 spin_unlock_irqrestore(&ha->hardware_lock,
160 flags);
161 ha->flags.mbox_busy = 0;
162 ql_dbg(ql_dbg_mbx, vha, 0x1010,
163 "Pending mailbox timeout, exiting.\n");
164 rval = QLA_FUNCTION_TIMEOUT;
165 goto premature_exit;
167 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
168 } else if (IS_FWI2_CAPABLE(ha))
169 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
170 else
171 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
172 spin_unlock_irqrestore(&ha->hardware_lock, flags);
174 if (!wait_for_completion_timeout(&ha->mbx_intr_comp,
175 mcp->tov * HZ)) {
176 ql_dbg(ql_dbg_mbx, vha, 0x117a,
177 "cmd=%x Timeout.\n", command);
178 spin_lock_irqsave(&ha->hardware_lock, flags);
179 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
180 spin_unlock_irqrestore(&ha->hardware_lock, flags);
182 } else {
183 ql_dbg(ql_dbg_mbx, vha, 0x1011,
184 "Cmd=%x Polling Mode.\n", command);
186 if (IS_P3P_TYPE(ha)) {
187 if (RD_REG_DWORD(&reg->isp82.hint) &
188 HINT_MBX_INT_PENDING) {
189 spin_unlock_irqrestore(&ha->hardware_lock,
190 flags);
191 ha->flags.mbox_busy = 0;
192 ql_dbg(ql_dbg_mbx, vha, 0x1012,
193 "Pending mailbox timeout, exiting.\n");
194 rval = QLA_FUNCTION_TIMEOUT;
195 goto premature_exit;
197 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING);
198 } else if (IS_FWI2_CAPABLE(ha))
199 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
200 else
201 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
202 spin_unlock_irqrestore(&ha->hardware_lock, flags);
204 wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
205 while (!ha->flags.mbox_int) {
206 if (time_after(jiffies, wait_time))
207 break;
209 /* Check for pending interrupts. */
210 qla2x00_poll(ha->rsp_q_map[0]);
212 if (!ha->flags.mbox_int &&
213 !(IS_QLA2200(ha) &&
214 command == MBC_LOAD_RISC_RAM_EXTENDED))
215 msleep(10);
216 } /* while */
217 ql_dbg(ql_dbg_mbx, vha, 0x1013,
218 "Waited %d sec.\n",
219 (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ));
222 /* Check whether we timed out */
223 if (ha->flags.mbox_int) {
224 uint16_t *iptr2;
226 ql_dbg(ql_dbg_mbx, vha, 0x1014,
227 "Cmd=%x completed.\n", command);
229 /* Got interrupt. Clear the flag. */
230 ha->flags.mbox_int = 0;
231 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
233 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) {
234 ha->flags.mbox_busy = 0;
235 /* Setting Link-Down error */
236 mcp->mb[0] = MBS_LINK_DOWN_ERROR;
237 ha->mcp = NULL;
238 rval = QLA_FUNCTION_FAILED;
239 ql_log(ql_log_warn, vha, 0x1015,
240 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung);
241 goto premature_exit;
244 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
245 rval = QLA_FUNCTION_FAILED;
247 /* Load return mailbox registers. */
248 iptr2 = mcp->mb;
249 iptr = (uint16_t *)&ha->mailbox_out[0];
250 mboxes = mcp->in_mb;
252 ql_dbg(ql_dbg_mbx, vha, 0x1113,
253 "Mailbox registers (IN):\n");
254 for (cnt = 0; cnt < ha->mbx_count; cnt++) {
255 if (mboxes & BIT_0) {
256 *iptr2 = *iptr;
257 ql_dbg(ql_dbg_mbx, vha, 0x1114,
258 "mbox[%d]->0x%04x\n", cnt, *iptr2);
261 mboxes >>= 1;
262 iptr2++;
263 iptr++;
265 } else {
267 uint16_t mb0;
268 uint32_t ictrl;
270 if (IS_FWI2_CAPABLE(ha)) {
271 mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
272 ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
273 } else {
274 mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
275 ictrl = RD_REG_WORD(&reg->isp.ictrl);
277 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1119,
278 "MBX Command timeout for cmd %x, iocontrol=%x jiffies=%lx "
279 "mb[0]=0x%x\n", command, ictrl, jiffies, mb0);
280 ql_dump_regs(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1019);
283 * Attempt to capture a firmware dump for further analysis
284 * of the current firmware state. We do not need to do this
285 * if we are intentionally generating a dump.
287 if (mcp->mb[0] != MBC_GEN_SYSTEM_ERROR)
288 ha->isp_ops->fw_dump(vha, 0);
290 rval = QLA_FUNCTION_TIMEOUT;
293 ha->flags.mbox_busy = 0;
295 /* Clean up */
296 ha->mcp = NULL;
298 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
299 ql_dbg(ql_dbg_mbx, vha, 0x101a,
300 "Checking for additional resp interrupt.\n");
302 /* polling mode for non isp_abort commands. */
303 qla2x00_poll(ha->rsp_q_map[0]);
306 if (rval == QLA_FUNCTION_TIMEOUT &&
307 mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
308 if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
309 ha->flags.eeh_busy) {
310 /* not in dpc. schedule it for dpc to take over. */
311 ql_dbg(ql_dbg_mbx, vha, 0x101b,
312 "Timeout, schedule isp_abort_needed.\n");
314 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
315 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
316 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
317 if (IS_QLA82XX(ha)) {
318 ql_dbg(ql_dbg_mbx, vha, 0x112a,
319 "disabling pause transmit on port "
320 "0 & 1.\n");
321 qla82xx_wr_32(ha,
322 QLA82XX_CRB_NIU + 0x98,
323 CRB_NIU_XG_PAUSE_CTL_P0|
324 CRB_NIU_XG_PAUSE_CTL_P1);
326 ql_log(ql_log_info, base_vha, 0x101c,
327 "Mailbox cmd timeout occurred, cmd=0x%x, "
328 "mb[0]=0x%x, eeh_busy=0x%x. Scheduling ISP "
329 "abort.\n", command, mcp->mb[0],
330 ha->flags.eeh_busy);
331 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
332 qla2xxx_wake_dpc(vha);
334 } else if (!abort_active) {
335 /* call abort directly since we are in the DPC thread */
336 ql_dbg(ql_dbg_mbx, vha, 0x101d,
337 "Timeout, calling abort_isp.\n");
339 if (!test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) &&
340 !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
341 !test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
342 if (IS_QLA82XX(ha)) {
343 ql_dbg(ql_dbg_mbx, vha, 0x112b,
344 "disabling pause transmit on port "
345 "0 & 1.\n");
346 qla82xx_wr_32(ha,
347 QLA82XX_CRB_NIU + 0x98,
348 CRB_NIU_XG_PAUSE_CTL_P0|
349 CRB_NIU_XG_PAUSE_CTL_P1);
351 ql_log(ql_log_info, base_vha, 0x101e,
352 "Mailbox cmd timeout occurred, cmd=0x%x, "
353 "mb[0]=0x%x. Scheduling ISP abort ",
354 command, mcp->mb[0]);
355 set_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
356 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
357 /* Allow next mbx cmd to come in. */
358 complete(&ha->mbx_cmd_comp);
359 if (ha->isp_ops->abort_isp(vha)) {
360 /* Failed. retry later. */
361 set_bit(ISP_ABORT_NEEDED,
362 &vha->dpc_flags);
364 clear_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags);
365 ql_dbg(ql_dbg_mbx, vha, 0x101f,
366 "Finished abort_isp.\n");
367 goto mbx_done;
372 premature_exit:
373 /* Allow next mbx cmd to come in. */
374 complete(&ha->mbx_cmd_comp);
376 mbx_done:
377 if (rval) {
378 ql_dbg(ql_dbg_disc, base_vha, 0x1020,
379 "**** Failed mbx[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x, cmd=%x ****.\n",
380 mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3], command);
382 ql_dbg(ql_dbg_disc, vha, 0x1115,
383 "host status: 0x%x, flags:0x%lx, intr ctrl reg:0x%x, intr status:0x%x\n",
384 RD_REG_DWORD(&reg->isp24.host_status),
385 ha->fw_dump_cap_flags,
386 RD_REG_DWORD(&reg->isp24.ictrl),
387 RD_REG_DWORD(&reg->isp24.istatus));
389 mbx_reg = &reg->isp24.mailbox0;
390 for (i = 0; i < 6; i++)
391 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x1116,
392 "mbox[%d] 0x%04x\n", i, RD_REG_WORD(mbx_reg++));
393 } else {
394 ql_dbg(ql_dbg_mbx, base_vha, 0x1021, "Done %s.\n", __func__);
397 return rval;
401 qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
402 uint32_t risc_code_size)
404 int rval;
405 struct qla_hw_data *ha = vha->hw;
406 mbx_cmd_t mc;
407 mbx_cmd_t *mcp = &mc;
409 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1022,
410 "Entered %s.\n", __func__);
412 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
413 mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
414 mcp->mb[8] = MSW(risc_addr);
415 mcp->out_mb = MBX_8|MBX_0;
416 } else {
417 mcp->mb[0] = MBC_LOAD_RISC_RAM;
418 mcp->out_mb = MBX_0;
420 mcp->mb[1] = LSW(risc_addr);
421 mcp->mb[2] = MSW(req_dma);
422 mcp->mb[3] = LSW(req_dma);
423 mcp->mb[6] = MSW(MSD(req_dma));
424 mcp->mb[7] = LSW(MSD(req_dma));
425 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
426 if (IS_FWI2_CAPABLE(ha)) {
427 mcp->mb[4] = MSW(risc_code_size);
428 mcp->mb[5] = LSW(risc_code_size);
429 mcp->out_mb |= MBX_5|MBX_4;
430 } else {
431 mcp->mb[4] = LSW(risc_code_size);
432 mcp->out_mb |= MBX_4;
435 mcp->in_mb = MBX_0;
436 mcp->tov = MBX_TOV_SECONDS;
437 mcp->flags = 0;
438 rval = qla2x00_mailbox_command(vha, mcp);
440 if (rval != QLA_SUCCESS) {
441 ql_dbg(ql_dbg_mbx, vha, 0x1023,
442 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
443 } else {
444 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1024,
445 "Done %s.\n", __func__);
448 return rval;
451 #define EXTENDED_BB_CREDITS BIT_0
453 * qla2x00_execute_fw
454 * Start adapter firmware.
456 * Input:
457 * ha = adapter block pointer.
458 * TARGET_QUEUE_LOCK must be released.
459 * ADAPTER_STATE_LOCK must be released.
461 * Returns:
462 * qla2x00 local function return status code.
464 * Context:
465 * Kernel context.
468 qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
470 int rval;
471 struct qla_hw_data *ha = vha->hw;
472 mbx_cmd_t mc;
473 mbx_cmd_t *mcp = &mc;
475 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1025,
476 "Entered %s.\n", __func__);
478 mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
479 mcp->out_mb = MBX_0;
480 mcp->in_mb = MBX_0;
481 if (IS_FWI2_CAPABLE(ha)) {
482 mcp->mb[1] = MSW(risc_addr);
483 mcp->mb[2] = LSW(risc_addr);
484 mcp->mb[3] = 0;
485 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) ||
486 IS_QLA27XX(ha)) {
487 struct nvram_81xx *nv = ha->nvram;
488 mcp->mb[4] = (nv->enhanced_features &
489 EXTENDED_BB_CREDITS);
490 } else
491 mcp->mb[4] = 0;
492 mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
493 mcp->in_mb |= MBX_1;
494 } else {
495 mcp->mb[1] = LSW(risc_addr);
496 mcp->out_mb |= MBX_1;
497 if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
498 mcp->mb[2] = 0;
499 mcp->out_mb |= MBX_2;
503 mcp->tov = MBX_TOV_SECONDS;
504 mcp->flags = 0;
505 rval = qla2x00_mailbox_command(vha, mcp);
507 if (rval != QLA_SUCCESS) {
508 ql_dbg(ql_dbg_mbx, vha, 0x1026,
509 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
510 } else {
511 if (IS_FWI2_CAPABLE(ha)) {
512 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1027,
513 "Done exchanges=%x.\n", mcp->mb[1]);
514 } else {
515 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1028,
516 "Done %s.\n", __func__);
520 return rval;
524 * qla2x00_get_fw_version
525 * Get firmware version.
527 * Input:
528 * ha: adapter state pointer.
529 * major: pointer for major number.
530 * minor: pointer for minor number.
531 * subminor: pointer for subminor number.
533 * Returns:
534 * qla2x00 local function return status code.
536 * Context:
537 * Kernel context.
540 qla2x00_get_fw_version(scsi_qla_host_t *vha)
542 int rval;
543 mbx_cmd_t mc;
544 mbx_cmd_t *mcp = &mc;
545 struct qla_hw_data *ha = vha->hw;
547 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1029,
548 "Entered %s.\n", __func__);
550 mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
551 mcp->out_mb = MBX_0;
552 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
553 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha))
554 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
555 if (IS_FWI2_CAPABLE(ha))
556 mcp->in_mb |= MBX_17|MBX_16|MBX_15;
557 if (IS_QLA27XX(ha))
558 mcp->in_mb |= MBX_21|MBX_20|MBX_19|MBX_18;
559 mcp->flags = 0;
560 mcp->tov = MBX_TOV_SECONDS;
561 rval = qla2x00_mailbox_command(vha, mcp);
562 if (rval != QLA_SUCCESS)
563 goto failed;
565 /* Return mailbox data. */
566 ha->fw_major_version = mcp->mb[1];
567 ha->fw_minor_version = mcp->mb[2];
568 ha->fw_subminor_version = mcp->mb[3];
569 ha->fw_attributes = mcp->mb[6];
570 if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
571 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */
572 else
573 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4];
574 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
575 ha->mpi_version[0] = mcp->mb[10] & 0xff;
576 ha->mpi_version[1] = mcp->mb[11] >> 8;
577 ha->mpi_version[2] = mcp->mb[11] & 0xff;
578 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13];
579 ha->phy_version[0] = mcp->mb[8] & 0xff;
580 ha->phy_version[1] = mcp->mb[9] >> 8;
581 ha->phy_version[2] = mcp->mb[9] & 0xff;
583 if (IS_FWI2_CAPABLE(ha)) {
584 ha->fw_attributes_h = mcp->mb[15];
585 ha->fw_attributes_ext[0] = mcp->mb[16];
586 ha->fw_attributes_ext[1] = mcp->mb[17];
587 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1139,
588 "%s: FW_attributes Upper: 0x%x, Lower: 0x%x.\n",
589 __func__, mcp->mb[15], mcp->mb[6]);
590 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x112f,
591 "%s: Ext_FwAttributes Upper: 0x%x, Lower: 0x%x.\n",
592 __func__, mcp->mb[17], mcp->mb[16]);
594 if (IS_QLA27XX(ha)) {
595 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18];
596 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20];
599 failed:
600 if (rval != QLA_SUCCESS) {
601 /*EMPTY*/
602 ql_dbg(ql_dbg_mbx, vha, 0x102a, "Failed=%x.\n", rval);
603 } else {
604 /*EMPTY*/
605 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102b,
606 "Done %s.\n", __func__);
608 return rval;
612 * qla2x00_get_fw_options
613 * Set firmware options.
615 * Input:
616 * ha = adapter block pointer.
617 * fwopt = pointer for firmware options.
619 * Returns:
620 * qla2x00 local function return status code.
622 * Context:
623 * Kernel context.
626 qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
628 int rval;
629 mbx_cmd_t mc;
630 mbx_cmd_t *mcp = &mc;
632 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102c,
633 "Entered %s.\n", __func__);
635 mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
636 mcp->out_mb = MBX_0;
637 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
638 mcp->tov = MBX_TOV_SECONDS;
639 mcp->flags = 0;
640 rval = qla2x00_mailbox_command(vha, mcp);
642 if (rval != QLA_SUCCESS) {
643 /*EMPTY*/
644 ql_dbg(ql_dbg_mbx, vha, 0x102d, "Failed=%x.\n", rval);
645 } else {
646 fwopts[0] = mcp->mb[0];
647 fwopts[1] = mcp->mb[1];
648 fwopts[2] = mcp->mb[2];
649 fwopts[3] = mcp->mb[3];
651 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102e,
652 "Done %s.\n", __func__);
655 return rval;
660 * qla2x00_set_fw_options
661 * Set firmware options.
663 * Input:
664 * ha = adapter block pointer.
665 * fwopt = pointer for firmware options.
667 * Returns:
668 * qla2x00 local function return status code.
670 * Context:
671 * Kernel context.
674 qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
676 int rval;
677 mbx_cmd_t mc;
678 mbx_cmd_t *mcp = &mc;
680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x102f,
681 "Entered %s.\n", __func__);
683 mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
684 mcp->mb[1] = fwopts[1];
685 mcp->mb[2] = fwopts[2];
686 mcp->mb[3] = fwopts[3];
687 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
688 mcp->in_mb = MBX_0;
689 if (IS_FWI2_CAPABLE(vha->hw)) {
690 mcp->in_mb |= MBX_1;
691 } else {
692 mcp->mb[10] = fwopts[10];
693 mcp->mb[11] = fwopts[11];
694 mcp->mb[12] = 0; /* Undocumented, but used */
695 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
697 mcp->tov = MBX_TOV_SECONDS;
698 mcp->flags = 0;
699 rval = qla2x00_mailbox_command(vha, mcp);
701 fwopts[0] = mcp->mb[0];
703 if (rval != QLA_SUCCESS) {
704 /*EMPTY*/
705 ql_dbg(ql_dbg_mbx, vha, 0x1030,
706 "Failed=%x (%x/%x).\n", rval, mcp->mb[0], mcp->mb[1]);
707 } else {
708 /*EMPTY*/
709 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1031,
710 "Done %s.\n", __func__);
713 return rval;
717 * qla2x00_mbx_reg_test
718 * Mailbox register wrap test.
720 * Input:
721 * ha = adapter block pointer.
722 * TARGET_QUEUE_LOCK must be released.
723 * ADAPTER_STATE_LOCK must be released.
725 * Returns:
726 * qla2x00 local function return status code.
728 * Context:
729 * Kernel context.
732 qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
734 int rval;
735 mbx_cmd_t mc;
736 mbx_cmd_t *mcp = &mc;
738 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1032,
739 "Entered %s.\n", __func__);
741 mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
742 mcp->mb[1] = 0xAAAA;
743 mcp->mb[2] = 0x5555;
744 mcp->mb[3] = 0xAA55;
745 mcp->mb[4] = 0x55AA;
746 mcp->mb[5] = 0xA5A5;
747 mcp->mb[6] = 0x5A5A;
748 mcp->mb[7] = 0x2525;
749 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
750 mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
751 mcp->tov = MBX_TOV_SECONDS;
752 mcp->flags = 0;
753 rval = qla2x00_mailbox_command(vha, mcp);
755 if (rval == QLA_SUCCESS) {
756 if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
757 mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
758 rval = QLA_FUNCTION_FAILED;
759 if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
760 mcp->mb[7] != 0x2525)
761 rval = QLA_FUNCTION_FAILED;
764 if (rval != QLA_SUCCESS) {
765 /*EMPTY*/
766 ql_dbg(ql_dbg_mbx, vha, 0x1033, "Failed=%x.\n", rval);
767 } else {
768 /*EMPTY*/
769 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1034,
770 "Done %s.\n", __func__);
773 return rval;
777 * qla2x00_verify_checksum
778 * Verify firmware checksum.
780 * Input:
781 * ha = adapter block pointer.
782 * TARGET_QUEUE_LOCK must be released.
783 * ADAPTER_STATE_LOCK must be released.
785 * Returns:
786 * qla2x00 local function return status code.
788 * Context:
789 * Kernel context.
792 qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
794 int rval;
795 mbx_cmd_t mc;
796 mbx_cmd_t *mcp = &mc;
798 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1035,
799 "Entered %s.\n", __func__);
801 mcp->mb[0] = MBC_VERIFY_CHECKSUM;
802 mcp->out_mb = MBX_0;
803 mcp->in_mb = MBX_0;
804 if (IS_FWI2_CAPABLE(vha->hw)) {
805 mcp->mb[1] = MSW(risc_addr);
806 mcp->mb[2] = LSW(risc_addr);
807 mcp->out_mb |= MBX_2|MBX_1;
808 mcp->in_mb |= MBX_2|MBX_1;
809 } else {
810 mcp->mb[1] = LSW(risc_addr);
811 mcp->out_mb |= MBX_1;
812 mcp->in_mb |= MBX_1;
815 mcp->tov = MBX_TOV_SECONDS;
816 mcp->flags = 0;
817 rval = qla2x00_mailbox_command(vha, mcp);
819 if (rval != QLA_SUCCESS) {
820 ql_dbg(ql_dbg_mbx, vha, 0x1036,
821 "Failed=%x chm sum=%x.\n", rval, IS_FWI2_CAPABLE(vha->hw) ?
822 (mcp->mb[2] << 16) | mcp->mb[1] : mcp->mb[1]);
823 } else {
824 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1037,
825 "Done %s.\n", __func__);
828 return rval;
832 * qla2x00_issue_iocb
833 * Issue IOCB using mailbox command
835 * Input:
836 * ha = adapter state pointer.
837 * buffer = buffer pointer.
838 * phys_addr = physical address of buffer.
839 * size = size of buffer.
840 * TARGET_QUEUE_LOCK must be released.
841 * ADAPTER_STATE_LOCK must be released.
843 * Returns:
844 * qla2x00 local function return status code.
846 * Context:
847 * Kernel context.
850 qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
851 dma_addr_t phys_addr, size_t size, uint32_t tov)
853 int rval;
854 mbx_cmd_t mc;
855 mbx_cmd_t *mcp = &mc;
857 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1038,
858 "Entered %s.\n", __func__);
860 mcp->mb[0] = MBC_IOCB_COMMAND_A64;
861 mcp->mb[1] = 0;
862 mcp->mb[2] = MSW(phys_addr);
863 mcp->mb[3] = LSW(phys_addr);
864 mcp->mb[6] = MSW(MSD(phys_addr));
865 mcp->mb[7] = LSW(MSD(phys_addr));
866 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
867 mcp->in_mb = MBX_2|MBX_0;
868 mcp->tov = tov;
869 mcp->flags = 0;
870 rval = qla2x00_mailbox_command(vha, mcp);
872 if (rval != QLA_SUCCESS) {
873 /*EMPTY*/
874 ql_dbg(ql_dbg_mbx, vha, 0x1039, "Failed=%x.\n", rval);
875 } else {
876 sts_entry_t *sts_entry = (sts_entry_t *) buffer;
878 /* Mask reserved bits. */
879 sts_entry->entry_status &=
880 IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
881 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103a,
882 "Done %s.\n", __func__);
885 return rval;
889 qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
890 size_t size)
892 return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
893 MBX_TOV_SECONDS);
897 * qla2x00_abort_command
898 * Abort command aborts a specified IOCB.
900 * Input:
901 * ha = adapter block pointer.
902 * sp = SB structure pointer.
904 * Returns:
905 * qla2x00 local function return status code.
907 * Context:
908 * Kernel context.
911 qla2x00_abort_command(srb_t *sp)
913 unsigned long flags = 0;
914 int rval;
915 uint32_t handle = 0;
916 mbx_cmd_t mc;
917 mbx_cmd_t *mcp = &mc;
918 fc_port_t *fcport = sp->fcport;
919 scsi_qla_host_t *vha = fcport->vha;
920 struct qla_hw_data *ha = vha->hw;
921 struct req_que *req = vha->req;
922 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
924 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103b,
925 "Entered %s.\n", __func__);
927 spin_lock_irqsave(&ha->hardware_lock, flags);
928 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
929 if (req->outstanding_cmds[handle] == sp)
930 break;
932 spin_unlock_irqrestore(&ha->hardware_lock, flags);
934 if (handle == req->num_outstanding_cmds) {
935 /* command not found */
936 return QLA_FUNCTION_FAILED;
939 mcp->mb[0] = MBC_ABORT_COMMAND;
940 if (HAS_EXTENDED_IDS(ha))
941 mcp->mb[1] = fcport->loop_id;
942 else
943 mcp->mb[1] = fcport->loop_id << 8;
944 mcp->mb[2] = (uint16_t)handle;
945 mcp->mb[3] = (uint16_t)(handle >> 16);
946 mcp->mb[6] = (uint16_t)cmd->device->lun;
947 mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
948 mcp->in_mb = MBX_0;
949 mcp->tov = MBX_TOV_SECONDS;
950 mcp->flags = 0;
951 rval = qla2x00_mailbox_command(vha, mcp);
953 if (rval != QLA_SUCCESS) {
954 ql_dbg(ql_dbg_mbx, vha, 0x103c, "Failed=%x.\n", rval);
955 } else {
956 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103d,
957 "Done %s.\n", __func__);
960 return rval;
964 qla2x00_abort_target(struct fc_port *fcport, uint64_t l, int tag)
966 int rval, rval2;
967 mbx_cmd_t mc;
968 mbx_cmd_t *mcp = &mc;
969 scsi_qla_host_t *vha;
970 struct req_que *req;
971 struct rsp_que *rsp;
973 l = l;
974 vha = fcport->vha;
976 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103e,
977 "Entered %s.\n", __func__);
979 req = vha->hw->req_q_map[0];
980 rsp = req->rsp;
981 mcp->mb[0] = MBC_ABORT_TARGET;
982 mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
983 if (HAS_EXTENDED_IDS(vha->hw)) {
984 mcp->mb[1] = fcport->loop_id;
985 mcp->mb[10] = 0;
986 mcp->out_mb |= MBX_10;
987 } else {
988 mcp->mb[1] = fcport->loop_id << 8;
990 mcp->mb[2] = vha->hw->loop_reset_delay;
991 mcp->mb[9] = vha->vp_idx;
993 mcp->in_mb = MBX_0;
994 mcp->tov = MBX_TOV_SECONDS;
995 mcp->flags = 0;
996 rval = qla2x00_mailbox_command(vha, mcp);
997 if (rval != QLA_SUCCESS) {
998 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x103f,
999 "Failed=%x.\n", rval);
1002 /* Issue marker IOCB. */
1003 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
1004 MK_SYNC_ID);
1005 if (rval2 != QLA_SUCCESS) {
1006 ql_dbg(ql_dbg_mbx, vha, 0x1040,
1007 "Failed to issue marker IOCB (%x).\n", rval2);
1008 } else {
1009 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1041,
1010 "Done %s.\n", __func__);
1013 return rval;
1017 qla2x00_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
1019 int rval, rval2;
1020 mbx_cmd_t mc;
1021 mbx_cmd_t *mcp = &mc;
1022 scsi_qla_host_t *vha;
1023 struct req_que *req;
1024 struct rsp_que *rsp;
1026 vha = fcport->vha;
1028 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1042,
1029 "Entered %s.\n", __func__);
1031 req = vha->hw->req_q_map[0];
1032 rsp = req->rsp;
1033 mcp->mb[0] = MBC_LUN_RESET;
1034 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
1035 if (HAS_EXTENDED_IDS(vha->hw))
1036 mcp->mb[1] = fcport->loop_id;
1037 else
1038 mcp->mb[1] = fcport->loop_id << 8;
1039 mcp->mb[2] = (u32)l;
1040 mcp->mb[3] = 0;
1041 mcp->mb[9] = vha->vp_idx;
1043 mcp->in_mb = MBX_0;
1044 mcp->tov = MBX_TOV_SECONDS;
1045 mcp->flags = 0;
1046 rval = qla2x00_mailbox_command(vha, mcp);
1047 if (rval != QLA_SUCCESS) {
1048 ql_dbg(ql_dbg_mbx, vha, 0x1043, "Failed=%x.\n", rval);
1051 /* Issue marker IOCB. */
1052 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
1053 MK_SYNC_ID_LUN);
1054 if (rval2 != QLA_SUCCESS) {
1055 ql_dbg(ql_dbg_mbx, vha, 0x1044,
1056 "Failed to issue marker IOCB (%x).\n", rval2);
1057 } else {
1058 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1045,
1059 "Done %s.\n", __func__);
1062 return rval;
1066 * qla2x00_get_adapter_id
1067 * Get adapter ID and topology.
1069 * Input:
1070 * ha = adapter block pointer.
1071 * id = pointer for loop ID.
1072 * al_pa = pointer for AL_PA.
1073 * area = pointer for area.
1074 * domain = pointer for domain.
1075 * top = pointer for topology.
1076 * TARGET_QUEUE_LOCK must be released.
1077 * ADAPTER_STATE_LOCK must be released.
1079 * Returns:
1080 * qla2x00 local function return status code.
1082 * Context:
1083 * Kernel context.
1086 qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
1087 uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
1089 int rval;
1090 mbx_cmd_t mc;
1091 mbx_cmd_t *mcp = &mc;
1093 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1046,
1094 "Entered %s.\n", __func__);
1096 mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
1097 mcp->mb[9] = vha->vp_idx;
1098 mcp->out_mb = MBX_9|MBX_0;
1099 mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1100 if (IS_CNA_CAPABLE(vha->hw))
1101 mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
1102 if (IS_FWI2_CAPABLE(vha->hw))
1103 mcp->in_mb |= MBX_19|MBX_18|MBX_17|MBX_16;
1104 mcp->tov = MBX_TOV_SECONDS;
1105 mcp->flags = 0;
1106 rval = qla2x00_mailbox_command(vha, mcp);
1107 if (mcp->mb[0] == MBS_COMMAND_ERROR)
1108 rval = QLA_COMMAND_ERROR;
1109 else if (mcp->mb[0] == MBS_INVALID_COMMAND)
1110 rval = QLA_INVALID_COMMAND;
1112 /* Return data. */
1113 *id = mcp->mb[1];
1114 *al_pa = LSB(mcp->mb[2]);
1115 *area = MSB(mcp->mb[2]);
1116 *domain = LSB(mcp->mb[3]);
1117 *top = mcp->mb[6];
1118 *sw_cap = mcp->mb[7];
1120 if (rval != QLA_SUCCESS) {
1121 /*EMPTY*/
1122 ql_dbg(ql_dbg_mbx, vha, 0x1047, "Failed=%x.\n", rval);
1123 } else {
1124 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1048,
1125 "Done %s.\n", __func__);
1127 if (IS_CNA_CAPABLE(vha->hw)) {
1128 vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
1129 vha->fcoe_fcf_idx = mcp->mb[10];
1130 vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
1131 vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
1132 vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
1133 vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
1134 vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
1135 vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
1137 /* If FA-WWN supported */
1138 if (mcp->mb[7] & BIT_14) {
1139 vha->port_name[0] = MSB(mcp->mb[16]);
1140 vha->port_name[1] = LSB(mcp->mb[16]);
1141 vha->port_name[2] = MSB(mcp->mb[17]);
1142 vha->port_name[3] = LSB(mcp->mb[17]);
1143 vha->port_name[4] = MSB(mcp->mb[18]);
1144 vha->port_name[5] = LSB(mcp->mb[18]);
1145 vha->port_name[6] = MSB(mcp->mb[19]);
1146 vha->port_name[7] = LSB(mcp->mb[19]);
1147 fc_host_port_name(vha->host) =
1148 wwn_to_u64(vha->port_name);
1149 ql_dbg(ql_dbg_mbx, vha, 0x10ca,
1150 "FA-WWN acquired %016llx\n",
1151 wwn_to_u64(vha->port_name));
1155 return rval;
1159 * qla2x00_get_retry_cnt
1160 * Get current firmware login retry count and delay.
1162 * Input:
1163 * ha = adapter block pointer.
1164 * retry_cnt = pointer to login retry count.
1165 * tov = pointer to login timeout value.
1167 * Returns:
1168 * qla2x00 local function return status code.
1170 * Context:
1171 * Kernel context.
1174 qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
1175 uint16_t *r_a_tov)
1177 int rval;
1178 uint16_t ratov;
1179 mbx_cmd_t mc;
1180 mbx_cmd_t *mcp = &mc;
1182 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1049,
1183 "Entered %s.\n", __func__);
1185 mcp->mb[0] = MBC_GET_RETRY_COUNT;
1186 mcp->out_mb = MBX_0;
1187 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1188 mcp->tov = MBX_TOV_SECONDS;
1189 mcp->flags = 0;
1190 rval = qla2x00_mailbox_command(vha, mcp);
1192 if (rval != QLA_SUCCESS) {
1193 /*EMPTY*/
1194 ql_dbg(ql_dbg_mbx, vha, 0x104a,
1195 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
1196 } else {
1197 /* Convert returned data and check our values. */
1198 *r_a_tov = mcp->mb[3] / 2;
1199 ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
1200 if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
1201 /* Update to the larger values */
1202 *retry_cnt = (uint8_t)mcp->mb[1];
1203 *tov = ratov;
1206 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104b,
1207 "Done %s mb3=%d ratov=%d.\n", __func__, mcp->mb[3], ratov);
1210 return rval;
1214 * qla2x00_init_firmware
1215 * Initialize adapter firmware.
1217 * Input:
1218 * ha = adapter block pointer.
1219 * dptr = Initialization control block pointer.
1220 * size = size of initialization control block.
1221 * TARGET_QUEUE_LOCK must be released.
1222 * ADAPTER_STATE_LOCK must be released.
1224 * Returns:
1225 * qla2x00 local function return status code.
1227 * Context:
1228 * Kernel context.
1231 qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
1233 int rval;
1234 mbx_cmd_t mc;
1235 mbx_cmd_t *mcp = &mc;
1236 struct qla_hw_data *ha = vha->hw;
1238 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104c,
1239 "Entered %s.\n", __func__);
1241 if (IS_P3P_TYPE(ha) && ql2xdbwr)
1242 qla82xx_wr_32(ha, ha->nxdb_wr_ptr,
1243 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16)));
1245 if (ha->flags.npiv_supported)
1246 mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
1247 else
1248 mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
1250 mcp->mb[1] = 0;
1251 mcp->mb[2] = MSW(ha->init_cb_dma);
1252 mcp->mb[3] = LSW(ha->init_cb_dma);
1253 mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
1254 mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
1255 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1256 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) {
1257 mcp->mb[1] = BIT_0;
1258 mcp->mb[10] = MSW(ha->ex_init_cb_dma);
1259 mcp->mb[11] = LSW(ha->ex_init_cb_dma);
1260 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
1261 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
1262 mcp->mb[14] = sizeof(*ha->ex_init_cb);
1263 mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
1265 /* 1 and 2 should normally be captured. */
1266 mcp->in_mb = MBX_2|MBX_1|MBX_0;
1267 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
1268 /* mb3 is additional info about the installed SFP. */
1269 mcp->in_mb |= MBX_3;
1270 mcp->buf_size = size;
1271 mcp->flags = MBX_DMA_OUT;
1272 mcp->tov = MBX_TOV_SECONDS;
1273 rval = qla2x00_mailbox_command(vha, mcp);
1275 if (rval != QLA_SUCCESS) {
1276 /*EMPTY*/
1277 ql_dbg(ql_dbg_mbx, vha, 0x104d,
1278 "Failed=%x mb[0]=%x, mb[1]=%x, mb[2]=%x, mb[3]=%x,.\n",
1279 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3]);
1280 } else {
1281 /*EMPTY*/
1282 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104e,
1283 "Done %s.\n", __func__);
1286 return rval;
1290 * qla2x00_get_node_name_list
1291 * Issue get node name list mailbox command, kmalloc()
1292 * and return the resulting list. Caller must kfree() it!
1294 * Input:
1295 * ha = adapter state pointer.
1296 * out_data = resulting list
1297 * out_len = length of the resulting list
1299 * Returns:
1300 * qla2x00 local function return status code.
1302 * Context:
1303 * Kernel context.
1306 qla2x00_get_node_name_list(scsi_qla_host_t *vha, void **out_data, int *out_len)
1308 struct qla_hw_data *ha = vha->hw;
1309 struct qla_port_24xx_data *list = NULL;
1310 void *pmap;
1311 mbx_cmd_t mc;
1312 dma_addr_t pmap_dma;
1313 ulong dma_size;
1314 int rval, left;
1316 left = 1;
1317 while (left > 0) {
1318 dma_size = left * sizeof(*list);
1319 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size,
1320 &pmap_dma, GFP_KERNEL);
1321 if (!pmap) {
1322 ql_log(ql_log_warn, vha, 0x113f,
1323 "%s(%ld): DMA Alloc failed of %ld\n",
1324 __func__, vha->host_no, dma_size);
1325 rval = QLA_MEMORY_ALLOC_FAILED;
1326 goto out;
1329 mc.mb[0] = MBC_PORT_NODE_NAME_LIST;
1330 mc.mb[1] = BIT_1 | BIT_3;
1331 mc.mb[2] = MSW(pmap_dma);
1332 mc.mb[3] = LSW(pmap_dma);
1333 mc.mb[6] = MSW(MSD(pmap_dma));
1334 mc.mb[7] = LSW(MSD(pmap_dma));
1335 mc.mb[8] = dma_size;
1336 mc.out_mb = MBX_0|MBX_1|MBX_2|MBX_3|MBX_6|MBX_7|MBX_8;
1337 mc.in_mb = MBX_0|MBX_1;
1338 mc.tov = 30;
1339 mc.flags = MBX_DMA_IN;
1341 rval = qla2x00_mailbox_command(vha, &mc);
1342 if (rval != QLA_SUCCESS) {
1343 if ((mc.mb[0] == MBS_COMMAND_ERROR) &&
1344 (mc.mb[1] == 0xA)) {
1345 left += le16_to_cpu(mc.mb[2]) /
1346 sizeof(struct qla_port_24xx_data);
1347 goto restart;
1349 goto out_free;
1352 left = 0;
1354 list = kmemdup(pmap, dma_size, GFP_KERNEL);
1355 if (!list) {
1356 ql_log(ql_log_warn, vha, 0x1140,
1357 "%s(%ld): failed to allocate node names list "
1358 "structure.\n", __func__, vha->host_no);
1359 rval = QLA_MEMORY_ALLOC_FAILED;
1360 goto out_free;
1363 restart:
1364 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1367 *out_data = list;
1368 *out_len = dma_size;
1370 out:
1371 return rval;
1373 out_free:
1374 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma);
1375 return rval;
1379 * qla2x00_get_port_database
1380 * Issue normal/enhanced get port database mailbox command
1381 * and copy device name as necessary.
1383 * Input:
1384 * ha = adapter state pointer.
1385 * dev = structure pointer.
1386 * opt = enhanced cmd option byte.
1388 * Returns:
1389 * qla2x00 local function return status code.
1391 * Context:
1392 * Kernel context.
1395 qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
1397 int rval;
1398 mbx_cmd_t mc;
1399 mbx_cmd_t *mcp = &mc;
1400 port_database_t *pd;
1401 struct port_database_24xx *pd24;
1402 dma_addr_t pd_dma;
1403 struct qla_hw_data *ha = vha->hw;
1405 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x104f,
1406 "Entered %s.\n", __func__);
1408 pd24 = NULL;
1409 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
1410 if (pd == NULL) {
1411 ql_log(ql_log_warn, vha, 0x1050,
1412 "Failed to allocate port database structure.\n");
1413 return QLA_MEMORY_ALLOC_FAILED;
1415 memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
1417 mcp->mb[0] = MBC_GET_PORT_DATABASE;
1418 if (opt != 0 && !IS_FWI2_CAPABLE(ha))
1419 mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
1420 mcp->mb[2] = MSW(pd_dma);
1421 mcp->mb[3] = LSW(pd_dma);
1422 mcp->mb[6] = MSW(MSD(pd_dma));
1423 mcp->mb[7] = LSW(MSD(pd_dma));
1424 mcp->mb[9] = vha->vp_idx;
1425 mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
1426 mcp->in_mb = MBX_0;
1427 if (IS_FWI2_CAPABLE(ha)) {
1428 mcp->mb[1] = fcport->loop_id;
1429 mcp->mb[10] = opt;
1430 mcp->out_mb |= MBX_10|MBX_1;
1431 mcp->in_mb |= MBX_1;
1432 } else if (HAS_EXTENDED_IDS(ha)) {
1433 mcp->mb[1] = fcport->loop_id;
1434 mcp->mb[10] = opt;
1435 mcp->out_mb |= MBX_10|MBX_1;
1436 } else {
1437 mcp->mb[1] = fcport->loop_id << 8 | opt;
1438 mcp->out_mb |= MBX_1;
1440 mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
1441 PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
1442 mcp->flags = MBX_DMA_IN;
1443 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
1444 rval = qla2x00_mailbox_command(vha, mcp);
1445 if (rval != QLA_SUCCESS)
1446 goto gpd_error_out;
1448 if (IS_FWI2_CAPABLE(ha)) {
1449 uint64_t zero = 0;
1450 pd24 = (struct port_database_24xx *) pd;
1452 /* Check for logged in state. */
1453 if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
1454 pd24->last_login_state != PDS_PRLI_COMPLETE) {
1455 ql_dbg(ql_dbg_mbx, vha, 0x1051,
1456 "Unable to verify login-state (%x/%x) for "
1457 "loop_id %x.\n", pd24->current_login_state,
1458 pd24->last_login_state, fcport->loop_id);
1459 rval = QLA_FUNCTION_FAILED;
1460 goto gpd_error_out;
1463 if (fcport->loop_id == FC_NO_LOOP_ID ||
1464 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1465 memcmp(fcport->port_name, pd24->port_name, 8))) {
1466 /* We lost the device mid way. */
1467 rval = QLA_NOT_LOGGED_IN;
1468 goto gpd_error_out;
1471 /* Names are little-endian. */
1472 memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
1473 memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
1475 /* Get port_id of device. */
1476 fcport->d_id.b.domain = pd24->port_id[0];
1477 fcport->d_id.b.area = pd24->port_id[1];
1478 fcport->d_id.b.al_pa = pd24->port_id[2];
1479 fcport->d_id.b.rsvd_1 = 0;
1481 /* If not target must be initiator or unknown type. */
1482 if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
1483 fcport->port_type = FCT_INITIATOR;
1484 else
1485 fcport->port_type = FCT_TARGET;
1487 /* Passback COS information. */
1488 fcport->supported_classes = (pd24->flags & PDF_CLASS_2) ?
1489 FC_COS_CLASS2 : FC_COS_CLASS3;
1491 if (pd24->prli_svc_param_word_3[0] & BIT_7)
1492 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1493 } else {
1494 uint64_t zero = 0;
1496 /* Check for logged in state. */
1497 if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
1498 pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
1499 ql_dbg(ql_dbg_mbx, vha, 0x100a,
1500 "Unable to verify login-state (%x/%x) - "
1501 "portid=%02x%02x%02x.\n", pd->master_state,
1502 pd->slave_state, fcport->d_id.b.domain,
1503 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1504 rval = QLA_FUNCTION_FAILED;
1505 goto gpd_error_out;
1508 if (fcport->loop_id == FC_NO_LOOP_ID ||
1509 (memcmp(fcport->port_name, (uint8_t *)&zero, 8) &&
1510 memcmp(fcport->port_name, pd->port_name, 8))) {
1511 /* We lost the device mid way. */
1512 rval = QLA_NOT_LOGGED_IN;
1513 goto gpd_error_out;
1516 /* Names are little-endian. */
1517 memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
1518 memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
1520 /* Get port_id of device. */
1521 fcport->d_id.b.domain = pd->port_id[0];
1522 fcport->d_id.b.area = pd->port_id[3];
1523 fcport->d_id.b.al_pa = pd->port_id[2];
1524 fcport->d_id.b.rsvd_1 = 0;
1526 /* If not target must be initiator or unknown type. */
1527 if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
1528 fcport->port_type = FCT_INITIATOR;
1529 else
1530 fcport->port_type = FCT_TARGET;
1532 /* Passback COS information. */
1533 fcport->supported_classes = (pd->options & BIT_4) ?
1534 FC_COS_CLASS2: FC_COS_CLASS3;
1537 gpd_error_out:
1538 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1540 if (rval != QLA_SUCCESS) {
1541 ql_dbg(ql_dbg_mbx, vha, 0x1052,
1542 "Failed=%x mb[0]=%x mb[1]=%x.\n", rval,
1543 mcp->mb[0], mcp->mb[1]);
1544 } else {
1545 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1053,
1546 "Done %s.\n", __func__);
1549 return rval;
1553 * qla2x00_get_firmware_state
1554 * Get adapter firmware state.
1556 * Input:
1557 * ha = adapter block pointer.
1558 * dptr = pointer for firmware state.
1559 * TARGET_QUEUE_LOCK must be released.
1560 * ADAPTER_STATE_LOCK must be released.
1562 * Returns:
1563 * qla2x00 local function return status code.
1565 * Context:
1566 * Kernel context.
1569 qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
1571 int rval;
1572 mbx_cmd_t mc;
1573 mbx_cmd_t *mcp = &mc;
1575 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1054,
1576 "Entered %s.\n", __func__);
1578 mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
1579 mcp->out_mb = MBX_0;
1580 if (IS_FWI2_CAPABLE(vha->hw))
1581 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
1582 else
1583 mcp->in_mb = MBX_1|MBX_0;
1584 mcp->tov = MBX_TOV_SECONDS;
1585 mcp->flags = 0;
1586 rval = qla2x00_mailbox_command(vha, mcp);
1588 /* Return firmware states. */
1589 states[0] = mcp->mb[1];
1590 if (IS_FWI2_CAPABLE(vha->hw)) {
1591 states[1] = mcp->mb[2];
1592 states[2] = mcp->mb[3];
1593 states[3] = mcp->mb[4];
1594 states[4] = mcp->mb[5];
1595 states[5] = mcp->mb[6]; /* DPORT status */
1598 if (rval != QLA_SUCCESS) {
1599 /*EMPTY*/
1600 ql_dbg(ql_dbg_mbx, vha, 0x1055, "Failed=%x.\n", rval);
1601 } else {
1602 /*EMPTY*/
1603 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1056,
1604 "Done %s.\n", __func__);
1607 return rval;
1611 * qla2x00_get_port_name
1612 * Issue get port name mailbox command.
1613 * Returned name is in big endian format.
1615 * Input:
1616 * ha = adapter block pointer.
1617 * loop_id = loop ID of device.
1618 * name = pointer for name.
1619 * TARGET_QUEUE_LOCK must be released.
1620 * ADAPTER_STATE_LOCK must be released.
1622 * Returns:
1623 * qla2x00 local function return status code.
1625 * Context:
1626 * Kernel context.
1629 qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
1630 uint8_t opt)
1632 int rval;
1633 mbx_cmd_t mc;
1634 mbx_cmd_t *mcp = &mc;
1636 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1057,
1637 "Entered %s.\n", __func__);
1639 mcp->mb[0] = MBC_GET_PORT_NAME;
1640 mcp->mb[9] = vha->vp_idx;
1641 mcp->out_mb = MBX_9|MBX_1|MBX_0;
1642 if (HAS_EXTENDED_IDS(vha->hw)) {
1643 mcp->mb[1] = loop_id;
1644 mcp->mb[10] = opt;
1645 mcp->out_mb |= MBX_10;
1646 } else {
1647 mcp->mb[1] = loop_id << 8 | opt;
1650 mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1651 mcp->tov = MBX_TOV_SECONDS;
1652 mcp->flags = 0;
1653 rval = qla2x00_mailbox_command(vha, mcp);
1655 if (rval != QLA_SUCCESS) {
1656 /*EMPTY*/
1657 ql_dbg(ql_dbg_mbx, vha, 0x1058, "Failed=%x.\n", rval);
1658 } else {
1659 if (name != NULL) {
1660 /* This function returns name in big endian. */
1661 name[0] = MSB(mcp->mb[2]);
1662 name[1] = LSB(mcp->mb[2]);
1663 name[2] = MSB(mcp->mb[3]);
1664 name[3] = LSB(mcp->mb[3]);
1665 name[4] = MSB(mcp->mb[6]);
1666 name[5] = LSB(mcp->mb[6]);
1667 name[6] = MSB(mcp->mb[7]);
1668 name[7] = LSB(mcp->mb[7]);
1671 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1059,
1672 "Done %s.\n", __func__);
1675 return rval;
1679 * qla24xx_link_initialization
1680 * Issue link initialization mailbox command.
1682 * Input:
1683 * ha = adapter block pointer.
1684 * TARGET_QUEUE_LOCK must be released.
1685 * ADAPTER_STATE_LOCK must be released.
1687 * Returns:
1688 * qla2x00 local function return status code.
1690 * Context:
1691 * Kernel context.
1694 qla24xx_link_initialize(scsi_qla_host_t *vha)
1696 int rval;
1697 mbx_cmd_t mc;
1698 mbx_cmd_t *mcp = &mc;
1700 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1152,
1701 "Entered %s.\n", __func__);
1703 if (!IS_FWI2_CAPABLE(vha->hw) || IS_CNA_CAPABLE(vha->hw))
1704 return QLA_FUNCTION_FAILED;
1706 mcp->mb[0] = MBC_LINK_INITIALIZATION;
1707 mcp->mb[1] = BIT_4;
1708 if (vha->hw->operating_mode == LOOP)
1709 mcp->mb[1] |= BIT_6;
1710 else
1711 mcp->mb[1] |= BIT_5;
1712 mcp->mb[2] = 0;
1713 mcp->mb[3] = 0;
1714 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1715 mcp->in_mb = MBX_0;
1716 mcp->tov = MBX_TOV_SECONDS;
1717 mcp->flags = 0;
1718 rval = qla2x00_mailbox_command(vha, mcp);
1720 if (rval != QLA_SUCCESS) {
1721 ql_dbg(ql_dbg_mbx, vha, 0x1153, "Failed=%x.\n", rval);
1722 } else {
1723 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1154,
1724 "Done %s.\n", __func__);
1727 return rval;
1731 * qla2x00_lip_reset
1732 * Issue LIP reset mailbox command.
1734 * Input:
1735 * ha = adapter block pointer.
1736 * TARGET_QUEUE_LOCK must be released.
1737 * ADAPTER_STATE_LOCK must be released.
1739 * Returns:
1740 * qla2x00 local function return status code.
1742 * Context:
1743 * Kernel context.
1746 qla2x00_lip_reset(scsi_qla_host_t *vha)
1748 int rval;
1749 mbx_cmd_t mc;
1750 mbx_cmd_t *mcp = &mc;
1752 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105a,
1753 "Entered %s.\n", __func__);
1755 if (IS_CNA_CAPABLE(vha->hw)) {
1756 /* Logout across all FCFs. */
1757 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1758 mcp->mb[1] = BIT_1;
1759 mcp->mb[2] = 0;
1760 mcp->out_mb = MBX_2|MBX_1|MBX_0;
1761 } else if (IS_FWI2_CAPABLE(vha->hw)) {
1762 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
1763 mcp->mb[1] = BIT_6;
1764 mcp->mb[2] = 0;
1765 mcp->mb[3] = vha->hw->loop_reset_delay;
1766 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1767 } else {
1768 mcp->mb[0] = MBC_LIP_RESET;
1769 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
1770 if (HAS_EXTENDED_IDS(vha->hw)) {
1771 mcp->mb[1] = 0x00ff;
1772 mcp->mb[10] = 0;
1773 mcp->out_mb |= MBX_10;
1774 } else {
1775 mcp->mb[1] = 0xff00;
1777 mcp->mb[2] = vha->hw->loop_reset_delay;
1778 mcp->mb[3] = 0;
1780 mcp->in_mb = MBX_0;
1781 mcp->tov = MBX_TOV_SECONDS;
1782 mcp->flags = 0;
1783 rval = qla2x00_mailbox_command(vha, mcp);
1785 if (rval != QLA_SUCCESS) {
1786 /*EMPTY*/
1787 ql_dbg(ql_dbg_mbx, vha, 0x105b, "Failed=%x.\n", rval);
1788 } else {
1789 /*EMPTY*/
1790 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105c,
1791 "Done %s.\n", __func__);
1794 return rval;
1798 * qla2x00_send_sns
1799 * Send SNS command.
1801 * Input:
1802 * ha = adapter block pointer.
1803 * sns = pointer for command.
1804 * cmd_size = command size.
1805 * buf_size = response/command size.
1806 * TARGET_QUEUE_LOCK must be released.
1807 * ADAPTER_STATE_LOCK must be released.
1809 * Returns:
1810 * qla2x00 local function return status code.
1812 * Context:
1813 * Kernel context.
1816 qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
1817 uint16_t cmd_size, size_t buf_size)
1819 int rval;
1820 mbx_cmd_t mc;
1821 mbx_cmd_t *mcp = &mc;
1823 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105d,
1824 "Entered %s.\n", __func__);
1826 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x105e,
1827 "Retry cnt=%d ratov=%d total tov=%d.\n",
1828 vha->hw->retry_count, vha->hw->login_timeout, mcp->tov);
1830 mcp->mb[0] = MBC_SEND_SNS_COMMAND;
1831 mcp->mb[1] = cmd_size;
1832 mcp->mb[2] = MSW(sns_phys_address);
1833 mcp->mb[3] = LSW(sns_phys_address);
1834 mcp->mb[6] = MSW(MSD(sns_phys_address));
1835 mcp->mb[7] = LSW(MSD(sns_phys_address));
1836 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
1837 mcp->in_mb = MBX_0|MBX_1;
1838 mcp->buf_size = buf_size;
1839 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
1840 mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
1841 rval = qla2x00_mailbox_command(vha, mcp);
1843 if (rval != QLA_SUCCESS) {
1844 /*EMPTY*/
1845 ql_dbg(ql_dbg_mbx, vha, 0x105f,
1846 "Failed=%x mb[0]=%x mb[1]=%x.\n",
1847 rval, mcp->mb[0], mcp->mb[1]);
1848 } else {
1849 /*EMPTY*/
1850 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1060,
1851 "Done %s.\n", __func__);
1854 return rval;
1858 qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1859 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1861 int rval;
1863 struct logio_entry_24xx *lg;
1864 dma_addr_t lg_dma;
1865 uint32_t iop[2];
1866 struct qla_hw_data *ha = vha->hw;
1867 struct req_que *req;
1869 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1061,
1870 "Entered %s.\n", __func__);
1872 if (ha->flags.cpu_affinity_enabled)
1873 req = ha->req_q_map[0];
1874 else
1875 req = vha->req;
1877 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
1878 if (lg == NULL) {
1879 ql_log(ql_log_warn, vha, 0x1062,
1880 "Failed to allocate login IOCB.\n");
1881 return QLA_MEMORY_ALLOC_FAILED;
1883 memset(lg, 0, sizeof(struct logio_entry_24xx));
1885 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
1886 lg->entry_count = 1;
1887 lg->handle = MAKE_HANDLE(req->id, lg->handle);
1888 lg->nport_handle = cpu_to_le16(loop_id);
1889 lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
1890 if (opt & BIT_0)
1891 lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
1892 if (opt & BIT_1)
1893 lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
1894 lg->port_id[0] = al_pa;
1895 lg->port_id[1] = area;
1896 lg->port_id[2] = domain;
1897 lg->vp_index = vha->vp_idx;
1898 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
1899 (ha->r_a_tov / 10 * 2) + 2);
1900 if (rval != QLA_SUCCESS) {
1901 ql_dbg(ql_dbg_mbx, vha, 0x1063,
1902 "Failed to issue login IOCB (%x).\n", rval);
1903 } else if (lg->entry_status != 0) {
1904 ql_dbg(ql_dbg_mbx, vha, 0x1064,
1905 "Failed to complete IOCB -- error status (%x).\n",
1906 lg->entry_status);
1907 rval = QLA_FUNCTION_FAILED;
1908 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
1909 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1910 iop[1] = le32_to_cpu(lg->io_parameter[1]);
1912 ql_dbg(ql_dbg_mbx, vha, 0x1065,
1913 "Failed to complete IOCB -- completion status (%x) "
1914 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
1915 iop[0], iop[1]);
1917 switch (iop[0]) {
1918 case LSC_SCODE_PORTID_USED:
1919 mb[0] = MBS_PORT_ID_USED;
1920 mb[1] = LSW(iop[1]);
1921 break;
1922 case LSC_SCODE_NPORT_USED:
1923 mb[0] = MBS_LOOP_ID_USED;
1924 break;
1925 case LSC_SCODE_NOLINK:
1926 case LSC_SCODE_NOIOCB:
1927 case LSC_SCODE_NOXCB:
1928 case LSC_SCODE_CMD_FAILED:
1929 case LSC_SCODE_NOFABRIC:
1930 case LSC_SCODE_FW_NOT_READY:
1931 case LSC_SCODE_NOT_LOGGED_IN:
1932 case LSC_SCODE_NOPCB:
1933 case LSC_SCODE_ELS_REJECT:
1934 case LSC_SCODE_CMD_PARAM_ERR:
1935 case LSC_SCODE_NONPORT:
1936 case LSC_SCODE_LOGGED_IN:
1937 case LSC_SCODE_NOFLOGI_ACC:
1938 default:
1939 mb[0] = MBS_COMMAND_ERROR;
1940 break;
1942 } else {
1943 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1066,
1944 "Done %s.\n", __func__);
1946 iop[0] = le32_to_cpu(lg->io_parameter[0]);
1948 mb[0] = MBS_COMMAND_COMPLETE;
1949 mb[1] = 0;
1950 if (iop[0] & BIT_4) {
1951 if (iop[0] & BIT_8)
1952 mb[1] |= BIT_1;
1953 } else
1954 mb[1] = BIT_0;
1956 /* Passback COS information. */
1957 mb[10] = 0;
1958 if (lg->io_parameter[7] || lg->io_parameter[8])
1959 mb[10] |= BIT_0; /* Class 2. */
1960 if (lg->io_parameter[9] || lg->io_parameter[10])
1961 mb[10] |= BIT_1; /* Class 3. */
1962 if (lg->io_parameter[0] & __constant_cpu_to_le32(BIT_7))
1963 mb[10] |= BIT_7; /* Confirmed Completion
1964 * Allowed
1968 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
1970 return rval;
1974 * qla2x00_login_fabric
1975 * Issue login fabric port mailbox command.
1977 * Input:
1978 * ha = adapter block pointer.
1979 * loop_id = device loop ID.
1980 * domain = device domain.
1981 * area = device area.
1982 * al_pa = device AL_PA.
1983 * status = pointer for return status.
1984 * opt = command options.
1985 * TARGET_QUEUE_LOCK must be released.
1986 * ADAPTER_STATE_LOCK must be released.
1988 * Returns:
1989 * qla2x00 local function return status code.
1991 * Context:
1992 * Kernel context.
1995 qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
1996 uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
1998 int rval;
1999 mbx_cmd_t mc;
2000 mbx_cmd_t *mcp = &mc;
2001 struct qla_hw_data *ha = vha->hw;
2003 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1067,
2004 "Entered %s.\n", __func__);
2006 mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
2007 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2008 if (HAS_EXTENDED_IDS(ha)) {
2009 mcp->mb[1] = loop_id;
2010 mcp->mb[10] = opt;
2011 mcp->out_mb |= MBX_10;
2012 } else {
2013 mcp->mb[1] = (loop_id << 8) | opt;
2015 mcp->mb[2] = domain;
2016 mcp->mb[3] = area << 8 | al_pa;
2018 mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
2019 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2020 mcp->flags = 0;
2021 rval = qla2x00_mailbox_command(vha, mcp);
2023 /* Return mailbox statuses. */
2024 if (mb != NULL) {
2025 mb[0] = mcp->mb[0];
2026 mb[1] = mcp->mb[1];
2027 mb[2] = mcp->mb[2];
2028 mb[6] = mcp->mb[6];
2029 mb[7] = mcp->mb[7];
2030 /* COS retrieved from Get-Port-Database mailbox command. */
2031 mb[10] = 0;
2034 if (rval != QLA_SUCCESS) {
2035 /* RLU tmp code: need to change main mailbox_command function to
2036 * return ok even when the mailbox completion value is not
2037 * SUCCESS. The caller needs to be responsible to interpret
2038 * the return values of this mailbox command if we're not
2039 * to change too much of the existing code.
2041 if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
2042 mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
2043 mcp->mb[0] == 0x4006)
2044 rval = QLA_SUCCESS;
2046 /*EMPTY*/
2047 ql_dbg(ql_dbg_mbx, vha, 0x1068,
2048 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
2049 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
2050 } else {
2051 /*EMPTY*/
2052 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1069,
2053 "Done %s.\n", __func__);
2056 return rval;
2060 * qla2x00_login_local_device
2061 * Issue login loop port mailbox command.
2063 * Input:
2064 * ha = adapter block pointer.
2065 * loop_id = device loop ID.
2066 * opt = command options.
2068 * Returns:
2069 * Return status code.
2071 * Context:
2072 * Kernel context.
2076 qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
2077 uint16_t *mb_ret, uint8_t opt)
2079 int rval;
2080 mbx_cmd_t mc;
2081 mbx_cmd_t *mcp = &mc;
2082 struct qla_hw_data *ha = vha->hw;
2084 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106a,
2085 "Entered %s.\n", __func__);
2087 if (IS_FWI2_CAPABLE(ha))
2088 return qla24xx_login_fabric(vha, fcport->loop_id,
2089 fcport->d_id.b.domain, fcport->d_id.b.area,
2090 fcport->d_id.b.al_pa, mb_ret, opt);
2092 mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
2093 if (HAS_EXTENDED_IDS(ha))
2094 mcp->mb[1] = fcport->loop_id;
2095 else
2096 mcp->mb[1] = fcport->loop_id << 8;
2097 mcp->mb[2] = opt;
2098 mcp->out_mb = MBX_2|MBX_1|MBX_0;
2099 mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
2100 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2101 mcp->flags = 0;
2102 rval = qla2x00_mailbox_command(vha, mcp);
2104 /* Return mailbox statuses. */
2105 if (mb_ret != NULL) {
2106 mb_ret[0] = mcp->mb[0];
2107 mb_ret[1] = mcp->mb[1];
2108 mb_ret[6] = mcp->mb[6];
2109 mb_ret[7] = mcp->mb[7];
2112 if (rval != QLA_SUCCESS) {
2113 /* AV tmp code: need to change main mailbox_command function to
2114 * return ok even when the mailbox completion value is not
2115 * SUCCESS. The caller needs to be responsible to interpret
2116 * the return values of this mailbox command if we're not
2117 * to change too much of the existing code.
2119 if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
2120 rval = QLA_SUCCESS;
2122 ql_dbg(ql_dbg_mbx, vha, 0x106b,
2123 "Failed=%x mb[0]=%x mb[1]=%x mb[6]=%x mb[7]=%x.\n",
2124 rval, mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]);
2125 } else {
2126 /*EMPTY*/
2127 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106c,
2128 "Done %s.\n", __func__);
2131 return (rval);
2135 qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2136 uint8_t area, uint8_t al_pa)
2138 int rval;
2139 struct logio_entry_24xx *lg;
2140 dma_addr_t lg_dma;
2141 struct qla_hw_data *ha = vha->hw;
2142 struct req_que *req;
2144 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x106d,
2145 "Entered %s.\n", __func__);
2147 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
2148 if (lg == NULL) {
2149 ql_log(ql_log_warn, vha, 0x106e,
2150 "Failed to allocate logout IOCB.\n");
2151 return QLA_MEMORY_ALLOC_FAILED;
2153 memset(lg, 0, sizeof(struct logio_entry_24xx));
2155 if (ql2xmaxqueues > 1)
2156 req = ha->req_q_map[0];
2157 else
2158 req = vha->req;
2159 lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
2160 lg->entry_count = 1;
2161 lg->handle = MAKE_HANDLE(req->id, lg->handle);
2162 lg->nport_handle = cpu_to_le16(loop_id);
2163 lg->control_flags =
2164 __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO|
2165 LCF_FREE_NPORT);
2166 lg->port_id[0] = al_pa;
2167 lg->port_id[1] = area;
2168 lg->port_id[2] = domain;
2169 lg->vp_index = vha->vp_idx;
2170 rval = qla2x00_issue_iocb_timeout(vha, lg, lg_dma, 0,
2171 (ha->r_a_tov / 10 * 2) + 2);
2172 if (rval != QLA_SUCCESS) {
2173 ql_dbg(ql_dbg_mbx, vha, 0x106f,
2174 "Failed to issue logout IOCB (%x).\n", rval);
2175 } else if (lg->entry_status != 0) {
2176 ql_dbg(ql_dbg_mbx, vha, 0x1070,
2177 "Failed to complete IOCB -- error status (%x).\n",
2178 lg->entry_status);
2179 rval = QLA_FUNCTION_FAILED;
2180 } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
2181 ql_dbg(ql_dbg_mbx, vha, 0x1071,
2182 "Failed to complete IOCB -- completion status (%x) "
2183 "ioparam=%x/%x.\n", le16_to_cpu(lg->comp_status),
2184 le32_to_cpu(lg->io_parameter[0]),
2185 le32_to_cpu(lg->io_parameter[1]));
2186 } else {
2187 /*EMPTY*/
2188 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1072,
2189 "Done %s.\n", __func__);
2192 dma_pool_free(ha->s_dma_pool, lg, lg_dma);
2194 return rval;
2198 * qla2x00_fabric_logout
2199 * Issue logout fabric port mailbox command.
2201 * Input:
2202 * ha = adapter block pointer.
2203 * loop_id = device loop ID.
2204 * TARGET_QUEUE_LOCK must be released.
2205 * ADAPTER_STATE_LOCK must be released.
2207 * Returns:
2208 * qla2x00 local function return status code.
2210 * Context:
2211 * Kernel context.
2214 qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
2215 uint8_t area, uint8_t al_pa)
2217 int rval;
2218 mbx_cmd_t mc;
2219 mbx_cmd_t *mcp = &mc;
2221 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1073,
2222 "Entered %s.\n", __func__);
2224 mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
2225 mcp->out_mb = MBX_1|MBX_0;
2226 if (HAS_EXTENDED_IDS(vha->hw)) {
2227 mcp->mb[1] = loop_id;
2228 mcp->mb[10] = 0;
2229 mcp->out_mb |= MBX_10;
2230 } else {
2231 mcp->mb[1] = loop_id << 8;
2234 mcp->in_mb = MBX_1|MBX_0;
2235 mcp->tov = MBX_TOV_SECONDS;
2236 mcp->flags = 0;
2237 rval = qla2x00_mailbox_command(vha, mcp);
2239 if (rval != QLA_SUCCESS) {
2240 /*EMPTY*/
2241 ql_dbg(ql_dbg_mbx, vha, 0x1074,
2242 "Failed=%x mb[1]=%x.\n", rval, mcp->mb[1]);
2243 } else {
2244 /*EMPTY*/
2245 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1075,
2246 "Done %s.\n", __func__);
2249 return rval;
2253 * qla2x00_full_login_lip
2254 * Issue full login LIP mailbox command.
2256 * Input:
2257 * ha = adapter block pointer.
2258 * TARGET_QUEUE_LOCK must be released.
2259 * ADAPTER_STATE_LOCK must be released.
2261 * Returns:
2262 * qla2x00 local function return status code.
2264 * Context:
2265 * Kernel context.
2268 qla2x00_full_login_lip(scsi_qla_host_t *vha)
2270 int rval;
2271 mbx_cmd_t mc;
2272 mbx_cmd_t *mcp = &mc;
2274 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1076,
2275 "Entered %s.\n", __func__);
2277 mcp->mb[0] = MBC_LIP_FULL_LOGIN;
2278 mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
2279 mcp->mb[2] = 0;
2280 mcp->mb[3] = 0;
2281 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2282 mcp->in_mb = MBX_0;
2283 mcp->tov = MBX_TOV_SECONDS;
2284 mcp->flags = 0;
2285 rval = qla2x00_mailbox_command(vha, mcp);
2287 if (rval != QLA_SUCCESS) {
2288 /*EMPTY*/
2289 ql_dbg(ql_dbg_mbx, vha, 0x1077, "Failed=%x.\n", rval);
2290 } else {
2291 /*EMPTY*/
2292 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1078,
2293 "Done %s.\n", __func__);
2296 return rval;
2300 * qla2x00_get_id_list
2302 * Input:
2303 * ha = adapter block pointer.
2305 * Returns:
2306 * qla2x00 local function return status code.
2308 * Context:
2309 * Kernel context.
2312 qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
2313 uint16_t *entries)
2315 int rval;
2316 mbx_cmd_t mc;
2317 mbx_cmd_t *mcp = &mc;
2319 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1079,
2320 "Entered %s.\n", __func__);
2322 if (id_list == NULL)
2323 return QLA_FUNCTION_FAILED;
2325 mcp->mb[0] = MBC_GET_ID_LIST;
2326 mcp->out_mb = MBX_0;
2327 if (IS_FWI2_CAPABLE(vha->hw)) {
2328 mcp->mb[2] = MSW(id_list_dma);
2329 mcp->mb[3] = LSW(id_list_dma);
2330 mcp->mb[6] = MSW(MSD(id_list_dma));
2331 mcp->mb[7] = LSW(MSD(id_list_dma));
2332 mcp->mb[8] = 0;
2333 mcp->mb[9] = vha->vp_idx;
2334 mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
2335 } else {
2336 mcp->mb[1] = MSW(id_list_dma);
2337 mcp->mb[2] = LSW(id_list_dma);
2338 mcp->mb[3] = MSW(MSD(id_list_dma));
2339 mcp->mb[6] = LSW(MSD(id_list_dma));
2340 mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
2342 mcp->in_mb = MBX_1|MBX_0;
2343 mcp->tov = MBX_TOV_SECONDS;
2344 mcp->flags = 0;
2345 rval = qla2x00_mailbox_command(vha, mcp);
2347 if (rval != QLA_SUCCESS) {
2348 /*EMPTY*/
2349 ql_dbg(ql_dbg_mbx, vha, 0x107a, "Failed=%x.\n", rval);
2350 } else {
2351 *entries = mcp->mb[1];
2352 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107b,
2353 "Done %s.\n", __func__);
2356 return rval;
2360 * qla2x00_get_resource_cnts
2361 * Get current firmware resource counts.
2363 * Input:
2364 * ha = adapter block pointer.
2366 * Returns:
2367 * qla2x00 local function return status code.
2369 * Context:
2370 * Kernel context.
2373 qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
2374 uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
2375 uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
2377 int rval;
2378 mbx_cmd_t mc;
2379 mbx_cmd_t *mcp = &mc;
2381 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107c,
2382 "Entered %s.\n", __func__);
2384 mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
2385 mcp->out_mb = MBX_0;
2386 mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
2387 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw) || IS_QLA27XX(vha->hw))
2388 mcp->in_mb |= MBX_12;
2389 mcp->tov = MBX_TOV_SECONDS;
2390 mcp->flags = 0;
2391 rval = qla2x00_mailbox_command(vha, mcp);
2393 if (rval != QLA_SUCCESS) {
2394 /*EMPTY*/
2395 ql_dbg(ql_dbg_mbx, vha, 0x107d,
2396 "Failed mb[0]=%x.\n", mcp->mb[0]);
2397 } else {
2398 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107e,
2399 "Done %s mb1=%x mb2=%x mb3=%x mb6=%x mb7=%x mb10=%x "
2400 "mb11=%x mb12=%x.\n", __func__, mcp->mb[1], mcp->mb[2],
2401 mcp->mb[3], mcp->mb[6], mcp->mb[7], mcp->mb[10],
2402 mcp->mb[11], mcp->mb[12]);
2404 if (cur_xchg_cnt)
2405 *cur_xchg_cnt = mcp->mb[3];
2406 if (orig_xchg_cnt)
2407 *orig_xchg_cnt = mcp->mb[6];
2408 if (cur_iocb_cnt)
2409 *cur_iocb_cnt = mcp->mb[7];
2410 if (orig_iocb_cnt)
2411 *orig_iocb_cnt = mcp->mb[10];
2412 if (vha->hw->flags.npiv_supported && max_npiv_vports)
2413 *max_npiv_vports = mcp->mb[11];
2414 if ((IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) && max_fcfs)
2415 *max_fcfs = mcp->mb[12];
2418 return (rval);
2422 * qla2x00_get_fcal_position_map
2423 * Get FCAL (LILP) position map using mailbox command
2425 * Input:
2426 * ha = adapter state pointer.
2427 * pos_map = buffer pointer (can be NULL).
2429 * Returns:
2430 * qla2x00 local function return status code.
2432 * Context:
2433 * Kernel context.
2436 qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
2438 int rval;
2439 mbx_cmd_t mc;
2440 mbx_cmd_t *mcp = &mc;
2441 char *pmap;
2442 dma_addr_t pmap_dma;
2443 struct qla_hw_data *ha = vha->hw;
2445 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x107f,
2446 "Entered %s.\n", __func__);
2448 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
2449 if (pmap == NULL) {
2450 ql_log(ql_log_warn, vha, 0x1080,
2451 "Memory alloc failed.\n");
2452 return QLA_MEMORY_ALLOC_FAILED;
2454 memset(pmap, 0, FCAL_MAP_SIZE);
2456 mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
2457 mcp->mb[2] = MSW(pmap_dma);
2458 mcp->mb[3] = LSW(pmap_dma);
2459 mcp->mb[6] = MSW(MSD(pmap_dma));
2460 mcp->mb[7] = LSW(MSD(pmap_dma));
2461 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2462 mcp->in_mb = MBX_1|MBX_0;
2463 mcp->buf_size = FCAL_MAP_SIZE;
2464 mcp->flags = MBX_DMA_IN;
2465 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
2466 rval = qla2x00_mailbox_command(vha, mcp);
2468 if (rval == QLA_SUCCESS) {
2469 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1081,
2470 "mb0/mb1=%x/%X FC/AL position map size (%x).\n",
2471 mcp->mb[0], mcp->mb[1], (unsigned)pmap[0]);
2472 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111d,
2473 pmap, pmap[0] + 1);
2475 if (pos_map)
2476 memcpy(pos_map, pmap, FCAL_MAP_SIZE);
2478 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
2480 if (rval != QLA_SUCCESS) {
2481 ql_dbg(ql_dbg_mbx, vha, 0x1082, "Failed=%x.\n", rval);
2482 } else {
2483 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1083,
2484 "Done %s.\n", __func__);
2487 return rval;
2491 * qla2x00_get_link_status
2493 * Input:
2494 * ha = adapter block pointer.
2495 * loop_id = device loop ID.
2496 * ret_buf = pointer to link status return buffer.
2498 * Returns:
2499 * 0 = success.
2500 * BIT_0 = mem alloc error.
2501 * BIT_1 = mailbox error.
2504 qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
2505 struct link_statistics *stats, dma_addr_t stats_dma)
2507 int rval;
2508 mbx_cmd_t mc;
2509 mbx_cmd_t *mcp = &mc;
2510 uint32_t *siter, *diter, dwords;
2511 struct qla_hw_data *ha = vha->hw;
2513 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1084,
2514 "Entered %s.\n", __func__);
2516 mcp->mb[0] = MBC_GET_LINK_STATUS;
2517 mcp->mb[2] = MSW(stats_dma);
2518 mcp->mb[3] = LSW(stats_dma);
2519 mcp->mb[6] = MSW(MSD(stats_dma));
2520 mcp->mb[7] = LSW(MSD(stats_dma));
2521 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2522 mcp->in_mb = MBX_0;
2523 if (IS_FWI2_CAPABLE(ha)) {
2524 mcp->mb[1] = loop_id;
2525 mcp->mb[4] = 0;
2526 mcp->mb[10] = 0;
2527 mcp->out_mb |= MBX_10|MBX_4|MBX_1;
2528 mcp->in_mb |= MBX_1;
2529 } else if (HAS_EXTENDED_IDS(ha)) {
2530 mcp->mb[1] = loop_id;
2531 mcp->mb[10] = 0;
2532 mcp->out_mb |= MBX_10|MBX_1;
2533 } else {
2534 mcp->mb[1] = loop_id << 8;
2535 mcp->out_mb |= MBX_1;
2537 mcp->tov = MBX_TOV_SECONDS;
2538 mcp->flags = IOCTL_CMD;
2539 rval = qla2x00_mailbox_command(vha, mcp);
2541 if (rval == QLA_SUCCESS) {
2542 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2543 ql_dbg(ql_dbg_mbx, vha, 0x1085,
2544 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2545 rval = QLA_FUNCTION_FAILED;
2546 } else {
2547 /* Copy over data -- firmware data is LE. */
2548 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1086,
2549 "Done %s.\n", __func__);
2550 dwords = offsetof(struct link_statistics, unused1) / 4;
2551 siter = diter = &stats->link_fail_cnt;
2552 while (dwords--)
2553 *diter++ = le32_to_cpu(*siter++);
2555 } else {
2556 /* Failed. */
2557 ql_dbg(ql_dbg_mbx, vha, 0x1087, "Failed=%x.\n", rval);
2560 return rval;
2564 qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
2565 dma_addr_t stats_dma)
2567 int rval;
2568 mbx_cmd_t mc;
2569 mbx_cmd_t *mcp = &mc;
2570 uint32_t *siter, *diter, dwords;
2572 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1088,
2573 "Entered %s.\n", __func__);
2575 mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
2576 mcp->mb[2] = MSW(stats_dma);
2577 mcp->mb[3] = LSW(stats_dma);
2578 mcp->mb[6] = MSW(MSD(stats_dma));
2579 mcp->mb[7] = LSW(MSD(stats_dma));
2580 mcp->mb[8] = sizeof(struct link_statistics) / 4;
2581 mcp->mb[9] = vha->vp_idx;
2582 mcp->mb[10] = 0;
2583 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
2584 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2585 mcp->tov = MBX_TOV_SECONDS;
2586 mcp->flags = IOCTL_CMD;
2587 rval = qla2x00_mailbox_command(vha, mcp);
2589 if (rval == QLA_SUCCESS) {
2590 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
2591 ql_dbg(ql_dbg_mbx, vha, 0x1089,
2592 "Failed mb[0]=%x.\n", mcp->mb[0]);
2593 rval = QLA_FUNCTION_FAILED;
2594 } else {
2595 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108a,
2596 "Done %s.\n", __func__);
2597 /* Copy over data -- firmware data is LE. */
2598 dwords = sizeof(struct link_statistics) / 4;
2599 siter = diter = &stats->link_fail_cnt;
2600 while (dwords--)
2601 *diter++ = le32_to_cpu(*siter++);
2603 } else {
2604 /* Failed. */
2605 ql_dbg(ql_dbg_mbx, vha, 0x108b, "Failed=%x.\n", rval);
2608 return rval;
2612 qla24xx_abort_command(srb_t *sp)
2614 int rval;
2615 unsigned long flags = 0;
2617 struct abort_entry_24xx *abt;
2618 dma_addr_t abt_dma;
2619 uint32_t handle;
2620 fc_port_t *fcport = sp->fcport;
2621 struct scsi_qla_host *vha = fcport->vha;
2622 struct qla_hw_data *ha = vha->hw;
2623 struct req_que *req = vha->req;
2625 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x108c,
2626 "Entered %s.\n", __func__);
2628 if (ql2xasynctmfenable)
2629 return qla24xx_async_abort_command(sp);
2631 spin_lock_irqsave(&ha->hardware_lock, flags);
2632 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
2633 if (req->outstanding_cmds[handle] == sp)
2634 break;
2636 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2637 if (handle == req->num_outstanding_cmds) {
2638 /* Command not found. */
2639 return QLA_FUNCTION_FAILED;
2642 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
2643 if (abt == NULL) {
2644 ql_log(ql_log_warn, vha, 0x108d,
2645 "Failed to allocate abort IOCB.\n");
2646 return QLA_MEMORY_ALLOC_FAILED;
2648 memset(abt, 0, sizeof(struct abort_entry_24xx));
2650 abt->entry_type = ABORT_IOCB_TYPE;
2651 abt->entry_count = 1;
2652 abt->handle = MAKE_HANDLE(req->id, abt->handle);
2653 abt->nport_handle = cpu_to_le16(fcport->loop_id);
2654 abt->handle_to_abort = MAKE_HANDLE(req->id, handle);
2655 abt->port_id[0] = fcport->d_id.b.al_pa;
2656 abt->port_id[1] = fcport->d_id.b.area;
2657 abt->port_id[2] = fcport->d_id.b.domain;
2658 abt->vp_index = fcport->vha->vp_idx;
2660 abt->req_que_no = cpu_to_le16(req->id);
2662 rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
2663 if (rval != QLA_SUCCESS) {
2664 ql_dbg(ql_dbg_mbx, vha, 0x108e,
2665 "Failed to issue IOCB (%x).\n", rval);
2666 } else if (abt->entry_status != 0) {
2667 ql_dbg(ql_dbg_mbx, vha, 0x108f,
2668 "Failed to complete IOCB -- error status (%x).\n",
2669 abt->entry_status);
2670 rval = QLA_FUNCTION_FAILED;
2671 } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
2672 ql_dbg(ql_dbg_mbx, vha, 0x1090,
2673 "Failed to complete IOCB -- completion status (%x).\n",
2674 le16_to_cpu(abt->nport_handle));
2675 if (abt->nport_handle == CS_IOCB_ERROR)
2676 rval = QLA_FUNCTION_PARAMETER_ERROR;
2677 else
2678 rval = QLA_FUNCTION_FAILED;
2679 } else {
2680 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1091,
2681 "Done %s.\n", __func__);
2684 dma_pool_free(ha->s_dma_pool, abt, abt_dma);
2686 return rval;
2689 struct tsk_mgmt_cmd {
2690 union {
2691 struct tsk_mgmt_entry tsk;
2692 struct sts_entry_24xx sts;
2693 } p;
2696 static int
2697 __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
2698 uint64_t l, int tag)
2700 int rval, rval2;
2701 struct tsk_mgmt_cmd *tsk;
2702 struct sts_entry_24xx *sts;
2703 dma_addr_t tsk_dma;
2704 scsi_qla_host_t *vha;
2705 struct qla_hw_data *ha;
2706 struct req_que *req;
2707 struct rsp_que *rsp;
2709 vha = fcport->vha;
2710 ha = vha->hw;
2711 req = vha->req;
2713 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1092,
2714 "Entered %s.\n", __func__);
2716 if (ha->flags.cpu_affinity_enabled)
2717 rsp = ha->rsp_q_map[tag + 1];
2718 else
2719 rsp = req->rsp;
2720 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
2721 if (tsk == NULL) {
2722 ql_log(ql_log_warn, vha, 0x1093,
2723 "Failed to allocate task management IOCB.\n");
2724 return QLA_MEMORY_ALLOC_FAILED;
2726 memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
2728 tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
2729 tsk->p.tsk.entry_count = 1;
2730 tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
2731 tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
2732 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
2733 tsk->p.tsk.control_flags = cpu_to_le32(type);
2734 tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
2735 tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
2736 tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
2737 tsk->p.tsk.vp_index = fcport->vha->vp_idx;
2738 if (type == TCF_LUN_RESET) {
2739 int_to_scsilun(l, &tsk->p.tsk.lun);
2740 host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
2741 sizeof(tsk->p.tsk.lun));
2744 sts = &tsk->p.sts;
2745 rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
2746 if (rval != QLA_SUCCESS) {
2747 ql_dbg(ql_dbg_mbx, vha, 0x1094,
2748 "Failed to issue %s reset IOCB (%x).\n", name, rval);
2749 } else if (sts->entry_status != 0) {
2750 ql_dbg(ql_dbg_mbx, vha, 0x1095,
2751 "Failed to complete IOCB -- error status (%x).\n",
2752 sts->entry_status);
2753 rval = QLA_FUNCTION_FAILED;
2754 } else if (sts->comp_status !=
2755 __constant_cpu_to_le16(CS_COMPLETE)) {
2756 ql_dbg(ql_dbg_mbx, vha, 0x1096,
2757 "Failed to complete IOCB -- completion status (%x).\n",
2758 le16_to_cpu(sts->comp_status));
2759 rval = QLA_FUNCTION_FAILED;
2760 } else if (le16_to_cpu(sts->scsi_status) &
2761 SS_RESPONSE_INFO_LEN_VALID) {
2762 if (le32_to_cpu(sts->rsp_data_len) < 4) {
2763 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1097,
2764 "Ignoring inconsistent data length -- not enough "
2765 "response info (%d).\n",
2766 le32_to_cpu(sts->rsp_data_len));
2767 } else if (sts->data[3]) {
2768 ql_dbg(ql_dbg_mbx, vha, 0x1098,
2769 "Failed to complete IOCB -- response (%x).\n",
2770 sts->data[3]);
2771 rval = QLA_FUNCTION_FAILED;
2775 /* Issue marker IOCB. */
2776 rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
2777 type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
2778 if (rval2 != QLA_SUCCESS) {
2779 ql_dbg(ql_dbg_mbx, vha, 0x1099,
2780 "Failed to issue marker IOCB (%x).\n", rval2);
2781 } else {
2782 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109a,
2783 "Done %s.\n", __func__);
2786 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
2788 return rval;
2792 qla24xx_abort_target(struct fc_port *fcport, uint64_t l, int tag)
2794 struct qla_hw_data *ha = fcport->vha->hw;
2796 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2797 return qla2x00_async_tm_cmd(fcport, TCF_TARGET_RESET, l, tag);
2799 return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
2803 qla24xx_lun_reset(struct fc_port *fcport, uint64_t l, int tag)
2805 struct qla_hw_data *ha = fcport->vha->hw;
2807 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha))
2808 return qla2x00_async_tm_cmd(fcport, TCF_LUN_RESET, l, tag);
2810 return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
2814 qla2x00_system_error(scsi_qla_host_t *vha)
2816 int rval;
2817 mbx_cmd_t mc;
2818 mbx_cmd_t *mcp = &mc;
2819 struct qla_hw_data *ha = vha->hw;
2821 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
2822 return QLA_FUNCTION_FAILED;
2824 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109b,
2825 "Entered %s.\n", __func__);
2827 mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
2828 mcp->out_mb = MBX_0;
2829 mcp->in_mb = MBX_0;
2830 mcp->tov = 5;
2831 mcp->flags = 0;
2832 rval = qla2x00_mailbox_command(vha, mcp);
2834 if (rval != QLA_SUCCESS) {
2835 ql_dbg(ql_dbg_mbx, vha, 0x109c, "Failed=%x.\n", rval);
2836 } else {
2837 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109d,
2838 "Done %s.\n", __func__);
2841 return rval;
2845 qla2x00_write_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t data)
2847 int rval;
2848 mbx_cmd_t mc;
2849 mbx_cmd_t *mcp = &mc;
2851 if (!IS_QLA2031(vha->hw) && !IS_QLA27XX(vha->hw))
2852 return QLA_FUNCTION_FAILED;
2854 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1182,
2855 "Entered %s.\n", __func__);
2857 mcp->mb[0] = MBC_WRITE_SERDES;
2858 mcp->mb[1] = addr;
2859 if (IS_QLA2031(vha->hw))
2860 mcp->mb[2] = data & 0xff;
2861 else
2862 mcp->mb[2] = data;
2864 mcp->mb[3] = 0;
2865 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
2866 mcp->in_mb = MBX_0;
2867 mcp->tov = MBX_TOV_SECONDS;
2868 mcp->flags = 0;
2869 rval = qla2x00_mailbox_command(vha, mcp);
2871 if (rval != QLA_SUCCESS) {
2872 ql_dbg(ql_dbg_mbx, vha, 0x1183,
2873 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2874 } else {
2875 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1184,
2876 "Done %s.\n", __func__);
2879 return rval;
2883 qla2x00_read_serdes_word(scsi_qla_host_t *vha, uint16_t addr, uint16_t *data)
2885 int rval;
2886 mbx_cmd_t mc;
2887 mbx_cmd_t *mcp = &mc;
2889 if (!IS_QLA2031(vha->hw) && !IS_QLA27XX(vha->hw))
2890 return QLA_FUNCTION_FAILED;
2892 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1185,
2893 "Entered %s.\n", __func__);
2895 mcp->mb[0] = MBC_READ_SERDES;
2896 mcp->mb[1] = addr;
2897 mcp->mb[3] = 0;
2898 mcp->out_mb = MBX_3|MBX_1|MBX_0;
2899 mcp->in_mb = MBX_1|MBX_0;
2900 mcp->tov = MBX_TOV_SECONDS;
2901 mcp->flags = 0;
2902 rval = qla2x00_mailbox_command(vha, mcp);
2904 if (IS_QLA2031(vha->hw))
2905 *data = mcp->mb[1] & 0xff;
2906 else
2907 *data = mcp->mb[1];
2909 if (rval != QLA_SUCCESS) {
2910 ql_dbg(ql_dbg_mbx, vha, 0x1186,
2911 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2912 } else {
2913 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1187,
2914 "Done %s.\n", __func__);
2917 return rval;
2921 qla8044_write_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t data)
2923 int rval;
2924 mbx_cmd_t mc;
2925 mbx_cmd_t *mcp = &mc;
2927 if (!IS_QLA8044(vha->hw))
2928 return QLA_FUNCTION_FAILED;
2930 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1186,
2931 "Entered %s.\n", __func__);
2933 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
2934 mcp->mb[1] = HCS_WRITE_SERDES;
2935 mcp->mb[3] = LSW(addr);
2936 mcp->mb[4] = MSW(addr);
2937 mcp->mb[5] = LSW(data);
2938 mcp->mb[6] = MSW(data);
2939 mcp->out_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_1|MBX_0;
2940 mcp->in_mb = MBX_0;
2941 mcp->tov = MBX_TOV_SECONDS;
2942 mcp->flags = 0;
2943 rval = qla2x00_mailbox_command(vha, mcp);
2945 if (rval != QLA_SUCCESS) {
2946 ql_dbg(ql_dbg_mbx, vha, 0x1187,
2947 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2948 } else {
2949 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1188,
2950 "Done %s.\n", __func__);
2953 return rval;
2957 qla8044_read_serdes_word(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data)
2959 int rval;
2960 mbx_cmd_t mc;
2961 mbx_cmd_t *mcp = &mc;
2963 if (!IS_QLA8044(vha->hw))
2964 return QLA_FUNCTION_FAILED;
2966 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1189,
2967 "Entered %s.\n", __func__);
2969 mcp->mb[0] = MBC_SET_GET_ETH_SERDES_REG;
2970 mcp->mb[1] = HCS_READ_SERDES;
2971 mcp->mb[3] = LSW(addr);
2972 mcp->mb[4] = MSW(addr);
2973 mcp->out_mb = MBX_4|MBX_3|MBX_1|MBX_0;
2974 mcp->in_mb = MBX_2|MBX_1|MBX_0;
2975 mcp->tov = MBX_TOV_SECONDS;
2976 mcp->flags = 0;
2977 rval = qla2x00_mailbox_command(vha, mcp);
2979 *data = mcp->mb[2] << 16 | mcp->mb[1];
2981 if (rval != QLA_SUCCESS) {
2982 ql_dbg(ql_dbg_mbx, vha, 0x118a,
2983 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
2984 } else {
2985 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x118b,
2986 "Done %s.\n", __func__);
2989 return rval;
2993 * qla2x00_set_serdes_params() -
2994 * @ha: HA context
2996 * Returns
2999 qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
3000 uint16_t sw_em_2g, uint16_t sw_em_4g)
3002 int rval;
3003 mbx_cmd_t mc;
3004 mbx_cmd_t *mcp = &mc;
3006 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x109e,
3007 "Entered %s.\n", __func__);
3009 mcp->mb[0] = MBC_SERDES_PARAMS;
3010 mcp->mb[1] = BIT_0;
3011 mcp->mb[2] = sw_em_1g | BIT_15;
3012 mcp->mb[3] = sw_em_2g | BIT_15;
3013 mcp->mb[4] = sw_em_4g | BIT_15;
3014 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3015 mcp->in_mb = MBX_0;
3016 mcp->tov = MBX_TOV_SECONDS;
3017 mcp->flags = 0;
3018 rval = qla2x00_mailbox_command(vha, mcp);
3020 if (rval != QLA_SUCCESS) {
3021 /*EMPTY*/
3022 ql_dbg(ql_dbg_mbx, vha, 0x109f,
3023 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3024 } else {
3025 /*EMPTY*/
3026 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a0,
3027 "Done %s.\n", __func__);
3030 return rval;
3034 qla2x00_stop_firmware(scsi_qla_host_t *vha)
3036 int rval;
3037 mbx_cmd_t mc;
3038 mbx_cmd_t *mcp = &mc;
3040 if (!IS_FWI2_CAPABLE(vha->hw))
3041 return QLA_FUNCTION_FAILED;
3043 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a1,
3044 "Entered %s.\n", __func__);
3046 mcp->mb[0] = MBC_STOP_FIRMWARE;
3047 mcp->mb[1] = 0;
3048 mcp->out_mb = MBX_1|MBX_0;
3049 mcp->in_mb = MBX_0;
3050 mcp->tov = 5;
3051 mcp->flags = 0;
3052 rval = qla2x00_mailbox_command(vha, mcp);
3054 if (rval != QLA_SUCCESS) {
3055 ql_dbg(ql_dbg_mbx, vha, 0x10a2, "Failed=%x.\n", rval);
3056 if (mcp->mb[0] == MBS_INVALID_COMMAND)
3057 rval = QLA_INVALID_COMMAND;
3058 } else {
3059 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a3,
3060 "Done %s.\n", __func__);
3063 return rval;
3067 qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
3068 uint16_t buffers)
3070 int rval;
3071 mbx_cmd_t mc;
3072 mbx_cmd_t *mcp = &mc;
3074 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a4,
3075 "Entered %s.\n", __func__);
3077 if (!IS_FWI2_CAPABLE(vha->hw))
3078 return QLA_FUNCTION_FAILED;
3080 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3081 return QLA_FUNCTION_FAILED;
3083 mcp->mb[0] = MBC_TRACE_CONTROL;
3084 mcp->mb[1] = TC_EFT_ENABLE;
3085 mcp->mb[2] = LSW(eft_dma);
3086 mcp->mb[3] = MSW(eft_dma);
3087 mcp->mb[4] = LSW(MSD(eft_dma));
3088 mcp->mb[5] = MSW(MSD(eft_dma));
3089 mcp->mb[6] = buffers;
3090 mcp->mb[7] = TC_AEN_DISABLE;
3091 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3092 mcp->in_mb = MBX_1|MBX_0;
3093 mcp->tov = MBX_TOV_SECONDS;
3094 mcp->flags = 0;
3095 rval = qla2x00_mailbox_command(vha, mcp);
3096 if (rval != QLA_SUCCESS) {
3097 ql_dbg(ql_dbg_mbx, vha, 0x10a5,
3098 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3099 rval, mcp->mb[0], mcp->mb[1]);
3100 } else {
3101 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a6,
3102 "Done %s.\n", __func__);
3105 return rval;
3109 qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
3111 int rval;
3112 mbx_cmd_t mc;
3113 mbx_cmd_t *mcp = &mc;
3115 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a7,
3116 "Entered %s.\n", __func__);
3118 if (!IS_FWI2_CAPABLE(vha->hw))
3119 return QLA_FUNCTION_FAILED;
3121 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3122 return QLA_FUNCTION_FAILED;
3124 mcp->mb[0] = MBC_TRACE_CONTROL;
3125 mcp->mb[1] = TC_EFT_DISABLE;
3126 mcp->out_mb = MBX_1|MBX_0;
3127 mcp->in_mb = MBX_1|MBX_0;
3128 mcp->tov = MBX_TOV_SECONDS;
3129 mcp->flags = 0;
3130 rval = qla2x00_mailbox_command(vha, mcp);
3131 if (rval != QLA_SUCCESS) {
3132 ql_dbg(ql_dbg_mbx, vha, 0x10a8,
3133 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3134 rval, mcp->mb[0], mcp->mb[1]);
3135 } else {
3136 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10a9,
3137 "Done %s.\n", __func__);
3140 return rval;
3144 qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
3145 uint16_t buffers, uint16_t *mb, uint32_t *dwords)
3147 int rval;
3148 mbx_cmd_t mc;
3149 mbx_cmd_t *mcp = &mc;
3151 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10aa,
3152 "Entered %s.\n", __func__);
3154 if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw) &&
3155 !IS_QLA83XX(vha->hw) && !IS_QLA27XX(vha->hw))
3156 return QLA_FUNCTION_FAILED;
3158 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3159 return QLA_FUNCTION_FAILED;
3161 mcp->mb[0] = MBC_TRACE_CONTROL;
3162 mcp->mb[1] = TC_FCE_ENABLE;
3163 mcp->mb[2] = LSW(fce_dma);
3164 mcp->mb[3] = MSW(fce_dma);
3165 mcp->mb[4] = LSW(MSD(fce_dma));
3166 mcp->mb[5] = MSW(MSD(fce_dma));
3167 mcp->mb[6] = buffers;
3168 mcp->mb[7] = TC_AEN_DISABLE;
3169 mcp->mb[8] = 0;
3170 mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
3171 mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
3172 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3173 MBX_1|MBX_0;
3174 mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3175 mcp->tov = MBX_TOV_SECONDS;
3176 mcp->flags = 0;
3177 rval = qla2x00_mailbox_command(vha, mcp);
3178 if (rval != QLA_SUCCESS) {
3179 ql_dbg(ql_dbg_mbx, vha, 0x10ab,
3180 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3181 rval, mcp->mb[0], mcp->mb[1]);
3182 } else {
3183 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ac,
3184 "Done %s.\n", __func__);
3186 if (mb)
3187 memcpy(mb, mcp->mb, 8 * sizeof(*mb));
3188 if (dwords)
3189 *dwords = buffers;
3192 return rval;
3196 qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
3198 int rval;
3199 mbx_cmd_t mc;
3200 mbx_cmd_t *mcp = &mc;
3202 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ad,
3203 "Entered %s.\n", __func__);
3205 if (!IS_FWI2_CAPABLE(vha->hw))
3206 return QLA_FUNCTION_FAILED;
3208 if (unlikely(pci_channel_offline(vha->hw->pdev)))
3209 return QLA_FUNCTION_FAILED;
3211 mcp->mb[0] = MBC_TRACE_CONTROL;
3212 mcp->mb[1] = TC_FCE_DISABLE;
3213 mcp->mb[2] = TC_FCE_DISABLE_TRACE;
3214 mcp->out_mb = MBX_2|MBX_1|MBX_0;
3215 mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
3216 MBX_1|MBX_0;
3217 mcp->tov = MBX_TOV_SECONDS;
3218 mcp->flags = 0;
3219 rval = qla2x00_mailbox_command(vha, mcp);
3220 if (rval != QLA_SUCCESS) {
3221 ql_dbg(ql_dbg_mbx, vha, 0x10ae,
3222 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3223 rval, mcp->mb[0], mcp->mb[1]);
3224 } else {
3225 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10af,
3226 "Done %s.\n", __func__);
3228 if (wr)
3229 *wr = (uint64_t) mcp->mb[5] << 48 |
3230 (uint64_t) mcp->mb[4] << 32 |
3231 (uint64_t) mcp->mb[3] << 16 |
3232 (uint64_t) mcp->mb[2];
3233 if (rd)
3234 *rd = (uint64_t) mcp->mb[9] << 48 |
3235 (uint64_t) mcp->mb[8] << 32 |
3236 (uint64_t) mcp->mb[7] << 16 |
3237 (uint64_t) mcp->mb[6];
3240 return rval;
3244 qla2x00_get_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3245 uint16_t *port_speed, uint16_t *mb)
3247 int rval;
3248 mbx_cmd_t mc;
3249 mbx_cmd_t *mcp = &mc;
3251 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b0,
3252 "Entered %s.\n", __func__);
3254 if (!IS_IIDMA_CAPABLE(vha->hw))
3255 return QLA_FUNCTION_FAILED;
3257 mcp->mb[0] = MBC_PORT_PARAMS;
3258 mcp->mb[1] = loop_id;
3259 mcp->mb[2] = mcp->mb[3] = 0;
3260 mcp->mb[9] = vha->vp_idx;
3261 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3262 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3263 mcp->tov = MBX_TOV_SECONDS;
3264 mcp->flags = 0;
3265 rval = qla2x00_mailbox_command(vha, mcp);
3267 /* Return mailbox statuses. */
3268 if (mb != NULL) {
3269 mb[0] = mcp->mb[0];
3270 mb[1] = mcp->mb[1];
3271 mb[3] = mcp->mb[3];
3274 if (rval != QLA_SUCCESS) {
3275 ql_dbg(ql_dbg_mbx, vha, 0x10b1, "Failed=%x.\n", rval);
3276 } else {
3277 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b2,
3278 "Done %s.\n", __func__);
3279 if (port_speed)
3280 *port_speed = mcp->mb[3];
3283 return rval;
3287 qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
3288 uint16_t port_speed, uint16_t *mb)
3290 int rval;
3291 mbx_cmd_t mc;
3292 mbx_cmd_t *mcp = &mc;
3294 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b3,
3295 "Entered %s.\n", __func__);
3297 if (!IS_IIDMA_CAPABLE(vha->hw))
3298 return QLA_FUNCTION_FAILED;
3300 mcp->mb[0] = MBC_PORT_PARAMS;
3301 mcp->mb[1] = loop_id;
3302 mcp->mb[2] = BIT_0;
3303 if (IS_CNA_CAPABLE(vha->hw))
3304 mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
3305 else
3306 mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
3307 mcp->mb[9] = vha->vp_idx;
3308 mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
3309 mcp->in_mb = MBX_3|MBX_1|MBX_0;
3310 mcp->tov = MBX_TOV_SECONDS;
3311 mcp->flags = 0;
3312 rval = qla2x00_mailbox_command(vha, mcp);
3314 /* Return mailbox statuses. */
3315 if (mb != NULL) {
3316 mb[0] = mcp->mb[0];
3317 mb[1] = mcp->mb[1];
3318 mb[3] = mcp->mb[3];
3321 if (rval != QLA_SUCCESS) {
3322 ql_dbg(ql_dbg_mbx, vha, 0x10b4,
3323 "Failed=%x.\n", rval);
3324 } else {
3325 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b5,
3326 "Done %s.\n", __func__);
3329 return rval;
3332 void
3333 qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
3334 struct vp_rpt_id_entry_24xx *rptid_entry)
3336 uint8_t vp_idx;
3337 uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
3338 struct qla_hw_data *ha = vha->hw;
3339 scsi_qla_host_t *vp;
3340 unsigned long flags;
3341 int found;
3343 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b6,
3344 "Entered %s.\n", __func__);
3346 if (rptid_entry->entry_status != 0)
3347 return;
3349 if (rptid_entry->format == 0) {
3350 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b7,
3351 "Format 0 : Number of VPs setup %d, number of "
3352 "VPs acquired %d.\n",
3353 MSB(le16_to_cpu(rptid_entry->vp_count)),
3354 LSB(le16_to_cpu(rptid_entry->vp_count)));
3355 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b8,
3356 "Primary port id %02x%02x%02x.\n",
3357 rptid_entry->port_id[2], rptid_entry->port_id[1],
3358 rptid_entry->port_id[0]);
3359 } else if (rptid_entry->format == 1) {
3360 vp_idx = LSB(stat);
3361 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10b9,
3362 "Format 1: VP[%d] enabled - status %d - with "
3363 "port id %02x%02x%02x.\n", vp_idx, MSB(stat),
3364 rptid_entry->port_id[2], rptid_entry->port_id[1],
3365 rptid_entry->port_id[0]);
3367 /* FA-WWN is only for physical port */
3368 if (!vp_idx) {
3369 void *wwpn = ha->init_cb->port_name;
3371 if (!MSB(stat)) {
3372 if (rptid_entry->vp_idx_map[1] & BIT_6)
3373 wwpn = rptid_entry->reserved_4 + 8;
3375 memcpy(vha->port_name, wwpn, WWN_SIZE);
3376 fc_host_port_name(vha->host) =
3377 wwn_to_u64(vha->port_name);
3378 ql_dbg(ql_dbg_mbx, vha, 0x1018,
3379 "FA-WWN portname %016llx (%x)\n",
3380 fc_host_port_name(vha->host), MSB(stat));
3383 vp = vha;
3384 if (vp_idx == 0)
3385 goto reg_needed;
3387 if (MSB(stat) != 0 && MSB(stat) != 2) {
3388 ql_dbg(ql_dbg_mbx, vha, 0x10ba,
3389 "Could not acquire ID for VP[%d].\n", vp_idx);
3390 return;
3393 found = 0;
3394 spin_lock_irqsave(&ha->vport_slock, flags);
3395 list_for_each_entry(vp, &ha->vp_list, list) {
3396 if (vp_idx == vp->vp_idx) {
3397 found = 1;
3398 break;
3401 spin_unlock_irqrestore(&ha->vport_slock, flags);
3403 if (!found)
3404 return;
3406 vp->d_id.b.domain = rptid_entry->port_id[2];
3407 vp->d_id.b.area = rptid_entry->port_id[1];
3408 vp->d_id.b.al_pa = rptid_entry->port_id[0];
3411 * Cannot configure here as we are still sitting on the
3412 * response queue. Handle it in dpc context.
3414 set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
3416 reg_needed:
3417 set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
3418 set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
3419 set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
3420 qla2xxx_wake_dpc(vha);
3425 * qla24xx_modify_vp_config
3426 * Change VP configuration for vha
3428 * Input:
3429 * vha = adapter block pointer.
3431 * Returns:
3432 * qla2xxx local function return status code.
3434 * Context:
3435 * Kernel context.
3438 qla24xx_modify_vp_config(scsi_qla_host_t *vha)
3440 int rval;
3441 struct vp_config_entry_24xx *vpmod;
3442 dma_addr_t vpmod_dma;
3443 struct qla_hw_data *ha = vha->hw;
3444 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3446 /* This can be called by the parent */
3448 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10bb,
3449 "Entered %s.\n", __func__);
3451 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
3452 if (!vpmod) {
3453 ql_log(ql_log_warn, vha, 0x10bc,
3454 "Failed to allocate modify VP IOCB.\n");
3455 return QLA_MEMORY_ALLOC_FAILED;
3458 memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
3459 vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
3460 vpmod->entry_count = 1;
3461 vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
3462 vpmod->vp_count = 1;
3463 vpmod->vp_index1 = vha->vp_idx;
3464 vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
3466 qlt_modify_vp_config(vha, vpmod);
3468 memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
3469 memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
3470 vpmod->entry_count = 1;
3472 rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
3473 if (rval != QLA_SUCCESS) {
3474 ql_dbg(ql_dbg_mbx, vha, 0x10bd,
3475 "Failed to issue VP config IOCB (%x).\n", rval);
3476 } else if (vpmod->comp_status != 0) {
3477 ql_dbg(ql_dbg_mbx, vha, 0x10be,
3478 "Failed to complete IOCB -- error status (%x).\n",
3479 vpmod->comp_status);
3480 rval = QLA_FUNCTION_FAILED;
3481 } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3482 ql_dbg(ql_dbg_mbx, vha, 0x10bf,
3483 "Failed to complete IOCB -- completion status (%x).\n",
3484 le16_to_cpu(vpmod->comp_status));
3485 rval = QLA_FUNCTION_FAILED;
3486 } else {
3487 /* EMPTY */
3488 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c0,
3489 "Done %s.\n", __func__);
3490 fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
3492 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
3494 return rval;
3498 * qla24xx_control_vp
3499 * Enable a virtual port for given host
3501 * Input:
3502 * ha = adapter block pointer.
3503 * vhba = virtual adapter (unused)
3504 * index = index number for enabled VP
3506 * Returns:
3507 * qla2xxx local function return status code.
3509 * Context:
3510 * Kernel context.
3513 qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
3515 int rval;
3516 int map, pos;
3517 struct vp_ctrl_entry_24xx *vce;
3518 dma_addr_t vce_dma;
3519 struct qla_hw_data *ha = vha->hw;
3520 int vp_index = vha->vp_idx;
3521 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
3523 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c1,
3524 "Entered %s enabling index %d.\n", __func__, vp_index);
3526 if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
3527 return QLA_PARAMETER_ERROR;
3529 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
3530 if (!vce) {
3531 ql_log(ql_log_warn, vha, 0x10c2,
3532 "Failed to allocate VP control IOCB.\n");
3533 return QLA_MEMORY_ALLOC_FAILED;
3535 memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
3537 vce->entry_type = VP_CTRL_IOCB_TYPE;
3538 vce->entry_count = 1;
3539 vce->command = cpu_to_le16(cmd);
3540 vce->vp_count = __constant_cpu_to_le16(1);
3542 /* index map in firmware starts with 1; decrement index
3543 * this is ok as we never use index 0
3545 map = (vp_index - 1) / 8;
3546 pos = (vp_index - 1) & 7;
3547 mutex_lock(&ha->vport_lock);
3548 vce->vp_idx_map[map] |= 1 << pos;
3549 mutex_unlock(&ha->vport_lock);
3551 rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
3552 if (rval != QLA_SUCCESS) {
3553 ql_dbg(ql_dbg_mbx, vha, 0x10c3,
3554 "Failed to issue VP control IOCB (%x).\n", rval);
3555 } else if (vce->entry_status != 0) {
3556 ql_dbg(ql_dbg_mbx, vha, 0x10c4,
3557 "Failed to complete IOCB -- error status (%x).\n",
3558 vce->entry_status);
3559 rval = QLA_FUNCTION_FAILED;
3560 } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
3561 ql_dbg(ql_dbg_mbx, vha, 0x10c5,
3562 "Failed to complet IOCB -- completion status (%x).\n",
3563 le16_to_cpu(vce->comp_status));
3564 rval = QLA_FUNCTION_FAILED;
3565 } else {
3566 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c6,
3567 "Done %s.\n", __func__);
3570 dma_pool_free(ha->s_dma_pool, vce, vce_dma);
3572 return rval;
3576 * qla2x00_send_change_request
3577 * Receive or disable RSCN request from fabric controller
3579 * Input:
3580 * ha = adapter block pointer
3581 * format = registration format:
3582 * 0 - Reserved
3583 * 1 - Fabric detected registration
3584 * 2 - N_port detected registration
3585 * 3 - Full registration
3586 * FF - clear registration
3587 * vp_idx = Virtual port index
3589 * Returns:
3590 * qla2x00 local function return status code.
3592 * Context:
3593 * Kernel Context
3597 qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
3598 uint16_t vp_idx)
3600 int rval;
3601 mbx_cmd_t mc;
3602 mbx_cmd_t *mcp = &mc;
3604 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c7,
3605 "Entered %s.\n", __func__);
3607 mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
3608 mcp->mb[1] = format;
3609 mcp->mb[9] = vp_idx;
3610 mcp->out_mb = MBX_9|MBX_1|MBX_0;
3611 mcp->in_mb = MBX_0|MBX_1;
3612 mcp->tov = MBX_TOV_SECONDS;
3613 mcp->flags = 0;
3614 rval = qla2x00_mailbox_command(vha, mcp);
3616 if (rval == QLA_SUCCESS) {
3617 if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
3618 rval = BIT_1;
3620 } else
3621 rval = BIT_1;
3623 return rval;
3627 qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
3628 uint32_t size)
3630 int rval;
3631 mbx_cmd_t mc;
3632 mbx_cmd_t *mcp = &mc;
3634 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1009,
3635 "Entered %s.\n", __func__);
3637 if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
3638 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
3639 mcp->mb[8] = MSW(addr);
3640 mcp->out_mb = MBX_8|MBX_0;
3641 } else {
3642 mcp->mb[0] = MBC_DUMP_RISC_RAM;
3643 mcp->out_mb = MBX_0;
3645 mcp->mb[1] = LSW(addr);
3646 mcp->mb[2] = MSW(req_dma);
3647 mcp->mb[3] = LSW(req_dma);
3648 mcp->mb[6] = MSW(MSD(req_dma));
3649 mcp->mb[7] = LSW(MSD(req_dma));
3650 mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
3651 if (IS_FWI2_CAPABLE(vha->hw)) {
3652 mcp->mb[4] = MSW(size);
3653 mcp->mb[5] = LSW(size);
3654 mcp->out_mb |= MBX_5|MBX_4;
3655 } else {
3656 mcp->mb[4] = LSW(size);
3657 mcp->out_mb |= MBX_4;
3660 mcp->in_mb = MBX_0;
3661 mcp->tov = MBX_TOV_SECONDS;
3662 mcp->flags = 0;
3663 rval = qla2x00_mailbox_command(vha, mcp);
3665 if (rval != QLA_SUCCESS) {
3666 ql_dbg(ql_dbg_mbx, vha, 0x1008,
3667 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3668 } else {
3669 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1007,
3670 "Done %s.\n", __func__);
3673 return rval;
3675 /* 84XX Support **************************************************************/
3677 struct cs84xx_mgmt_cmd {
3678 union {
3679 struct verify_chip_entry_84xx req;
3680 struct verify_chip_rsp_84xx rsp;
3681 } p;
3685 qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
3687 int rval, retry;
3688 struct cs84xx_mgmt_cmd *mn;
3689 dma_addr_t mn_dma;
3690 uint16_t options;
3691 unsigned long flags;
3692 struct qla_hw_data *ha = vha->hw;
3694 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10c8,
3695 "Entered %s.\n", __func__);
3697 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
3698 if (mn == NULL) {
3699 return QLA_MEMORY_ALLOC_FAILED;
3702 /* Force Update? */
3703 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
3704 /* Diagnostic firmware? */
3705 /* options |= MENLO_DIAG_FW; */
3706 /* We update the firmware with only one data sequence. */
3707 options |= VCO_END_OF_DATA;
3709 do {
3710 retry = 0;
3711 memset(mn, 0, sizeof(*mn));
3712 mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
3713 mn->p.req.entry_count = 1;
3714 mn->p.req.options = cpu_to_le16(options);
3716 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111c,
3717 "Dump of Verify Request.\n");
3718 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x111e,
3719 (uint8_t *)mn, sizeof(*mn));
3721 rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
3722 if (rval != QLA_SUCCESS) {
3723 ql_dbg(ql_dbg_mbx, vha, 0x10cb,
3724 "Failed to issue verify IOCB (%x).\n", rval);
3725 goto verify_done;
3728 ql_dbg(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1110,
3729 "Dump of Verify Response.\n");
3730 ql_dump_buffer(ql_dbg_mbx + ql_dbg_buffer, vha, 0x1118,
3731 (uint8_t *)mn, sizeof(*mn));
3733 status[0] = le16_to_cpu(mn->p.rsp.comp_status);
3734 status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
3735 le16_to_cpu(mn->p.rsp.failure_code) : 0;
3736 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ce,
3737 "cs=%x fc=%x.\n", status[0], status[1]);
3739 if (status[0] != CS_COMPLETE) {
3740 rval = QLA_FUNCTION_FAILED;
3741 if (!(options & VCO_DONT_UPDATE_FW)) {
3742 ql_dbg(ql_dbg_mbx, vha, 0x10cf,
3743 "Firmware update failed. Retrying "
3744 "without update firmware.\n");
3745 options |= VCO_DONT_UPDATE_FW;
3746 options &= ~VCO_FORCE_UPDATE;
3747 retry = 1;
3749 } else {
3750 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d0,
3751 "Firmware updated to %x.\n",
3752 le32_to_cpu(mn->p.rsp.fw_ver));
3754 /* NOTE: we only update OP firmware. */
3755 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
3756 ha->cs84xx->op_fw_version =
3757 le32_to_cpu(mn->p.rsp.fw_ver);
3758 spin_unlock_irqrestore(&ha->cs84xx->access_lock,
3759 flags);
3761 } while (retry);
3763 verify_done:
3764 dma_pool_free(ha->s_dma_pool, mn, mn_dma);
3766 if (rval != QLA_SUCCESS) {
3767 ql_dbg(ql_dbg_mbx, vha, 0x10d1,
3768 "Failed=%x.\n", rval);
3769 } else {
3770 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d2,
3771 "Done %s.\n", __func__);
3774 return rval;
3778 qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
3780 int rval;
3781 unsigned long flags;
3782 mbx_cmd_t mc;
3783 mbx_cmd_t *mcp = &mc;
3784 struct qla_hw_data *ha = vha->hw;
3786 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d3,
3787 "Entered %s.\n", __func__);
3789 if (IS_SHADOW_REG_CAPABLE(ha))
3790 req->options |= BIT_13;
3792 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3793 mcp->mb[1] = req->options;
3794 mcp->mb[2] = MSW(LSD(req->dma));
3795 mcp->mb[3] = LSW(LSD(req->dma));
3796 mcp->mb[6] = MSW(MSD(req->dma));
3797 mcp->mb[7] = LSW(MSD(req->dma));
3798 mcp->mb[5] = req->length;
3799 if (req->rsp)
3800 mcp->mb[10] = req->rsp->id;
3801 mcp->mb[12] = req->qos;
3802 mcp->mb[11] = req->vp_idx;
3803 mcp->mb[13] = req->rid;
3804 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3805 mcp->mb[15] = 0;
3807 mcp->mb[4] = req->id;
3808 /* que in ptr index */
3809 mcp->mb[8] = 0;
3810 /* que out ptr index */
3811 mcp->mb[9] = *req->out_ptr = 0;
3812 mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
3813 MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3814 mcp->in_mb = MBX_0;
3815 mcp->flags = MBX_DMA_OUT;
3816 mcp->tov = MBX_TOV_SECONDS * 2;
3818 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha))
3819 mcp->in_mb |= MBX_1;
3820 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3821 mcp->out_mb |= MBX_15;
3822 /* debug q create issue in SR-IOV */
3823 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3826 spin_lock_irqsave(&ha->hardware_lock, flags);
3827 if (!(req->options & BIT_0)) {
3828 WRT_REG_DWORD(req->req_q_in, 0);
3829 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3830 WRT_REG_DWORD(req->req_q_out, 0);
3832 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3834 rval = qla2x00_mailbox_command(vha, mcp);
3835 if (rval != QLA_SUCCESS) {
3836 ql_dbg(ql_dbg_mbx, vha, 0x10d4,
3837 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3838 } else {
3839 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d5,
3840 "Done %s.\n", __func__);
3843 return rval;
3847 qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
3849 int rval;
3850 unsigned long flags;
3851 mbx_cmd_t mc;
3852 mbx_cmd_t *mcp = &mc;
3853 struct qla_hw_data *ha = vha->hw;
3855 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d6,
3856 "Entered %s.\n", __func__);
3858 if (IS_SHADOW_REG_CAPABLE(ha))
3859 rsp->options |= BIT_13;
3861 mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
3862 mcp->mb[1] = rsp->options;
3863 mcp->mb[2] = MSW(LSD(rsp->dma));
3864 mcp->mb[3] = LSW(LSD(rsp->dma));
3865 mcp->mb[6] = MSW(MSD(rsp->dma));
3866 mcp->mb[7] = LSW(MSD(rsp->dma));
3867 mcp->mb[5] = rsp->length;
3868 mcp->mb[14] = rsp->msix->entry;
3869 mcp->mb[13] = rsp->rid;
3870 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3871 mcp->mb[15] = 0;
3873 mcp->mb[4] = rsp->id;
3874 /* que in ptr index */
3875 mcp->mb[8] = *rsp->in_ptr = 0;
3876 /* que out ptr index */
3877 mcp->mb[9] = 0;
3878 mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
3879 |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3880 mcp->in_mb = MBX_0;
3881 mcp->flags = MBX_DMA_OUT;
3882 mcp->tov = MBX_TOV_SECONDS * 2;
3884 if (IS_QLA81XX(ha)) {
3885 mcp->out_mb |= MBX_12|MBX_11|MBX_10;
3886 mcp->in_mb |= MBX_1;
3887 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3888 mcp->out_mb |= MBX_15|MBX_12|MBX_11|MBX_10;
3889 mcp->in_mb |= MBX_1;
3890 /* debug q create issue in SR-IOV */
3891 mcp->in_mb |= MBX_9 | MBX_8 | MBX_7;
3894 spin_lock_irqsave(&ha->hardware_lock, flags);
3895 if (!(rsp->options & BIT_0)) {
3896 WRT_REG_DWORD(rsp->rsp_q_out, 0);
3897 if (!IS_QLA83XX(ha))
3898 WRT_REG_DWORD(rsp->rsp_q_in, 0);
3901 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3903 rval = qla2x00_mailbox_command(vha, mcp);
3904 if (rval != QLA_SUCCESS) {
3905 ql_dbg(ql_dbg_mbx, vha, 0x10d7,
3906 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3907 } else {
3908 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d8,
3909 "Done %s.\n", __func__);
3912 return rval;
3916 qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
3918 int rval;
3919 mbx_cmd_t mc;
3920 mbx_cmd_t *mcp = &mc;
3922 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10d9,
3923 "Entered %s.\n", __func__);
3925 mcp->mb[0] = MBC_IDC_ACK;
3926 memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3927 mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
3928 mcp->in_mb = MBX_0;
3929 mcp->tov = MBX_TOV_SECONDS;
3930 mcp->flags = 0;
3931 rval = qla2x00_mailbox_command(vha, mcp);
3933 if (rval != QLA_SUCCESS) {
3934 ql_dbg(ql_dbg_mbx, vha, 0x10da,
3935 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
3936 } else {
3937 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10db,
3938 "Done %s.\n", __func__);
3941 return rval;
3945 qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
3947 int rval;
3948 mbx_cmd_t mc;
3949 mbx_cmd_t *mcp = &mc;
3951 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10dc,
3952 "Entered %s.\n", __func__);
3954 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
3955 !IS_QLA27XX(vha->hw))
3956 return QLA_FUNCTION_FAILED;
3958 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3959 mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
3960 mcp->out_mb = MBX_1|MBX_0;
3961 mcp->in_mb = MBX_1|MBX_0;
3962 mcp->tov = MBX_TOV_SECONDS;
3963 mcp->flags = 0;
3964 rval = qla2x00_mailbox_command(vha, mcp);
3966 if (rval != QLA_SUCCESS) {
3967 ql_dbg(ql_dbg_mbx, vha, 0x10dd,
3968 "Failed=%x mb[0]=%x mb[1]=%x.\n",
3969 rval, mcp->mb[0], mcp->mb[1]);
3970 } else {
3971 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10de,
3972 "Done %s.\n", __func__);
3973 *sector_size = mcp->mb[1];
3976 return rval;
3980 qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
3982 int rval;
3983 mbx_cmd_t mc;
3984 mbx_cmd_t *mcp = &mc;
3986 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
3987 !IS_QLA27XX(vha->hw))
3988 return QLA_FUNCTION_FAILED;
3990 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10df,
3991 "Entered %s.\n", __func__);
3993 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
3994 mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
3995 FAC_OPT_CMD_WRITE_PROTECT;
3996 mcp->out_mb = MBX_1|MBX_0;
3997 mcp->in_mb = MBX_1|MBX_0;
3998 mcp->tov = MBX_TOV_SECONDS;
3999 mcp->flags = 0;
4000 rval = qla2x00_mailbox_command(vha, mcp);
4002 if (rval != QLA_SUCCESS) {
4003 ql_dbg(ql_dbg_mbx, vha, 0x10e0,
4004 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4005 rval, mcp->mb[0], mcp->mb[1]);
4006 } else {
4007 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e1,
4008 "Done %s.\n", __func__);
4011 return rval;
4015 qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
4017 int rval;
4018 mbx_cmd_t mc;
4019 mbx_cmd_t *mcp = &mc;
4021 if (!IS_QLA81XX(vha->hw) && !IS_QLA83XX(vha->hw) &&
4022 !IS_QLA27XX(vha->hw))
4023 return QLA_FUNCTION_FAILED;
4025 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e2,
4026 "Entered %s.\n", __func__);
4028 mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
4029 mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
4030 mcp->mb[2] = LSW(start);
4031 mcp->mb[3] = MSW(start);
4032 mcp->mb[4] = LSW(finish);
4033 mcp->mb[5] = MSW(finish);
4034 mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4035 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4036 mcp->tov = MBX_TOV_SECONDS;
4037 mcp->flags = 0;
4038 rval = qla2x00_mailbox_command(vha, mcp);
4040 if (rval != QLA_SUCCESS) {
4041 ql_dbg(ql_dbg_mbx, vha, 0x10e3,
4042 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4043 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4044 } else {
4045 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e4,
4046 "Done %s.\n", __func__);
4049 return rval;
4053 qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
4055 int rval = 0;
4056 mbx_cmd_t mc;
4057 mbx_cmd_t *mcp = &mc;
4059 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e5,
4060 "Entered %s.\n", __func__);
4062 mcp->mb[0] = MBC_RESTART_MPI_FW;
4063 mcp->out_mb = MBX_0;
4064 mcp->in_mb = MBX_0|MBX_1;
4065 mcp->tov = MBX_TOV_SECONDS;
4066 mcp->flags = 0;
4067 rval = qla2x00_mailbox_command(vha, mcp);
4069 if (rval != QLA_SUCCESS) {
4070 ql_dbg(ql_dbg_mbx, vha, 0x10e6,
4071 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4072 rval, mcp->mb[0], mcp->mb[1]);
4073 } else {
4074 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e7,
4075 "Done %s.\n", __func__);
4078 return rval;
4082 qla82xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4084 int rval;
4085 mbx_cmd_t mc;
4086 mbx_cmd_t *mcp = &mc;
4087 int i;
4088 int len;
4089 uint16_t *str;
4090 struct qla_hw_data *ha = vha->hw;
4092 if (!IS_P3P_TYPE(ha))
4093 return QLA_FUNCTION_FAILED;
4095 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117b,
4096 "Entered %s.\n", __func__);
4098 str = (void *)version;
4099 len = strlen(version);
4101 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4102 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8;
4103 mcp->out_mb = MBX_1|MBX_0;
4104 for (i = 4; i < 16 && len; i++, str++, len -= 2) {
4105 mcp->mb[i] = cpu_to_le16p(str);
4106 mcp->out_mb |= 1<<i;
4108 for (; i < 16; i++) {
4109 mcp->mb[i] = 0;
4110 mcp->out_mb |= 1<<i;
4112 mcp->in_mb = MBX_1|MBX_0;
4113 mcp->tov = MBX_TOV_SECONDS;
4114 mcp->flags = 0;
4115 rval = qla2x00_mailbox_command(vha, mcp);
4117 if (rval != QLA_SUCCESS) {
4118 ql_dbg(ql_dbg_mbx, vha, 0x117c,
4119 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4120 } else {
4121 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117d,
4122 "Done %s.\n", __func__);
4125 return rval;
4129 qla25xx_set_driver_version(scsi_qla_host_t *vha, char *version)
4131 int rval;
4132 mbx_cmd_t mc;
4133 mbx_cmd_t *mcp = &mc;
4134 int len;
4135 uint16_t dwlen;
4136 uint8_t *str;
4137 dma_addr_t str_dma;
4138 struct qla_hw_data *ha = vha->hw;
4140 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) ||
4141 IS_P3P_TYPE(ha))
4142 return QLA_FUNCTION_FAILED;
4144 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x117e,
4145 "Entered %s.\n", __func__);
4147 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma);
4148 if (!str) {
4149 ql_log(ql_log_warn, vha, 0x117f,
4150 "Failed to allocate driver version param.\n");
4151 return QLA_MEMORY_ALLOC_FAILED;
4154 memcpy(str, "\x7\x3\x11\x0", 4);
4155 dwlen = str[0];
4156 len = dwlen * 4 - 4;
4157 memset(str + 4, 0, len);
4158 if (len > strlen(version))
4159 len = strlen(version);
4160 memcpy(str + 4, version, len);
4162 mcp->mb[0] = MBC_SET_RNID_PARAMS;
4163 mcp->mb[1] = RNID_TYPE_SET_VERSION << 8 | dwlen;
4164 mcp->mb[2] = MSW(LSD(str_dma));
4165 mcp->mb[3] = LSW(LSD(str_dma));
4166 mcp->mb[6] = MSW(MSD(str_dma));
4167 mcp->mb[7] = LSW(MSD(str_dma));
4168 mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4169 mcp->in_mb = MBX_1|MBX_0;
4170 mcp->tov = MBX_TOV_SECONDS;
4171 mcp->flags = 0;
4172 rval = qla2x00_mailbox_command(vha, mcp);
4174 if (rval != QLA_SUCCESS) {
4175 ql_dbg(ql_dbg_mbx, vha, 0x1180,
4176 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4177 } else {
4178 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1181,
4179 "Done %s.\n", __func__);
4182 dma_pool_free(ha->s_dma_pool, str, str_dma);
4184 return rval;
4187 static int
4188 qla2x00_read_asic_temperature(scsi_qla_host_t *vha, uint16_t *temp)
4190 int rval;
4191 mbx_cmd_t mc;
4192 mbx_cmd_t *mcp = &mc;
4194 if (!IS_FWI2_CAPABLE(vha->hw))
4195 return QLA_FUNCTION_FAILED;
4197 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1159,
4198 "Entered %s.\n", __func__);
4200 mcp->mb[0] = MBC_GET_RNID_PARAMS;
4201 mcp->mb[1] = RNID_TYPE_ASIC_TEMP << 8;
4202 mcp->out_mb = MBX_1|MBX_0;
4203 mcp->in_mb = MBX_1|MBX_0;
4204 mcp->tov = MBX_TOV_SECONDS;
4205 mcp->flags = 0;
4206 rval = qla2x00_mailbox_command(vha, mcp);
4207 *temp = mcp->mb[1];
4209 if (rval != QLA_SUCCESS) {
4210 ql_dbg(ql_dbg_mbx, vha, 0x115a,
4211 "Failed=%x mb[0]=%x,%x.\n", rval, mcp->mb[0], mcp->mb[1]);
4212 } else {
4213 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x115b,
4214 "Done %s.\n", __func__);
4217 return rval;
4221 qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4222 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4224 int rval;
4225 mbx_cmd_t mc;
4226 mbx_cmd_t *mcp = &mc;
4227 struct qla_hw_data *ha = vha->hw;
4229 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10e8,
4230 "Entered %s.\n", __func__);
4232 if (!IS_FWI2_CAPABLE(ha))
4233 return QLA_FUNCTION_FAILED;
4235 if (len == 1)
4236 opt |= BIT_0;
4238 mcp->mb[0] = MBC_READ_SFP;
4239 mcp->mb[1] = dev;
4240 mcp->mb[2] = MSW(sfp_dma);
4241 mcp->mb[3] = LSW(sfp_dma);
4242 mcp->mb[6] = MSW(MSD(sfp_dma));
4243 mcp->mb[7] = LSW(MSD(sfp_dma));
4244 mcp->mb[8] = len;
4245 mcp->mb[9] = off;
4246 mcp->mb[10] = opt;
4247 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4248 mcp->in_mb = MBX_1|MBX_0;
4249 mcp->tov = MBX_TOV_SECONDS;
4250 mcp->flags = 0;
4251 rval = qla2x00_mailbox_command(vha, mcp);
4253 if (opt & BIT_0)
4254 *sfp = mcp->mb[1];
4256 if (rval != QLA_SUCCESS) {
4257 ql_dbg(ql_dbg_mbx, vha, 0x10e9,
4258 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4259 } else {
4260 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ea,
4261 "Done %s.\n", __func__);
4264 return rval;
4268 qla2x00_write_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint8_t *sfp,
4269 uint16_t dev, uint16_t off, uint16_t len, uint16_t opt)
4271 int rval;
4272 mbx_cmd_t mc;
4273 mbx_cmd_t *mcp = &mc;
4274 struct qla_hw_data *ha = vha->hw;
4276 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10eb,
4277 "Entered %s.\n", __func__);
4279 if (!IS_FWI2_CAPABLE(ha))
4280 return QLA_FUNCTION_FAILED;
4282 if (len == 1)
4283 opt |= BIT_0;
4285 if (opt & BIT_0)
4286 len = *sfp;
4288 mcp->mb[0] = MBC_WRITE_SFP;
4289 mcp->mb[1] = dev;
4290 mcp->mb[2] = MSW(sfp_dma);
4291 mcp->mb[3] = LSW(sfp_dma);
4292 mcp->mb[6] = MSW(MSD(sfp_dma));
4293 mcp->mb[7] = LSW(MSD(sfp_dma));
4294 mcp->mb[8] = len;
4295 mcp->mb[9] = off;
4296 mcp->mb[10] = opt;
4297 mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4298 mcp->in_mb = MBX_1|MBX_0;
4299 mcp->tov = MBX_TOV_SECONDS;
4300 mcp->flags = 0;
4301 rval = qla2x00_mailbox_command(vha, mcp);
4303 if (rval != QLA_SUCCESS) {
4304 ql_dbg(ql_dbg_mbx, vha, 0x10ec,
4305 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4306 } else {
4307 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ed,
4308 "Done %s.\n", __func__);
4311 return rval;
4315 qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
4316 uint16_t size_in_bytes, uint16_t *actual_size)
4318 int rval;
4319 mbx_cmd_t mc;
4320 mbx_cmd_t *mcp = &mc;
4322 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ee,
4323 "Entered %s.\n", __func__);
4325 if (!IS_CNA_CAPABLE(vha->hw))
4326 return QLA_FUNCTION_FAILED;
4328 mcp->mb[0] = MBC_GET_XGMAC_STATS;
4329 mcp->mb[2] = MSW(stats_dma);
4330 mcp->mb[3] = LSW(stats_dma);
4331 mcp->mb[6] = MSW(MSD(stats_dma));
4332 mcp->mb[7] = LSW(MSD(stats_dma));
4333 mcp->mb[8] = size_in_bytes >> 2;
4334 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
4335 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4336 mcp->tov = MBX_TOV_SECONDS;
4337 mcp->flags = 0;
4338 rval = qla2x00_mailbox_command(vha, mcp);
4340 if (rval != QLA_SUCCESS) {
4341 ql_dbg(ql_dbg_mbx, vha, 0x10ef,
4342 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4343 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4344 } else {
4345 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f0,
4346 "Done %s.\n", __func__);
4349 *actual_size = mcp->mb[2] << 2;
4352 return rval;
4356 qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
4357 uint16_t size)
4359 int rval;
4360 mbx_cmd_t mc;
4361 mbx_cmd_t *mcp = &mc;
4363 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f1,
4364 "Entered %s.\n", __func__);
4366 if (!IS_CNA_CAPABLE(vha->hw))
4367 return QLA_FUNCTION_FAILED;
4369 mcp->mb[0] = MBC_GET_DCBX_PARAMS;
4370 mcp->mb[1] = 0;
4371 mcp->mb[2] = MSW(tlv_dma);
4372 mcp->mb[3] = LSW(tlv_dma);
4373 mcp->mb[6] = MSW(MSD(tlv_dma));
4374 mcp->mb[7] = LSW(MSD(tlv_dma));
4375 mcp->mb[8] = size;
4376 mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
4377 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4378 mcp->tov = MBX_TOV_SECONDS;
4379 mcp->flags = 0;
4380 rval = qla2x00_mailbox_command(vha, mcp);
4382 if (rval != QLA_SUCCESS) {
4383 ql_dbg(ql_dbg_mbx, vha, 0x10f2,
4384 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x.\n",
4385 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2]);
4386 } else {
4387 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f3,
4388 "Done %s.\n", __func__);
4391 return rval;
4395 qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
4397 int rval;
4398 mbx_cmd_t mc;
4399 mbx_cmd_t *mcp = &mc;
4401 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f4,
4402 "Entered %s.\n", __func__);
4404 if (!IS_FWI2_CAPABLE(vha->hw))
4405 return QLA_FUNCTION_FAILED;
4407 mcp->mb[0] = MBC_READ_RAM_EXTENDED;
4408 mcp->mb[1] = LSW(risc_addr);
4409 mcp->mb[8] = MSW(risc_addr);
4410 mcp->out_mb = MBX_8|MBX_1|MBX_0;
4411 mcp->in_mb = MBX_3|MBX_2|MBX_0;
4412 mcp->tov = 30;
4413 mcp->flags = 0;
4414 rval = qla2x00_mailbox_command(vha, mcp);
4415 if (rval != QLA_SUCCESS) {
4416 ql_dbg(ql_dbg_mbx, vha, 0x10f5,
4417 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4418 } else {
4419 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f6,
4420 "Done %s.\n", __func__);
4421 *data = mcp->mb[3] << 16 | mcp->mb[2];
4424 return rval;
4428 qla2x00_loopback_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4429 uint16_t *mresp)
4431 int rval;
4432 mbx_cmd_t mc;
4433 mbx_cmd_t *mcp = &mc;
4435 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f7,
4436 "Entered %s.\n", __func__);
4438 memset(mcp->mb, 0 , sizeof(mcp->mb));
4439 mcp->mb[0] = MBC_DIAGNOSTIC_LOOP_BACK;
4440 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing
4442 /* transfer count */
4443 mcp->mb[10] = LSW(mreq->transfer_size);
4444 mcp->mb[11] = MSW(mreq->transfer_size);
4446 /* send data address */
4447 mcp->mb[14] = LSW(mreq->send_dma);
4448 mcp->mb[15] = MSW(mreq->send_dma);
4449 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4450 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4452 /* receive data address */
4453 mcp->mb[16] = LSW(mreq->rcv_dma);
4454 mcp->mb[17] = MSW(mreq->rcv_dma);
4455 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4456 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4458 /* Iteration count */
4459 mcp->mb[18] = LSW(mreq->iteration_count);
4460 mcp->mb[19] = MSW(mreq->iteration_count);
4462 mcp->out_mb = MBX_21|MBX_20|MBX_19|MBX_18|MBX_17|MBX_16|MBX_15|
4463 MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4464 if (IS_CNA_CAPABLE(vha->hw))
4465 mcp->out_mb |= MBX_2;
4466 mcp->in_mb = MBX_19|MBX_18|MBX_3|MBX_2|MBX_1|MBX_0;
4468 mcp->buf_size = mreq->transfer_size;
4469 mcp->tov = MBX_TOV_SECONDS;
4470 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4472 rval = qla2x00_mailbox_command(vha, mcp);
4474 if (rval != QLA_SUCCESS) {
4475 ql_dbg(ql_dbg_mbx, vha, 0x10f8,
4476 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[18]=%x "
4477 "mb[19]=%x.\n", rval, mcp->mb[0], mcp->mb[1], mcp->mb[2],
4478 mcp->mb[3], mcp->mb[18], mcp->mb[19]);
4479 } else {
4480 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10f9,
4481 "Done %s.\n", __func__);
4484 /* Copy mailbox information */
4485 memcpy( mresp, mcp->mb, 64);
4486 return rval;
4490 qla2x00_echo_test(scsi_qla_host_t *vha, struct msg_echo_lb *mreq,
4491 uint16_t *mresp)
4493 int rval;
4494 mbx_cmd_t mc;
4495 mbx_cmd_t *mcp = &mc;
4496 struct qla_hw_data *ha = vha->hw;
4498 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fa,
4499 "Entered %s.\n", __func__);
4501 memset(mcp->mb, 0 , sizeof(mcp->mb));
4502 mcp->mb[0] = MBC_DIAGNOSTIC_ECHO;
4503 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */
4504 if (IS_CNA_CAPABLE(ha)) {
4505 mcp->mb[1] |= BIT_15;
4506 mcp->mb[2] = vha->fcoe_fcf_idx;
4508 mcp->mb[16] = LSW(mreq->rcv_dma);
4509 mcp->mb[17] = MSW(mreq->rcv_dma);
4510 mcp->mb[6] = LSW(MSD(mreq->rcv_dma));
4511 mcp->mb[7] = MSW(MSD(mreq->rcv_dma));
4513 mcp->mb[10] = LSW(mreq->transfer_size);
4515 mcp->mb[14] = LSW(mreq->send_dma);
4516 mcp->mb[15] = MSW(mreq->send_dma);
4517 mcp->mb[20] = LSW(MSD(mreq->send_dma));
4518 mcp->mb[21] = MSW(MSD(mreq->send_dma));
4520 mcp->out_mb = MBX_21|MBX_20|MBX_17|MBX_16|MBX_15|
4521 MBX_14|MBX_10|MBX_7|MBX_6|MBX_1|MBX_0;
4522 if (IS_CNA_CAPABLE(ha))
4523 mcp->out_mb |= MBX_2;
4525 mcp->in_mb = MBX_0;
4526 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) ||
4527 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4528 mcp->in_mb |= MBX_1;
4529 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha))
4530 mcp->in_mb |= MBX_3;
4532 mcp->tov = MBX_TOV_SECONDS;
4533 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4534 mcp->buf_size = mreq->transfer_size;
4536 rval = qla2x00_mailbox_command(vha, mcp);
4538 if (rval != QLA_SUCCESS) {
4539 ql_dbg(ql_dbg_mbx, vha, 0x10fb,
4540 "Failed=%x mb[0]=%x mb[1]=%x.\n",
4541 rval, mcp->mb[0], mcp->mb[1]);
4542 } else {
4543 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fc,
4544 "Done %s.\n", __func__);
4547 /* Copy mailbox information */
4548 memcpy(mresp, mcp->mb, 64);
4549 return rval;
4553 qla84xx_reset_chip(scsi_qla_host_t *vha, uint16_t enable_diagnostic)
4555 int rval;
4556 mbx_cmd_t mc;
4557 mbx_cmd_t *mcp = &mc;
4559 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10fd,
4560 "Entered %s enable_diag=%d.\n", __func__, enable_diagnostic);
4562 mcp->mb[0] = MBC_ISP84XX_RESET;
4563 mcp->mb[1] = enable_diagnostic;
4564 mcp->out_mb = MBX_1|MBX_0;
4565 mcp->in_mb = MBX_1|MBX_0;
4566 mcp->tov = MBX_TOV_SECONDS;
4567 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4568 rval = qla2x00_mailbox_command(vha, mcp);
4570 if (rval != QLA_SUCCESS)
4571 ql_dbg(ql_dbg_mbx, vha, 0x10fe, "Failed=%x.\n", rval);
4572 else
4573 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10ff,
4574 "Done %s.\n", __func__);
4576 return rval;
4580 qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
4582 int rval;
4583 mbx_cmd_t mc;
4584 mbx_cmd_t *mcp = &mc;
4586 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1100,
4587 "Entered %s.\n", __func__);
4589 if (!IS_FWI2_CAPABLE(vha->hw))
4590 return QLA_FUNCTION_FAILED;
4592 mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
4593 mcp->mb[1] = LSW(risc_addr);
4594 mcp->mb[2] = LSW(data);
4595 mcp->mb[3] = MSW(data);
4596 mcp->mb[8] = MSW(risc_addr);
4597 mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
4598 mcp->in_mb = MBX_0;
4599 mcp->tov = 30;
4600 mcp->flags = 0;
4601 rval = qla2x00_mailbox_command(vha, mcp);
4602 if (rval != QLA_SUCCESS) {
4603 ql_dbg(ql_dbg_mbx, vha, 0x1101,
4604 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4605 } else {
4606 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1102,
4607 "Done %s.\n", __func__);
4610 return rval;
4614 qla81xx_write_mpi_register(scsi_qla_host_t *vha, uint16_t *mb)
4616 int rval;
4617 uint32_t stat, timer;
4618 uint16_t mb0 = 0;
4619 struct qla_hw_data *ha = vha->hw;
4620 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
4622 rval = QLA_SUCCESS;
4624 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1103,
4625 "Entered %s.\n", __func__);
4627 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
4629 /* Write the MBC data to the registers */
4630 WRT_REG_WORD(&reg->mailbox0, MBC_WRITE_MPI_REGISTER);
4631 WRT_REG_WORD(&reg->mailbox1, mb[0]);
4632 WRT_REG_WORD(&reg->mailbox2, mb[1]);
4633 WRT_REG_WORD(&reg->mailbox3, mb[2]);
4634 WRT_REG_WORD(&reg->mailbox4, mb[3]);
4636 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_HOST_INT);
4638 /* Poll for MBC interrupt */
4639 for (timer = 6000000; timer; timer--) {
4640 /* Check for pending interrupts. */
4641 stat = RD_REG_DWORD(&reg->host_status);
4642 if (stat & HSRX_RISC_INT) {
4643 stat &= 0xff;
4645 if (stat == 0x1 || stat == 0x2 ||
4646 stat == 0x10 || stat == 0x11) {
4647 set_bit(MBX_INTERRUPT,
4648 &ha->mbx_cmd_flags);
4649 mb0 = RD_REG_WORD(&reg->mailbox0);
4650 WRT_REG_DWORD(&reg->hccr,
4651 HCCRX_CLR_RISC_INT);
4652 RD_REG_DWORD(&reg->hccr);
4653 break;
4656 udelay(5);
4659 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags))
4660 rval = mb0 & MBS_MASK;
4661 else
4662 rval = QLA_FUNCTION_FAILED;
4664 if (rval != QLA_SUCCESS) {
4665 ql_dbg(ql_dbg_mbx, vha, 0x1104,
4666 "Failed=%x mb[0]=%x.\n", rval, mb[0]);
4667 } else {
4668 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1105,
4669 "Done %s.\n", __func__);
4672 return rval;
4676 qla2x00_get_data_rate(scsi_qla_host_t *vha)
4678 int rval;
4679 mbx_cmd_t mc;
4680 mbx_cmd_t *mcp = &mc;
4681 struct qla_hw_data *ha = vha->hw;
4683 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1106,
4684 "Entered %s.\n", __func__);
4686 if (!IS_FWI2_CAPABLE(ha))
4687 return QLA_FUNCTION_FAILED;
4689 mcp->mb[0] = MBC_DATA_RATE;
4690 mcp->mb[1] = 0;
4691 mcp->out_mb = MBX_1|MBX_0;
4692 mcp->in_mb = MBX_2|MBX_1|MBX_0;
4693 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
4694 mcp->in_mb |= MBX_3;
4695 mcp->tov = MBX_TOV_SECONDS;
4696 mcp->flags = 0;
4697 rval = qla2x00_mailbox_command(vha, mcp);
4698 if (rval != QLA_SUCCESS) {
4699 ql_dbg(ql_dbg_mbx, vha, 0x1107,
4700 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4701 } else {
4702 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1108,
4703 "Done %s.\n", __func__);
4704 if (mcp->mb[1] != 0x7)
4705 ha->link_data_rate = mcp->mb[1];
4708 return rval;
4712 qla81xx_get_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4714 int rval;
4715 mbx_cmd_t mc;
4716 mbx_cmd_t *mcp = &mc;
4717 struct qla_hw_data *ha = vha->hw;
4719 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1109,
4720 "Entered %s.\n", __func__);
4722 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) &&
4723 !IS_QLA27XX(ha))
4724 return QLA_FUNCTION_FAILED;
4725 mcp->mb[0] = MBC_GET_PORT_CONFIG;
4726 mcp->out_mb = MBX_0;
4727 mcp->in_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4728 mcp->tov = MBX_TOV_SECONDS;
4729 mcp->flags = 0;
4731 rval = qla2x00_mailbox_command(vha, mcp);
4733 if (rval != QLA_SUCCESS) {
4734 ql_dbg(ql_dbg_mbx, vha, 0x110a,
4735 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4736 } else {
4737 /* Copy all bits to preserve original value */
4738 memcpy(mb, &mcp->mb[1], sizeof(uint16_t) * 4);
4740 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110b,
4741 "Done %s.\n", __func__);
4743 return rval;
4747 qla81xx_set_port_config(scsi_qla_host_t *vha, uint16_t *mb)
4749 int rval;
4750 mbx_cmd_t mc;
4751 mbx_cmd_t *mcp = &mc;
4753 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110c,
4754 "Entered %s.\n", __func__);
4756 mcp->mb[0] = MBC_SET_PORT_CONFIG;
4757 /* Copy all bits to preserve original setting */
4758 memcpy(&mcp->mb[1], mb, sizeof(uint16_t) * 4);
4759 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4760 mcp->in_mb = MBX_0;
4761 mcp->tov = MBX_TOV_SECONDS;
4762 mcp->flags = 0;
4763 rval = qla2x00_mailbox_command(vha, mcp);
4765 if (rval != QLA_SUCCESS) {
4766 ql_dbg(ql_dbg_mbx, vha, 0x110d,
4767 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4768 } else
4769 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110e,
4770 "Done %s.\n", __func__);
4772 return rval;
4777 qla24xx_set_fcp_prio(scsi_qla_host_t *vha, uint16_t loop_id, uint16_t priority,
4778 uint16_t *mb)
4780 int rval;
4781 mbx_cmd_t mc;
4782 mbx_cmd_t *mcp = &mc;
4783 struct qla_hw_data *ha = vha->hw;
4785 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x110f,
4786 "Entered %s.\n", __func__);
4788 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha))
4789 return QLA_FUNCTION_FAILED;
4791 mcp->mb[0] = MBC_PORT_PARAMS;
4792 mcp->mb[1] = loop_id;
4793 if (ha->flags.fcp_prio_enabled)
4794 mcp->mb[2] = BIT_1;
4795 else
4796 mcp->mb[2] = BIT_2;
4797 mcp->mb[4] = priority & 0xf;
4798 mcp->mb[9] = vha->vp_idx;
4799 mcp->out_mb = MBX_9|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4800 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
4801 mcp->tov = 30;
4802 mcp->flags = 0;
4803 rval = qla2x00_mailbox_command(vha, mcp);
4804 if (mb != NULL) {
4805 mb[0] = mcp->mb[0];
4806 mb[1] = mcp->mb[1];
4807 mb[3] = mcp->mb[3];
4808 mb[4] = mcp->mb[4];
4811 if (rval != QLA_SUCCESS) {
4812 ql_dbg(ql_dbg_mbx, vha, 0x10cd, "Failed=%x.\n", rval);
4813 } else {
4814 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x10cc,
4815 "Done %s.\n", __func__);
4818 return rval;
4822 qla2x00_get_thermal_temp(scsi_qla_host_t *vha, uint16_t *temp)
4824 int rval = QLA_FUNCTION_FAILED;
4825 struct qla_hw_data *ha = vha->hw;
4826 uint8_t byte;
4828 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) {
4829 ql_dbg(ql_dbg_mbx, vha, 0x1150,
4830 "Thermal not supported by this card.\n");
4831 return rval;
4834 if (IS_QLA25XX(ha)) {
4835 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
4836 ha->pdev->subsystem_device == 0x0175) {
4837 rval = qla2x00_read_sfp(vha, 0, &byte,
4838 0x98, 0x1, 1, BIT_13|BIT_0);
4839 *temp = byte;
4840 return rval;
4842 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
4843 ha->pdev->subsystem_device == 0x338e) {
4844 rval = qla2x00_read_sfp(vha, 0, &byte,
4845 0x98, 0x1, 1, BIT_15|BIT_14|BIT_0);
4846 *temp = byte;
4847 return rval;
4849 ql_dbg(ql_dbg_mbx, vha, 0x10c9,
4850 "Thermal not supported by this card.\n");
4851 return rval;
4854 if (IS_QLA82XX(ha)) {
4855 *temp = qla82xx_read_temperature(vha);
4856 rval = QLA_SUCCESS;
4857 return rval;
4858 } else if (IS_QLA8044(ha)) {
4859 *temp = qla8044_read_temperature(vha);
4860 rval = QLA_SUCCESS;
4861 return rval;
4864 rval = qla2x00_read_asic_temperature(vha, temp);
4865 return rval;
4869 qla82xx_mbx_intr_enable(scsi_qla_host_t *vha)
4871 int rval;
4872 struct qla_hw_data *ha = vha->hw;
4873 mbx_cmd_t mc;
4874 mbx_cmd_t *mcp = &mc;
4876 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1017,
4877 "Entered %s.\n", __func__);
4879 if (!IS_FWI2_CAPABLE(ha))
4880 return QLA_FUNCTION_FAILED;
4882 memset(mcp, 0, sizeof(mbx_cmd_t));
4883 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4884 mcp->mb[1] = 1;
4886 mcp->out_mb = MBX_1|MBX_0;
4887 mcp->in_mb = MBX_0;
4888 mcp->tov = 30;
4889 mcp->flags = 0;
4891 rval = qla2x00_mailbox_command(vha, mcp);
4892 if (rval != QLA_SUCCESS) {
4893 ql_dbg(ql_dbg_mbx, vha, 0x1016,
4894 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4895 } else {
4896 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100e,
4897 "Done %s.\n", __func__);
4900 return rval;
4904 qla82xx_mbx_intr_disable(scsi_qla_host_t *vha)
4906 int rval;
4907 struct qla_hw_data *ha = vha->hw;
4908 mbx_cmd_t mc;
4909 mbx_cmd_t *mcp = &mc;
4911 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100d,
4912 "Entered %s.\n", __func__);
4914 if (!IS_P3P_TYPE(ha))
4915 return QLA_FUNCTION_FAILED;
4917 memset(mcp, 0, sizeof(mbx_cmd_t));
4918 mcp->mb[0] = MBC_TOGGLE_INTERRUPT;
4919 mcp->mb[1] = 0;
4921 mcp->out_mb = MBX_1|MBX_0;
4922 mcp->in_mb = MBX_0;
4923 mcp->tov = 30;
4924 mcp->flags = 0;
4926 rval = qla2x00_mailbox_command(vha, mcp);
4927 if (rval != QLA_SUCCESS) {
4928 ql_dbg(ql_dbg_mbx, vha, 0x100c,
4929 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
4930 } else {
4931 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x100b,
4932 "Done %s.\n", __func__);
4935 return rval;
4939 qla82xx_md_get_template_size(scsi_qla_host_t *vha)
4941 struct qla_hw_data *ha = vha->hw;
4942 mbx_cmd_t mc;
4943 mbx_cmd_t *mcp = &mc;
4944 int rval = QLA_FUNCTION_FAILED;
4946 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x111f,
4947 "Entered %s.\n", __func__);
4949 memset(mcp->mb, 0 , sizeof(mcp->mb));
4950 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4951 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
4952 mcp->mb[2] = LSW(RQST_TMPLT_SIZE);
4953 mcp->mb[3] = MSW(RQST_TMPLT_SIZE);
4955 mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
4956 mcp->in_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|
4957 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
4959 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
4960 mcp->tov = MBX_TOV_SECONDS;
4961 rval = qla2x00_mailbox_command(vha, mcp);
4963 /* Always copy back return mailbox values. */
4964 if (rval != QLA_SUCCESS) {
4965 ql_dbg(ql_dbg_mbx, vha, 0x1120,
4966 "mailbox command FAILED=0x%x, subcode=%x.\n",
4967 (mcp->mb[1] << 16) | mcp->mb[0],
4968 (mcp->mb[3] << 16) | mcp->mb[2]);
4969 } else {
4970 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1121,
4971 "Done %s.\n", __func__);
4972 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]);
4973 if (!ha->md_template_size) {
4974 ql_dbg(ql_dbg_mbx, vha, 0x1122,
4975 "Null template size obtained.\n");
4976 rval = QLA_FUNCTION_FAILED;
4979 return rval;
4983 qla82xx_md_get_template(scsi_qla_host_t *vha)
4985 struct qla_hw_data *ha = vha->hw;
4986 mbx_cmd_t mc;
4987 mbx_cmd_t *mcp = &mc;
4988 int rval = QLA_FUNCTION_FAILED;
4990 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1123,
4991 "Entered %s.\n", __func__);
4993 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
4994 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
4995 if (!ha->md_tmplt_hdr) {
4996 ql_log(ql_log_warn, vha, 0x1124,
4997 "Unable to allocate memory for Minidump template.\n");
4998 return rval;
5001 memset(mcp->mb, 0 , sizeof(mcp->mb));
5002 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5003 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5004 mcp->mb[2] = LSW(RQST_TMPLT);
5005 mcp->mb[3] = MSW(RQST_TMPLT);
5006 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma));
5007 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma));
5008 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma));
5009 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma));
5010 mcp->mb[8] = LSW(ha->md_template_size);
5011 mcp->mb[9] = MSW(ha->md_template_size);
5013 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5014 mcp->tov = MBX_TOV_SECONDS;
5015 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5016 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5017 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5018 rval = qla2x00_mailbox_command(vha, mcp);
5020 if (rval != QLA_SUCCESS) {
5021 ql_dbg(ql_dbg_mbx, vha, 0x1125,
5022 "mailbox command FAILED=0x%x, subcode=%x.\n",
5023 ((mcp->mb[1] << 16) | mcp->mb[0]),
5024 ((mcp->mb[3] << 16) | mcp->mb[2]));
5025 } else
5026 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1126,
5027 "Done %s.\n", __func__);
5028 return rval;
5032 qla8044_md_get_template(scsi_qla_host_t *vha)
5034 struct qla_hw_data *ha = vha->hw;
5035 mbx_cmd_t mc;
5036 mbx_cmd_t *mcp = &mc;
5037 int rval = QLA_FUNCTION_FAILED;
5038 int offset = 0, size = MINIDUMP_SIZE_36K;
5039 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11f,
5040 "Entered %s.\n", __func__);
5042 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev,
5043 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL);
5044 if (!ha->md_tmplt_hdr) {
5045 ql_log(ql_log_warn, vha, 0xb11b,
5046 "Unable to allocate memory for Minidump template.\n");
5047 return rval;
5050 memset(mcp->mb, 0 , sizeof(mcp->mb));
5051 while (offset < ha->md_template_size) {
5052 mcp->mb[0] = LSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5053 mcp->mb[1] = MSW(MBC_DIAGNOSTIC_MINIDUMP_TEMPLATE);
5054 mcp->mb[2] = LSW(RQST_TMPLT);
5055 mcp->mb[3] = MSW(RQST_TMPLT);
5056 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset));
5057 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset));
5058 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset));
5059 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset));
5060 mcp->mb[8] = LSW(size);
5061 mcp->mb[9] = MSW(size);
5062 mcp->mb[10] = offset & 0x0000FFFF;
5063 mcp->mb[11] = offset & 0xFFFF0000;
5064 mcp->flags = MBX_DMA_OUT|MBX_DMA_IN|IOCTL_CMD;
5065 mcp->tov = MBX_TOV_SECONDS;
5066 mcp->out_mb = MBX_11|MBX_10|MBX_9|MBX_8|
5067 MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5068 mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
5069 rval = qla2x00_mailbox_command(vha, mcp);
5071 if (rval != QLA_SUCCESS) {
5072 ql_dbg(ql_dbg_mbx, vha, 0xb11c,
5073 "mailbox command FAILED=0x%x, subcode=%x.\n",
5074 ((mcp->mb[1] << 16) | mcp->mb[0]),
5075 ((mcp->mb[3] << 16) | mcp->mb[2]));
5076 return rval;
5077 } else
5078 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0xb11d,
5079 "Done %s.\n", __func__);
5080 offset = offset + size;
5082 return rval;
5086 qla81xx_set_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5088 int rval;
5089 struct qla_hw_data *ha = vha->hw;
5090 mbx_cmd_t mc;
5091 mbx_cmd_t *mcp = &mc;
5093 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5094 return QLA_FUNCTION_FAILED;
5096 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1133,
5097 "Entered %s.\n", __func__);
5099 memset(mcp, 0, sizeof(mbx_cmd_t));
5100 mcp->mb[0] = MBC_SET_LED_CONFIG;
5101 mcp->mb[1] = led_cfg[0];
5102 mcp->mb[2] = led_cfg[1];
5103 if (IS_QLA8031(ha)) {
5104 mcp->mb[3] = led_cfg[2];
5105 mcp->mb[4] = led_cfg[3];
5106 mcp->mb[5] = led_cfg[4];
5107 mcp->mb[6] = led_cfg[5];
5110 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5111 if (IS_QLA8031(ha))
5112 mcp->out_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5113 mcp->in_mb = MBX_0;
5114 mcp->tov = 30;
5115 mcp->flags = 0;
5117 rval = qla2x00_mailbox_command(vha, mcp);
5118 if (rval != QLA_SUCCESS) {
5119 ql_dbg(ql_dbg_mbx, vha, 0x1134,
5120 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5121 } else {
5122 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1135,
5123 "Done %s.\n", __func__);
5126 return rval;
5130 qla81xx_get_led_config(scsi_qla_host_t *vha, uint16_t *led_cfg)
5132 int rval;
5133 struct qla_hw_data *ha = vha->hw;
5134 mbx_cmd_t mc;
5135 mbx_cmd_t *mcp = &mc;
5137 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha))
5138 return QLA_FUNCTION_FAILED;
5140 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1136,
5141 "Entered %s.\n", __func__);
5143 memset(mcp, 0, sizeof(mbx_cmd_t));
5144 mcp->mb[0] = MBC_GET_LED_CONFIG;
5146 mcp->out_mb = MBX_0;
5147 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5148 if (IS_QLA8031(ha))
5149 mcp->in_mb |= MBX_6|MBX_5|MBX_4|MBX_3;
5150 mcp->tov = 30;
5151 mcp->flags = 0;
5153 rval = qla2x00_mailbox_command(vha, mcp);
5154 if (rval != QLA_SUCCESS) {
5155 ql_dbg(ql_dbg_mbx, vha, 0x1137,
5156 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5157 } else {
5158 led_cfg[0] = mcp->mb[1];
5159 led_cfg[1] = mcp->mb[2];
5160 if (IS_QLA8031(ha)) {
5161 led_cfg[2] = mcp->mb[3];
5162 led_cfg[3] = mcp->mb[4];
5163 led_cfg[4] = mcp->mb[5];
5164 led_cfg[5] = mcp->mb[6];
5166 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1138,
5167 "Done %s.\n", __func__);
5170 return rval;
5174 qla82xx_mbx_beacon_ctl(scsi_qla_host_t *vha, int enable)
5176 int rval;
5177 struct qla_hw_data *ha = vha->hw;
5178 mbx_cmd_t mc;
5179 mbx_cmd_t *mcp = &mc;
5181 if (!IS_P3P_TYPE(ha))
5182 return QLA_FUNCTION_FAILED;
5184 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1127,
5185 "Entered %s.\n", __func__);
5187 memset(mcp, 0, sizeof(mbx_cmd_t));
5188 mcp->mb[0] = MBC_SET_LED_CONFIG;
5189 if (enable)
5190 mcp->mb[7] = 0xE;
5191 else
5192 mcp->mb[7] = 0xD;
5194 mcp->out_mb = MBX_7|MBX_0;
5195 mcp->in_mb = MBX_0;
5196 mcp->tov = MBX_TOV_SECONDS;
5197 mcp->flags = 0;
5199 rval = qla2x00_mailbox_command(vha, mcp);
5200 if (rval != QLA_SUCCESS) {
5201 ql_dbg(ql_dbg_mbx, vha, 0x1128,
5202 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5203 } else {
5204 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1129,
5205 "Done %s.\n", __func__);
5208 return rval;
5212 qla83xx_wr_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t data)
5214 int rval;
5215 struct qla_hw_data *ha = vha->hw;
5216 mbx_cmd_t mc;
5217 mbx_cmd_t *mcp = &mc;
5219 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5220 return QLA_FUNCTION_FAILED;
5222 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1130,
5223 "Entered %s.\n", __func__);
5225 mcp->mb[0] = MBC_WRITE_REMOTE_REG;
5226 mcp->mb[1] = LSW(reg);
5227 mcp->mb[2] = MSW(reg);
5228 mcp->mb[3] = LSW(data);
5229 mcp->mb[4] = MSW(data);
5230 mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
5232 mcp->in_mb = MBX_1|MBX_0;
5233 mcp->tov = MBX_TOV_SECONDS;
5234 mcp->flags = 0;
5235 rval = qla2x00_mailbox_command(vha, mcp);
5237 if (rval != QLA_SUCCESS) {
5238 ql_dbg(ql_dbg_mbx, vha, 0x1131,
5239 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5240 } else {
5241 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x1132,
5242 "Done %s.\n", __func__);
5245 return rval;
5249 qla2x00_port_logout(scsi_qla_host_t *vha, struct fc_port *fcport)
5251 int rval;
5252 struct qla_hw_data *ha = vha->hw;
5253 mbx_cmd_t mc;
5254 mbx_cmd_t *mcp = &mc;
5256 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
5257 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113b,
5258 "Implicit LOGO Unsupported.\n");
5259 return QLA_FUNCTION_FAILED;
5263 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113c,
5264 "Entering %s.\n", __func__);
5266 /* Perform Implicit LOGO. */
5267 mcp->mb[0] = MBC_PORT_LOGOUT;
5268 mcp->mb[1] = fcport->loop_id;
5269 mcp->mb[10] = BIT_15;
5270 mcp->out_mb = MBX_10|MBX_1|MBX_0;
5271 mcp->in_mb = MBX_0;
5272 mcp->tov = MBX_TOV_SECONDS;
5273 mcp->flags = 0;
5274 rval = qla2x00_mailbox_command(vha, mcp);
5275 if (rval != QLA_SUCCESS)
5276 ql_dbg(ql_dbg_mbx, vha, 0x113d,
5277 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5278 else
5279 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x113e,
5280 "Done %s.\n", __func__);
5282 return rval;
5286 qla83xx_rd_reg(scsi_qla_host_t *vha, uint32_t reg, uint32_t *data)
5288 int rval;
5289 mbx_cmd_t mc;
5290 mbx_cmd_t *mcp = &mc;
5291 struct qla_hw_data *ha = vha->hw;
5292 unsigned long retry_max_time = jiffies + (2 * HZ);
5294 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
5295 return QLA_FUNCTION_FAILED;
5297 ql_dbg(ql_dbg_mbx, vha, 0x114b, "Entered %s.\n", __func__);
5299 retry_rd_reg:
5300 mcp->mb[0] = MBC_READ_REMOTE_REG;
5301 mcp->mb[1] = LSW(reg);
5302 mcp->mb[2] = MSW(reg);
5303 mcp->out_mb = MBX_2|MBX_1|MBX_0;
5304 mcp->in_mb = MBX_4|MBX_3|MBX_1|MBX_0;
5305 mcp->tov = MBX_TOV_SECONDS;
5306 mcp->flags = 0;
5307 rval = qla2x00_mailbox_command(vha, mcp);
5309 if (rval != QLA_SUCCESS) {
5310 ql_dbg(ql_dbg_mbx, vha, 0x114c,
5311 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5312 rval, mcp->mb[0], mcp->mb[1]);
5313 } else {
5314 *data = (mcp->mb[3] | (mcp->mb[4] << 16));
5315 if (*data == QLA8XXX_BAD_VALUE) {
5317 * During soft-reset CAMRAM register reads might
5318 * return 0xbad0bad0. So retry for MAX of 2 sec
5319 * while reading camram registers.
5321 if (time_after(jiffies, retry_max_time)) {
5322 ql_dbg(ql_dbg_mbx, vha, 0x1141,
5323 "Failure to read CAMRAM register. "
5324 "data=0x%x.\n", *data);
5325 return QLA_FUNCTION_FAILED;
5327 msleep(100);
5328 goto retry_rd_reg;
5330 ql_dbg(ql_dbg_mbx, vha, 0x1142, "Done %s.\n", __func__);
5333 return rval;
5337 qla83xx_restart_nic_firmware(scsi_qla_host_t *vha)
5339 int rval;
5340 mbx_cmd_t mc;
5341 mbx_cmd_t *mcp = &mc;
5342 struct qla_hw_data *ha = vha->hw;
5344 if (!IS_QLA83XX(ha))
5345 return QLA_FUNCTION_FAILED;
5347 ql_dbg(ql_dbg_mbx, vha, 0x1143, "Entered %s.\n", __func__);
5349 mcp->mb[0] = MBC_RESTART_NIC_FIRMWARE;
5350 mcp->out_mb = MBX_0;
5351 mcp->in_mb = MBX_1|MBX_0;
5352 mcp->tov = MBX_TOV_SECONDS;
5353 mcp->flags = 0;
5354 rval = qla2x00_mailbox_command(vha, mcp);
5356 if (rval != QLA_SUCCESS) {
5357 ql_dbg(ql_dbg_mbx, vha, 0x1144,
5358 "Failed=%x mb[0]=%x mb[1]=%x.\n",
5359 rval, mcp->mb[0], mcp->mb[1]);
5360 ha->isp_ops->fw_dump(vha, 0);
5361 } else {
5362 ql_dbg(ql_dbg_mbx, vha, 0x1145, "Done %s.\n", __func__);
5365 return rval;
5369 qla83xx_access_control(scsi_qla_host_t *vha, uint16_t options,
5370 uint32_t start_addr, uint32_t end_addr, uint16_t *sector_size)
5372 int rval;
5373 mbx_cmd_t mc;
5374 mbx_cmd_t *mcp = &mc;
5375 uint8_t subcode = (uint8_t)options;
5376 struct qla_hw_data *ha = vha->hw;
5378 if (!IS_QLA8031(ha))
5379 return QLA_FUNCTION_FAILED;
5381 ql_dbg(ql_dbg_mbx, vha, 0x1146, "Entered %s.\n", __func__);
5383 mcp->mb[0] = MBC_SET_ACCESS_CONTROL;
5384 mcp->mb[1] = options;
5385 mcp->out_mb = MBX_1|MBX_0;
5386 if (subcode & BIT_2) {
5387 mcp->mb[2] = LSW(start_addr);
5388 mcp->mb[3] = MSW(start_addr);
5389 mcp->mb[4] = LSW(end_addr);
5390 mcp->mb[5] = MSW(end_addr);
5391 mcp->out_mb |= MBX_5|MBX_4|MBX_3|MBX_2;
5393 mcp->in_mb = MBX_2|MBX_1|MBX_0;
5394 if (!(subcode & (BIT_2 | BIT_5)))
5395 mcp->in_mb |= MBX_4|MBX_3;
5396 mcp->tov = MBX_TOV_SECONDS;
5397 mcp->flags = 0;
5398 rval = qla2x00_mailbox_command(vha, mcp);
5400 if (rval != QLA_SUCCESS) {
5401 ql_dbg(ql_dbg_mbx, vha, 0x1147,
5402 "Failed=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[3]=%x mb[4]=%x.\n",
5403 rval, mcp->mb[0], mcp->mb[1], mcp->mb[2], mcp->mb[3],
5404 mcp->mb[4]);
5405 ha->isp_ops->fw_dump(vha, 0);
5406 } else {
5407 if (subcode & BIT_5)
5408 *sector_size = mcp->mb[1];
5409 else if (subcode & (BIT_6 | BIT_7)) {
5410 ql_dbg(ql_dbg_mbx, vha, 0x1148,
5411 "Driver-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5412 } else if (subcode & (BIT_3 | BIT_4)) {
5413 ql_dbg(ql_dbg_mbx, vha, 0x1149,
5414 "Flash-lock id=%x%x", mcp->mb[4], mcp->mb[3]);
5416 ql_dbg(ql_dbg_mbx, vha, 0x114a, "Done %s.\n", __func__);
5419 return rval;
5423 qla2x00_dump_mctp_data(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
5424 uint32_t size)
5426 int rval;
5427 mbx_cmd_t mc;
5428 mbx_cmd_t *mcp = &mc;
5430 if (!IS_MCTP_CAPABLE(vha->hw))
5431 return QLA_FUNCTION_FAILED;
5433 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114f,
5434 "Entered %s.\n", __func__);
5436 mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
5437 mcp->mb[1] = LSW(addr);
5438 mcp->mb[2] = MSW(req_dma);
5439 mcp->mb[3] = LSW(req_dma);
5440 mcp->mb[4] = MSW(size);
5441 mcp->mb[5] = LSW(size);
5442 mcp->mb[6] = MSW(MSD(req_dma));
5443 mcp->mb[7] = LSW(MSD(req_dma));
5444 mcp->mb[8] = MSW(addr);
5445 /* Setting RAM ID to valid */
5446 mcp->mb[10] |= BIT_7;
5447 /* For MCTP RAM ID is 0x40 */
5448 mcp->mb[10] |= 0x40;
5450 mcp->out_mb |= MBX_10|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|
5451 MBX_0;
5453 mcp->in_mb = MBX_0;
5454 mcp->tov = MBX_TOV_SECONDS;
5455 mcp->flags = 0;
5456 rval = qla2x00_mailbox_command(vha, mcp);
5458 if (rval != QLA_SUCCESS) {
5459 ql_dbg(ql_dbg_mbx, vha, 0x114e,
5460 "Failed=%x mb[0]=%x.\n", rval, mcp->mb[0]);
5461 } else {
5462 ql_dbg(ql_dbg_mbx + ql_dbg_verbose, vha, 0x114d,
5463 "Done %s.\n", __func__);
5466 return rval;