arch/x86/kernel/hw_breakpoint.c

   1 /*
   2  * This program is free software; you can redistribute it and/or modify
   3  * it under the terms of the GNU General Public License as published by
   4  * the Free Software Foundation; either version 2 of the License, or
   5  * (at your option) any later version.
   6  *
   7  * This program is distributed in the hope that it will be useful,
   8  * but WITHOUT ANY WARRANTY; without even the implied warranty of
   9  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  10  * GNU General Public License for more details.
  11  *
  12  * You should have received a copy of the GNU General Public License
  13  * along with this program; if not, write to the Free Software
  14  * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  15  *
  16  * Copyright (C) 2007 Alan Stern
  17  * Copyright (C) 2009 IBM Corporation
  18  * Copyright (C) 2009 Frederic Weisbecker <fweisbec@gmail.com>
  19  *
  20  * Authors: Alan Stern <stern@rowland.harvard.edu>
  21  *          K.Prasad <prasad@linux.vnet.ibm.com>
  22  *          Frederic Weisbecker <fweisbec@gmail.com>
  23  */
  24
  25 /*
  26  * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
  27  * using the CPU's debug registers.
  28  */
  29
  30 #include <linux/perf_event.h>
  31 #include <linux/hw_breakpoint.h>
  32 #include <linux/irqflags.h>
  33 #include <linux/notifier.h>
  34 #include <linux/kallsyms.h>
  35 #include <linux/kprobes.h>
  36 #include <linux/percpu.h>
  37 #include <linux/kdebug.h>
  38 #include <linux/kernel.h>
  39 #include <linux/module.h>
  40 #include <linux/sched.h>
  41 #include <linux/init.h>
  42 #include <linux/smp.h>
  43
  44 #include <asm/hw_breakpoint.h>
  45 #include <asm/processor.h>
  46 #include <asm/debugreg.h>
  47
  48 /* Per cpu debug control register value */
  49 DEFINE_PER_CPU(unsigned long, cpu_dr7);
  50 EXPORT_PER_CPU_SYMBOL(cpu_dr7);
  51
  52 /* Per cpu debug address registers values */
  53 static DEFINE_PER_CPU(unsigned long, cpu_debugreg[HBP_NUM]);
  54
  55 /*
  56  * Stores the breakpoints currently in use on each breakpoint address
  57  * register for each cpus
  58  */
  59 static DEFINE_PER_CPU(struct perf_event *, bp_per_reg[HBP_NUM]);
  60
  61
  62 static inline unsigned long
  63 __encode_dr7(int drnum, unsigned int len, unsigned int type)
  64 {
  65         unsigned long bp_info;
  66
  67         bp_info = (len | type) & 0xf;
  68         bp_info <<= (DR_CONTROL_SHIFT + drnum * DR_CONTROL_SIZE);
  69         bp_info |= (DR_GLOBAL_ENABLE << (drnum * DR_ENABLE_SIZE));
  70
  71         return bp_info;
  72 }
  73
  74 /*
  75  * Encode the length, type, Exact, and Enable bits for a particular breakpoint
  76  * as stored in debug register 7.
  77  */
  78 unsigned long encode_dr7(int drnum, unsigned int len, unsigned int type)
  79 {
  80         return __encode_dr7(drnum, len, type) | DR_GLOBAL_SLOWDOWN;
  81 }
  82
  83 /*
  84  * Decode the length and type bits for a particular breakpoint as
  85  * stored in debug register 7.  Return the "enabled" status.
  86  */
  87 int decode_dr7(unsigned long dr7, int bpnum, unsigned *len, unsigned *type)
  88 {
  89         int bp_info = dr7 >> (DR_CONTROL_SHIFT + bpnum * DR_CONTROL_SIZE);
  90
  91         *len = (bp_info & 0xc) | 0x40;
  92         *type = (bp_info & 0x3) | 0x80;
  93
  94         return (dr7 >> (bpnum * DR_ENABLE_SIZE)) & 0x3;
  95 }
  96
  97 /*
  98  * Install a perf counter breakpoint.
  99  *
 100  * We seek a free debug address register and use it for this
 101  * breakpoint. Eventually we enable it in the debug control register.
 102  *
 103  * Atomic: we hold the counter->ctx->lock and we only handle variables
 104  * and registers local to this cpu.
 105  */
 106 int arch_install_hw_breakpoint(struct perf_event *bp)
 107 {
 108         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 109         unsigned long *dr7;
 110         int i;
 111
 112         for (i = 0; i < HBP_NUM; i++) {
 113                 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
 114
 115                 if (!*slot) {
 116                         *slot = bp;
 117                         break;
 118                 }
 119         }
 120
 121         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
 122                 return -EBUSY;
 123
 124         set_debugreg(info->address, i);
 125         __get_cpu_var(cpu_debugreg[i]) = info->address;
 126
 127         dr7 = &__get_cpu_var(cpu_dr7);
 128         *dr7 |= encode_dr7(i, info->len, info->type);
 129
 130         set_debugreg(*dr7, 7);
 131
 132         return 0;
 133 }
 134
 135 /*
 136  * Uninstall the breakpoint contained in the given counter.
 137  *
 138  * First we search the debug address register it uses and then we disable
 139  * it.
 140  *
 141  * Atomic: we hold the counter->ctx->lock and we only handle variables
 142  * and registers local to this cpu.
 143  */
 144 void arch_uninstall_hw_breakpoint(struct perf_event *bp)
 145 {
 146         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 147         unsigned long *dr7;
 148         int i;
 149
 150         for (i = 0; i < HBP_NUM; i++) {
 151                 struct perf_event **slot = &__get_cpu_var(bp_per_reg[i]);
 152
 153                 if (*slot == bp) {
 154                         *slot = NULL;
 155                         break;
 156                 }
 157         }
 158
 159         if (WARN_ONCE(i == HBP_NUM, "Can't find any breakpoint slot"))
 160                 return;
 161
 162         dr7 = &__get_cpu_var(cpu_dr7);
 163         *dr7 &= ~__encode_dr7(i, info->len, info->type);
 164
 165         set_debugreg(*dr7, 7);
 166 }
 167
 168 static int get_hbp_len(u8 hbp_len)
 169 {
 170         unsigned int len_in_bytes = 0;
 171
 172         switch (hbp_len) {
 173         case X86_BREAKPOINT_LEN_1:
 174                 len_in_bytes = 1;
 175                 break;
 176         case X86_BREAKPOINT_LEN_2:
 177                 len_in_bytes = 2;
 178                 break;
 179         case X86_BREAKPOINT_LEN_4:
 180                 len_in_bytes = 4;
 181                 break;
 182 #ifdef CONFIG_X86_64
 183         case X86_BREAKPOINT_LEN_8:
 184                 len_in_bytes = 8;
 185                 break;
 186 #endif
 187         }
 188         return len_in_bytes;
 189 }
 190
 191 /*
 192  * Check for virtual address in kernel space.
 193  */
 194 int arch_check_bp_in_kernelspace(struct perf_event *bp)
 195 {
 196         unsigned int len;
 197         unsigned long va;
 198         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 199
 200         va = info->address;
 201         len = get_hbp_len(info->len);
 202
 203         return (va >= TASK_SIZE) && ((va + len - 1) >= TASK_SIZE);
 204 }
 205
 206 int arch_bp_generic_fields(int x86_len, int x86_type,
 207                            int *gen_len, int *gen_type)
 208 {
 209         /* Len */
 210         switch (x86_len) {
 211         case X86_BREAKPOINT_LEN_X:
 212                 *gen_len = sizeof(long);
 213                 break;
 214         case X86_BREAKPOINT_LEN_1:
 215                 *gen_len = HW_BREAKPOINT_LEN_1;
 216                 break;
 217         case X86_BREAKPOINT_LEN_2:
 218                 *gen_len = HW_BREAKPOINT_LEN_2;
 219                 break;
 220         case X86_BREAKPOINT_LEN_4:
 221                 *gen_len = HW_BREAKPOINT_LEN_4;
 222                 break;
 223 #ifdef CONFIG_X86_64
 224         case X86_BREAKPOINT_LEN_8:
 225                 *gen_len = HW_BREAKPOINT_LEN_8;
 226                 break;
 227 #endif
 228         default:
 229                 return -EINVAL;
 230         }
 231
 232         /* Type */
 233         switch (x86_type) {
 234         case X86_BREAKPOINT_EXECUTE:
 235                 *gen_type = HW_BREAKPOINT_X;
 236                 break;
 237         case X86_BREAKPOINT_WRITE:
 238                 *gen_type = HW_BREAKPOINT_W;
 239                 break;
 240         case X86_BREAKPOINT_RW:
 241                 *gen_type = HW_BREAKPOINT_W | HW_BREAKPOINT_R;
 242                 break;
 243         default:
 244                 return -EINVAL;
 245         }
 246
 247         return 0;
 248 }
 249
 250
 251 static int arch_build_bp_info(struct perf_event *bp)
 252 {
 253         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 254
 255         info->address = bp->attr.bp_addr;
 256
 257         /* Type */
 258         switch (bp->attr.bp_type) {
 259         case HW_BREAKPOINT_W:
 260                 info->type = X86_BREAKPOINT_WRITE;
 261                 break;
 262         case HW_BREAKPOINT_W | HW_BREAKPOINT_R:
 263                 info->type = X86_BREAKPOINT_RW;
 264                 break;
 265         case HW_BREAKPOINT_X:
 266                 info->type = X86_BREAKPOINT_EXECUTE;
 267                 /*
 268                  * x86 inst breakpoints need to have a specific undefined len.
 269                  * But we still need to check userspace is not trying to setup
 270                  * an unsupported length, to get a range breakpoint for example.
 271                  */
 272                 if (bp->attr.bp_len == sizeof(long)) {
 273                         info->len = X86_BREAKPOINT_LEN_X;
 274                         return 0;
 275                 }
 276         default:
 277                 return -EINVAL;
 278         }
 279
 280         /* Len */
 281         switch (bp->attr.bp_len) {
 282         case HW_BREAKPOINT_LEN_1:
 283                 info->len = X86_BREAKPOINT_LEN_1;
 284                 break;
 285         case HW_BREAKPOINT_LEN_2:
 286                 info->len = X86_BREAKPOINT_LEN_2;
 287                 break;
 288         case HW_BREAKPOINT_LEN_4:
 289                 info->len = X86_BREAKPOINT_LEN_4;
 290                 break;
 291 #ifdef CONFIG_X86_64
 292         case HW_BREAKPOINT_LEN_8:
 293                 info->len = X86_BREAKPOINT_LEN_8;
 294                 break;
 295 #endif
 296         default:
 297                 return -EINVAL;
 298         }
 299
 300         return 0;
 301 }
 302 /*
 303  * Validate the arch-specific HW Breakpoint register settings
 304  */
 305 int arch_validate_hwbkpt_settings(struct perf_event *bp)
 306 {
 307         struct arch_hw_breakpoint *info = counter_arch_bp(bp);
 308         unsigned int align;
 309         int ret;
 310
 311
 312         ret = arch_build_bp_info(bp);
 313         if (ret)
 314                 return ret;
 315
 316         ret = -EINVAL;
 317
 318         switch (info->len) {
 319         case X86_BREAKPOINT_LEN_X:
 320                 align = sizeof(long) -1;
 321                 break;
 322         case X86_BREAKPOINT_LEN_1:
 323                 align = 0;
 324                 break;
 325         case X86_BREAKPOINT_LEN_2:
 326                 align = 1;
 327                 break;
 328         case X86_BREAKPOINT_LEN_4:
 329                 align = 3;
 330                 break;
 331 #ifdef CONFIG_X86_64
 332         case X86_BREAKPOINT_LEN_8:
 333                 align = 7;
 334                 break;
 335 #endif
 336         default:
 337                 return ret;
 338         }
 339
 340         /*
 341          * Check that the low-order bits of the address are appropriate
 342          * for the alignment implied by len.
 343          */
 344         if (info->address & align)
 345                 return -EINVAL;
 346
 347         return 0;
 348 }
 349
 350 /*
 351  * Dump the debug register contents to the user.
 352  * We can't dump our per cpu values because it
 353  * may contain cpu wide breakpoint, something that
 354  * doesn't belong to the current task.
 355  *
 356  * TODO: include non-ptrace user breakpoints (perf)
 357  */
 358 void aout_dump_debugregs(struct user *dump)
 359 {
 360         int i;
 361         int dr7 = 0;
 362         struct perf_event *bp;
 363         struct arch_hw_breakpoint *info;
 364         struct thread_struct *thread = &current->thread;
 365
 366         for (i = 0; i < HBP_NUM; i++) {
 367                 bp = thread->ptrace_bps[i];
 368
 369                 if (bp && !bp->attr.disabled) {
 370                         dump->u_debugreg[i] = bp->attr.bp_addr;
 371                         info = counter_arch_bp(bp);
 372                         dr7 |= encode_dr7(i, info->len, info->type);
 373                 } else {
 374                         dump->u_debugreg[i] = 0;
 375                 }
 376         }
 377
 378         dump->u_debugreg[4] = 0;
 379         dump->u_debugreg[5] = 0;
 380         dump->u_debugreg[6] = current->thread.debugreg6;
 381
 382         dump->u_debugreg[7] = dr7;
 383 }
 384 EXPORT_SYMBOL_GPL(aout_dump_debugregs);
 385
 386 /*
 387  * Release the user breakpoints used by ptrace
 388  */
 389 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
 390 {
 391         int i;
 392         struct thread_struct *t = &tsk->thread;
 393
 394         for (i = 0; i < HBP_NUM; i++) {
 395                 unregister_hw_breakpoint(t->ptrace_bps[i]);
 396                 t->ptrace_bps[i] = NULL;
 397         }
 398 }
 399
 400 void hw_breakpoint_restore(void)
 401 {
 402         set_debugreg(__get_cpu_var(cpu_debugreg[0]), 0);
 403         set_debugreg(__get_cpu_var(cpu_debugreg[1]), 1);
 404         set_debugreg(__get_cpu_var(cpu_debugreg[2]), 2);
 405         set_debugreg(__get_cpu_var(cpu_debugreg[3]), 3);
 406         set_debugreg(current->thread.debugreg6, 6);
 407         set_debugreg(__get_cpu_var(cpu_dr7), 7);
 408 }
 409 EXPORT_SYMBOL_GPL(hw_breakpoint_restore);
 410
 411 /*
 412  * Handle debug exception notifications.
 413  *
 414  * Return value is either NOTIFY_STOP or NOTIFY_DONE as explained below.
 415  *
 416  * NOTIFY_DONE returned if one of the following conditions is true.
 417  * i) When the causative address is from user-space and the exception
 418  * is a valid one, i.e. not triggered as a result of lazy debug register
 419  * switching
 420  * ii) When there are more bits than trap<n> set in DR6 register (such
 421  * as BD, BS or BT) indicating that more than one debug condition is
 422  * met and requires some more action in do_debug().
 423  *
 424  * NOTIFY_STOP returned for all other cases
 425  *
 426  */
 427 static int __kprobes hw_breakpoint_handler(struct die_args *args)
 428 {
 429         int i, cpu, rc = NOTIFY_STOP;
 430         struct perf_event *bp;
 431         unsigned long dr7, dr6;
 432         unsigned long *dr6_p;
 433
 434         /* The DR6 value is pointed by args->err */
 435         dr6_p = (unsigned long *)ERR_PTR(args->err);
 436         dr6 = *dr6_p;
 437
 438         /* Do an early return if no trap bits are set in DR6 */
 439         if ((dr6 & DR_TRAP_BITS) == 0)
 440                 return NOTIFY_DONE;
 441
 442         get_debugreg(dr7, 7);
 443         /* Disable breakpoints during exception handling */
 444         set_debugreg(0UL, 7);
 445         /*
 446          * Assert that local interrupts are disabled
 447          * Reset the DRn bits in the virtualized register value.
 448          * The ptrace trigger routine will add in whatever is needed.
 449          */
 450         current->thread.debugreg6 &= ~DR_TRAP_BITS;
 451         cpu = get_cpu();
 452
 453         /* Handle all the breakpoints that were triggered */
 454         for (i = 0; i < HBP_NUM; ++i) {
 455                 if (likely(!(dr6 & (DR_TRAP0 << i))))
 456                         continue;
 457
 458                 /*
 459                  * The counter may be concurrently released but that can only
 460                  * occur from a call_rcu() path. We can then safely fetch
 461                  * the breakpoint, use its callback, touch its counter
 462                  * while we are in an rcu_read_lock() path.
 463                  */
 464                 rcu_read_lock();
 465
 466                 bp = per_cpu(bp_per_reg[i], cpu);
 467                 /*
 468                  * Reset the 'i'th TRAP bit in dr6 to denote completion of
 469                  * exception handling
 470                  */
 471                 (*dr6_p) &= ~(DR_TRAP0 << i);
 472                 /*
 473                  * bp can be NULL due to lazy debug register switching
 474                  * or due to concurrent perf counter removing.
 475                  */
 476                 if (!bp) {
 477                         rcu_read_unlock();
 478                         break;
 479                 }
 480
 481                 perf_bp_event(bp, args->regs);
 482
 483                 /*
 484                  * Set up resume flag to avoid breakpoint recursion when
 485                  * returning back to origin.
 486                  */
 487                 if (bp->hw.info.type == X86_BREAKPOINT_EXECUTE)
 488                         args->regs->flags |= X86_EFLAGS_RF;
 489
 490                 rcu_read_unlock();
 491         }
 492         /*
 493          * Further processing in do_debug() is needed for a) user-space
 494          * breakpoints (to generate signals) and b) when the system has
 495          * taken exception due to multiple causes
 496          */
 497         if ((current->thread.debugreg6 & DR_TRAP_BITS) ||
 498             (dr6 & (~DR_TRAP_BITS)))
 499                 rc = NOTIFY_DONE;
 500
 501         set_debugreg(dr7, 7);
 502         put_cpu();
 503
 504         return rc;
 505 }
 506
 507 /*
 508  * Handle debug exception notifications.
 509  */
 510 int __kprobes hw_breakpoint_exceptions_notify(
 511                 struct notifier_block *unused, unsigned long val, void *data)
 512 {
 513         if (val != DIE_DEBUG)
 514                 return NOTIFY_DONE;
 515
 516         return hw_breakpoint_handler(data);
 517 }
 518
 519 void hw_breakpoint_pmu_read(struct perf_event *bp)
 520 {
 521         /* TODO */
 522 }