3 #include <dt-bindings/input/input.h>
4 #include "tegra20.dtsi"
7 model = "NVIDIA Seaboard";
8 compatible = "nvidia,seaboard", "nvidia,tegra20";
11 rtc0 = "/i2c@7000d000/tps6586x@34";
12 rtc1 = "/rtc@7000e000";
16 reg = <0x00000000 0x40000000>;
23 vdd-supply = <&hdmi_vdd_reg>;
24 pll-supply = <&hdmi_pll_reg>;
26 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
27 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
33 pinctrl-names = "default";
34 pinctrl-0 = <&state_default>;
36 state_default: pinmux {
39 nvidia,function = "ide";
42 nvidia,pins = "atb", "gma", "gme";
43 nvidia,function = "sdio4";
47 nvidia,function = "nand";
50 nvidia,pins = "atd", "ate", "gmb", "spia",
52 nvidia,function = "gmi";
55 nvidia,pins = "cdev1";
56 nvidia,function = "plla_out";
59 nvidia,pins = "cdev2";
60 nvidia,function = "pllp_out4";
63 nvidia,pins = "crtp", "lm1";
64 nvidia,function = "crt";
68 nvidia,function = "vi_sensor_clk";
72 nvidia,function = "dap1";
76 nvidia,function = "dap2";
80 nvidia,function = "dap3";
84 nvidia,function = "dap4";
87 nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
88 nvidia,function = "vi";
92 nvidia,function = "i2c3";
96 nvidia,function = "uartd";
100 nvidia,function = "sflash";
104 nvidia,function = "pwm";
107 nvidia,pins = "gpu7";
108 nvidia,function = "rtck";
111 nvidia,pins = "gpv", "slxa", "slxk";
112 nvidia,function = "pcie";
115 nvidia,pins = "hdint", "lpw0", "lpw2", "lsc1",
117 nvidia,function = "hdmi";
120 nvidia,pins = "i2cp";
121 nvidia,function = "i2cp";
124 nvidia,pins = "irrx", "irtx";
125 nvidia,function = "uartb";
128 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
130 nvidia,function = "kbc";
133 nvidia,pins = "lcsn", "ldc", "lm0", "lpw1",
135 nvidia,function = "rsvd4";
138 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
139 "ld5", "ld6", "ld7", "ld8", "ld9",
140 "ld10", "ld11", "ld12", "ld13", "ld14",
141 "ld15", "ld16", "ld17", "ldi", "lhp0",
142 "lhp1", "lhp2", "lhs", "lpp", "lsc0",
143 "lspi", "lvp1", "lvs";
144 nvidia,function = "displaya";
147 nvidia,pins = "owc", "spdi", "spdo", "uac";
148 nvidia,function = "rsvd2";
152 nvidia,function = "pwr_on";
156 nvidia,function = "i2c1";
159 nvidia,pins = "sdb", "sdc", "sdd";
160 nvidia,function = "sdio3";
163 nvidia,pins = "sdio1";
164 nvidia,function = "sdio1";
167 nvidia,pins = "slxc", "slxd";
168 nvidia,function = "spdif";
171 nvidia,pins = "spid", "spie", "spif";
172 nvidia,function = "spi1";
175 nvidia,pins = "spig", "spih";
176 nvidia,function = "spi2_alt";
179 nvidia,pins = "uaa", "uab", "uda";
180 nvidia,function = "ulpi";
184 nvidia,function = "irda";
187 nvidia,pins = "uca", "ucb";
188 nvidia,function = "uartc";
191 nvidia,pins = "ata", "atb", "atc", "atd",
192 "cdev1", "cdev2", "dap1", "dap2",
193 "dap4", "ddc", "dtf", "gma", "gmc", "gmd",
194 "gme", "gpu", "gpu7", "i2cp", "irrx",
195 "irtx", "pta", "rm", "sdc", "sdd",
196 "slxd", "slxk", "spdi", "spdo", "uac",
197 "uad", "uca", "ucb", "uda";
198 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
199 nvidia,tristate = <TEGRA_PIN_DISABLE>;
202 nvidia,pins = "ate", "csus", "dap3",
203 "gpv", "owc", "slxc", "spib", "spid",
205 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
206 nvidia,tristate = <TEGRA_PIN_ENABLE>;
209 nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
210 "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
211 nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214 nvidia,pins = "crtp", "gmb", "slxa", "spia",
216 nvidia,pull = <TEGRA_PIN_PULL_UP>;
217 nvidia,tristate = <TEGRA_PIN_ENABLE>;
220 nvidia,pins = "dta", "dtb", "dtc", "dtd";
221 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
222 nvidia,tristate = <TEGRA_PIN_DISABLE>;
225 nvidia,pins = "dte", "spif";
226 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
227 nvidia,tristate = <TEGRA_PIN_ENABLE>;
230 nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
231 "lpw1", "lsc1", "lsck", "lsda", "lsdi",
233 nvidia,tristate = <TEGRA_PIN_ENABLE>;
236 nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
237 "kbce", "kbcf", "sdio1", "spic", "uaa",
239 nvidia,pull = <TEGRA_PIN_PULL_UP>;
240 nvidia,tristate = <TEGRA_PIN_DISABLE>;
243 nvidia,pins = "lc", "ls";
244 nvidia,pull = <TEGRA_PIN_PULL_UP>;
247 nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
248 "ld5", "ld6", "ld7", "ld8", "ld9",
249 "ld10", "ld11", "ld12", "ld13", "ld14",
250 "ld15", "ld16", "ld17", "ldi", "lhp0",
251 "lhp1", "lhp2", "lhs", "lm0", "lpp",
252 "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
254 nvidia,tristate = <TEGRA_PIN_DISABLE>;
257 nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
259 nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
262 nvidia,pins = "drive_sdio1";
263 nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
264 nvidia,schmitt = <TEGRA_PIN_DISABLE>;
265 nvidia,low-power-mode = <TEGRA_PIN_LP_DRIVE_DIV_1>;
266 nvidia,pull-down-strength = <31>;
267 nvidia,pull-up-strength = <31>;
268 nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
269 nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOWEST>;
273 state_i2cmux_ddc: pinmux_i2cmux_ddc {
276 nvidia,function = "i2c2";
280 nvidia,function = "rsvd4";
284 state_i2cmux_pta: pinmux_i2cmux_pta {
287 nvidia,function = "rsvd4";
291 nvidia,function = "i2c2";
295 state_i2cmux_idle: pinmux_i2cmux_idle {
298 nvidia,function = "rsvd4";
302 nvidia,function = "rsvd4";
317 clock-frequency = <400000>;
320 compatible = "wlf,wm8903";
322 interrupt-parent = <&gpio>;
323 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
329 micdet-delay = <100>;
330 gpio-cfg = <0xffffffff 0xffffffff 0 0xffffffff 0xffffffff>;
333 /* ALS and proximity sensor */
335 compatible = "isil,isl29018";
337 interrupt-parent = <&gpio>;
338 interrupts = <TEGRA_GPIO(Z, 2) IRQ_TYPE_LEVEL_HIGH>;
342 compatible = "invn,mpu3050";
344 interrupt-parent = <&gpio>;
345 interrupts = <TEGRA_GPIO(Z, 4) IRQ_TYPE_LEVEL_HIGH>;
351 clock-frequency = <100000>;
355 compatible = "i2c-mux-pinctrl";
356 #address-cells = <1>;
359 i2c-parent = <&{/i2c@7000c400}>;
361 pinctrl-names = "ddc", "pta", "idle";
362 pinctrl-0 = <&state_i2cmux_ddc>;
363 pinctrl-1 = <&state_i2cmux_pta>;
364 pinctrl-2 = <&state_i2cmux_idle>;
368 #address-cells = <1>;
374 #address-cells = <1>;
378 compatible = "ti,bq20z75", "smart-battery-1.1";
380 ti,i2c-retry-count = <2>;
381 ti,poll-retry-count = <10>;
388 clock-frequency = <400000>;
393 clock-frequency = <400000>;
396 compatible = "ak,ak8975";
398 interrupt-parent = <&gpio>;
399 interrupts = <TEGRA_GPIO(N, 5) IRQ_TYPE_LEVEL_HIGH>;
403 compatible = "ti,tps6586x";
405 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
407 ti,system-power-controller;
412 sys-supply = <&vdd_5v0_reg>;
413 vin-sm0-supply = <&sys_reg>;
414 vin-sm1-supply = <&sys_reg>;
415 vin-sm2-supply = <&sys_reg>;
416 vinldo01-supply = <&sm2_reg>;
417 vinldo23-supply = <&sm2_reg>;
418 vinldo4-supply = <&sm2_reg>;
419 vinldo678-supply = <&sm2_reg>;
420 vinldo9-supply = <&sm2_reg>;
424 regulator-name = "vdd_sys";
429 regulator-name = "vdd_sm0,vdd_core";
430 regulator-min-microvolt = <1300000>;
431 regulator-max-microvolt = <1300000>;
436 regulator-name = "vdd_sm1,vdd_cpu";
437 regulator-min-microvolt = <1125000>;
438 regulator-max-microvolt = <1125000>;
443 regulator-name = "vdd_sm2,vin_ldo*";
444 regulator-min-microvolt = <3700000>;
445 regulator-max-microvolt = <3700000>;
449 /* LDO0 is not connected to anything */
452 regulator-name = "vdd_ldo1,avdd_pll*";
453 regulator-min-microvolt = <1100000>;
454 regulator-max-microvolt = <1100000>;
459 regulator-name = "vdd_ldo2,vdd_rtc";
460 regulator-min-microvolt = <1200000>;
461 regulator-max-microvolt = <1200000>;
465 regulator-name = "vdd_ldo3,avdd_usb*";
466 regulator-min-microvolt = <3300000>;
467 regulator-max-microvolt = <3300000>;
472 regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
473 regulator-min-microvolt = <1800000>;
474 regulator-max-microvolt = <1800000>;
479 regulator-name = "vdd_ldo5,vcore_mmc";
480 regulator-min-microvolt = <2850000>;
481 regulator-max-microvolt = <2850000>;
486 regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam";
487 regulator-min-microvolt = <1800000>;
488 regulator-max-microvolt = <1800000>;
492 regulator-name = "vdd_ldo7,avdd_hdmi,vdd_fuse";
493 regulator-min-microvolt = <3300000>;
494 regulator-max-microvolt = <3300000>;
498 regulator-name = "vdd_ldo8,avdd_hdmi_pll";
499 regulator-min-microvolt = <1800000>;
500 regulator-max-microvolt = <1800000>;
504 regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx";
505 regulator-min-microvolt = <2850000>;
506 regulator-max-microvolt = <2850000>;
511 regulator-name = "vdd_rtc_out,vdd_cell";
512 regulator-min-microvolt = <3300000>;
513 regulator-max-microvolt = <3300000>;
519 temperature-sensor@4c {
520 compatible = "onnn,nct1008";
527 nvidia,debounce-delay-ms = <32>;
528 nvidia,repeat-delay-ms = <160>;
530 nvidia,kbc-row-pins = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
531 nvidia,kbc-col-pins = <16 17 18 19 20 21 22 23>;
532 linux,keymap = <MATRIX_KEY(0x00, 0x02, KEY_W)
533 MATRIX_KEY(0x00, 0x03, KEY_S)
534 MATRIX_KEY(0x00, 0x04, KEY_A)
535 MATRIX_KEY(0x00, 0x05, KEY_Z)
536 MATRIX_KEY(0x00, 0x07, KEY_FN)
538 MATRIX_KEY(0x01, 0x07, KEY_LEFTMETA)
539 MATRIX_KEY(0x02, 0x06, KEY_RIGHTALT)
540 MATRIX_KEY(0x02, 0x07, KEY_LEFTALT)
542 MATRIX_KEY(0x03, 0x00, KEY_5)
543 MATRIX_KEY(0x03, 0x01, KEY_4)
544 MATRIX_KEY(0x03, 0x02, KEY_R)
545 MATRIX_KEY(0x03, 0x03, KEY_E)
546 MATRIX_KEY(0x03, 0x04, KEY_F)
547 MATRIX_KEY(0x03, 0x05, KEY_D)
548 MATRIX_KEY(0x03, 0x06, KEY_X)
550 MATRIX_KEY(0x04, 0x00, KEY_7)
551 MATRIX_KEY(0x04, 0x01, KEY_6)
552 MATRIX_KEY(0x04, 0x02, KEY_T)
553 MATRIX_KEY(0x04, 0x03, KEY_H)
554 MATRIX_KEY(0x04, 0x04, KEY_G)
555 MATRIX_KEY(0x04, 0x05, KEY_V)
556 MATRIX_KEY(0x04, 0x06, KEY_C)
557 MATRIX_KEY(0x04, 0x07, KEY_SPACE)
559 MATRIX_KEY(0x05, 0x00, KEY_9)
560 MATRIX_KEY(0x05, 0x01, KEY_8)
561 MATRIX_KEY(0x05, 0x02, KEY_U)
562 MATRIX_KEY(0x05, 0x03, KEY_Y)
563 MATRIX_KEY(0x05, 0x04, KEY_J)
564 MATRIX_KEY(0x05, 0x05, KEY_N)
565 MATRIX_KEY(0x05, 0x06, KEY_B)
566 MATRIX_KEY(0x05, 0x07, KEY_BACKSLASH)
568 MATRIX_KEY(0x06, 0x00, KEY_MINUS)
569 MATRIX_KEY(0x06, 0x01, KEY_0)
570 MATRIX_KEY(0x06, 0x02, KEY_O)
571 MATRIX_KEY(0x06, 0x03, KEY_I)
572 MATRIX_KEY(0x06, 0x04, KEY_L)
573 MATRIX_KEY(0x06, 0x05, KEY_K)
574 MATRIX_KEY(0x06, 0x06, KEY_COMMA)
575 MATRIX_KEY(0x06, 0x07, KEY_M)
577 MATRIX_KEY(0x07, 0x01, KEY_EQUAL)
578 MATRIX_KEY(0x07, 0x02, KEY_RIGHTBRACE)
579 MATRIX_KEY(0x07, 0x03, KEY_ENTER)
580 MATRIX_KEY(0x07, 0x07, KEY_MENU)
582 MATRIX_KEY(0x08, 0x04, KEY_RIGHTSHIFT)
583 MATRIX_KEY(0x08, 0x05, KEY_LEFTSHIFT)
585 MATRIX_KEY(0x09, 0x05, KEY_RIGHTCTRL)
586 MATRIX_KEY(0x09, 0x07, KEY_LEFTCTRL)
588 MATRIX_KEY(0x0B, 0x00, KEY_LEFTBRACE)
589 MATRIX_KEY(0x0B, 0x01, KEY_P)
590 MATRIX_KEY(0x0B, 0x02, KEY_APOSTROPHE)
591 MATRIX_KEY(0x0B, 0x03, KEY_SEMICOLON)
592 MATRIX_KEY(0x0B, 0x04, KEY_SLASH)
593 MATRIX_KEY(0x0B, 0x05, KEY_DOT)
595 MATRIX_KEY(0x0C, 0x00, KEY_F10)
596 MATRIX_KEY(0x0C, 0x01, KEY_F9)
597 MATRIX_KEY(0x0C, 0x02, KEY_BACKSPACE)
598 MATRIX_KEY(0x0C, 0x03, KEY_3)
599 MATRIX_KEY(0x0C, 0x04, KEY_2)
600 MATRIX_KEY(0x0C, 0x05, KEY_UP)
601 MATRIX_KEY(0x0C, 0x06, KEY_PRINT)
602 MATRIX_KEY(0x0C, 0x07, KEY_PAUSE)
604 MATRIX_KEY(0x0D, 0x00, KEY_INSERT)
605 MATRIX_KEY(0x0D, 0x01, KEY_DELETE)
606 MATRIX_KEY(0x0D, 0x03, KEY_PAGEUP )
607 MATRIX_KEY(0x0D, 0x04, KEY_PAGEDOWN)
608 MATRIX_KEY(0x0D, 0x05, KEY_RIGHT)
609 MATRIX_KEY(0x0D, 0x06, KEY_DOWN)
610 MATRIX_KEY(0x0D, 0x07, KEY_LEFT)
612 MATRIX_KEY(0x0E, 0x00, KEY_F11)
613 MATRIX_KEY(0x0E, 0x01, KEY_F12)
614 MATRIX_KEY(0x0E, 0x02, KEY_F8)
615 MATRIX_KEY(0x0E, 0x03, KEY_Q)
616 MATRIX_KEY(0x0E, 0x04, KEY_F4)
617 MATRIX_KEY(0x0E, 0x05, KEY_F3)
618 MATRIX_KEY(0x0E, 0x06, KEY_1)
619 MATRIX_KEY(0x0E, 0x07, KEY_F7)
621 MATRIX_KEY(0x0F, 0x00, KEY_ESC)
622 MATRIX_KEY(0x0F, 0x01, KEY_GRAVE)
623 MATRIX_KEY(0x0F, 0x02, KEY_F5)
624 MATRIX_KEY(0x0F, 0x03, KEY_TAB)
625 MATRIX_KEY(0x0F, 0x04, KEY_F1)
626 MATRIX_KEY(0x0F, 0x05, KEY_F2)
627 MATRIX_KEY(0x0F, 0x06, KEY_CAPSLOCK)
628 MATRIX_KEY(0x0F, 0x07, KEY_F6)
630 /* Software Handled Function Keys */
631 MATRIX_KEY(0x14, 0x00, KEY_KP7)
633 MATRIX_KEY(0x15, 0x00, KEY_KP9)
634 MATRIX_KEY(0x15, 0x01, KEY_KP8)
635 MATRIX_KEY(0x15, 0x02, KEY_KP4)
636 MATRIX_KEY(0x15, 0x04, KEY_KP1)
638 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
639 MATRIX_KEY(0x16, 0x02, KEY_KP6)
640 MATRIX_KEY(0x16, 0x03, KEY_KP5)
641 MATRIX_KEY(0x16, 0x04, KEY_KP3)
642 MATRIX_KEY(0x16, 0x05, KEY_KP2)
643 MATRIX_KEY(0x16, 0x07, KEY_KP0)
645 MATRIX_KEY(0x1B, 0x01, KEY_KPASTERISK)
646 MATRIX_KEY(0x1B, 0x03, KEY_KPMINUS)
647 MATRIX_KEY(0x1B, 0x04, KEY_KPPLUS)
648 MATRIX_KEY(0x1B, 0x05, KEY_KPDOT)
650 MATRIX_KEY(0x1C, 0x05, KEY_VOLUMEUP)
652 MATRIX_KEY(0x1D, 0x03, KEY_HOME)
653 MATRIX_KEY(0x1D, 0x04, KEY_END)
654 MATRIX_KEY(0x1D, 0x05, KEY_BRIGHTNESSDOWN)
655 MATRIX_KEY(0x1D, 0x06, KEY_VOLUMEDOWN)
656 MATRIX_KEY(0x1D, 0x07, KEY_BRIGHTNESSUP)
658 MATRIX_KEY(0x1E, 0x00, KEY_NUMLOCK)
659 MATRIX_KEY(0x1E, 0x01, KEY_SCROLLLOCK)
660 MATRIX_KEY(0x1E, 0x02, KEY_MUTE)
662 MATRIX_KEY(0x1F, 0x04, KEY_HELP)>;
666 nvidia,invert-interrupt;
667 nvidia,suspend-mode = <1>;
668 nvidia,cpu-pwr-good-time = <5000>;
669 nvidia,cpu-pwr-off-time = <5000>;
670 nvidia,core-pwr-good-time = <3845 3845>;
671 nvidia,core-pwr-off-time = <3875>;
672 nvidia,sys-clock-req-active-high;
675 memory-controller@7000f400 {
678 compatible = "nvidia,tegra20-emc-table";
679 clock-frequency = <190000>;
680 nvidia,emc-registers = <0x0000000c 0x00000026
681 0x00000009 0x00000003 0x00000004 0x00000004
682 0x00000002 0x0000000c 0x00000003 0x00000003
683 0x00000002 0x00000001 0x00000004 0x00000005
684 0x00000004 0x00000009 0x0000000d 0x0000059f
685 0x00000000 0x00000003 0x00000003 0x00000003
686 0x00000003 0x00000001 0x0000000b 0x000000c8
687 0x00000003 0x00000007 0x00000004 0x0000000f
688 0x00000002 0x00000000 0x00000000 0x00000002
689 0x00000000 0x00000000 0x00000083 0xa06204ae
690 0x007dc010 0x00000000 0x00000000 0x00000000
691 0x00000000 0x00000000 0x00000000 0x00000000>;
696 compatible = "nvidia,tegra20-emc-table";
697 clock-frequency = <380000>;
698 nvidia,emc-registers = <0x00000017 0x0000004b
699 0x00000012 0x00000006 0x00000004 0x00000005
700 0x00000003 0x0000000c 0x00000006 0x00000006
701 0x00000003 0x00000001 0x00000004 0x00000005
702 0x00000004 0x00000009 0x0000000d 0x00000b5f
703 0x00000000 0x00000003 0x00000003 0x00000006
704 0x00000006 0x00000001 0x00000011 0x000000c8
705 0x00000003 0x0000000e 0x00000007 0x0000000f
706 0x00000002 0x00000000 0x00000000 0x00000002
707 0x00000000 0x00000000 0x00000083 0xe044048b
708 0x007d8010 0x00000000 0x00000000 0x00000000
709 0x00000000 0x00000000 0x00000000 0x00000000>;
720 vbus-supply = <&vbus_reg>;
726 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
732 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1)
746 power-gpios = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
748 keep-power-in-suspend;
753 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
754 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
755 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
766 compatible = "simple-bus";
767 #address-cells = <1>;
771 compatible = "fixed-clock";
774 clock-frequency = <32768>;
779 compatible = "gpio-keys";
783 gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
784 linux,code = <KEY_POWER>;
790 gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
791 linux,input-type = <5>; /* EV_SW */
792 linux,code = <0>; /* SW_LID */
793 debounce-interval = <1>;
799 compatible = "simple-bus";
800 #address-cells = <1>;
803 vdd_5v0_reg: regulator@0 {
804 compatible = "regulator-fixed";
806 regulator-name = "vdd_5v0";
807 regulator-min-microvolt = <5000000>;
808 regulator-max-microvolt = <5000000>;
813 compatible = "regulator-fixed";
815 regulator-name = "vdd_1v5";
816 regulator-min-microvolt = <1500000>;
817 regulator-max-microvolt = <1500000>;
818 gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
822 compatible = "regulator-fixed";
824 regulator-name = "vdd_1v2";
825 regulator-min-microvolt = <1200000>;
826 regulator-max-microvolt = <1200000>;
827 gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
831 vbus_reg: regulator@3 {
832 compatible = "regulator-fixed";
834 regulator-name = "vdd_vbus_wup1";
835 regulator-min-microvolt = <5000000>;
836 regulator-max-microvolt = <5000000>;
838 gpio = <&gpio TEGRA_GPIO(D, 0) 0>;
845 compatible = "nvidia,tegra-audio-wm8903-seaboard",
846 "nvidia,tegra-audio-wm8903";
847 nvidia,model = "NVIDIA Tegra Seaboard";
849 nvidia,audio-routing =
850 "Headphone Jack", "HPOUTR",
851 "Headphone Jack", "HPOUTL",
856 "Mic Jack", "MICBIAS",
859 nvidia,i2s-controller = <&tegra_i2s1>;
860 nvidia,audio-codec = <&wm8903>;
862 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
863 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>;
865 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
866 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
867 <&tegra_car TEGRA20_CLK_CDEV1>;
868 clock-names = "pll_a", "pll_a_out0", "mclk";