2 * Device Tree Source for OMAP3 SoC
4 * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/omap.h>
15 #include "skeleton.dtsi"
18 compatible = "ti,omap3430", "ti,omap3";
19 interrupt-parent = <&intc>;
35 compatible = "arm,cortex-a8";
42 compatible = "arm,cortex-a8-pmu";
43 reg = <0x54000000 0x800000>;
45 ti,hwmods = "debugss";
49 * The soc node represents the soc top level view. It is used for IPs
50 * that are not memory mapped in the MPU view or for the MPU itself.
53 compatible = "ti,omap-infra";
55 compatible = "ti,omap3-mpu";
60 compatible = "ti,iva2.2";
64 compatible = "ti,omap3-c64";
70 * XXX: Use a flat representation of the OMAP3 interconnect.
71 * The real OMAP interconnect network is quite complex.
72 * Since that will not bring real advantage to represent that in DT for
73 * the moment, just use a fake OCP bus entry to represent the whole bus
77 compatible = "simple-bus";
78 reg = <0x68000000 0x10000>;
83 ti,hwmods = "l3_main";
86 compatible = "ti,omap3-aes";
88 reg = <0x480c5000 0x50>;
93 compatible = "ti,omap3-prm";
94 reg = <0x48306000 0x4000>;
101 prm_clockdomains: clockdomains {
106 compatible = "ti,omap3-cm";
107 reg = <0x48004000 0x4000>;
110 #address-cells = <1>;
114 cm_clockdomains: clockdomains {
118 scrm: scrm@48002000 {
119 compatible = "ti,omap3-scrm";
120 reg = <0x48002000 0x2000>;
122 scrm_clocks: clocks {
123 #address-cells = <1>;
127 scrm_clockdomains: clockdomains {
131 counter32k: counter@48320000 {
132 compatible = "ti,omap-counter32k";
133 reg = <0x48320000 0x20>;
134 ti,hwmods = "counter_32k";
137 intc: interrupt-controller@48200000 {
138 compatible = "ti,omap2-intc";
139 interrupt-controller;
140 #interrupt-cells = <1>;
142 reg = <0x48200000 0x1000>;
145 sdma: dma-controller@48056000 {
146 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
147 reg = <0x48056000 0x1000>;
153 #dma-channels = <32>;
154 #dma-requests = <96>;
157 omap3_pmx_core: pinmux@48002030 {
158 compatible = "ti,omap3-padconf", "pinctrl-single";
159 reg = <0x48002030 0x0238>;
160 #address-cells = <1>;
162 #interrupt-cells = <1>;
163 interrupt-controller;
164 pinctrl-single,register-width = <16>;
165 pinctrl-single,function-mask = <0xff1f>;
168 omap3_pmx_wkup: pinmux@48002a00 {
169 compatible = "ti,omap3-padconf", "pinctrl-single";
170 reg = <0x48002a00 0x5c>;
171 #address-cells = <1>;
173 #interrupt-cells = <1>;
174 interrupt-controller;
175 pinctrl-single,register-width = <16>;
176 pinctrl-single,function-mask = <0xff1f>;
179 gpio1: gpio@48310000 {
180 compatible = "ti,omap3-gpio";
181 reg = <0x48310000 0x200>;
187 interrupt-controller;
188 #interrupt-cells = <2>;
191 gpio2: gpio@49050000 {
192 compatible = "ti,omap3-gpio";
193 reg = <0x49050000 0x200>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
202 gpio3: gpio@49052000 {
203 compatible = "ti,omap3-gpio";
204 reg = <0x49052000 0x200>;
209 interrupt-controller;
210 #interrupt-cells = <2>;
213 gpio4: gpio@49054000 {
214 compatible = "ti,omap3-gpio";
215 reg = <0x49054000 0x200>;
220 interrupt-controller;
221 #interrupt-cells = <2>;
224 gpio5: gpio@49056000 {
225 compatible = "ti,omap3-gpio";
226 reg = <0x49056000 0x200>;
231 interrupt-controller;
232 #interrupt-cells = <2>;
235 gpio6: gpio@49058000 {
236 compatible = "ti,omap3-gpio";
237 reg = <0x49058000 0x200>;
242 interrupt-controller;
243 #interrupt-cells = <2>;
246 uart1: serial@4806a000 {
247 compatible = "ti,omap3-uart";
248 reg = <0x4806a000 0x2000>;
250 dmas = <&sdma 49 &sdma 50>;
251 dma-names = "tx", "rx";
253 clock-frequency = <48000000>;
256 uart2: serial@4806c000 {
257 compatible = "ti,omap3-uart";
258 reg = <0x4806c000 0x400>;
260 dmas = <&sdma 51 &sdma 52>;
261 dma-names = "tx", "rx";
263 clock-frequency = <48000000>;
266 uart3: serial@49020000 {
267 compatible = "ti,omap3-uart";
268 reg = <0x49020000 0x400>;
270 dmas = <&sdma 53 &sdma 54>;
271 dma-names = "tx", "rx";
273 clock-frequency = <48000000>;
277 compatible = "ti,omap3-i2c";
278 reg = <0x48070000 0x80>;
280 dmas = <&sdma 27 &sdma 28>;
281 dma-names = "tx", "rx";
282 #address-cells = <1>;
288 compatible = "ti,omap3-i2c";
289 reg = <0x48072000 0x80>;
291 dmas = <&sdma 29 &sdma 30>;
292 dma-names = "tx", "rx";
293 #address-cells = <1>;
299 compatible = "ti,omap3-i2c";
300 reg = <0x48060000 0x80>;
302 dmas = <&sdma 25 &sdma 26>;
303 dma-names = "tx", "rx";
304 #address-cells = <1>;
309 mailbox: mailbox@48094000 {
310 compatible = "ti,omap3-mailbox";
311 ti,hwmods = "mailbox";
312 reg = <0x48094000 0x200>;
316 mcspi1: spi@48098000 {
317 compatible = "ti,omap2-mcspi";
318 reg = <0x48098000 0x100>;
320 #address-cells = <1>;
322 ti,hwmods = "mcspi1";
332 dma-names = "tx0", "rx0", "tx1", "rx1",
333 "tx2", "rx2", "tx3", "rx3";
336 mcspi2: spi@4809a000 {
337 compatible = "ti,omap2-mcspi";
338 reg = <0x4809a000 0x100>;
340 #address-cells = <1>;
342 ti,hwmods = "mcspi2";
348 dma-names = "tx0", "rx0", "tx1", "rx1";
351 mcspi3: spi@480b8000 {
352 compatible = "ti,omap2-mcspi";
353 reg = <0x480b8000 0x100>;
355 #address-cells = <1>;
357 ti,hwmods = "mcspi3";
363 dma-names = "tx0", "rx0", "tx1", "rx1";
366 mcspi4: spi@480ba000 {
367 compatible = "ti,omap2-mcspi";
368 reg = <0x480ba000 0x100>;
370 #address-cells = <1>;
372 ti,hwmods = "mcspi4";
374 dmas = <&sdma 70>, <&sdma 71>;
375 dma-names = "tx0", "rx0";
378 hdqw1w: 1w@480b2000 {
379 compatible = "ti,omap3-1w";
380 reg = <0x480b2000 0x1000>;
386 compatible = "ti,omap3-hsmmc";
387 reg = <0x4809c000 0x200>;
391 dmas = <&sdma 61>, <&sdma 62>;
392 dma-names = "tx", "rx";
396 compatible = "ti,omap3-hsmmc";
397 reg = <0x480b4000 0x200>;
400 dmas = <&sdma 47>, <&sdma 48>;
401 dma-names = "tx", "rx";
405 compatible = "ti,omap3-hsmmc";
406 reg = <0x480ad000 0x200>;
409 dmas = <&sdma 77>, <&sdma 78>;
410 dma-names = "tx", "rx";
413 mmu_isp: mmu@480bd400 {
414 compatible = "ti,omap3-mmu-isp";
415 ti,hwmods = "mmu_isp";
416 reg = <0x480bd400 0x80>;
421 compatible = "ti,omap3-wdt";
422 reg = <0x48314000 0x80>;
423 ti,hwmods = "wd_timer2";
426 mcbsp1: mcbsp@48074000 {
427 compatible = "ti,omap3-mcbsp";
428 reg = <0x48074000 0xff>;
430 interrupts = <16>, /* OCP compliant interrupt */
431 <59>, /* TX interrupt */
432 <60>; /* RX interrupt */
433 interrupt-names = "common", "tx", "rx";
434 ti,buffer-size = <128>;
435 ti,hwmods = "mcbsp1";
438 dma-names = "tx", "rx";
441 mcbsp2: mcbsp@49022000 {
442 compatible = "ti,omap3-mcbsp";
443 reg = <0x49022000 0xff>,
445 reg-names = "mpu", "sidetone";
446 interrupts = <17>, /* OCP compliant interrupt */
447 <62>, /* TX interrupt */
448 <63>, /* RX interrupt */
450 interrupt-names = "common", "tx", "rx", "sidetone";
451 ti,buffer-size = <1280>;
452 ti,hwmods = "mcbsp2", "mcbsp2_sidetone";
455 dma-names = "tx", "rx";
458 mcbsp3: mcbsp@49024000 {
459 compatible = "ti,omap3-mcbsp";
460 reg = <0x49024000 0xff>,
462 reg-names = "mpu", "sidetone";
463 interrupts = <22>, /* OCP compliant interrupt */
464 <89>, /* TX interrupt */
465 <90>, /* RX interrupt */
467 interrupt-names = "common", "tx", "rx", "sidetone";
468 ti,buffer-size = <128>;
469 ti,hwmods = "mcbsp3", "mcbsp3_sidetone";
472 dma-names = "tx", "rx";
475 mcbsp4: mcbsp@49026000 {
476 compatible = "ti,omap3-mcbsp";
477 reg = <0x49026000 0xff>;
479 interrupts = <23>, /* OCP compliant interrupt */
480 <54>, /* TX interrupt */
481 <55>; /* RX interrupt */
482 interrupt-names = "common", "tx", "rx";
483 ti,buffer-size = <128>;
484 ti,hwmods = "mcbsp4";
487 dma-names = "tx", "rx";
490 mcbsp5: mcbsp@48096000 {
491 compatible = "ti,omap3-mcbsp";
492 reg = <0x48096000 0xff>;
494 interrupts = <27>, /* OCP compliant interrupt */
495 <81>, /* TX interrupt */
496 <82>; /* RX interrupt */
497 interrupt-names = "common", "tx", "rx";
498 ti,buffer-size = <128>;
499 ti,hwmods = "mcbsp5";
502 dma-names = "tx", "rx";
505 sham: sham@480c3000 {
506 compatible = "ti,omap3-sham";
508 reg = <0x480c3000 0x64>;
512 smartreflex_core: smartreflex@480cb000 {
513 compatible = "ti,omap3-smartreflex-core";
514 ti,hwmods = "smartreflex_core";
515 reg = <0x480cb000 0x400>;
519 smartreflex_mpu_iva: smartreflex@480c9000 {
520 compatible = "ti,omap3-smartreflex-iva";
521 ti,hwmods = "smartreflex_mpu_iva";
522 reg = <0x480c9000 0x400>;
526 timer1: timer@48318000 {
527 compatible = "ti,omap3430-timer";
528 reg = <0x48318000 0x400>;
530 ti,hwmods = "timer1";
534 timer2: timer@49032000 {
535 compatible = "ti,omap3430-timer";
536 reg = <0x49032000 0x400>;
538 ti,hwmods = "timer2";
541 timer3: timer@49034000 {
542 compatible = "ti,omap3430-timer";
543 reg = <0x49034000 0x400>;
545 ti,hwmods = "timer3";
548 timer4: timer@49036000 {
549 compatible = "ti,omap3430-timer";
550 reg = <0x49036000 0x400>;
552 ti,hwmods = "timer4";
555 timer5: timer@49038000 {
556 compatible = "ti,omap3430-timer";
557 reg = <0x49038000 0x400>;
559 ti,hwmods = "timer5";
563 timer6: timer@4903a000 {
564 compatible = "ti,omap3430-timer";
565 reg = <0x4903a000 0x400>;
567 ti,hwmods = "timer6";
571 timer7: timer@4903c000 {
572 compatible = "ti,omap3430-timer";
573 reg = <0x4903c000 0x400>;
575 ti,hwmods = "timer7";
579 timer8: timer@4903e000 {
580 compatible = "ti,omap3430-timer";
581 reg = <0x4903e000 0x400>;
583 ti,hwmods = "timer8";
588 timer9: timer@49040000 {
589 compatible = "ti,omap3430-timer";
590 reg = <0x49040000 0x400>;
592 ti,hwmods = "timer9";
596 timer10: timer@48086000 {
597 compatible = "ti,omap3430-timer";
598 reg = <0x48086000 0x400>;
600 ti,hwmods = "timer10";
604 timer11: timer@48088000 {
605 compatible = "ti,omap3430-timer";
606 reg = <0x48088000 0x400>;
608 ti,hwmods = "timer11";
612 timer12: timer@48304000 {
613 compatible = "ti,omap3430-timer";
614 reg = <0x48304000 0x400>;
616 ti,hwmods = "timer12";
621 usbhstll: usbhstll@48062000 {
622 compatible = "ti,usbhs-tll";
623 reg = <0x48062000 0x1000>;
625 ti,hwmods = "usb_tll_hs";
628 usbhshost: usbhshost@48064000 {
629 compatible = "ti,usbhs-host";
630 reg = <0x48064000 0x400>;
631 ti,hwmods = "usb_host_hs";
632 #address-cells = <1>;
636 usbhsohci: ohci@48064400 {
637 compatible = "ti,ohci-omap3", "usb-ohci";
638 reg = <0x48064400 0x400>;
639 interrupt-parent = <&intc>;
643 usbhsehci: ehci@48064800 {
644 compatible = "ti,ehci-omap", "usb-ehci";
645 reg = <0x48064800 0x400>;
646 interrupt-parent = <&intc>;
651 gpmc: gpmc@6e000000 {
652 compatible = "ti,omap3430-gpmc";
654 reg = <0x6e000000 0x02d0>;
657 gpmc,num-waitpins = <4>;
658 #address-cells = <2>;
662 usb_otg_hs: usb_otg_hs@480ab000 {
663 compatible = "ti,omap3-musb";
664 reg = <0x480ab000 0x1000>;
665 interrupts = <92>, <93>;
666 interrupt-names = "mc", "dma";
667 ti,hwmods = "usb_otg_hs";
675 /include/ "omap3xxx-clocks.dtsi"