powerpc: expect all devices calling dma ops to have archdata set
[linux-2.6/btrfs-unstable.git] / arch / powerpc / include / asm / dma-mapping.h
blobc69f2b5f0cc40035877ccea1f363c3de6711fc61
1 /*
2 * Copyright (C) 2004 IBM
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7 #ifndef _ASM_DMA_MAPPING_H
8 #define _ASM_DMA_MAPPING_H
9 #ifdef __KERNEL__
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 /* need struct page definitions */
14 #include <linux/mm.h>
15 #include <linux/scatterlist.h>
16 #include <linux/dma-attrs.h>
17 #include <asm/io.h>
19 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
21 #ifdef CONFIG_NOT_COHERENT_CACHE
23 * DMA-consistent mapping functions for PowerPCs that don't support
24 * cache snooping. These allocate/free a region of uncached mapped
25 * memory space for use with DMA devices. Alternatively, you could
26 * allocate the space "normally" and use the cache management functions
27 * to ensure it is consistent.
29 extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
30 extern void __dma_free_coherent(size_t size, void *vaddr);
31 extern void __dma_sync(void *vaddr, size_t size, int direction);
32 extern void __dma_sync_page(struct page *page, unsigned long offset,
33 size_t size, int direction);
35 #else /* ! CONFIG_NOT_COHERENT_CACHE */
37 * Cache coherent cores.
40 #define __dma_alloc_coherent(gfp, size, handle) NULL
41 #define __dma_free_coherent(size, addr) ((void)0)
42 #define __dma_sync(addr, size, rw) ((void)0)
43 #define __dma_sync_page(pg, off, sz, rw) ((void)0)
45 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
47 static inline unsigned long device_to_mask(struct device *dev)
49 if (dev->dma_mask && *dev->dma_mask)
50 return *dev->dma_mask;
51 /* Assume devices without mask can take 32 bit addresses */
52 return 0xfffffffful;
56 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
58 struct dma_mapping_ops {
59 void * (*alloc_coherent)(struct device *dev, size_t size,
60 dma_addr_t *dma_handle, gfp_t flag);
61 void (*free_coherent)(struct device *dev, size_t size,
62 void *vaddr, dma_addr_t dma_handle);
63 int (*map_sg)(struct device *dev, struct scatterlist *sg,
64 int nents, enum dma_data_direction direction,
65 struct dma_attrs *attrs);
66 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
67 int nents, enum dma_data_direction direction,
68 struct dma_attrs *attrs);
69 int (*dma_supported)(struct device *dev, u64 mask);
70 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
71 dma_addr_t (*map_page)(struct device *dev, struct page *page,
72 unsigned long offset, size_t size,
73 enum dma_data_direction direction,
74 struct dma_attrs *attrs);
75 void (*unmap_page)(struct device *dev,
76 dma_addr_t dma_address, size_t size,
77 enum dma_data_direction direction,
78 struct dma_attrs *attrs);
79 #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
80 void (*sync_single_range_for_cpu)(struct device *hwdev,
81 dma_addr_t dma_handle, unsigned long offset,
82 size_t size,
83 enum dma_data_direction direction);
84 void (*sync_single_range_for_device)(struct device *hwdev,
85 dma_addr_t dma_handle, unsigned long offset,
86 size_t size,
87 enum dma_data_direction direction);
88 void (*sync_sg_for_cpu)(struct device *hwdev,
89 struct scatterlist *sg, int nelems,
90 enum dma_data_direction direction);
91 void (*sync_sg_for_device)(struct device *hwdev,
92 struct scatterlist *sg, int nelems,
93 enum dma_data_direction direction);
94 #endif
98 * Available generic sets of operations
100 #ifdef CONFIG_PPC64
101 extern struct dma_mapping_ops dma_iommu_ops;
102 #endif
103 extern struct dma_mapping_ops dma_direct_ops;
105 static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
107 /* We don't handle the NULL dev case for ISA for now. We could
108 * do it via an out of line call but it is not needed for now. The
109 * only ISA DMA device we support is the floppy and we have a hack
110 * in the floppy driver directly to get a device for us.
112 if (unlikely(dev == NULL))
113 return NULL;
115 return dev->archdata.dma_ops;
118 static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops)
120 dev->archdata.dma_ops = ops;
123 static inline int dma_supported(struct device *dev, u64 mask)
125 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
127 if (unlikely(dma_ops == NULL))
128 return 0;
129 if (dma_ops->dma_supported == NULL)
130 return 1;
131 return dma_ops->dma_supported(dev, mask);
134 /* We have our own implementation of pci_set_dma_mask() */
135 #define HAVE_ARCH_PCI_SET_DMA_MASK
137 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
139 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
141 if (unlikely(dma_ops == NULL))
142 return -EIO;
143 if (dma_ops->set_dma_mask != NULL)
144 return dma_ops->set_dma_mask(dev, dma_mask);
145 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
146 return -EIO;
147 *dev->dma_mask = dma_mask;
148 return 0;
152 * map_/unmap_single actually call through to map/unmap_page now that all the
153 * dma_mapping_ops have been converted over. We just have to get the page and
154 * offset to pass through to map_page
156 static inline dma_addr_t dma_map_single_attrs(struct device *dev,
157 void *cpu_addr,
158 size_t size,
159 enum dma_data_direction direction,
160 struct dma_attrs *attrs)
162 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
164 BUG_ON(!dma_ops);
166 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
167 (unsigned long)cpu_addr % PAGE_SIZE, size,
168 direction, attrs);
171 static inline void dma_unmap_single_attrs(struct device *dev,
172 dma_addr_t dma_addr,
173 size_t size,
174 enum dma_data_direction direction,
175 struct dma_attrs *attrs)
177 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
179 BUG_ON(!dma_ops);
181 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
184 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
185 struct page *page,
186 unsigned long offset, size_t size,
187 enum dma_data_direction direction,
188 struct dma_attrs *attrs)
190 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
192 BUG_ON(!dma_ops);
194 return dma_ops->map_page(dev, page, offset, size, direction, attrs);
197 static inline void dma_unmap_page_attrs(struct device *dev,
198 dma_addr_t dma_address,
199 size_t size,
200 enum dma_data_direction direction,
201 struct dma_attrs *attrs)
203 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
205 BUG_ON(!dma_ops);
207 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
210 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
211 int nents, enum dma_data_direction direction,
212 struct dma_attrs *attrs)
214 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
216 BUG_ON(!dma_ops);
217 return dma_ops->map_sg(dev, sg, nents, direction, attrs);
220 static inline void dma_unmap_sg_attrs(struct device *dev,
221 struct scatterlist *sg,
222 int nhwentries,
223 enum dma_data_direction direction,
224 struct dma_attrs *attrs)
226 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
228 BUG_ON(!dma_ops);
229 dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
232 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
233 dma_addr_t *dma_handle, gfp_t flag)
235 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
237 BUG_ON(!dma_ops);
238 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
241 static inline void dma_free_coherent(struct device *dev, size_t size,
242 void *cpu_addr, dma_addr_t dma_handle)
244 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
246 BUG_ON(!dma_ops);
247 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
250 static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
251 size_t size,
252 enum dma_data_direction direction)
254 return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
257 static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
258 size_t size,
259 enum dma_data_direction direction)
261 dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
264 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
265 unsigned long offset, size_t size,
266 enum dma_data_direction direction)
268 return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
271 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
272 size_t size,
273 enum dma_data_direction direction)
275 dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
278 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
279 int nents, enum dma_data_direction direction)
281 return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
284 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
285 int nhwentries,
286 enum dma_data_direction direction)
288 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
291 #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
292 static inline void dma_sync_single_for_cpu(struct device *dev,
293 dma_addr_t dma_handle, size_t size,
294 enum dma_data_direction direction)
296 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
298 BUG_ON(!dma_ops);
299 dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
300 size, direction);
303 static inline void dma_sync_single_for_device(struct device *dev,
304 dma_addr_t dma_handle, size_t size,
305 enum dma_data_direction direction)
307 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
309 BUG_ON(!dma_ops);
310 dma_ops->sync_single_range_for_device(dev, dma_handle,
311 0, size, direction);
314 static inline void dma_sync_sg_for_cpu(struct device *dev,
315 struct scatterlist *sgl, int nents,
316 enum dma_data_direction direction)
318 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
320 BUG_ON(!dma_ops);
321 dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
324 static inline void dma_sync_sg_for_device(struct device *dev,
325 struct scatterlist *sgl, int nents,
326 enum dma_data_direction direction)
328 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
330 BUG_ON(!dma_ops);
331 dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
334 static inline void dma_sync_single_range_for_cpu(struct device *dev,
335 dma_addr_t dma_handle, unsigned long offset, size_t size,
336 enum dma_data_direction direction)
338 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
340 BUG_ON(!dma_ops);
341 dma_ops->sync_single_range_for_cpu(dev, dma_handle,
342 offset, size, direction);
345 static inline void dma_sync_single_range_for_device(struct device *dev,
346 dma_addr_t dma_handle, unsigned long offset, size_t size,
347 enum dma_data_direction direction)
349 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
351 BUG_ON(!dma_ops);
352 dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
353 size, direction);
355 #else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
356 static inline void dma_sync_single_for_cpu(struct device *dev,
357 dma_addr_t dma_handle, size_t size,
358 enum dma_data_direction direction)
362 static inline void dma_sync_single_for_device(struct device *dev,
363 dma_addr_t dma_handle, size_t size,
364 enum dma_data_direction direction)
368 static inline void dma_sync_sg_for_cpu(struct device *dev,
369 struct scatterlist *sgl, int nents,
370 enum dma_data_direction direction)
374 static inline void dma_sync_sg_for_device(struct device *dev,
375 struct scatterlist *sgl, int nents,
376 enum dma_data_direction direction)
380 static inline void dma_sync_single_range_for_cpu(struct device *dev,
381 dma_addr_t dma_handle, unsigned long offset, size_t size,
382 enum dma_data_direction direction)
386 static inline void dma_sync_single_range_for_device(struct device *dev,
387 dma_addr_t dma_handle, unsigned long offset, size_t size,
388 enum dma_data_direction direction)
391 #endif
393 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
395 #ifdef CONFIG_PPC64
396 return (dma_addr == DMA_ERROR_CODE);
397 #else
398 return 0;
399 #endif
402 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
403 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
404 #ifdef CONFIG_NOT_COHERENT_CACHE
405 #define dma_is_consistent(d, h) (0)
406 #else
407 #define dma_is_consistent(d, h) (1)
408 #endif
410 static inline int dma_get_cache_alignment(void)
412 #ifdef CONFIG_PPC64
413 /* no easy way to get cache size on all processors, so return
414 * the maximum possible, to be safe */
415 return (1 << INTERNODE_CACHE_SHIFT);
416 #else
418 * Each processor family will define its own L1_CACHE_SHIFT,
419 * L1_CACHE_BYTES wraps to this, so this is always safe.
421 return L1_CACHE_BYTES;
422 #endif
425 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
426 enum dma_data_direction direction)
428 BUG_ON(direction == DMA_NONE);
429 __dma_sync(vaddr, size, (int)direction);
432 #endif /* __KERNEL__ */
433 #endif /* _ASM_DMA_MAPPING_H */