x86/asm, x86/microcode: Add __PAGE_OFFSET_BASE define on 32-bit
[linux-2.6/btrfs-unstable.git] / arch / x86 / kernel / cpu / microcode / intel.c
blobcdc0deab00c9ff3615da88a4591d8701a661768a
1 /*
2 * Intel CPU Microcode Update Driver for Linux
4 * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
5 * 2006 Shaohua Li <shaohua.li@intel.com>
7 * Intel CPU microcode early update for Linux
9 * Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
10 * H Peter Anvin" <hpa@zytor.com>
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
19 * This needs to be before all headers so that pr_debug in printk.h doesn't turn
20 * printk calls into no_printk().
22 *#define DEBUG
24 #define pr_fmt(fmt) "microcode: " fmt
26 #include <linux/earlycpio.h>
27 #include <linux/firmware.h>
28 #include <linux/uaccess.h>
29 #include <linux/vmalloc.h>
30 #include <linux/initrd.h>
31 #include <linux/kernel.h>
32 #include <linux/slab.h>
33 #include <linux/cpu.h>
34 #include <linux/mm.h>
36 #include <asm/microcode_intel.h>
37 #include <asm/processor.h>
38 #include <asm/tlbflush.h>
39 #include <asm/setup.h>
40 #include <asm/msr.h>
43 * Temporary microcode blobs pointers storage. We note here during early load
44 * the pointers to microcode blobs we've got from whatever storage (detached
45 * initrd, builtin). Later on, we put those into final storage
46 * mc_saved_data.mc_saved.
48 * Important: those are offsets from the beginning of initrd or absolute
49 * addresses within the kernel image when built-in.
51 static unsigned long mc_tmp_ptrs[MAX_UCODE_COUNT];
53 static struct mc_saved_data {
54 unsigned int num_saved;
55 struct microcode_intel **mc_saved;
56 } mc_saved_data;
58 /* Microcode blobs within the initrd. 0 if builtin. */
59 static struct ucode_blobs {
60 unsigned long start;
61 bool valid;
62 } blobs;
64 /* Go through saved patches and find the one suitable for the current CPU. */
65 static enum ucode_state
66 find_microcode_patch(struct microcode_intel **saved,
67 unsigned int num_saved, struct ucode_cpu_info *uci)
69 struct microcode_intel *ucode_ptr, *new_mc = NULL;
70 struct microcode_header_intel *mc_hdr;
71 int new_rev, ret, i;
73 new_rev = uci->cpu_sig.rev;
75 for (i = 0; i < num_saved; i++) {
76 ucode_ptr = saved[i];
77 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
79 ret = has_newer_microcode(ucode_ptr,
80 uci->cpu_sig.sig,
81 uci->cpu_sig.pf,
82 new_rev);
83 if (!ret)
84 continue;
86 new_rev = mc_hdr->rev;
87 new_mc = ucode_ptr;
90 if (!new_mc)
91 return UCODE_NFOUND;
93 uci->mc = (struct microcode_intel *)new_mc;
94 return UCODE_OK;
97 static inline void
98 copy_ptrs(struct microcode_intel **mc_saved, unsigned long *mc_ptrs,
99 unsigned long off, int num_saved)
101 int i;
103 for (i = 0; i < num_saved; i++)
104 mc_saved[i] = (struct microcode_intel *)(mc_ptrs[i] + off);
107 #ifdef CONFIG_X86_32
108 static void
109 microcode_phys(struct microcode_intel **mc_saved_tmp, struct mc_saved_data *mcs)
111 int i;
112 struct microcode_intel ***mc_saved;
114 mc_saved = (struct microcode_intel ***)__pa_nodebug(&mcs->mc_saved);
116 for (i = 0; i < mcs->num_saved; i++) {
117 struct microcode_intel *p;
119 p = *(struct microcode_intel **)__pa_nodebug(mcs->mc_saved + i);
120 mc_saved_tmp[i] = (struct microcode_intel *)__pa_nodebug(p);
123 #endif
125 static enum ucode_state
126 load_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
127 unsigned long offset, struct ucode_cpu_info *uci)
129 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
130 unsigned int count = mcs->num_saved;
132 if (!mcs->mc_saved) {
133 copy_ptrs(mc_saved_tmp, mc_ptrs, offset, count);
135 return find_microcode_patch(mc_saved_tmp, count, uci);
136 } else {
137 #ifdef CONFIG_X86_32
138 microcode_phys(mc_saved_tmp, mcs);
139 return find_microcode_patch(mc_saved_tmp, count, uci);
140 #else
141 return find_microcode_patch(mcs->mc_saved, count, uci);
142 #endif
147 * Given CPU signature and a microcode patch, this function finds if the
148 * microcode patch has matching family and model with the CPU.
150 static enum ucode_state
151 matching_model_microcode(struct microcode_header_intel *mc_header,
152 unsigned long sig)
154 unsigned int fam, model;
155 unsigned int fam_ucode, model_ucode;
156 struct extended_sigtable *ext_header;
157 unsigned long total_size = get_totalsize(mc_header);
158 unsigned long data_size = get_datasize(mc_header);
159 int ext_sigcount, i;
160 struct extended_signature *ext_sig;
162 fam = x86_family(sig);
163 model = x86_model(sig);
165 fam_ucode = x86_family(mc_header->sig);
166 model_ucode = x86_model(mc_header->sig);
168 if (fam == fam_ucode && model == model_ucode)
169 return UCODE_OK;
171 /* Look for ext. headers: */
172 if (total_size <= data_size + MC_HEADER_SIZE)
173 return UCODE_NFOUND;
175 ext_header = (void *) mc_header + data_size + MC_HEADER_SIZE;
176 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
177 ext_sigcount = ext_header->count;
179 for (i = 0; i < ext_sigcount; i++) {
180 fam_ucode = x86_family(ext_sig->sig);
181 model_ucode = x86_model(ext_sig->sig);
183 if (fam == fam_ucode && model == model_ucode)
184 return UCODE_OK;
186 ext_sig++;
188 return UCODE_NFOUND;
191 static int
192 save_microcode(struct mc_saved_data *mcs,
193 struct microcode_intel **mc_saved_src,
194 unsigned int num_saved)
196 int i, j;
197 struct microcode_intel **saved_ptr;
198 int ret;
200 if (!num_saved)
201 return -EINVAL;
204 * Copy new microcode data.
206 saved_ptr = kcalloc(num_saved, sizeof(struct microcode_intel *), GFP_KERNEL);
207 if (!saved_ptr)
208 return -ENOMEM;
210 for (i = 0; i < num_saved; i++) {
211 struct microcode_header_intel *mc_hdr;
212 struct microcode_intel *mc;
213 unsigned long size;
215 if (!mc_saved_src[i]) {
216 ret = -EINVAL;
217 goto err;
220 mc = mc_saved_src[i];
221 mc_hdr = &mc->hdr;
222 size = get_totalsize(mc_hdr);
224 saved_ptr[i] = kmemdup(mc, size, GFP_KERNEL);
225 if (!saved_ptr[i]) {
226 ret = -ENOMEM;
227 goto err;
232 * Point to newly saved microcode.
234 mcs->mc_saved = saved_ptr;
235 mcs->num_saved = num_saved;
237 return 0;
239 err:
240 for (j = 0; j <= i; j++)
241 kfree(saved_ptr[j]);
242 kfree(saved_ptr);
244 return ret;
248 * A microcode patch in ucode_ptr is saved into mc_saved
249 * - if it has matching signature and newer revision compared to an existing
250 * patch mc_saved.
251 * - or if it is a newly discovered microcode patch.
253 * The microcode patch should have matching model with CPU.
255 * Returns: The updated number @num_saved of saved microcode patches.
257 static unsigned int _save_mc(struct microcode_intel **mc_saved,
258 u8 *ucode_ptr, unsigned int num_saved)
260 struct microcode_header_intel *mc_hdr, *mc_saved_hdr;
261 unsigned int sig, pf;
262 int found = 0, i;
264 mc_hdr = (struct microcode_header_intel *)ucode_ptr;
266 for (i = 0; i < num_saved; i++) {
267 mc_saved_hdr = (struct microcode_header_intel *)mc_saved[i];
268 sig = mc_saved_hdr->sig;
269 pf = mc_saved_hdr->pf;
271 if (!find_matching_signature(ucode_ptr, sig, pf))
272 continue;
274 found = 1;
276 if (mc_hdr->rev <= mc_saved_hdr->rev)
277 continue;
280 * Found an older ucode saved earlier. Replace it with
281 * this newer one.
283 mc_saved[i] = (struct microcode_intel *)ucode_ptr;
284 break;
287 /* Newly detected microcode, save it to memory. */
288 if (i >= num_saved && !found)
289 mc_saved[num_saved++] = (struct microcode_intel *)ucode_ptr;
291 return num_saved;
295 * Get microcode matching with BSP's model. Only CPUs with the same model as
296 * BSP can stay in the platform.
298 static enum ucode_state __init
299 get_matching_model_microcode(unsigned long start, void *data, size_t size,
300 struct mc_saved_data *mcs, unsigned long *mc_ptrs,
301 struct ucode_cpu_info *uci)
303 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
304 struct microcode_header_intel *mc_header;
305 unsigned int num_saved = mcs->num_saved;
306 enum ucode_state state = UCODE_OK;
307 unsigned int leftover = size;
308 u8 *ucode_ptr = data;
309 unsigned int mc_size;
310 int i;
312 while (leftover && num_saved < ARRAY_SIZE(mc_saved_tmp)) {
314 if (leftover < sizeof(mc_header))
315 break;
317 mc_header = (struct microcode_header_intel *)ucode_ptr;
319 mc_size = get_totalsize(mc_header);
320 if (!mc_size || mc_size > leftover ||
321 microcode_sanity_check(ucode_ptr, 0) < 0)
322 break;
324 leftover -= mc_size;
327 * Since APs with same family and model as the BSP may boot in
328 * the platform, we need to find and save microcode patches
329 * with the same family and model as the BSP.
331 if (matching_model_microcode(mc_header, uci->cpu_sig.sig) != UCODE_OK) {
332 ucode_ptr += mc_size;
333 continue;
336 num_saved = _save_mc(mc_saved_tmp, ucode_ptr, num_saved);
338 ucode_ptr += mc_size;
341 if (leftover) {
342 state = UCODE_ERROR;
343 return state;
346 if (!num_saved) {
347 state = UCODE_NFOUND;
348 return state;
351 for (i = 0; i < num_saved; i++)
352 mc_ptrs[i] = (unsigned long)mc_saved_tmp[i] - start;
354 mcs->num_saved = num_saved;
356 return state;
359 static int collect_cpu_info_early(struct ucode_cpu_info *uci)
361 unsigned int val[2];
362 unsigned int family, model;
363 struct cpu_signature csig;
364 unsigned int eax, ebx, ecx, edx;
366 csig.sig = 0;
367 csig.pf = 0;
368 csig.rev = 0;
370 memset(uci, 0, sizeof(*uci));
372 eax = 0x00000001;
373 ecx = 0;
374 native_cpuid(&eax, &ebx, &ecx, &edx);
375 csig.sig = eax;
377 family = x86_family(csig.sig);
378 model = x86_model(csig.sig);
380 if ((model >= 5) || (family > 6)) {
381 /* get processor flags from MSR 0x17 */
382 native_rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
383 csig.pf = 1 << ((val[1] >> 18) & 7);
385 native_wrmsrl(MSR_IA32_UCODE_REV, 0);
387 /* As documented in the SDM: Do a CPUID 1 here */
388 sync_core();
390 /* get the current revision from MSR 0x8B */
391 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
393 csig.rev = val[1];
395 uci->cpu_sig = csig;
396 uci->valid = 1;
398 return 0;
401 static void show_saved_mc(void)
403 #ifdef DEBUG
404 int i, j;
405 unsigned int sig, pf, rev, total_size, data_size, date;
406 struct ucode_cpu_info uci;
408 if (!mc_saved_data.num_saved) {
409 pr_debug("no microcode data saved.\n");
410 return;
412 pr_debug("Total microcode saved: %d\n", mc_saved_data.num_saved);
414 collect_cpu_info_early(&uci);
416 sig = uci.cpu_sig.sig;
417 pf = uci.cpu_sig.pf;
418 rev = uci.cpu_sig.rev;
419 pr_debug("CPU: sig=0x%x, pf=0x%x, rev=0x%x\n", sig, pf, rev);
421 for (i = 0; i < mc_saved_data.num_saved; i++) {
422 struct microcode_header_intel *mc_saved_header;
423 struct extended_sigtable *ext_header;
424 int ext_sigcount;
425 struct extended_signature *ext_sig;
427 mc_saved_header = (struct microcode_header_intel *)
428 mc_saved_data.mc_saved[i];
429 sig = mc_saved_header->sig;
430 pf = mc_saved_header->pf;
431 rev = mc_saved_header->rev;
432 total_size = get_totalsize(mc_saved_header);
433 data_size = get_datasize(mc_saved_header);
434 date = mc_saved_header->date;
436 pr_debug("mc_saved[%d]: sig=0x%x, pf=0x%x, rev=0x%x, total size=0x%x, date = %04x-%02x-%02x\n",
437 i, sig, pf, rev, total_size,
438 date & 0xffff,
439 date >> 24,
440 (date >> 16) & 0xff);
442 /* Look for ext. headers: */
443 if (total_size <= data_size + MC_HEADER_SIZE)
444 continue;
446 ext_header = (void *) mc_saved_header + data_size + MC_HEADER_SIZE;
447 ext_sigcount = ext_header->count;
448 ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
450 for (j = 0; j < ext_sigcount; j++) {
451 sig = ext_sig->sig;
452 pf = ext_sig->pf;
454 pr_debug("\tExtended[%d]: sig=0x%x, pf=0x%x\n",
455 j, sig, pf);
457 ext_sig++;
461 #endif
465 * Save this mc into mc_saved_data. So it will be loaded early when a CPU is
466 * hot added or resumes.
468 * Please make sure this mc should be a valid microcode patch before calling
469 * this function.
471 static void save_mc_for_early(u8 *mc)
473 #ifdef CONFIG_HOTPLUG_CPU
474 /* Synchronization during CPU hotplug. */
475 static DEFINE_MUTEX(x86_cpu_microcode_mutex);
477 struct microcode_intel *mc_saved_tmp[MAX_UCODE_COUNT];
478 unsigned int mc_saved_count_init;
479 unsigned int num_saved;
480 struct microcode_intel **mc_saved;
481 int ret, i;
483 mutex_lock(&x86_cpu_microcode_mutex);
485 mc_saved_count_init = mc_saved_data.num_saved;
486 num_saved = mc_saved_data.num_saved;
487 mc_saved = mc_saved_data.mc_saved;
489 if (mc_saved && num_saved)
490 memcpy(mc_saved_tmp, mc_saved,
491 num_saved * sizeof(struct microcode_intel *));
493 * Save the microcode patch mc in mc_save_tmp structure if it's a newer
494 * version.
496 num_saved = _save_mc(mc_saved_tmp, mc, num_saved);
499 * Save the mc_save_tmp in global mc_saved_data.
501 ret = save_microcode(&mc_saved_data, mc_saved_tmp, num_saved);
502 if (ret) {
503 pr_err("Cannot save microcode patch.\n");
504 goto out;
507 show_saved_mc();
510 * Free old saved microcode data.
512 if (mc_saved) {
513 for (i = 0; i < mc_saved_count_init; i++)
514 kfree(mc_saved[i]);
515 kfree(mc_saved);
518 out:
519 mutex_unlock(&x86_cpu_microcode_mutex);
520 #endif
523 static bool __init load_builtin_intel_microcode(struct cpio_data *cp)
525 #ifdef CONFIG_X86_64
526 unsigned int eax = 0x00000001, ebx, ecx = 0, edx;
527 char name[30];
529 native_cpuid(&eax, &ebx, &ecx, &edx);
531 sprintf(name, "intel-ucode/%02x-%02x-%02x",
532 x86_family(eax), x86_model(eax), x86_stepping(eax));
534 return get_builtin_firmware(cp, name);
535 #else
536 return false;
537 #endif
541 * Print ucode update info.
543 static void
544 print_ucode_info(struct ucode_cpu_info *uci, unsigned int date)
546 pr_info_once("microcode updated early to revision 0x%x, date = %04x-%02x-%02x\n",
547 uci->cpu_sig.rev,
548 date & 0xffff,
549 date >> 24,
550 (date >> 16) & 0xff);
553 #ifdef CONFIG_X86_32
555 static int delay_ucode_info;
556 static int current_mc_date;
559 * Print early updated ucode info after printk works. This is delayed info dump.
561 void show_ucode_info_early(void)
563 struct ucode_cpu_info uci;
565 if (delay_ucode_info) {
566 collect_cpu_info_early(&uci);
567 print_ucode_info(&uci, current_mc_date);
568 delay_ucode_info = 0;
573 * At this point, we can not call printk() yet. Keep microcode patch number in
574 * mc_saved_data.mc_saved and delay printing microcode info in
575 * show_ucode_info_early() until printk() works.
577 static void print_ucode(struct ucode_cpu_info *uci)
579 struct microcode_intel *mc;
580 int *delay_ucode_info_p;
581 int *current_mc_date_p;
583 mc = uci->mc;
584 if (!mc)
585 return;
587 delay_ucode_info_p = (int *)__pa_nodebug(&delay_ucode_info);
588 current_mc_date_p = (int *)__pa_nodebug(&current_mc_date);
590 *delay_ucode_info_p = 1;
591 *current_mc_date_p = mc->hdr.date;
593 #else
596 * Flush global tlb. We only do this in x86_64 where paging has been enabled
597 * already and PGE should be enabled as well.
599 static inline void flush_tlb_early(void)
601 __native_flush_tlb_global_irq_disabled();
604 static inline void print_ucode(struct ucode_cpu_info *uci)
606 struct microcode_intel *mc;
608 mc = uci->mc;
609 if (!mc)
610 return;
612 print_ucode_info(uci, mc->hdr.date);
614 #endif
616 static int apply_microcode_early(struct ucode_cpu_info *uci, bool early)
618 struct microcode_intel *mc;
619 unsigned int val[2];
621 mc = uci->mc;
622 if (!mc)
623 return 0;
625 /* write microcode via MSR 0x79 */
626 native_wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
627 native_wrmsrl(MSR_IA32_UCODE_REV, 0);
629 /* As documented in the SDM: Do a CPUID 1 here */
630 sync_core();
632 /* get the current revision from MSR 0x8B */
633 native_rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
634 if (val[1] != mc->hdr.rev)
635 return -1;
637 #ifdef CONFIG_X86_64
638 /* Flush global tlb. This is precaution. */
639 flush_tlb_early();
640 #endif
641 uci->cpu_sig.rev = val[1];
643 if (early)
644 print_ucode(uci);
645 else
646 print_ucode_info(uci, mc->hdr.date);
648 return 0;
652 * This function converts microcode patch offsets previously stored in
653 * mc_tmp_ptrs to pointers and stores the pointers in mc_saved_data.
655 int __init save_microcode_in_initrd_intel(void)
657 struct microcode_intel *mc_saved[MAX_UCODE_COUNT];
658 unsigned int count = mc_saved_data.num_saved;
659 unsigned long offset = 0;
660 int ret;
662 if (!count)
663 return 0;
666 * We have found a valid initrd but it might've been relocated in the
667 * meantime so get its updated address.
669 if (IS_ENABLED(CONFIG_BLK_DEV_INITRD) && blobs.valid)
670 offset = initrd_start;
672 copy_ptrs(mc_saved, mc_tmp_ptrs, offset, count);
674 ret = save_microcode(&mc_saved_data, mc_saved, count);
675 if (ret)
676 pr_err("Cannot save microcode patches from initrd.\n");
677 else
678 show_saved_mc();
680 return ret;
683 static __init enum ucode_state
684 __scan_microcode_initrd(struct cpio_data *cd, struct ucode_blobs *blbp)
686 #ifdef CONFIG_BLK_DEV_INITRD
687 static __initdata char ucode_name[] = "kernel/x86/microcode/GenuineIntel.bin";
688 char *p = IS_ENABLED(CONFIG_X86_32) ? (char *)__pa_nodebug(ucode_name)
689 : ucode_name;
690 # ifdef CONFIG_X86_32
691 unsigned long start = 0, size;
692 struct boot_params *params;
694 params = (struct boot_params *)__pa_nodebug(&boot_params);
695 size = params->hdr.ramdisk_size;
698 * Set start only if we have an initrd image. We cannot use initrd_start
699 * because it is not set that early yet.
701 start = (size ? params->hdr.ramdisk_image : 0);
703 # else /* CONFIG_X86_64 */
704 unsigned long start = 0, size;
706 size = (u64)boot_params.ext_ramdisk_size << 32;
707 size |= boot_params.hdr.ramdisk_size;
709 if (size) {
710 start = (u64)boot_params.ext_ramdisk_image << 32;
711 start |= boot_params.hdr.ramdisk_image;
713 start += PAGE_OFFSET;
715 # endif
717 *cd = find_cpio_data(p, (void *)start, size, NULL);
718 if (cd->data) {
719 blbp->start = start;
720 blbp->valid = true;
722 return UCODE_OK;
723 } else
724 #endif /* CONFIG_BLK_DEV_INITRD */
725 return UCODE_ERROR;
728 static __init enum ucode_state
729 scan_microcode(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
730 struct ucode_cpu_info *uci, struct ucode_blobs *blbp)
732 struct cpio_data cd = { NULL, 0, "" };
733 enum ucode_state ret;
735 /* try built-in microcode first */
736 if (load_builtin_intel_microcode(&cd))
738 * Invalidate blobs as we might've gotten an initrd too,
739 * supplied by the boot loader, by mistake or simply forgotten
740 * there. That's fine, we ignore it since we've found builtin
741 * microcode already.
743 blbp->valid = false;
744 else {
745 ret = __scan_microcode_initrd(&cd, blbp);
746 if (ret != UCODE_OK)
747 return ret;
750 return get_matching_model_microcode(blbp->start, cd.data, cd.size,
751 mcs, mc_ptrs, uci);
754 static void __init
755 _load_ucode_intel_bsp(struct mc_saved_data *mcs, unsigned long *mc_ptrs,
756 struct ucode_blobs *blbp)
758 struct ucode_cpu_info uci;
759 enum ucode_state ret;
761 collect_cpu_info_early(&uci);
763 ret = scan_microcode(mcs, mc_ptrs, &uci, blbp);
764 if (ret != UCODE_OK)
765 return;
767 ret = load_microcode(mcs, mc_ptrs, blbp->start, &uci);
768 if (ret != UCODE_OK)
769 return;
771 apply_microcode_early(&uci, true);
774 void __init load_ucode_intel_bsp(void)
776 struct ucode_blobs *blobs_p;
777 struct mc_saved_data *mcs;
778 unsigned long *ptrs;
780 #ifdef CONFIG_X86_32
781 mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
782 ptrs = (unsigned long *)__pa_nodebug(&mc_tmp_ptrs);
783 blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
784 #else
785 mcs = &mc_saved_data;
786 ptrs = mc_tmp_ptrs;
787 blobs_p = &blobs;
788 #endif
790 _load_ucode_intel_bsp(mcs, ptrs, blobs_p);
793 void load_ucode_intel_ap(void)
795 struct ucode_blobs *blobs_p;
796 unsigned long *ptrs, start = 0;
797 struct mc_saved_data *mcs;
798 struct ucode_cpu_info uci;
799 enum ucode_state ret;
801 #ifdef CONFIG_X86_32
802 mcs = (struct mc_saved_data *)__pa_nodebug(&mc_saved_data);
803 ptrs = (unsigned long *)__pa_nodebug(mc_tmp_ptrs);
804 blobs_p = (struct ucode_blobs *)__pa_nodebug(&blobs);
805 #else
806 mcs = &mc_saved_data;
807 ptrs = mc_tmp_ptrs;
808 blobs_p = &blobs;
809 #endif
812 * If there is no valid ucode previously saved in memory, no need to
813 * update ucode on this AP.
815 if (!mcs->num_saved)
816 return;
818 if (blobs_p->valid) {
819 start = blobs_p->start;
822 * Pay attention to CONFIG_RANDOMIZE_MEMORY=y as it shuffles
823 * physmem mapping too and there we have the initrd.
825 start += PAGE_OFFSET - __PAGE_OFFSET_BASE;
828 collect_cpu_info_early(&uci);
829 ret = load_microcode(mcs, ptrs, start, &uci);
830 if (ret != UCODE_OK)
831 return;
833 apply_microcode_early(&uci, true);
836 void reload_ucode_intel(void)
838 struct ucode_cpu_info uci;
839 enum ucode_state ret;
841 if (!mc_saved_data.num_saved)
842 return;
844 collect_cpu_info_early(&uci);
846 ret = find_microcode_patch(mc_saved_data.mc_saved,
847 mc_saved_data.num_saved, &uci);
848 if (ret != UCODE_OK)
849 return;
851 apply_microcode_early(&uci, false);
854 static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
856 static struct cpu_signature prev;
857 struct cpuinfo_x86 *c = &cpu_data(cpu_num);
858 unsigned int val[2];
860 memset(csig, 0, sizeof(*csig));
862 csig->sig = cpuid_eax(0x00000001);
864 if ((c->x86_model >= 5) || (c->x86 > 6)) {
865 /* get processor flags from MSR 0x17 */
866 rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
867 csig->pf = 1 << ((val[1] >> 18) & 7);
870 csig->rev = c->microcode;
872 /* No extra locking on prev, races are harmless. */
873 if (csig->sig != prev.sig || csig->pf != prev.pf || csig->rev != prev.rev) {
874 pr_info("sig=0x%x, pf=0x%x, revision=0x%x\n",
875 csig->sig, csig->pf, csig->rev);
876 prev = *csig;
879 return 0;
883 * return 0 - no update found
884 * return 1 - found update
886 static int get_matching_mc(struct microcode_intel *mc, int cpu)
888 struct cpu_signature cpu_sig;
889 unsigned int csig, cpf, crev;
891 collect_cpu_info(cpu, &cpu_sig);
893 csig = cpu_sig.sig;
894 cpf = cpu_sig.pf;
895 crev = cpu_sig.rev;
897 return has_newer_microcode(mc, csig, cpf, crev);
900 static int apply_microcode_intel(int cpu)
902 struct microcode_intel *mc;
903 struct ucode_cpu_info *uci;
904 struct cpuinfo_x86 *c;
905 unsigned int val[2];
906 static int prev_rev;
908 /* We should bind the task to the CPU */
909 if (WARN_ON(raw_smp_processor_id() != cpu))
910 return -1;
912 uci = ucode_cpu_info + cpu;
913 mc = uci->mc;
914 if (!mc)
915 return 0;
918 * Microcode on this CPU could be updated earlier. Only apply the
919 * microcode patch in mc when it is newer than the one on this
920 * CPU.
922 if (!get_matching_mc(mc, cpu))
923 return 0;
925 /* write microcode via MSR 0x79 */
926 wrmsrl(MSR_IA32_UCODE_WRITE, (unsigned long)mc->bits);
927 wrmsrl(MSR_IA32_UCODE_REV, 0);
929 /* As documented in the SDM: Do a CPUID 1 here */
930 sync_core();
932 /* get the current revision from MSR 0x8B */
933 rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
935 if (val[1] != mc->hdr.rev) {
936 pr_err("CPU%d update to revision 0x%x failed\n",
937 cpu, mc->hdr.rev);
938 return -1;
941 if (val[1] != prev_rev) {
942 pr_info("updated to revision 0x%x, date = %04x-%02x-%02x\n",
943 val[1],
944 mc->hdr.date & 0xffff,
945 mc->hdr.date >> 24,
946 (mc->hdr.date >> 16) & 0xff);
947 prev_rev = val[1];
950 c = &cpu_data(cpu);
952 uci->cpu_sig.rev = val[1];
953 c->microcode = val[1];
955 return 0;
958 static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
959 int (*get_ucode_data)(void *, const void *, size_t))
961 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
962 u8 *ucode_ptr = data, *new_mc = NULL, *mc = NULL;
963 int new_rev = uci->cpu_sig.rev;
964 unsigned int leftover = size;
965 enum ucode_state state = UCODE_OK;
966 unsigned int curr_mc_size = 0;
967 unsigned int csig, cpf;
969 while (leftover) {
970 struct microcode_header_intel mc_header;
971 unsigned int mc_size;
973 if (leftover < sizeof(mc_header)) {
974 pr_err("error! Truncated header in microcode data file\n");
975 break;
978 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
979 break;
981 mc_size = get_totalsize(&mc_header);
982 if (!mc_size || mc_size > leftover) {
983 pr_err("error! Bad data in microcode data file\n");
984 break;
987 /* For performance reasons, reuse mc area when possible */
988 if (!mc || mc_size > curr_mc_size) {
989 vfree(mc);
990 mc = vmalloc(mc_size);
991 if (!mc)
992 break;
993 curr_mc_size = mc_size;
996 if (get_ucode_data(mc, ucode_ptr, mc_size) ||
997 microcode_sanity_check(mc, 1) < 0) {
998 break;
1001 csig = uci->cpu_sig.sig;
1002 cpf = uci->cpu_sig.pf;
1003 if (has_newer_microcode(mc, csig, cpf, new_rev)) {
1004 vfree(new_mc);
1005 new_rev = mc_header.rev;
1006 new_mc = mc;
1007 mc = NULL; /* trigger new vmalloc */
1010 ucode_ptr += mc_size;
1011 leftover -= mc_size;
1014 vfree(mc);
1016 if (leftover) {
1017 vfree(new_mc);
1018 state = UCODE_ERROR;
1019 goto out;
1022 if (!new_mc) {
1023 state = UCODE_NFOUND;
1024 goto out;
1027 vfree(uci->mc);
1028 uci->mc = (struct microcode_intel *)new_mc;
1031 * If early loading microcode is supported, save this mc into
1032 * permanent memory. So it will be loaded early when a CPU is hot added
1033 * or resumes.
1035 save_mc_for_early(new_mc);
1037 pr_debug("CPU%d found a matching microcode update with version 0x%x (current=0x%x)\n",
1038 cpu, new_rev, uci->cpu_sig.rev);
1039 out:
1040 return state;
1043 static int get_ucode_fw(void *to, const void *from, size_t n)
1045 memcpy(to, from, n);
1046 return 0;
1049 static enum ucode_state request_microcode_fw(int cpu, struct device *device,
1050 bool refresh_fw)
1052 char name[30];
1053 struct cpuinfo_x86 *c = &cpu_data(cpu);
1054 const struct firmware *firmware;
1055 enum ucode_state ret;
1057 sprintf(name, "intel-ucode/%02x-%02x-%02x",
1058 c->x86, c->x86_model, c->x86_mask);
1060 if (request_firmware_direct(&firmware, name, device)) {
1061 pr_debug("data file %s load failed\n", name);
1062 return UCODE_NFOUND;
1065 ret = generic_load_microcode(cpu, (void *)firmware->data,
1066 firmware->size, &get_ucode_fw);
1068 release_firmware(firmware);
1070 return ret;
1073 static int get_ucode_user(void *to, const void *from, size_t n)
1075 return copy_from_user(to, from, n);
1078 static enum ucode_state
1079 request_microcode_user(int cpu, const void __user *buf, size_t size)
1081 return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
1084 static void microcode_fini_cpu(int cpu)
1086 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
1088 vfree(uci->mc);
1089 uci->mc = NULL;
1092 static struct microcode_ops microcode_intel_ops = {
1093 .request_microcode_user = request_microcode_user,
1094 .request_microcode_fw = request_microcode_fw,
1095 .collect_cpu_info = collect_cpu_info,
1096 .apply_microcode = apply_microcode_intel,
1097 .microcode_fini_cpu = microcode_fini_cpu,
1100 struct microcode_ops * __init init_intel_microcode(void)
1102 struct cpuinfo_x86 *c = &boot_cpu_data;
1104 if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
1105 cpu_has(c, X86_FEATURE_IA64)) {
1106 pr_err("Intel CPU family 0x%x not supported\n", c->x86);
1107 return NULL;
1110 return &microcode_intel_ops;