4 * Copyright (C) 2013-2015 Altera Corporation
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * You should have received a copy of the GNU General Public License along with
16 * this program. If not, see <http://www.gnu.org/licenses/>.
18 #include <linux/mutex.h>
19 #include <linux/platform_device.h>
21 #ifndef _LINUX_FPGA_MGR_H
22 #define _LINUX_FPGA_MGR_H
28 * enum fpga_mgr_states - fpga framework states
29 * @FPGA_MGR_STATE_UNKNOWN: can't determine state
30 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
31 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
32 * @FPGA_MGR_STATE_RESET: FPGA in reset state
33 * @FPGA_MGR_STATE_FIRMWARE_REQ: firmware request in progress
34 * @FPGA_MGR_STATE_FIRMWARE_REQ_ERR: firmware request failed
35 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
36 * @FPGA_MGR_STATE_WRITE_INIT_ERR: Error during WRITE_INIT stage
37 * @FPGA_MGR_STATE_WRITE: writing image to FPGA
38 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
39 * @FPGA_MGR_STATE_WRITE_COMPLETE: Doing post programming steps
40 * @FPGA_MGR_STATE_WRITE_COMPLETE_ERR: Error during WRITE_COMPLETE
41 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
43 enum fpga_mgr_states
{
44 /* default FPGA states */
45 FPGA_MGR_STATE_UNKNOWN
,
46 FPGA_MGR_STATE_POWER_OFF
,
47 FPGA_MGR_STATE_POWER_UP
,
50 /* getting an image for loading */
51 FPGA_MGR_STATE_FIRMWARE_REQ
,
52 FPGA_MGR_STATE_FIRMWARE_REQ_ERR
,
54 /* write sequence: init, write, complete */
55 FPGA_MGR_STATE_WRITE_INIT
,
56 FPGA_MGR_STATE_WRITE_INIT_ERR
,
58 FPGA_MGR_STATE_WRITE_ERR
,
59 FPGA_MGR_STATE_WRITE_COMPLETE
,
60 FPGA_MGR_STATE_WRITE_COMPLETE_ERR
,
62 /* fpga is programmed and operating */
63 FPGA_MGR_STATE_OPERATING
,
68 * FPGA_MGR_PARTIAL_RECONFIG: do partial reconfiguration if supported
69 * FPGA_MGR_EXTERNAL_CONFIG: FPGA has been configured prior to Linux booting
71 #define FPGA_MGR_PARTIAL_RECONFIG BIT(0)
72 #define FPGA_MGR_EXTERNAL_CONFIG BIT(1)
75 * struct fpga_image_info - information specific to a FPGA image
76 * @flags: boolean flags as defined above
77 * @enable_timeout_us: maximum time to enable traffic through bridge (uSec)
78 * @disable_timeout_us: maximum time to disable traffic through bridge (uSec)
80 struct fpga_image_info
{
82 u32 enable_timeout_us
;
83 u32 disable_timeout_us
;
87 * struct fpga_manager_ops - ops for low level fpga manager drivers
88 * @initial_header_size: Maximum number of bytes that should be passed into write_init
89 * @state: returns an enum value of the FPGA's state
90 * @write_init: prepare the FPGA to receive confuration data
91 * @write: write count bytes of configuration data to the FPGA
92 * @write_sg: write the scatter list of configuration data to the FPGA
93 * @write_complete: set FPGA to operating state after writing is done
94 * @fpga_remove: optional: Set FPGA into a specific state during driver remove
96 * fpga_manager_ops are the low level functions implemented by a specific
97 * fpga manager driver. The optional ones are tested for NULL before being
98 * called, so leaving them out is fine.
100 struct fpga_manager_ops
{
101 size_t initial_header_size
;
102 enum fpga_mgr_states (*state
)(struct fpga_manager
*mgr
);
103 int (*write_init
)(struct fpga_manager
*mgr
,
104 struct fpga_image_info
*info
,
105 const char *buf
, size_t count
);
106 int (*write
)(struct fpga_manager
*mgr
, const char *buf
, size_t count
);
107 int (*write_sg
)(struct fpga_manager
*mgr
, struct sg_table
*sgt
);
108 int (*write_complete
)(struct fpga_manager
*mgr
,
109 struct fpga_image_info
*info
);
110 void (*fpga_remove
)(struct fpga_manager
*mgr
);
114 * struct fpga_manager - fpga manager structure
115 * @name: name of low level fpga manager
116 * @dev: fpga manager device
117 * @ref_mutex: only allows one reference to fpga manager
118 * @state: state of fpga manager
119 * @mops: pointer to struct of fpga manager ops
120 * @priv: low level driver private date
122 struct fpga_manager
{
125 struct mutex ref_mutex
;
126 enum fpga_mgr_states state
;
127 const struct fpga_manager_ops
*mops
;
131 #define to_fpga_manager(d) container_of(d, struct fpga_manager, dev)
133 int fpga_mgr_buf_load(struct fpga_manager
*mgr
, struct fpga_image_info
*info
,
134 const char *buf
, size_t count
);
135 int fpga_mgr_buf_load_sg(struct fpga_manager
*mgr
, struct fpga_image_info
*info
,
136 struct sg_table
*sgt
);
138 int fpga_mgr_firmware_load(struct fpga_manager
*mgr
,
139 struct fpga_image_info
*info
,
140 const char *image_name
);
142 struct fpga_manager
*of_fpga_mgr_get(struct device_node
*node
);
144 struct fpga_manager
*fpga_mgr_get(struct device
*dev
);
146 void fpga_mgr_put(struct fpga_manager
*mgr
);
148 int fpga_mgr_register(struct device
*dev
, const char *name
,
149 const struct fpga_manager_ops
*mops
, void *priv
);
151 void fpga_mgr_unregister(struct device
*dev
);
153 #endif /*_LINUX_FPGA_MGR_H */