arch/arm/mach-kirkwood/common.c

   1 /*
   2  * arch/arm/mach-kirkwood/common.c
   3  *
   4  * Core functions for Marvell Kirkwood SoCs
   5  *
   6  * This file is licensed under the terms of the GNU General Public
   7  * License version 2.  This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/serial_8250.h>
  15 #include <linux/mbus.h>
  16 #include <linux/ata_platform.h>
  17 #include <linux/mtd/nand.h>
  18 #include <linux/dma-mapping.h>
  19 #include <net/dsa.h>
  20 #include <asm/page.h>
  21 #include <asm/timex.h>
  22 #include <asm/kexec.h>
  23 #include <asm/mach/map.h>
  24 #include <asm/mach/time.h>
  25 #include <mach/kirkwood.h>
  26 #include <mach/bridge-regs.h>
  27 #include <plat/audio.h>
  28 #include <plat/cache-feroceon-l2.h>
  29 #include <plat/mvsdio.h>
  30 #include <plat/orion_nand.h>
  31 #include <plat/common.h>
  32 #include <plat/time.h>
  33 #include <plat/addr-map.h>
  34 #include "common.h"
  35
  36 /*****************************************************************************
  37  * I/O Address Mapping
  38  ****************************************************************************/
  39 static struct map_desc kirkwood_io_desc[] __initdata = {
  40         {
  41                 .virtual        = KIRKWOOD_PCIE_IO_VIRT_BASE,
  42                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE_IO_PHYS_BASE),
  43                 .length         = KIRKWOOD_PCIE_IO_SIZE,
  44                 .type           = MT_DEVICE,
  45         }, {
  46                 .virtual        = KIRKWOOD_PCIE1_IO_VIRT_BASE,
  47                 .pfn            = __phys_to_pfn(KIRKWOOD_PCIE1_IO_PHYS_BASE),
  48                 .length         = KIRKWOOD_PCIE1_IO_SIZE,
  49                 .type           = MT_DEVICE,
  50         }, {
  51                 .virtual        = KIRKWOOD_REGS_VIRT_BASE,
  52                 .pfn            = __phys_to_pfn(KIRKWOOD_REGS_PHYS_BASE),
  53                 .length         = KIRKWOOD_REGS_SIZE,
  54                 .type           = MT_DEVICE,
  55         },
  56 };
  57
  58 void __init kirkwood_map_io(void)
  59 {
  60         iotable_init(kirkwood_io_desc, ARRAY_SIZE(kirkwood_io_desc));
  61 }
  62
  63 /*
  64  * Default clock control bits.  Any bit _not_ set in this variable
  65  * will be cleared from the hardware after platform devices have been
  66  * registered.  Some reserved bits must be set to 1.
  67  */
  68 unsigned int kirkwood_clk_ctrl = CGC_DUNIT | CGC_RESERVED;
  69
  70
  71 /*****************************************************************************
  72  * EHCI0
  73  ****************************************************************************/
  74 void __init kirkwood_ehci_init(void)
  75 {
  76         kirkwood_clk_ctrl |= CGC_USB0;
  77         orion_ehci_init(&orion_mbus_dram_info,
  78                         USB_PHYS_BASE, IRQ_KIRKWOOD_USB);
  79 }
  80
  81
  82 /*****************************************************************************
  83  * GE00
  84  ****************************************************************************/
  85 void __init kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data)
  86 {
  87         kirkwood_clk_ctrl |= CGC_GE0;
  88
  89         orion_ge00_init(eth_data, &orion_mbus_dram_info,
  90                         GE00_PHYS_BASE, IRQ_KIRKWOOD_GE00_SUM,
  91                         IRQ_KIRKWOOD_GE00_ERR, kirkwood_tclk);
  92 }
  93
  94
  95 /*****************************************************************************
  96  * GE01
  97  ****************************************************************************/
  98 void __init kirkwood_ge01_init(struct mv643xx_eth_platform_data *eth_data)
  99 {
 100
 101         kirkwood_clk_ctrl |= CGC_GE1;
 102
 103         orion_ge01_init(eth_data, &orion_mbus_dram_info,
 104                         GE01_PHYS_BASE, IRQ_KIRKWOOD_GE01_SUM,
 105                         IRQ_KIRKWOOD_GE01_ERR, kirkwood_tclk);
 106 }
 107
 108
 109 /*****************************************************************************
 110  * Ethernet switch
 111  ****************************************************************************/
 112 void __init kirkwood_ge00_switch_init(struct dsa_platform_data *d, int irq)
 113 {
 114         orion_ge00_switch_init(d, irq);
 115 }
 116
 117
 118 /*****************************************************************************
 119  * NAND flash
 120  ****************************************************************************/
 121 static struct resource kirkwood_nand_resource = {
 122         .flags          = IORESOURCE_MEM,
 123         .start          = KIRKWOOD_NAND_MEM_PHYS_BASE,
 124         .end            = KIRKWOOD_NAND_MEM_PHYS_BASE +
 125                                 KIRKWOOD_NAND_MEM_SIZE - 1,
 126 };
 127
 128 static struct orion_nand_data kirkwood_nand_data = {
 129         .cle            = 0,
 130         .ale            = 1,
 131         .width          = 8,
 132 };
 133
 134 static struct platform_device kirkwood_nand_flash = {
 135         .name           = "orion_nand",
 136         .id             = -1,
 137         .dev            = {
 138                 .platform_data  = &kirkwood_nand_data,
 139         },
 140         .resource       = &kirkwood_nand_resource,
 141         .num_resources  = 1,
 142 };
 143
 144 void __init kirkwood_nand_init(struct mtd_partition *parts, int nr_parts,
 145                                int chip_delay)
 146 {
 147         kirkwood_clk_ctrl |= CGC_RUNIT;
 148         kirkwood_nand_data.parts = parts;
 149         kirkwood_nand_data.nr_parts = nr_parts;
 150         kirkwood_nand_data.chip_delay = chip_delay;
 151         platform_device_register(&kirkwood_nand_flash);
 152 }
 153
 154 void __init kirkwood_nand_init_rnb(struct mtd_partition *parts, int nr_parts,
 155                                    int (*dev_ready)(struct mtd_info *))
 156 {
 157         kirkwood_clk_ctrl |= CGC_RUNIT;
 158         kirkwood_nand_data.parts = parts;
 159         kirkwood_nand_data.nr_parts = nr_parts;
 160         kirkwood_nand_data.dev_ready = dev_ready;
 161         platform_device_register(&kirkwood_nand_flash);
 162 }
 163
 164 /*****************************************************************************
 165  * SoC RTC
 166  ****************************************************************************/
 167 static void __init kirkwood_rtc_init(void)
 168 {
 169         orion_rtc_init(RTC_PHYS_BASE, IRQ_KIRKWOOD_RTC);
 170 }
 171
 172
 173 /*****************************************************************************
 174  * SATA
 175  ****************************************************************************/
 176 void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
 177 {
 178         kirkwood_clk_ctrl |= CGC_SATA0;
 179         if (sata_data->n_ports > 1)
 180                 kirkwood_clk_ctrl |= CGC_SATA1;
 181
 182         orion_sata_init(sata_data, &orion_mbus_dram_info,
 183                         SATA_PHYS_BASE, IRQ_KIRKWOOD_SATA);
 184 }
 185
 186
 187 /*****************************************************************************
 188  * SD/SDIO/MMC
 189  ****************************************************************************/
 190 static struct resource mvsdio_resources[] = {
 191         [0] = {
 192                 .start  = SDIO_PHYS_BASE,
 193                 .end    = SDIO_PHYS_BASE + SZ_1K - 1,
 194                 .flags  = IORESOURCE_MEM,
 195         },
 196         [1] = {
 197                 .start  = IRQ_KIRKWOOD_SDIO,
 198                 .end    = IRQ_KIRKWOOD_SDIO,
 199                 .flags  = IORESOURCE_IRQ,
 200         },
 201 };
 202
 203 static u64 mvsdio_dmamask = DMA_BIT_MASK(32);
 204
 205 static struct platform_device kirkwood_sdio = {
 206         .name           = "mvsdio",
 207         .id             = -1,
 208         .dev            = {
 209                 .dma_mask = &mvsdio_dmamask,
 210                 .coherent_dma_mask = DMA_BIT_MASK(32),
 211         },
 212         .num_resources  = ARRAY_SIZE(mvsdio_resources),
 213         .resource       = mvsdio_resources,
 214 };
 215
 216 void __init kirkwood_sdio_init(struct mvsdio_platform_data *mvsdio_data)
 217 {
 218         u32 dev, rev;
 219
 220         kirkwood_pcie_id(&dev, &rev);
 221         if (rev == 0 && dev != MV88F6282_DEV_ID) /* catch all Kirkwood Z0's */
 222                 mvsdio_data->clock = 100000000;
 223         else
 224                 mvsdio_data->clock = 200000000;
 225         mvsdio_data->dram = &orion_mbus_dram_info;
 226         kirkwood_clk_ctrl |= CGC_SDIO;
 227         kirkwood_sdio.dev.platform_data = mvsdio_data;
 228         platform_device_register(&kirkwood_sdio);
 229 }
 230
 231
 232 /*****************************************************************************
 233  * SPI
 234  ****************************************************************************/
 235 void __init kirkwood_spi_init()
 236 {
 237         kirkwood_clk_ctrl |= CGC_RUNIT;
 238         orion_spi_init(SPI_PHYS_BASE, kirkwood_tclk);
 239 }
 240
 241
 242 /*****************************************************************************
 243  * I2C
 244  ****************************************************************************/
 245 void __init kirkwood_i2c_init(void)
 246 {
 247         orion_i2c_init(I2C_PHYS_BASE, IRQ_KIRKWOOD_TWSI, 8);
 248 }
 249
 250
 251 /*****************************************************************************
 252  * UART0
 253  ****************************************************************************/
 254
 255 void __init kirkwood_uart0_init(void)
 256 {
 257         orion_uart0_init(UART0_VIRT_BASE, UART0_PHYS_BASE,
 258                          IRQ_KIRKWOOD_UART_0, kirkwood_tclk);
 259 }
 260
 261
 262 /*****************************************************************************
 263  * UART1
 264  ****************************************************************************/
 265 void __init kirkwood_uart1_init(void)
 266 {
 267         orion_uart1_init(UART1_VIRT_BASE, UART1_PHYS_BASE,
 268                          IRQ_KIRKWOOD_UART_1, kirkwood_tclk);
 269 }
 270
 271 /*****************************************************************************
 272  * Cryptographic Engines and Security Accelerator (CESA)
 273  ****************************************************************************/
 274 void __init kirkwood_crypto_init(void)
 275 {
 276         kirkwood_clk_ctrl |= CGC_CRYPTO;
 277         orion_crypto_init(CRYPTO_PHYS_BASE, KIRKWOOD_SRAM_PHYS_BASE,
 278                           KIRKWOOD_SRAM_SIZE, IRQ_KIRKWOOD_CRYPTO);
 279 }
 280
 281
 282 /*****************************************************************************
 283  * XOR0
 284  ****************************************************************************/
 285 static void __init kirkwood_xor0_init(void)
 286 {
 287         kirkwood_clk_ctrl |= CGC_XOR0;
 288
 289         orion_xor0_init(&orion_mbus_dram_info,
 290                         XOR0_PHYS_BASE, XOR0_HIGH_PHYS_BASE,
 291                         IRQ_KIRKWOOD_XOR_00, IRQ_KIRKWOOD_XOR_01);
 292 }
 293
 294
 295 /*****************************************************************************
 296  * XOR1
 297  ****************************************************************************/
 298 static void __init kirkwood_xor1_init(void)
 299 {
 300         kirkwood_clk_ctrl |= CGC_XOR1;
 301
 302         orion_xor1_init(XOR1_PHYS_BASE, XOR1_HIGH_PHYS_BASE,
 303                         IRQ_KIRKWOOD_XOR_10, IRQ_KIRKWOOD_XOR_11);
 304 }
 305
 306
 307 /*****************************************************************************
 308  * Watchdog
 309  ****************************************************************************/
 310 static void __init kirkwood_wdt_init(void)
 311 {
 312         orion_wdt_init(kirkwood_tclk);
 313 }
 314
 315
 316 /*****************************************************************************
 317  * Time handling
 318  ****************************************************************************/
 319 void __init kirkwood_init_early(void)
 320 {
 321         orion_time_set_base(TIMER_VIRT_BASE);
 322 }
 323
 324 int kirkwood_tclk;
 325
 326 static int __init kirkwood_find_tclk(void)
 327 {
 328         u32 dev, rev;
 329
 330         kirkwood_pcie_id(&dev, &rev);
 331
 332         if (dev == MV88F6281_DEV_ID || dev == MV88F6282_DEV_ID)
 333                 if (((readl(SAMPLE_AT_RESET) >> 21) & 1) == 0)
 334                         return 200000000;
 335
 336         return 166666667;
 337 }
 338
 339 static void __init kirkwood_timer_init(void)
 340 {
 341         kirkwood_tclk = kirkwood_find_tclk();
 342
 343         orion_time_init(BRIDGE_VIRT_BASE, BRIDGE_INT_TIMER1_CLR,
 344                         IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
 345 }
 346
 347 struct sys_timer kirkwood_timer = {
 348         .init = kirkwood_timer_init,
 349 };
 350
 351 /*****************************************************************************
 352  * Audio
 353  ****************************************************************************/
 354 static struct resource kirkwood_i2s_resources[] = {
 355         [0] = {
 356                 .start  = AUDIO_PHYS_BASE,
 357                 .end    = AUDIO_PHYS_BASE + SZ_16K - 1,
 358                 .flags  = IORESOURCE_MEM,
 359         },
 360         [1] = {
 361                 .start  = IRQ_KIRKWOOD_I2S,
 362                 .end    = IRQ_KIRKWOOD_I2S,
 363                 .flags  = IORESOURCE_IRQ,
 364         },
 365 };
 366
 367 static struct kirkwood_asoc_platform_data kirkwood_i2s_data = {
 368         .dram        = &orion_mbus_dram_info,
 369         .burst       = 128,
 370 };
 371
 372 static struct platform_device kirkwood_i2s_device = {
 373         .name           = "kirkwood-i2s",
 374         .id             = -1,
 375         .num_resources  = ARRAY_SIZE(kirkwood_i2s_resources),
 376         .resource       = kirkwood_i2s_resources,
 377         .dev            = {
 378                 .platform_data  = &kirkwood_i2s_data,
 379         },
 380 };
 381
 382 static struct platform_device kirkwood_pcm_device = {
 383         .name           = "kirkwood-pcm-audio",
 384         .id             = -1,
 385 };
 386
 387 void __init kirkwood_audio_init(void)
 388 {
 389         kirkwood_clk_ctrl |= CGC_AUDIO;
 390         platform_device_register(&kirkwood_i2s_device);
 391         platform_device_register(&kirkwood_pcm_device);
 392 }
 393
 394 /*****************************************************************************
 395  * General
 396  ****************************************************************************/
 397 /*
 398  * Identify device ID and revision.
 399  */
 400 static char * __init kirkwood_id(void)
 401 {
 402         u32 dev, rev;
 403
 404         kirkwood_pcie_id(&dev, &rev);
 405
 406         if (dev == MV88F6281_DEV_ID) {
 407                 if (rev == MV88F6281_REV_Z0)
 408                         return "MV88F6281-Z0";
 409                 else if (rev == MV88F6281_REV_A0)
 410                         return "MV88F6281-A0";
 411                 else if (rev == MV88F6281_REV_A1)
 412                         return "MV88F6281-A1";
 413                 else
 414                         return "MV88F6281-Rev-Unsupported";
 415         } else if (dev == MV88F6192_DEV_ID) {
 416                 if (rev == MV88F6192_REV_Z0)
 417                         return "MV88F6192-Z0";
 418                 else if (rev == MV88F6192_REV_A0)
 419                         return "MV88F6192-A0";
 420                 else if (rev == MV88F6192_REV_A1)
 421                         return "MV88F6192-A1";
 422                 else
 423                         return "MV88F6192-Rev-Unsupported";
 424         } else if (dev == MV88F6180_DEV_ID) {
 425                 if (rev == MV88F6180_REV_A0)
 426                         return "MV88F6180-Rev-A0";
 427                 else if (rev == MV88F6180_REV_A1)
 428                         return "MV88F6180-Rev-A1";
 429                 else
 430                         return "MV88F6180-Rev-Unsupported";
 431         } else if (dev == MV88F6282_DEV_ID) {
 432                 if (rev == MV88F6282_REV_A0)
 433                         return "MV88F6282-Rev-A0";
 434                 else if (rev == MV88F6282_REV_A1)
 435                         return "MV88F6282-Rev-A1";
 436                 else
 437                         return "MV88F6282-Rev-Unsupported";
 438         } else {
 439                 return "Device-Unknown";
 440         }
 441 }
 442
 443 static void __init kirkwood_l2_init(void)
 444 {
 445 #ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
 446         writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
 447         feroceon_l2_init(1);
 448 #else
 449         writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
 450         feroceon_l2_init(0);
 451 #endif
 452 }
 453
 454 void __init kirkwood_init(void)
 455 {
 456         printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
 457                 kirkwood_id(), kirkwood_tclk);
 458         kirkwood_i2s_data.tclk = kirkwood_tclk;
 459
 460         /*
 461          * Disable propagation of mbus errors to the CPU local bus,
 462          * as this causes mbus errors (which can occur for example
 463          * for PCI aborts) to throw CPU aborts, which we're not set
 464          * up to deal with.
 465          */
 466         writel(readl(CPU_CONFIG) & ~CPU_CONFIG_ERROR_PROP, CPU_CONFIG);
 467
 468         kirkwood_setup_cpu_mbus();
 469
 470 #ifdef CONFIG_CACHE_FEROCEON_L2
 471         kirkwood_l2_init();
 472 #endif
 473
 474         /* internal devices that every board has */
 475         kirkwood_rtc_init();
 476         kirkwood_wdt_init();
 477         kirkwood_xor0_init();
 478         kirkwood_xor1_init();
 479         kirkwood_crypto_init();
 480
 481 #ifdef CONFIG_KEXEC
 482         kexec_reinit = kirkwood_enable_pcie;
 483 #endif
 484 }
 485
 486 static int __init kirkwood_clock_gate(void)
 487 {
 488         unsigned int curr = readl(CLOCK_GATING_CTRL);
 489         u32 dev, rev;
 490
 491         kirkwood_pcie_id(&dev, &rev);
 492         printk(KERN_DEBUG "Gating clock of unused units\n");
 493         printk(KERN_DEBUG "before: 0x%08x\n", curr);
 494
 495         /* Make sure those units are accessible */
 496         writel(curr | CGC_SATA0 | CGC_SATA1 | CGC_PEX0 | CGC_PEX1, CLOCK_GATING_CTRL);
 497
 498         /* For SATA: first shutdown the phy */
 499         if (!(kirkwood_clk_ctrl & CGC_SATA0)) {
 500                 /* Disable PLL and IVREF */
 501                 writel(readl(SATA0_PHY_MODE_2) & ~0xf, SATA0_PHY_MODE_2);
 502                 /* Disable PHY */
 503                 writel(readl(SATA0_IF_CTRL) | 0x200, SATA0_IF_CTRL);
 504         }
 505         if (!(kirkwood_clk_ctrl & CGC_SATA1)) {
 506                 /* Disable PLL and IVREF */
 507                 writel(readl(SATA1_PHY_MODE_2) & ~0xf, SATA1_PHY_MODE_2);
 508                 /* Disable PHY */
 509                 writel(readl(SATA1_IF_CTRL) | 0x200, SATA1_IF_CTRL);
 510         }
 511
 512         /* For PCIe: first shutdown the phy */
 513         if (!(kirkwood_clk_ctrl & CGC_PEX0)) {
 514                 writel(readl(PCIE_LINK_CTRL) | 0x10, PCIE_LINK_CTRL);
 515                 while (1)
 516                         if (readl(PCIE_STATUS) & 0x1)
 517                                 break;
 518                 writel(readl(PCIE_LINK_CTRL) & ~0x10, PCIE_LINK_CTRL);
 519         }
 520
 521         /* For PCIe 1: first shutdown the phy */
 522         if (dev == MV88F6282_DEV_ID) {
 523                 if (!(kirkwood_clk_ctrl & CGC_PEX1)) {
 524                         writel(readl(PCIE1_LINK_CTRL) | 0x10, PCIE1_LINK_CTRL);
 525                         while (1)
 526                                 if (readl(PCIE1_STATUS) & 0x1)
 527                                         break;
 528                         writel(readl(PCIE1_LINK_CTRL) & ~0x10, PCIE1_LINK_CTRL);
 529                 }
 530         } else  /* keep this bit set for devices that don't have PCIe1 */
 531                 kirkwood_clk_ctrl |= CGC_PEX1;
 532
 533         /* Now gate clock the required units */
 534         writel(kirkwood_clk_ctrl, CLOCK_GATING_CTRL);
 535         printk(KERN_DEBUG " after: 0x%08x\n", readl(CLOCK_GATING_CTRL));
 536
 537         return 0;
 538 }
 539 late_initcall(kirkwood_clock_gate);