drivers/net/ethernet/intel/ixgbe/ixgbe.h

   1 /*******************************************************************************
   2
   3   Intel 10 Gigabit PCI Express Linux driver
   4   Copyright(c) 1999 - 2016 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   Linux NICS <linux.nics@intel.com>
  24   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  25   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  26
  27 *******************************************************************************/
  28
  29 #ifndef _IXGBE_H_
  30 #define _IXGBE_H_
  31
  32 #include <linux/bitops.h>
  33 #include <linux/types.h>
  34 #include <linux/pci.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/cpumask.h>
  37 #include <linux/aer.h>
  38 #include <linux/if_vlan.h>
  39 #include <linux/jiffies.h>
  40
  41 #include <linux/timecounter.h>
  42 #include <linux/net_tstamp.h>
  43 #include <linux/ptp_clock_kernel.h>
  44
  45 #include "ixgbe_type.h"
  46 #include "ixgbe_common.h"
  47 #include "ixgbe_dcb.h"
  48 #if IS_ENABLED(CONFIG_FCOE)
  49 #define IXGBE_FCOE
  50 #include "ixgbe_fcoe.h"
  51 #endif /* IS_ENABLED(CONFIG_FCOE) */
  52 #ifdef CONFIG_IXGBE_DCA
  53 #include <linux/dca.h>
  54 #endif
  55
  56 #include <net/busy_poll.h>
  57
  58 /* common prefix used by pr_<> macros */
  59 #undef pr_fmt
  60 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  61
  62 /* TX/RX descriptor defines */
  63 #define IXGBE_DEFAULT_TXD                   512
  64 #define IXGBE_DEFAULT_TX_WORK               256
  65 #define IXGBE_MAX_TXD                      4096
  66 #define IXGBE_MIN_TXD                        64
  67
  68 #if (PAGE_SIZE < 8192)
  69 #define IXGBE_DEFAULT_RXD                   512
  70 #else
  71 #define IXGBE_DEFAULT_RXD                   128
  72 #endif
  73 #define IXGBE_MAX_RXD                      4096
  74 #define IXGBE_MIN_RXD                        64
  75
  76 #define IXGBE_ETH_P_LLDP                 0x88CC
  77
  78 /* flow control */
  79 #define IXGBE_MIN_FCRTL                    0x40
  80 #define IXGBE_MAX_FCRTL                 0x7FF80
  81 #define IXGBE_MIN_FCRTH                   0x600
  82 #define IXGBE_MAX_FCRTH                 0x7FFF0
  83 #define IXGBE_DEFAULT_FCPAUSE            0xFFFF
  84 #define IXGBE_MIN_FCPAUSE                     0
  85 #define IXGBE_MAX_FCPAUSE                0xFFFF
  86
  87 /* Supported Rx Buffer Sizes */
  88 #define IXGBE_RXBUFFER_256    256  /* Used for skb receive header */
  89 #define IXGBE_RXBUFFER_2K    2048
  90 #define IXGBE_RXBUFFER_3K    3072
  91 #define IXGBE_RXBUFFER_4K    4096
  92 #define IXGBE_MAX_RXBUFFER  16384  /* largest size for a single descriptor */
  93
  94 /*
  95  * NOTE: netdev_alloc_skb reserves up to 64 bytes, NET_IP_ALIGN means we
  96  * reserve 64 more, and skb_shared_info adds an additional 320 bytes more,
  97  * this adds up to 448 bytes of extra data.
  98  *
  99  * Since netdev_alloc_skb now allocates a page fragment we can use a value
 100  * of 256 and the resultant skb will have a truesize of 960 or less.
 101  */
 102 #define IXGBE_RX_HDR_SIZE IXGBE_RXBUFFER_256
 103
 104 /* How many Rx Buffers do we bundle into one write to the hardware ? */
 105 #define IXGBE_RX_BUFFER_WRITE   16      /* Must be power of 2 */
 106
 107 enum ixgbe_tx_flags {
 108         /* cmd_type flags */
 109         IXGBE_TX_FLAGS_HW_VLAN  = 0x01,
 110         IXGBE_TX_FLAGS_TSO      = 0x02,
 111         IXGBE_TX_FLAGS_TSTAMP   = 0x04,
 112
 113         /* olinfo flags */
 114         IXGBE_TX_FLAGS_CC       = 0x08,
 115         IXGBE_TX_FLAGS_IPV4     = 0x10,
 116         IXGBE_TX_FLAGS_CSUM     = 0x20,
 117
 118         /* software defined flags */
 119         IXGBE_TX_FLAGS_SW_VLAN  = 0x40,
 120         IXGBE_TX_FLAGS_FCOE     = 0x80,
 121 };
 122
 123 /* VLAN info */
 124 #define IXGBE_TX_FLAGS_VLAN_MASK        0xffff0000
 125 #define IXGBE_TX_FLAGS_VLAN_PRIO_MASK   0xe0000000
 126 #define IXGBE_TX_FLAGS_VLAN_PRIO_SHIFT  29
 127 #define IXGBE_TX_FLAGS_VLAN_SHIFT       16
 128
 129 #define IXGBE_MAX_VF_MC_ENTRIES         30
 130 #define IXGBE_MAX_VF_FUNCTIONS          64
 131 #define IXGBE_MAX_VFTA_ENTRIES          128
 132 #define MAX_EMULATION_MAC_ADDRS         16
 133 #define IXGBE_MAX_PF_MACVLANS           15
 134 #define VMDQ_P(p)   ((p) + adapter->ring_feature[RING_F_VMDQ].offset)
 135 #define IXGBE_82599_VF_DEVICE_ID        0x10ED
 136 #define IXGBE_X540_VF_DEVICE_ID         0x1515
 137
 138 struct vf_data_storage {
 139         struct pci_dev *vfdev;
 140         unsigned char vf_mac_addresses[ETH_ALEN];
 141         u16 vf_mc_hashes[IXGBE_MAX_VF_MC_ENTRIES];
 142         u16 num_vf_mc_hashes;
 143         bool clear_to_send;
 144         bool pf_set_mac;
 145         u16 pf_vlan; /* When set, guest VLAN config not allowed. */
 146         u16 pf_qos;
 147         u16 tx_rate;
 148         u8 spoofchk_enabled;
 149         bool rss_query_enabled;
 150         u8 trusted;
 151         int xcast_mode;
 152         unsigned int vf_api;
 153 };
 154
 155 enum ixgbevf_xcast_modes {
 156         IXGBEVF_XCAST_MODE_NONE = 0,
 157         IXGBEVF_XCAST_MODE_MULTI,
 158         IXGBEVF_XCAST_MODE_ALLMULTI,
 159         IXGBEVF_XCAST_MODE_PROMISC,
 160 };
 161
 162 struct vf_macvlans {
 163         struct list_head l;
 164         int vf;
 165         bool free;
 166         bool is_macvlan;
 167         u8 vf_macvlan[ETH_ALEN];
 168 };
 169
 170 #define IXGBE_MAX_TXD_PWR       14
 171 #define IXGBE_MAX_DATA_PER_TXD  (1u << IXGBE_MAX_TXD_PWR)
 172
 173 /* Tx Descriptors needed, worst case */
 174 #define TXD_USE_COUNT(S) DIV_ROUND_UP((S), IXGBE_MAX_DATA_PER_TXD)
 175 #define DESC_NEEDED (MAX_SKB_FRAGS + 4)
 176
 177 /* wrapper around a pointer to a socket buffer,
 178  * so a DMA handle can be stored along with the buffer */
 179 struct ixgbe_tx_buffer {
 180         union ixgbe_adv_tx_desc *next_to_watch;
 181         unsigned long time_stamp;
 182         struct sk_buff *skb;
 183         unsigned int bytecount;
 184         unsigned short gso_segs;
 185         __be16 protocol;
 186         DEFINE_DMA_UNMAP_ADDR(dma);
 187         DEFINE_DMA_UNMAP_LEN(len);
 188         u32 tx_flags;
 189 };
 190
 191 struct ixgbe_rx_buffer {
 192         struct sk_buff *skb;
 193         dma_addr_t dma;
 194         struct page *page;
 195         unsigned int page_offset;
 196 };
 197
 198 struct ixgbe_queue_stats {
 199         u64 packets;
 200         u64 bytes;
 201 };
 202
 203 struct ixgbe_tx_queue_stats {
 204         u64 restart_queue;
 205         u64 tx_busy;
 206         u64 tx_done_old;
 207 };
 208
 209 struct ixgbe_rx_queue_stats {
 210         u64 rsc_count;
 211         u64 rsc_flush;
 212         u64 non_eop_descs;
 213         u64 alloc_rx_page_failed;
 214         u64 alloc_rx_buff_failed;
 215         u64 csum_err;
 216 };
 217
 218 #define IXGBE_TS_HDR_LEN 8
 219
 220 enum ixgbe_ring_state_t {
 221         __IXGBE_TX_FDIR_INIT_DONE,
 222         __IXGBE_TX_XPS_INIT_DONE,
 223         __IXGBE_TX_DETECT_HANG,
 224         __IXGBE_HANG_CHECK_ARMED,
 225         __IXGBE_RX_RSC_ENABLED,
 226         __IXGBE_RX_CSUM_UDP_ZERO_ERR,
 227         __IXGBE_RX_FCOE,
 228 };
 229
 230 struct ixgbe_fwd_adapter {
 231         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 232         struct net_device *netdev;
 233         struct ixgbe_adapter *real_adapter;
 234         unsigned int tx_base_queue;
 235         unsigned int rx_base_queue;
 236         int pool;
 237 };
 238
 239 #define check_for_tx_hang(ring) \
 240         test_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
 241 #define set_check_for_tx_hang(ring) \
 242         set_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
 243 #define clear_check_for_tx_hang(ring) \
 244         clear_bit(__IXGBE_TX_DETECT_HANG, &(ring)->state)
 245 #define ring_is_rsc_enabled(ring) \
 246         test_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
 247 #define set_ring_rsc_enabled(ring) \
 248         set_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
 249 #define clear_ring_rsc_enabled(ring) \
 250         clear_bit(__IXGBE_RX_RSC_ENABLED, &(ring)->state)
 251 struct ixgbe_ring {
 252         struct ixgbe_ring *next;        /* pointer to next ring in q_vector */
 253         struct ixgbe_q_vector *q_vector; /* backpointer to host q_vector */
 254         struct net_device *netdev;      /* netdev ring belongs to */
 255         struct device *dev;             /* device for DMA mapping */
 256         struct ixgbe_fwd_adapter *l2_accel_priv;
 257         void *desc;                     /* descriptor ring memory */
 258         union {
 259                 struct ixgbe_tx_buffer *tx_buffer_info;
 260                 struct ixgbe_rx_buffer *rx_buffer_info;
 261         };
 262         unsigned long state;
 263         u8 __iomem *tail;
 264         dma_addr_t dma;                 /* phys. address of descriptor ring */
 265         unsigned int size;              /* length in bytes */
 266
 267         u16 count;                      /* amount of descriptors */
 268
 269         u8 queue_index; /* needed for multiqueue queue management */
 270         u8 reg_idx;                     /* holds the special value that gets
 271                                          * the hardware register offset
 272                                          * associated with this ring, which is
 273                                          * different for DCB and RSS modes
 274                                          */
 275         u16 next_to_use;
 276         u16 next_to_clean;
 277
 278         unsigned long last_rx_timestamp;
 279
 280         union {
 281                 u16 next_to_alloc;
 282                 struct {
 283                         u8 atr_sample_rate;
 284                         u8 atr_count;
 285                 };
 286         };
 287
 288         u8 dcb_tc;
 289         struct ixgbe_queue_stats stats;
 290         struct u64_stats_sync syncp;
 291         union {
 292                 struct ixgbe_tx_queue_stats tx_stats;
 293                 struct ixgbe_rx_queue_stats rx_stats;
 294         };
 295 } ____cacheline_internodealigned_in_smp;
 296
 297 enum ixgbe_ring_f_enum {
 298         RING_F_NONE = 0,
 299         RING_F_VMDQ,  /* SR-IOV uses the same ring feature */
 300         RING_F_RSS,
 301         RING_F_FDIR,
 302 #ifdef IXGBE_FCOE
 303         RING_F_FCOE,
 304 #endif /* IXGBE_FCOE */
 305
 306         RING_F_ARRAY_SIZE      /* must be last in enum set */
 307 };
 308
 309 #define IXGBE_MAX_RSS_INDICES           16
 310 #define IXGBE_MAX_RSS_INDICES_X550      63
 311 #define IXGBE_MAX_VMDQ_INDICES          64
 312 #define IXGBE_MAX_FDIR_INDICES          63      /* based on q_vector limit */
 313 #define IXGBE_MAX_FCOE_INDICES          8
 314 #define MAX_RX_QUEUES                   (IXGBE_MAX_FDIR_INDICES + 1)
 315 #define MAX_TX_QUEUES                   (IXGBE_MAX_FDIR_INDICES + 1)
 316 #define IXGBE_MAX_L2A_QUEUES            4
 317 #define IXGBE_BAD_L2A_QUEUE             3
 318 #define IXGBE_MAX_MACVLANS              31
 319 #define IXGBE_MAX_DCBMACVLANS           8
 320
 321 struct ixgbe_ring_feature {
 322         u16 limit;      /* upper limit on feature indices */
 323         u16 indices;    /* current value of indices */
 324         u16 mask;       /* Mask used for feature to ring mapping */
 325         u16 offset;     /* offset to start of feature */
 326 } ____cacheline_internodealigned_in_smp;
 327
 328 #define IXGBE_82599_VMDQ_8Q_MASK 0x78
 329 #define IXGBE_82599_VMDQ_4Q_MASK 0x7C
 330 #define IXGBE_82599_VMDQ_2Q_MASK 0x7E
 331
 332 /*
 333  * FCoE requires that all Rx buffers be over 2200 bytes in length.  Since
 334  * this is twice the size of a half page we need to double the page order
 335  * for FCoE enabled Rx queues.
 336  */
 337 static inline unsigned int ixgbe_rx_bufsz(struct ixgbe_ring *ring)
 338 {
 339 #ifdef IXGBE_FCOE
 340         if (test_bit(__IXGBE_RX_FCOE, &ring->state))
 341                 return (PAGE_SIZE < 8192) ? IXGBE_RXBUFFER_4K :
 342                                             IXGBE_RXBUFFER_3K;
 343 #endif
 344         return IXGBE_RXBUFFER_2K;
 345 }
 346
 347 static inline unsigned int ixgbe_rx_pg_order(struct ixgbe_ring *ring)
 348 {
 349 #ifdef IXGBE_FCOE
 350         if (test_bit(__IXGBE_RX_FCOE, &ring->state))
 351                 return (PAGE_SIZE < 8192) ? 1 : 0;
 352 #endif
 353         return 0;
 354 }
 355 #define ixgbe_rx_pg_size(_ring) (PAGE_SIZE << ixgbe_rx_pg_order(_ring))
 356
 357 struct ixgbe_ring_container {
 358         struct ixgbe_ring *ring;        /* pointer to linked list of rings */
 359         unsigned int total_bytes;       /* total bytes processed this int */
 360         unsigned int total_packets;     /* total packets processed this int */
 361         u16 work_limit;                 /* total work allowed per interrupt */
 362         u8 count;                       /* total number of rings in vector */
 363         u8 itr;                         /* current ITR setting for ring */
 364 };
 365
 366 /* iterator for handling rings in ring container */
 367 #define ixgbe_for_each_ring(pos, head) \
 368         for (pos = (head).ring; pos != NULL; pos = pos->next)
 369
 370 #define MAX_RX_PACKET_BUFFERS ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) \
 371                               ? 8 : 1)
 372 #define MAX_TX_PACKET_BUFFERS MAX_RX_PACKET_BUFFERS
 373
 374 /* MAX_Q_VECTORS of these are allocated,
 375  * but we only use one per queue-specific vector.
 376  */
 377 struct ixgbe_q_vector {
 378         struct ixgbe_adapter *adapter;
 379 #ifdef CONFIG_IXGBE_DCA
 380         int cpu;            /* CPU for DCA */
 381 #endif
 382         u16 v_idx;              /* index of q_vector within array, also used for
 383                                  * finding the bit in EICR and friends that
 384                                  * represents the vector for this ring */
 385         u16 itr;                /* Interrupt throttle rate written to EITR */
 386         struct ixgbe_ring_container rx, tx;
 387
 388         struct napi_struct napi;
 389         cpumask_t affinity_mask;
 390         int numa_node;
 391         struct rcu_head rcu;    /* to avoid race with update stats on free */
 392         char name[IFNAMSIZ + 9];
 393
 394         /* for dynamic allocation of rings associated with this q_vector */
 395         struct ixgbe_ring ring[0] ____cacheline_internodealigned_in_smp;
 396 };
 397
 398 #ifdef CONFIG_IXGBE_HWMON
 399
 400 #define IXGBE_HWMON_TYPE_LOC            0
 401 #define IXGBE_HWMON_TYPE_TEMP           1
 402 #define IXGBE_HWMON_TYPE_CAUTION        2
 403 #define IXGBE_HWMON_TYPE_MAX            3
 404
 405 struct hwmon_attr {
 406         struct device_attribute dev_attr;
 407         struct ixgbe_hw *hw;
 408         struct ixgbe_thermal_diode_data *sensor;
 409         char name[12];
 410 };
 411
 412 struct hwmon_buff {
 413         struct attribute_group group;
 414         const struct attribute_group *groups[2];
 415         struct attribute *attrs[IXGBE_MAX_SENSORS * 4 + 1];
 416         struct hwmon_attr hwmon_list[IXGBE_MAX_SENSORS * 4];
 417         unsigned int n_hwmon;
 418 };
 419 #endif /* CONFIG_IXGBE_HWMON */
 420
 421 /*
 422  * microsecond values for various ITR rates shifted by 2 to fit itr register
 423  * with the first 3 bits reserved 0
 424  */
 425 #define IXGBE_MIN_RSC_ITR       24
 426 #define IXGBE_100K_ITR          40
 427 #define IXGBE_20K_ITR           200
 428 #define IXGBE_12K_ITR           336
 429
 430 /* ixgbe_test_staterr - tests bits in Rx descriptor status and error fields */
 431 static inline __le32 ixgbe_test_staterr(union ixgbe_adv_rx_desc *rx_desc,
 432                                         const u32 stat_err_bits)
 433 {
 434         return rx_desc->wb.upper.status_error & cpu_to_le32(stat_err_bits);
 435 }
 436
 437 static inline u16 ixgbe_desc_unused(struct ixgbe_ring *ring)
 438 {
 439         u16 ntc = ring->next_to_clean;
 440         u16 ntu = ring->next_to_use;
 441
 442         return ((ntc > ntu) ? 0 : ring->count) + ntc - ntu - 1;
 443 }
 444
 445 #define IXGBE_RX_DESC(R, i)         \
 446         (&(((union ixgbe_adv_rx_desc *)((R)->desc))[i]))
 447 #define IXGBE_TX_DESC(R, i)         \
 448         (&(((union ixgbe_adv_tx_desc *)((R)->desc))[i]))
 449 #define IXGBE_TX_CTXTDESC(R, i)     \
 450         (&(((struct ixgbe_adv_tx_context_desc *)((R)->desc))[i]))
 451
 452 #define IXGBE_MAX_JUMBO_FRAME_SIZE      9728 /* Maximum Supported Size 9.5KB */
 453 #ifdef IXGBE_FCOE
 454 /* Use 3K as the baby jumbo frame size for FCoE */
 455 #define IXGBE_FCOE_JUMBO_FRAME_SIZE       3072
 456 #endif /* IXGBE_FCOE */
 457
 458 #define OTHER_VECTOR 1
 459 #define NON_Q_VECTORS (OTHER_VECTOR)
 460
 461 #define MAX_MSIX_VECTORS_82599 64
 462 #define MAX_Q_VECTORS_82599 64
 463 #define MAX_MSIX_VECTORS_82598 18
 464 #define MAX_Q_VECTORS_82598 16
 465
 466 struct ixgbe_mac_addr {
 467         u8 addr[ETH_ALEN];
 468         u16 pool;
 469         u16 state; /* bitmask */
 470 };
 471
 472 #define IXGBE_MAC_STATE_DEFAULT         0x1
 473 #define IXGBE_MAC_STATE_MODIFIED        0x2
 474 #define IXGBE_MAC_STATE_IN_USE          0x4
 475
 476 #define MAX_Q_VECTORS MAX_Q_VECTORS_82599
 477 #define MAX_MSIX_COUNT MAX_MSIX_VECTORS_82599
 478
 479 #define MIN_MSIX_Q_VECTORS 1
 480 #define MIN_MSIX_COUNT (MIN_MSIX_Q_VECTORS + NON_Q_VECTORS)
 481
 482 /* default to trying for four seconds */
 483 #define IXGBE_TRY_LINK_TIMEOUT (4 * HZ)
 484 #define IXGBE_SFP_POLL_JIFFIES (2 * HZ) /* SFP poll every 2 seconds */
 485
 486 /* board specific private data structure */
 487 struct ixgbe_adapter {
 488         unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
 489         /* OS defined structs */
 490         struct net_device *netdev;
 491         struct pci_dev *pdev;
 492
 493         unsigned long state;
 494
 495         /* Some features need tri-state capability,
 496          * thus the additional *_CAPABLE flags.
 497          */
 498         u32 flags;
 499 #define IXGBE_FLAG_MSI_ENABLED                  BIT(1)
 500 #define IXGBE_FLAG_MSIX_ENABLED                 BIT(3)
 501 #define IXGBE_FLAG_RX_1BUF_CAPABLE              BIT(4)
 502 #define IXGBE_FLAG_RX_PS_CAPABLE                BIT(5)
 503 #define IXGBE_FLAG_RX_PS_ENABLED                BIT(6)
 504 #define IXGBE_FLAG_DCA_ENABLED                  BIT(8)
 505 #define IXGBE_FLAG_DCA_CAPABLE                  BIT(9)
 506 #define IXGBE_FLAG_IMIR_ENABLED                 BIT(10)
 507 #define IXGBE_FLAG_MQ_CAPABLE                   BIT(11)
 508 #define IXGBE_FLAG_DCB_ENABLED                  BIT(12)
 509 #define IXGBE_FLAG_VMDQ_CAPABLE                 BIT(13)
 510 #define IXGBE_FLAG_VMDQ_ENABLED                 BIT(14)
 511 #define IXGBE_FLAG_FAN_FAIL_CAPABLE             BIT(15)
 512 #define IXGBE_FLAG_NEED_LINK_UPDATE             BIT(16)
 513 #define IXGBE_FLAG_NEED_LINK_CONFIG             BIT(17)
 514 #define IXGBE_FLAG_FDIR_HASH_CAPABLE            BIT(18)
 515 #define IXGBE_FLAG_FDIR_PERFECT_CAPABLE         BIT(19)
 516 #define IXGBE_FLAG_FCOE_CAPABLE                 BIT(20)
 517 #define IXGBE_FLAG_FCOE_ENABLED                 BIT(21)
 518 #define IXGBE_FLAG_SRIOV_CAPABLE                BIT(22)
 519 #define IXGBE_FLAG_SRIOV_ENABLED                BIT(23)
 520 #define IXGBE_FLAG_VXLAN_OFFLOAD_CAPABLE        BIT(24)
 521 #define IXGBE_FLAG_RX_HWTSTAMP_ENABLED          BIT(25)
 522 #define IXGBE_FLAG_RX_HWTSTAMP_IN_REGISTER      BIT(26)
 523 #define IXGBE_FLAG_DCB_CAPABLE                  BIT(27)
 524 #define IXGBE_FLAG_GENEVE_OFFLOAD_CAPABLE       BIT(28)
 525
 526         u32 flags2;
 527 #define IXGBE_FLAG2_RSC_CAPABLE                 BIT(0)
 528 #define IXGBE_FLAG2_RSC_ENABLED                 BIT(1)
 529 #define IXGBE_FLAG2_TEMP_SENSOR_CAPABLE         BIT(2)
 530 #define IXGBE_FLAG2_TEMP_SENSOR_EVENT           BIT(3)
 531 #define IXGBE_FLAG2_SEARCH_FOR_SFP              BIT(4)
 532 #define IXGBE_FLAG2_SFP_NEEDS_RESET             BIT(5)
 533 #define IXGBE_FLAG2_FDIR_REQUIRES_REINIT        BIT(7)
 534 #define IXGBE_FLAG2_RSS_FIELD_IPV4_UDP          BIT(8)
 535 #define IXGBE_FLAG2_RSS_FIELD_IPV6_UDP          BIT(9)
 536 #define IXGBE_FLAG2_PTP_PPS_ENABLED             BIT(10)
 537 #define IXGBE_FLAG2_PHY_INTERRUPT               BIT(11)
 538 #define IXGBE_FLAG2_UDP_TUN_REREG_NEEDED        BIT(12)
 539 #define IXGBE_FLAG2_VLAN_PROMISC                BIT(13)
 540 #define IXGBE_FLAG2_EEE_CAPABLE                 BIT(14)
 541 #define IXGBE_FLAG2_EEE_ENABLED                 BIT(15)
 542
 543         /* Tx fast path data */
 544         int num_tx_queues;
 545         u16 tx_itr_setting;
 546         u16 tx_work_limit;
 547
 548         /* Rx fast path data */
 549         int num_rx_queues;
 550         u16 rx_itr_setting;
 551
 552         /* Port number used to identify VXLAN traffic */
 553         __be16 vxlan_port;
 554         __be16 geneve_port;
 555
 556         /* TX */
 557         struct ixgbe_ring *tx_ring[MAX_TX_QUEUES] ____cacheline_aligned_in_smp;
 558
 559         u64 restart_queue;
 560         u64 lsc_int;
 561         u32 tx_timeout_count;
 562
 563         /* RX */
 564         struct ixgbe_ring *rx_ring[MAX_RX_QUEUES];
 565         int num_rx_pools;               /* == num_rx_queues in 82598 */
 566         int num_rx_queues_per_pool;     /* 1 if 82598, can be many if 82599 */
 567         u64 hw_csum_rx_error;
 568         u64 hw_rx_no_dma_resources;
 569         u64 rsc_total_count;
 570         u64 rsc_total_flush;
 571         u64 non_eop_descs;
 572         u32 alloc_rx_page_failed;
 573         u32 alloc_rx_buff_failed;
 574
 575         struct ixgbe_q_vector *q_vector[MAX_Q_VECTORS];
 576
 577         /* DCB parameters */
 578         struct ieee_pfc *ixgbe_ieee_pfc;
 579         struct ieee_ets *ixgbe_ieee_ets;
 580         struct ixgbe_dcb_config dcb_cfg;
 581         struct ixgbe_dcb_config temp_dcb_cfg;
 582         u8 dcb_set_bitmap;
 583         u8 dcbx_cap;
 584         enum ixgbe_fc_mode last_lfc_mode;
 585
 586         int num_q_vectors;      /* current number of q_vectors for device */
 587         int max_q_vectors;      /* true count of q_vectors for device */
 588         struct ixgbe_ring_feature ring_feature[RING_F_ARRAY_SIZE];
 589         struct msix_entry *msix_entries;
 590
 591         u32 test_icr;
 592         struct ixgbe_ring test_tx_ring;
 593         struct ixgbe_ring test_rx_ring;
 594
 595         /* structs defined in ixgbe_hw.h */
 596         struct ixgbe_hw hw;
 597         u16 msg_enable;
 598         struct ixgbe_hw_stats stats;
 599
 600         u64 tx_busy;
 601         unsigned int tx_ring_count;
 602         unsigned int rx_ring_count;
 603
 604         u32 link_speed;
 605         bool link_up;
 606         unsigned long sfp_poll_time;
 607         unsigned long link_check_timeout;
 608
 609         struct timer_list service_timer;
 610         struct work_struct service_task;
 611
 612         struct hlist_head fdir_filter_list;
 613         unsigned long fdir_overflow; /* number of times ATR was backed off */
 614         union ixgbe_atr_input fdir_mask;
 615         int fdir_filter_count;
 616         u32 fdir_pballoc;
 617         u32 atr_sample_rate;
 618         spinlock_t fdir_perfect_lock;
 619
 620 #ifdef IXGBE_FCOE
 621         struct ixgbe_fcoe fcoe;
 622 #endif /* IXGBE_FCOE */
 623         u8 __iomem *io_addr; /* Mainly for iounmap use */
 624         u32 wol;
 625
 626         u16 bridge_mode;
 627
 628         u16 eeprom_verh;
 629         u16 eeprom_verl;
 630         u16 eeprom_cap;
 631
 632         u32 interrupt_event;
 633         u32 led_reg;
 634
 635         struct ptp_clock *ptp_clock;
 636         struct ptp_clock_info ptp_caps;
 637         struct work_struct ptp_tx_work;
 638         struct sk_buff *ptp_tx_skb;
 639         struct hwtstamp_config tstamp_config;
 640         unsigned long ptp_tx_start;
 641         unsigned long last_overflow_check;
 642         unsigned long last_rx_ptp_check;
 643         unsigned long last_rx_timestamp;
 644         spinlock_t tmreg_lock;
 645         struct cyclecounter hw_cc;
 646         struct timecounter hw_tc;
 647         u32 base_incval;
 648         u32 tx_hwtstamp_timeouts;
 649         u32 rx_hwtstamp_cleared;
 650         void (*ptp_setup_sdp)(struct ixgbe_adapter *);
 651
 652         /* SR-IOV */
 653         DECLARE_BITMAP(active_vfs, IXGBE_MAX_VF_FUNCTIONS);
 654         unsigned int num_vfs;
 655         struct vf_data_storage *vfinfo;
 656         int vf_rate_link_speed;
 657         struct vf_macvlans vf_mvs;
 658         struct vf_macvlans *mv_list;
 659
 660         u32 timer_event_accumulator;
 661         u32 vferr_refcount;
 662         struct ixgbe_mac_addr *mac_table;
 663         struct kobject *info_kobj;
 664 #ifdef CONFIG_IXGBE_HWMON
 665         struct hwmon_buff *ixgbe_hwmon_buff;
 666 #endif /* CONFIG_IXGBE_HWMON */
 667 #ifdef CONFIG_DEBUG_FS
 668         struct dentry *ixgbe_dbg_adapter;
 669 #endif /*CONFIG_DEBUG_FS*/
 670
 671         u8 default_up;
 672         unsigned long fwd_bitmask; /* Bitmask indicating in use pools */
 673
 674 #define IXGBE_MAX_LINK_HANDLE 10
 675         struct ixgbe_jump_table *jump_tables[IXGBE_MAX_LINK_HANDLE];
 676         unsigned long tables;
 677
 678 /* maximum number of RETA entries among all devices supported by ixgbe
 679  * driver: currently it's x550 device in non-SRIOV mode
 680  */
 681 #define IXGBE_MAX_RETA_ENTRIES 512
 682         u8 rss_indir_tbl[IXGBE_MAX_RETA_ENTRIES];
 683
 684 #define IXGBE_RSS_KEY_SIZE     40  /* size of RSS Hash Key in bytes */
 685         u32 rss_key[IXGBE_RSS_KEY_SIZE / sizeof(u32)];
 686 };
 687
 688 static inline u8 ixgbe_max_rss_indices(struct ixgbe_adapter *adapter)
 689 {
 690         switch (adapter->hw.mac.type) {
 691         case ixgbe_mac_82598EB:
 692         case ixgbe_mac_82599EB:
 693         case ixgbe_mac_X540:
 694                 return IXGBE_MAX_RSS_INDICES;
 695         case ixgbe_mac_X550:
 696         case ixgbe_mac_X550EM_x:
 697         case ixgbe_mac_x550em_a:
 698                 return IXGBE_MAX_RSS_INDICES_X550;
 699         default:
 700                 return 0;
 701         }
 702 }
 703
 704 struct ixgbe_fdir_filter {
 705         struct hlist_node fdir_node;
 706         union ixgbe_atr_input filter;
 707         u16 sw_idx;
 708         u64 action;
 709 };
 710
 711 enum ixgbe_state_t {
 712         __IXGBE_TESTING,
 713         __IXGBE_RESETTING,
 714         __IXGBE_DOWN,
 715         __IXGBE_DISABLED,
 716         __IXGBE_REMOVING,
 717         __IXGBE_SERVICE_SCHED,
 718         __IXGBE_SERVICE_INITED,
 719         __IXGBE_IN_SFP_INIT,
 720         __IXGBE_PTP_RUNNING,
 721         __IXGBE_PTP_TX_IN_PROGRESS,
 722         __IXGBE_RESET_REQUESTED,
 723 };
 724
 725 struct ixgbe_cb {
 726         union {                         /* Union defining head/tail partner */
 727                 struct sk_buff *head;
 728                 struct sk_buff *tail;
 729         };
 730         dma_addr_t dma;
 731         u16 append_cnt;
 732         bool page_released;
 733 };
 734 #define IXGBE_CB(skb) ((struct ixgbe_cb *)(skb)->cb)
 735
 736 enum ixgbe_boards {
 737         board_82598,
 738         board_82599,
 739         board_X540,
 740         board_X550,
 741         board_X550EM_x,
 742         board_x550em_a,
 743         board_x550em_a_fw,
 744 };
 745
 746 extern const struct ixgbe_info ixgbe_82598_info;
 747 extern const struct ixgbe_info ixgbe_82599_info;
 748 extern const struct ixgbe_info ixgbe_X540_info;
 749 extern const struct ixgbe_info ixgbe_X550_info;
 750 extern const struct ixgbe_info ixgbe_X550EM_x_info;
 751 extern const struct ixgbe_info ixgbe_x550em_a_info;
 752 extern const struct ixgbe_info ixgbe_x550em_a_fw_info;
 753 #ifdef CONFIG_IXGBE_DCB
 754 extern const struct dcbnl_rtnl_ops ixgbe_dcbnl_ops;
 755 #endif
 756
 757 extern char ixgbe_driver_name[];
 758 extern const char ixgbe_driver_version[];
 759 #ifdef IXGBE_FCOE
 760 extern char ixgbe_default_device_descr[];
 761 #endif /* IXGBE_FCOE */
 762
 763 int ixgbe_open(struct net_device *netdev);
 764 int ixgbe_close(struct net_device *netdev);
 765 void ixgbe_up(struct ixgbe_adapter *adapter);
 766 void ixgbe_down(struct ixgbe_adapter *adapter);
 767 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter);
 768 void ixgbe_reset(struct ixgbe_adapter *adapter);
 769 void ixgbe_set_ethtool_ops(struct net_device *netdev);
 770 int ixgbe_setup_rx_resources(struct ixgbe_ring *);
 771 int ixgbe_setup_tx_resources(struct ixgbe_ring *);
 772 void ixgbe_free_rx_resources(struct ixgbe_ring *);
 773 void ixgbe_free_tx_resources(struct ixgbe_ring *);
 774 void ixgbe_configure_rx_ring(struct ixgbe_adapter *, struct ixgbe_ring *);
 775 void ixgbe_configure_tx_ring(struct ixgbe_adapter *, struct ixgbe_ring *);
 776 void ixgbe_disable_rx_queue(struct ixgbe_adapter *adapter, struct ixgbe_ring *);
 777 void ixgbe_update_stats(struct ixgbe_adapter *adapter);
 778 int ixgbe_init_interrupt_scheme(struct ixgbe_adapter *adapter);
 779 bool ixgbe_wol_supported(struct ixgbe_adapter *adapter, u16 device_id,
 780                          u16 subdevice_id);
 781 #ifdef CONFIG_PCI_IOV
 782 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter);
 783 #endif
 784 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter,
 785                          const u8 *addr, u16 queue);
 786 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter,
 787                          const u8 *addr, u16 queue);
 788 void ixgbe_update_pf_promisc_vlvf(struct ixgbe_adapter *adapter, u32 vid);
 789 void ixgbe_clear_interrupt_scheme(struct ixgbe_adapter *adapter);
 790 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *, struct ixgbe_adapter *,
 791                                   struct ixgbe_ring *);
 792 void ixgbe_unmap_and_free_tx_resource(struct ixgbe_ring *,
 793                                       struct ixgbe_tx_buffer *);
 794 void ixgbe_alloc_rx_buffers(struct ixgbe_ring *, u16);
 795 void ixgbe_write_eitr(struct ixgbe_q_vector *);
 796 int ixgbe_poll(struct napi_struct *napi, int budget);
 797 int ethtool_ioctl(struct ifreq *ifr);
 798 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
 799 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 800 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 801 s32 ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
 802                                           union ixgbe_atr_hash_dword input,
 803                                           union ixgbe_atr_hash_dword common,
 804                                           u8 queue);
 805 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 806                                     union ixgbe_atr_input *input_mask);
 807 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
 808                                           union ixgbe_atr_input *input,
 809                                           u16 soft_id, u8 queue);
 810 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
 811                                           union ixgbe_atr_input *input,
 812                                           u16 soft_id);
 813 void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
 814                                           union ixgbe_atr_input *mask);
 815 int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
 816                                     struct ixgbe_fdir_filter *input,
 817                                     u16 sw_idx);
 818 void ixgbe_set_rx_mode(struct net_device *netdev);
 819 #ifdef CONFIG_IXGBE_DCB
 820 void ixgbe_set_rx_drop_en(struct ixgbe_adapter *adapter);
 821 #endif
 822 int ixgbe_setup_tc(struct net_device *dev, u8 tc);
 823 void ixgbe_tx_ctxtdesc(struct ixgbe_ring *, u32, u32, u32, u32);
 824 void ixgbe_do_reset(struct net_device *netdev);
 825 #ifdef CONFIG_IXGBE_HWMON
 826 void ixgbe_sysfs_exit(struct ixgbe_adapter *adapter);
 827 int ixgbe_sysfs_init(struct ixgbe_adapter *adapter);
 828 #endif /* CONFIG_IXGBE_HWMON */
 829 #ifdef IXGBE_FCOE
 830 void ixgbe_configure_fcoe(struct ixgbe_adapter *adapter);
 831 int ixgbe_fso(struct ixgbe_ring *tx_ring, struct ixgbe_tx_buffer *first,
 832               u8 *hdr_len);
 833 int ixgbe_fcoe_ddp(struct ixgbe_adapter *adapter,
 834                    union ixgbe_adv_rx_desc *rx_desc, struct sk_buff *skb);
 835 int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid,
 836                        struct scatterlist *sgl, unsigned int sgc);
 837 int ixgbe_fcoe_ddp_target(struct net_device *netdev, u16 xid,
 838                           struct scatterlist *sgl, unsigned int sgc);
 839 int ixgbe_fcoe_ddp_put(struct net_device *netdev, u16 xid);
 840 int ixgbe_setup_fcoe_ddp_resources(struct ixgbe_adapter *adapter);
 841 void ixgbe_free_fcoe_ddp_resources(struct ixgbe_adapter *adapter);
 842 int ixgbe_fcoe_enable(struct net_device *netdev);
 843 int ixgbe_fcoe_disable(struct net_device *netdev);
 844 #ifdef CONFIG_IXGBE_DCB
 845 u8 ixgbe_fcoe_getapp(struct ixgbe_adapter *adapter);
 846 u8 ixgbe_fcoe_setapp(struct ixgbe_adapter *adapter, u8 up);
 847 #endif /* CONFIG_IXGBE_DCB */
 848 int ixgbe_fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type);
 849 int ixgbe_fcoe_get_hbainfo(struct net_device *netdev,
 850                            struct netdev_fcoe_hbainfo *info);
 851 u8 ixgbe_fcoe_get_tc(struct ixgbe_adapter *adapter);
 852 #endif /* IXGBE_FCOE */
 853 #ifdef CONFIG_DEBUG_FS
 854 void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter);
 855 void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter);
 856 void ixgbe_dbg_init(void);
 857 void ixgbe_dbg_exit(void);
 858 #else
 859 static inline void ixgbe_dbg_adapter_init(struct ixgbe_adapter *adapter) {}
 860 static inline void ixgbe_dbg_adapter_exit(struct ixgbe_adapter *adapter) {}
 861 static inline void ixgbe_dbg_init(void) {}
 862 static inline void ixgbe_dbg_exit(void) {}
 863 #endif /* CONFIG_DEBUG_FS */
 864 static inline struct netdev_queue *txring_txq(const struct ixgbe_ring *ring)
 865 {
 866         return netdev_get_tx_queue(ring->netdev, ring->queue_index);
 867 }
 868
 869 void ixgbe_ptp_init(struct ixgbe_adapter *adapter);
 870 void ixgbe_ptp_suspend(struct ixgbe_adapter *adapter);
 871 void ixgbe_ptp_stop(struct ixgbe_adapter *adapter);
 872 void ixgbe_ptp_overflow_check(struct ixgbe_adapter *adapter);
 873 void ixgbe_ptp_rx_hang(struct ixgbe_adapter *adapter);
 874 void ixgbe_ptp_rx_pktstamp(struct ixgbe_q_vector *, struct sk_buff *);
 875 void ixgbe_ptp_rx_rgtstamp(struct ixgbe_q_vector *, struct sk_buff *skb);
 876 static inline void ixgbe_ptp_rx_hwtstamp(struct ixgbe_ring *rx_ring,
 877                                          union ixgbe_adv_rx_desc *rx_desc,
 878                                          struct sk_buff *skb)
 879 {
 880         if (unlikely(ixgbe_test_staterr(rx_desc, IXGBE_RXD_STAT_TSIP))) {
 881                 ixgbe_ptp_rx_pktstamp(rx_ring->q_vector, skb);
 882                 return;
 883         }
 884
 885         if (unlikely(!ixgbe_test_staterr(rx_desc, IXGBE_RXDADV_STAT_TS)))
 886                 return;
 887
 888         ixgbe_ptp_rx_rgtstamp(rx_ring->q_vector, skb);
 889
 890         /* Update the last_rx_timestamp timer in order to enable watchdog check
 891          * for error case of latched timestamp on a dropped packet.
 892          */
 893         rx_ring->last_rx_timestamp = jiffies;
 894 }
 895
 896 int ixgbe_ptp_set_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
 897 int ixgbe_ptp_get_ts_config(struct ixgbe_adapter *adapter, struct ifreq *ifr);
 898 void ixgbe_ptp_start_cyclecounter(struct ixgbe_adapter *adapter);
 899 void ixgbe_ptp_reset(struct ixgbe_adapter *adapter);
 900 void ixgbe_ptp_check_pps_event(struct ixgbe_adapter *adapter);
 901 #ifdef CONFIG_PCI_IOV
 902 void ixgbe_sriov_reinit(struct ixgbe_adapter *adapter);
 903 #endif
 904
 905 netdev_tx_t ixgbe_xmit_frame_ring(struct sk_buff *skb,
 906                                   struct ixgbe_adapter *adapter,
 907                                   struct ixgbe_ring *tx_ring);
 908 u32 ixgbe_rss_indir_tbl_entries(struct ixgbe_adapter *adapter);
 909 void ixgbe_store_reta(struct ixgbe_adapter *adapter);
 910 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
 911                        u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
 912 #endif /* _IXGBE_H_ */