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KVM: Fix preemption counter leak in kvm_timer_init()
[linux-2.6/btrfs-unstable.git] / arch / x86 / kvm / x86.c
blobb989e1f1e5d36b732d1d9c864f369b39a7459105
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 *
11 * Authors:
12 * Avi Kivity <avi@qumranet.com>
13 * Yaniv Kamay <yaniv@qumranet.com>
14 * Amit Shah <amit.shah@qumranet.com>
15 * Ben-Ami Yassour <benami@il.ibm.com>
16 *
17 * This work is licensed under the terms of the GNU GPL, version 2. See
18 * the COPYING file in the top-level directory.
19 *
20 */
21
22 #include <linux/kvm_host.h>
23 #include "irq.h"
24 #include "mmu.h"
25 #include "i8254.h"
26 #include "tss.h"
27 #include "kvm_cache_regs.h"
28 #include "x86.h"
29
30 #include <linux/clocksource.h>
31 #include <linux/interrupt.h>
32 #include <linux/kvm.h>
33 #include <linux/fs.h>
34 #include <linux/vmalloc.h>
35 #include <linux/module.h>
36 #include <linux/mman.h>
37 #include <linux/highmem.h>
38 #include <linux/iommu.h>
39 #include <linux/intel-iommu.h>
40 #include <linux/cpufreq.h>
41 #include <linux/user-return-notifier.h>
42 #include <linux/srcu.h>
43 #include <linux/slab.h>
44 #include <linux/perf_event.h>
45 #include <linux/uaccess.h>
46 #include <trace/events/kvm.h>
47
48 #define CREATE_TRACE_POINTS
49 #include "trace.h"
50
51 #include <asm/debugreg.h>
52 #include <asm/msr.h>
53 #include <asm/desc.h>
54 #include <asm/mtrr.h>
55 #include <asm/mce.h>
56 #include <asm/i387.h>
57 #include <asm/xcr.h>
58 #include <asm/pvclock.h>
59 #include <asm/div64.h>
60
61 #define MAX_IO_MSRS 256
62 #define CR0_RESERVED_BITS \
63 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
64 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
65 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
66 #define CR4_RESERVED_BITS \
67 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
68 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
69 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
70 | X86_CR4_OSXSAVE \
71 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
72
73 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
74
75 #define KVM_MAX_MCE_BANKS 32
76 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
77
78 /* EFER defaults:
79 * - enable syscall per default because its emulated by KVM
80 * - enable LME and LMA per default on 64 bit KVM
81 */
82 #ifdef CONFIG_X86_64
83 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
84 #else
85 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
86 #endif
87
88 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
89 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
90
91 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
92 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
93 struct kvm_cpuid_entry2 __user *entries);
94
95 struct kvm_x86_ops *kvm_x86_ops;
96 EXPORT_SYMBOL_GPL(kvm_x86_ops);
97
98 int ignore_msrs = 0;
99 module_param_named(ignore_msrs, ignore_msrs, bool, S_IRUGO | S_IWUSR);
100
101 #define KVM_NR_SHARED_MSRS 16
102
103 struct kvm_shared_msrs_global {
104 int nr;
105 u32 msrs[KVM_NR_SHARED_MSRS];
106 };
107
108 struct kvm_shared_msrs {
109 struct user_return_notifier urn;
110 bool registered;
111 struct kvm_shared_msr_values {
112 u64 host;
113 u64 curr;
114 } values[KVM_NR_SHARED_MSRS];
115 };
116
117 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
118 static DEFINE_PER_CPU(struct kvm_shared_msrs, shared_msrs);
119
120 struct kvm_stats_debugfs_item debugfs_entries[] = {
121 { "pf_fixed", VCPU_STAT(pf_fixed) },
122 { "pf_guest", VCPU_STAT(pf_guest) },
123 { "tlb_flush", VCPU_STAT(tlb_flush) },
124 { "invlpg", VCPU_STAT(invlpg) },
125 { "exits", VCPU_STAT(exits) },
126 { "io_exits", VCPU_STAT(io_exits) },
127 { "mmio_exits", VCPU_STAT(mmio_exits) },
128 { "signal_exits", VCPU_STAT(signal_exits) },
129 { "irq_window", VCPU_STAT(irq_window_exits) },
130 { "nmi_window", VCPU_STAT(nmi_window_exits) },
131 { "halt_exits", VCPU_STAT(halt_exits) },
132 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
133 { "hypercalls", VCPU_STAT(hypercalls) },
134 { "request_irq", VCPU_STAT(request_irq_exits) },
135 { "irq_exits", VCPU_STAT(irq_exits) },
136 { "host_state_reload", VCPU_STAT(host_state_reload) },
137 { "efer_reload", VCPU_STAT(efer_reload) },
138 { "fpu_reload", VCPU_STAT(fpu_reload) },
139 { "insn_emulation", VCPU_STAT(insn_emulation) },
140 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
141 { "irq_injections", VCPU_STAT(irq_injections) },
142 { "nmi_injections", VCPU_STAT(nmi_injections) },
143 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
144 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
145 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
146 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
147 { "mmu_flooded", VM_STAT(mmu_flooded) },
148 { "mmu_recycled", VM_STAT(mmu_recycled) },
149 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
150 { "mmu_unsync", VM_STAT(mmu_unsync) },
151 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
152 { "largepages", VM_STAT(lpages) },
153 { NULL }
154 };
155
156 u64 __read_mostly host_xcr0;
157
158 static void kvm_on_user_return(struct user_return_notifier *urn)
159 {
160 unsigned slot;
161 struct kvm_shared_msrs *locals
162 = container_of(urn, struct kvm_shared_msrs, urn);
163 struct kvm_shared_msr_values *values;
164
165 for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
166 values = &locals->values[slot];
167 if (values->host != values->curr) {
168 wrmsrl(shared_msrs_global.msrs[slot], values->host);
169 values->curr = values->host;
170 }
171 }
172 locals->registered = false;
173 user_return_notifier_unregister(urn);
174 }
175
176 static void shared_msr_update(unsigned slot, u32 msr)
177 {
178 struct kvm_shared_msrs *smsr;
179 u64 value;
180
181 smsr = &__get_cpu_var(shared_msrs);
182 /* only read, and nobody should modify it at this time,
183 * so don't need lock */
184 if (slot >= shared_msrs_global.nr) {
185 printk(KERN_ERR "kvm: invalid MSR slot!");
186 return;
187 }
188 rdmsrl_safe(msr, &value);
189 smsr->values[slot].host = value;
190 smsr->values[slot].curr = value;
191 }
192
193 void kvm_define_shared_msr(unsigned slot, u32 msr)
194 {
195 if (slot >= shared_msrs_global.nr)
196 shared_msrs_global.nr = slot + 1;
197 shared_msrs_global.msrs[slot] = msr;
198 /* we need ensured the shared_msr_global have been updated */
199 smp_wmb();
200 }
201 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
202
203 static void kvm_shared_msr_cpu_online(void)
204 {
205 unsigned i;
206
207 for (i = 0; i < shared_msrs_global.nr; ++i)
208 shared_msr_update(i, shared_msrs_global.msrs[i]);
209 }
210
211 void kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
212 {
213 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
214
215 if (((value ^ smsr->values[slot].curr) & mask) == 0)
216 return;
217 smsr->values[slot].curr = value;
218 wrmsrl(shared_msrs_global.msrs[slot], value);
219 if (!smsr->registered) {
220 smsr->urn.on_user_return = kvm_on_user_return;
221 user_return_notifier_register(&smsr->urn);
222 smsr->registered = true;
223 }
224 }
225 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
226
227 static void drop_user_return_notifiers(void *ignore)
228 {
229 struct kvm_shared_msrs *smsr = &__get_cpu_var(shared_msrs);
230
231 if (smsr->registered)
232 kvm_on_user_return(&smsr->urn);
233 }
234
235 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
236 {
237 if (irqchip_in_kernel(vcpu->kvm))
238 return vcpu->arch.apic_base;
239 else
240 return vcpu->arch.apic_base;
241 }
242 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
243
244 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
245 {
246 /* TODO: reserve bits check */
247 if (irqchip_in_kernel(vcpu->kvm))
248 kvm_lapic_set_base(vcpu, data);
249 else
250 vcpu->arch.apic_base = data;
251 }
252 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
253
254 #define EXCPT_BENIGN 0
255 #define EXCPT_CONTRIBUTORY 1
256 #define EXCPT_PF 2
257
258 static int exception_class(int vector)
259 {
260 switch (vector) {
261 case PF_VECTOR:
262 return EXCPT_PF;
263 case DE_VECTOR:
264 case TS_VECTOR:
265 case NP_VECTOR:
266 case SS_VECTOR:
267 case GP_VECTOR:
268 return EXCPT_CONTRIBUTORY;
269 default:
270 break;
271 }
272 return EXCPT_BENIGN;
273 }
274
275 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
276 unsigned nr, bool has_error, u32 error_code,
277 bool reinject)
278 {
279 u32 prev_nr;
280 int class1, class2;
281
282 kvm_make_request(KVM_REQ_EVENT, vcpu);
283
284 if (!vcpu->arch.exception.pending) {
285 queue:
286 vcpu->arch.exception.pending = true;
287 vcpu->arch.exception.has_error_code = has_error;
288 vcpu->arch.exception.nr = nr;
289 vcpu->arch.exception.error_code = error_code;
290 vcpu->arch.exception.reinject = reinject;
291 return;
292 }
293
294 /* to check exception */
295 prev_nr = vcpu->arch.exception.nr;
296 if (prev_nr == DF_VECTOR) {
297 /* triple fault -> shutdown */
298 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
299 return;
300 }
301 class1 = exception_class(prev_nr);
302 class2 = exception_class(nr);
303 if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
304 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
305 /* generate double fault per SDM Table 5-5 */
306 vcpu->arch.exception.pending = true;
307 vcpu->arch.exception.has_error_code = true;
308 vcpu->arch.exception.nr = DF_VECTOR;
309 vcpu->arch.exception.error_code = 0;
310 } else
311 /* replace previous exception with a new one in a hope
312 that instruction re-execution will regenerate lost
313 exception */
314 goto queue;
315 }
316
317 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
318 {
319 kvm_multiple_exception(vcpu, nr, false, 0, false);
320 }
321 EXPORT_SYMBOL_GPL(kvm_queue_exception);
322
323 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
324 {
325 kvm_multiple_exception(vcpu, nr, false, 0, true);
326 }
327 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
328
329 void kvm_inject_page_fault(struct kvm_vcpu *vcpu)
330 {
331 unsigned error_code = vcpu->arch.fault.error_code;
332
333 ++vcpu->stat.pf_guest;
334 vcpu->arch.cr2 = vcpu->arch.fault.address;
335 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
336 }
337
338 void kvm_propagate_fault(struct kvm_vcpu *vcpu)
339 {
340 if (mmu_is_nested(vcpu) && !vcpu->arch.fault.nested)
341 vcpu->arch.nested_mmu.inject_page_fault(vcpu);
342 else
343 vcpu->arch.mmu.inject_page_fault(vcpu);
344
345 vcpu->arch.fault.nested = false;
346 }
347
348 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
349 {
350 kvm_make_request(KVM_REQ_EVENT, vcpu);
351 vcpu->arch.nmi_pending = 1;
352 }
353 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
354
355 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
356 {
357 kvm_multiple_exception(vcpu, nr, true, error_code, false);
358 }
359 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
360
361 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
362 {
363 kvm_multiple_exception(vcpu, nr, true, error_code, true);
364 }
365 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
366
367 /*
368 * Checks if cpl <= required_cpl; if true, return true. Otherwise queue
369 * a #GP and return false.
370 */
371 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
372 {
373 if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
374 return true;
375 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
376 return false;
377 }
378 EXPORT_SYMBOL_GPL(kvm_require_cpl);
379
380 /*
381 * This function will be used to read from the physical memory of the currently
382 * running guest. The difference to kvm_read_guest_page is that this function
383 * can read from guest physical or from the guest's guest physical memory.
384 */
385 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
386 gfn_t ngfn, void *data, int offset, int len,
387 u32 access)
388 {
389 gfn_t real_gfn;
390 gpa_t ngpa;
391
392 ngpa = gfn_to_gpa(ngfn);
393 real_gfn = mmu->translate_gpa(vcpu, ngpa, access);
394 if (real_gfn == UNMAPPED_GVA)
395 return -EFAULT;
396
397 real_gfn = gpa_to_gfn(real_gfn);
398
399 return kvm_read_guest_page(vcpu->kvm, real_gfn, data, offset, len);
400 }
401 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
402
403 int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
404 void *data, int offset, int len, u32 access)
405 {
406 return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
407 data, offset, len, access);
408 }
409
410 /*
411 * Load the pae pdptrs. Return true is they are all valid.
412 */
413 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
414 {
415 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
416 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
417 int i;
418 int ret;
419 u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
420
421 ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
422 offset * sizeof(u64), sizeof(pdpte),
423 PFERR_USER_MASK|PFERR_WRITE_MASK);
424 if (ret < 0) {
425 ret = 0;
426 goto out;
427 }
428 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
429 if (is_present_gpte(pdpte[i]) &&
430 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
431 ret = 0;
432 goto out;
433 }
434 }
435 ret = 1;
436
437 memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
438 __set_bit(VCPU_EXREG_PDPTR,
439 (unsigned long *)&vcpu->arch.regs_avail);
440 __set_bit(VCPU_EXREG_PDPTR,
441 (unsigned long *)&vcpu->arch.regs_dirty);
442 out:
443
444 return ret;
445 }
446 EXPORT_SYMBOL_GPL(load_pdptrs);
447
448 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
449 {
450 u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
451 bool changed = true;
452 int offset;
453 gfn_t gfn;
454 int r;
455
456 if (is_long_mode(vcpu) || !is_pae(vcpu))
457 return false;
458
459 if (!test_bit(VCPU_EXREG_PDPTR,
460 (unsigned long *)&vcpu->arch.regs_avail))
461 return true;
462
463 gfn = (vcpu->arch.cr3 & ~31u) >> PAGE_SHIFT;
464 offset = (vcpu->arch.cr3 & ~31u) & (PAGE_SIZE - 1);
465 r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
466 PFERR_USER_MASK | PFERR_WRITE_MASK);
467 if (r < 0)
468 goto out;
469 changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
470 out:
471
472 return changed;
473 }
474
475 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
476 {
477 unsigned long old_cr0 = kvm_read_cr0(vcpu);
478 unsigned long update_bits = X86_CR0_PG | X86_CR0_WP |
479 X86_CR0_CD | X86_CR0_NW;
480
481 cr0 |= X86_CR0_ET;
482
483 #ifdef CONFIG_X86_64
484 if (cr0 & 0xffffffff00000000UL)
485 return 1;
486 #endif
487
488 cr0 &= ~CR0_RESERVED_BITS;
489
490 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
491 return 1;
492
493 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
494 return 1;
495
496 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
497 #ifdef CONFIG_X86_64
498 if ((vcpu->arch.efer & EFER_LME)) {
499 int cs_db, cs_l;
500
501 if (!is_pae(vcpu))
502 return 1;
503 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
504 if (cs_l)
505 return 1;
506 } else
507 #endif
508 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
509 vcpu->arch.cr3))
510 return 1;
511 }
512
513 kvm_x86_ops->set_cr0(vcpu, cr0);
514
515 if ((cr0 ^ old_cr0) & update_bits)
516 kvm_mmu_reset_context(vcpu);
517 return 0;
518 }
519 EXPORT_SYMBOL_GPL(kvm_set_cr0);
520
521 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
522 {
523 (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
524 }
525 EXPORT_SYMBOL_GPL(kvm_lmsw);
526
527 int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
528 {
529 u64 xcr0;
530
531 /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now */
532 if (index != XCR_XFEATURE_ENABLED_MASK)
533 return 1;
534 xcr0 = xcr;
535 if (kvm_x86_ops->get_cpl(vcpu) != 0)
536 return 1;
537 if (!(xcr0 & XSTATE_FP))
538 return 1;
539 if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
540 return 1;
541 if (xcr0 & ~host_xcr0)
542 return 1;
543 vcpu->arch.xcr0 = xcr0;
544 vcpu->guest_xcr0_loaded = 0;
545 return 0;
546 }
547
548 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
549 {
550 if (__kvm_set_xcr(vcpu, index, xcr)) {
551 kvm_inject_gp(vcpu, 0);
552 return 1;
553 }
554 return 0;
555 }
556 EXPORT_SYMBOL_GPL(kvm_set_xcr);
557
558 static bool guest_cpuid_has_xsave(struct kvm_vcpu *vcpu)
559 {
560 struct kvm_cpuid_entry2 *best;
561
562 best = kvm_find_cpuid_entry(vcpu, 1, 0);
563 return best && (best->ecx & bit(X86_FEATURE_XSAVE));
564 }
565
566 static void update_cpuid(struct kvm_vcpu *vcpu)
567 {
568 struct kvm_cpuid_entry2 *best;
569
570 best = kvm_find_cpuid_entry(vcpu, 1, 0);
571 if (!best)
572 return;
573
574 /* Update OSXSAVE bit */
575 if (cpu_has_xsave && best->function == 0x1) {
576 best->ecx &= ~(bit(X86_FEATURE_OSXSAVE));
577 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE))
578 best->ecx |= bit(X86_FEATURE_OSXSAVE);
579 }
580 }
581
582 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
583 {
584 unsigned long old_cr4 = kvm_read_cr4(vcpu);
585 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
586
587 if (cr4 & CR4_RESERVED_BITS)
588 return 1;
589
590 if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
591 return 1;
592
593 if (is_long_mode(vcpu)) {
594 if (!(cr4 & X86_CR4_PAE))
595 return 1;
596 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
597 && ((cr4 ^ old_cr4) & pdptr_bits)
598 && !load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3))
599 return 1;
600
601 if (cr4 & X86_CR4_VMXE)
602 return 1;
603
604 kvm_x86_ops->set_cr4(vcpu, cr4);
605
606 if ((cr4 ^ old_cr4) & pdptr_bits)
607 kvm_mmu_reset_context(vcpu);
608
609 if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
610 update_cpuid(vcpu);
611
612 return 0;
613 }
614 EXPORT_SYMBOL_GPL(kvm_set_cr4);
615
616 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
617 {
618 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
619 kvm_mmu_sync_roots(vcpu);
620 kvm_mmu_flush_tlb(vcpu);
621 return 0;
622 }
623
624 if (is_long_mode(vcpu)) {
625 if (cr3 & CR3_L_MODE_RESERVED_BITS)
626 return 1;
627 } else {
628 if (is_pae(vcpu)) {
629 if (cr3 & CR3_PAE_RESERVED_BITS)
630 return 1;
631 if (is_paging(vcpu) &&
632 !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
633 return 1;
634 }
635 /*
636 * We don't check reserved bits in nonpae mode, because
637 * this isn't enforced, and VMware depends on this.
638 */
639 }
640
641 /*
642 * Does the new cr3 value map to physical memory? (Note, we
643 * catch an invalid cr3 even in real-mode, because it would
644 * cause trouble later on when we turn on paging anyway.)
645 *
646 * A real CPU would silently accept an invalid cr3 and would
647 * attempt to use it - with largely undefined (and often hard
648 * to debug) behavior on the guest side.
649 */
650 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
651 return 1;
652 vcpu->arch.cr3 = cr3;
653 vcpu->arch.mmu.new_cr3(vcpu);
654 return 0;
655 }
656 EXPORT_SYMBOL_GPL(kvm_set_cr3);
657
658 int __kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
659 {
660 if (cr8 & CR8_RESERVED_BITS)
661 return 1;
662 if (irqchip_in_kernel(vcpu->kvm))
663 kvm_lapic_set_tpr(vcpu, cr8);
664 else
665 vcpu->arch.cr8 = cr8;
666 return 0;
667 }
668
669 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
670 {
671 if (__kvm_set_cr8(vcpu, cr8))
672 kvm_inject_gp(vcpu, 0);
673 }
674 EXPORT_SYMBOL_GPL(kvm_set_cr8);
675
676 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
677 {
678 if (irqchip_in_kernel(vcpu->kvm))
679 return kvm_lapic_get_cr8(vcpu);
680 else
681 return vcpu->arch.cr8;
682 }
683 EXPORT_SYMBOL_GPL(kvm_get_cr8);
684
685 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
686 {
687 switch (dr) {
688 case 0 ... 3:
689 vcpu->arch.db[dr] = val;
690 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
691 vcpu->arch.eff_db[dr] = val;
692 break;
693 case 4:
694 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
695 return 1; /* #UD */
696 /* fall through */
697 case 6:
698 if (val & 0xffffffff00000000ULL)
699 return -1; /* #GP */
700 vcpu->arch.dr6 = (val & DR6_VOLATILE) | DR6_FIXED_1;
701 break;
702 case 5:
703 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
704 return 1; /* #UD */
705 /* fall through */
706 default: /* 7 */
707 if (val & 0xffffffff00000000ULL)
708 return -1; /* #GP */
709 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
710 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
711 kvm_x86_ops->set_dr7(vcpu, vcpu->arch.dr7);
712 vcpu->arch.switch_db_regs = (val & DR7_BP_EN_MASK);
713 }
714 break;
715 }
716
717 return 0;
718 }
719
720 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
721 {
722 int res;
723
724 res = __kvm_set_dr(vcpu, dr, val);
725 if (res > 0)
726 kvm_queue_exception(vcpu, UD_VECTOR);
727 else if (res < 0)
728 kvm_inject_gp(vcpu, 0);
729
730 return res;
731 }
732 EXPORT_SYMBOL_GPL(kvm_set_dr);
733
734 static int _kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
735 {
736 switch (dr) {
737 case 0 ... 3:
738 *val = vcpu->arch.db[dr];
739 break;
740 case 4:
741 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
742 return 1;
743 /* fall through */
744 case 6:
745 *val = vcpu->arch.dr6;
746 break;
747 case 5:
748 if (kvm_read_cr4_bits(vcpu, X86_CR4_DE))
749 return 1;
750 /* fall through */
751 default: /* 7 */
752 *val = vcpu->arch.dr7;
753 break;
754 }
755
756 return 0;
757 }
758
759 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
760 {
761 if (_kvm_get_dr(vcpu, dr, val)) {
762 kvm_queue_exception(vcpu, UD_VECTOR);
763 return 1;
764 }
765 return 0;
766 }
767 EXPORT_SYMBOL_GPL(kvm_get_dr);
768
769 /*
770 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
771 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
772 *
773 * This list is modified at module load time to reflect the
774 * capabilities of the host cpu. This capabilities test skips MSRs that are
775 * kvm-specific. Those are put in the beginning of the list.
776 */
777
778 #define KVM_SAVE_MSRS_BEGIN 7
779 static u32 msrs_to_save[] = {
780 MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
781 MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
782 HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
783 HV_X64_MSR_APIC_ASSIST_PAGE,
784 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
785 MSR_STAR,
786 #ifdef CONFIG_X86_64
787 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
788 #endif
789 MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
790 };
791
792 static unsigned num_msrs_to_save;
793
794 static u32 emulated_msrs[] = {
795 MSR_IA32_MISC_ENABLE,
796 MSR_IA32_MCG_STATUS,
797 MSR_IA32_MCG_CTL,
798 };
799
800 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
801 {
802 u64 old_efer = vcpu->arch.efer;
803
804 if (efer & efer_reserved_bits)
805 return 1;
806
807 if (is_paging(vcpu)
808 && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
809 return 1;
810
811 if (efer & EFER_FFXSR) {
812 struct kvm_cpuid_entry2 *feat;
813
814 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
815 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
816 return 1;
817 }
818
819 if (efer & EFER_SVME) {
820 struct kvm_cpuid_entry2 *feat;
821
822 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
823 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
824 return 1;
825 }
826
827 efer &= ~EFER_LMA;
828 efer |= vcpu->arch.efer & EFER_LMA;
829
830 kvm_x86_ops->set_efer(vcpu, efer);
831
832 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
833 kvm_mmu_reset_context(vcpu);
834
835 /* Update reserved bits */
836 if ((efer ^ old_efer) & EFER_NX)
837 kvm_mmu_reset_context(vcpu);
838
839 return 0;
840 }
841
842 void kvm_enable_efer_bits(u64 mask)
843 {
844 efer_reserved_bits &= ~mask;
845 }
846 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
847
848
849 /*
850 * Writes msr value into into the appropriate "register".
851 * Returns 0 on success, non-0 otherwise.
852 * Assumes vcpu_load() was already called.
853 */
854 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
855 {
856 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
857 }
858
859 /*
860 * Adapt set_msr() to msr_io()'s calling convention
861 */
862 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
863 {
864 return kvm_set_msr(vcpu, index, *data);
865 }
866
867 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
868 {
869 int version;
870 int r;
871 struct pvclock_wall_clock wc;
872 struct timespec boot;
873
874 if (!wall_clock)
875 return;
876
877 r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
878 if (r)
879 return;
880
881 if (version & 1)
882 ++version; /* first time write, random junk */
883
884 ++version;
885
886 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
887
888 /*
889 * The guest calculates current wall clock time by adding
890 * system time (updated by kvm_guest_time_update below) to the
891 * wall clock specified here. guest system time equals host
892 * system time for us, thus we must fill in host boot time here.
893 */
894 getboottime(&boot);
895
896 wc.sec = boot.tv_sec;
897 wc.nsec = boot.tv_nsec;
898 wc.version = version;
899
900 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
901
902 version++;
903 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
904 }
905
906 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
907 {
908 uint32_t quotient, remainder;
909
910 /* Don't try to replace with do_div(), this one calculates
911 * "(dividend << 32) / divisor" */
912 __asm__ ( "divl %4"
913 : "=a" (quotient), "=d" (remainder)
914 : "0" (0), "1" (dividend), "r" (divisor) );
915 return quotient;
916 }
917
918 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
919 s8 *pshift, u32 *pmultiplier)
920 {
921 uint64_t scaled64;
922 int32_t shift = 0;
923 uint64_t tps64;
924 uint32_t tps32;
925
926 tps64 = base_khz * 1000LL;
927 scaled64 = scaled_khz * 1000LL;
928 while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
929 tps64 >>= 1;
930 shift--;
931 }
932
933 tps32 = (uint32_t)tps64;
934 while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
935 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
936 scaled64 >>= 1;
937 else
938 tps32 <<= 1;
939 shift++;
940 }
941
942 *pshift = shift;
943 *pmultiplier = div_frac(scaled64, tps32);
944
945 pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
946 __func__, base_khz, scaled_khz, shift, *pmultiplier);
947 }
948
949 static inline u64 get_kernel_ns(void)
950 {
951 struct timespec ts;
952
953 WARN_ON(preemptible());
954 ktime_get_ts(&ts);
955 monotonic_to_bootbased(&ts);
956 return timespec_to_ns(&ts);
957 }
958
959 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
960 unsigned long max_tsc_khz;
961
962 static inline int kvm_tsc_changes_freq(void)
963 {
964 int cpu = get_cpu();
965 int ret = !boot_cpu_has(X86_FEATURE_CONSTANT_TSC) &&
966 cpufreq_quick_get(cpu) != 0;
967 put_cpu();
968 return ret;
969 }
970
971 static inline u64 nsec_to_cycles(u64 nsec)
972 {
973 u64 ret;
974
975 WARN_ON(preemptible());
976 if (kvm_tsc_changes_freq())
977 printk_once(KERN_WARNING
978 "kvm: unreliable cycle conversion on adjustable rate TSC\n");
979 ret = nsec * __get_cpu_var(cpu_tsc_khz);
980 do_div(ret, USEC_PER_SEC);
981 return ret;
982 }
983
984 static void kvm_arch_set_tsc_khz(struct kvm *kvm, u32 this_tsc_khz)
985 {
986 /* Compute a scale to convert nanoseconds in TSC cycles */
987 kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
988 &kvm->arch.virtual_tsc_shift,
989 &kvm->arch.virtual_tsc_mult);
990 kvm->arch.virtual_tsc_khz = this_tsc_khz;
991 }
992
993 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
994 {
995 u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.last_tsc_nsec,
996 vcpu->kvm->arch.virtual_tsc_mult,
997 vcpu->kvm->arch.virtual_tsc_shift);
998 tsc += vcpu->arch.last_tsc_write;
999 return tsc;
1000 }
1001
1002 void kvm_write_tsc(struct kvm_vcpu *vcpu, u64 data)
1003 {
1004 struct kvm *kvm = vcpu->kvm;
1005 u64 offset, ns, elapsed;
1006 unsigned long flags;
1007 s64 sdiff;
1008
1009 spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1010 offset = data - native_read_tsc();
1011 ns = get_kernel_ns();
1012 elapsed = ns - kvm->arch.last_tsc_nsec;
1013 sdiff = data - kvm->arch.last_tsc_write;
1014 if (sdiff < 0)
1015 sdiff = -sdiff;
1016
1017 /*
1018 * Special case: close write to TSC within 5 seconds of
1019 * another CPU is interpreted as an attempt to synchronize
1020 * The 5 seconds is to accomodate host load / swapping as
1021 * well as any reset of TSC during the boot process.
1022 *
1023 * In that case, for a reliable TSC, we can match TSC offsets,
1024 * or make a best guest using elapsed value.
1025 */
1026 if (sdiff < nsec_to_cycles(5ULL * NSEC_PER_SEC) &&
1027 elapsed < 5ULL * NSEC_PER_SEC) {
1028 if (!check_tsc_unstable()) {
1029 offset = kvm->arch.last_tsc_offset;
1030 pr_debug("kvm: matched tsc offset for %llu\n", data);
1031 } else {
1032 u64 delta = nsec_to_cycles(elapsed);
1033 offset += delta;
1034 pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1035 }
1036 ns = kvm->arch.last_tsc_nsec;
1037 }
1038 kvm->arch.last_tsc_nsec = ns;
1039 kvm->arch.last_tsc_write = data;
1040 kvm->arch.last_tsc_offset = offset;
1041 kvm_x86_ops->write_tsc_offset(vcpu, offset);
1042 spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1043
1044 /* Reset of TSC must disable overshoot protection below */
1045 vcpu->arch.hv_clock.tsc_timestamp = 0;
1046 vcpu->arch.last_tsc_write = data;
1047 vcpu->arch.last_tsc_nsec = ns;
1048 }
1049 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1050
1051 static int kvm_guest_time_update(struct kvm_vcpu *v)
1052 {
1053 unsigned long flags;
1054 struct kvm_vcpu_arch *vcpu = &v->arch;
1055 void *shared_kaddr;
1056 unsigned long this_tsc_khz;
1057 s64 kernel_ns, max_kernel_ns;
1058 u64 tsc_timestamp;
1059
1060 /* Keep irq disabled to prevent changes to the clock */
1061 local_irq_save(flags);
1062 kvm_get_msr(v, MSR_IA32_TSC, &tsc_timestamp);
1063 kernel_ns = get_kernel_ns();
1064 this_tsc_khz = __get_cpu_var(cpu_tsc_khz);
1065
1066 if (unlikely(this_tsc_khz == 0)) {
1067 local_irq_restore(flags);
1068 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1069 return 1;
1070 }
1071
1072 /*
1073 * We may have to catch up the TSC to match elapsed wall clock
1074 * time for two reasons, even if kvmclock is used.
1075 * 1) CPU could have been running below the maximum TSC rate
1076 * 2) Broken TSC compensation resets the base at each VCPU
1077 * entry to avoid unknown leaps of TSC even when running
1078 * again on the same CPU. This may cause apparent elapsed
1079 * time to disappear, and the guest to stand still or run
1080 * very slowly.
1081 */
1082 if (vcpu->tsc_catchup) {
1083 u64 tsc = compute_guest_tsc(v, kernel_ns);
1084 if (tsc > tsc_timestamp) {
1085 kvm_x86_ops->adjust_tsc_offset(v, tsc - tsc_timestamp);
1086 tsc_timestamp = tsc;
1087 }
1088 }
1089
1090 local_irq_restore(flags);
1091
1092 if (!vcpu->time_page)
1093 return 0;
1094
1095 /*
1096 * Time as measured by the TSC may go backwards when resetting the base
1097 * tsc_timestamp. The reason for this is that the TSC resolution is
1098 * higher than the resolution of the other clock scales. Thus, many
1099 * possible measurments of the TSC correspond to one measurement of any
1100 * other clock, and so a spread of values is possible. This is not a
1101 * problem for the computation of the nanosecond clock; with TSC rates
1102 * around 1GHZ, there can only be a few cycles which correspond to one
1103 * nanosecond value, and any path through this code will inevitably
1104 * take longer than that. However, with the kernel_ns value itself,
1105 * the precision may be much lower, down to HZ granularity. If the
1106 * first sampling of TSC against kernel_ns ends in the low part of the
1107 * range, and the second in the high end of the range, we can get:
1108 *
1109 * (TSC - offset_low) * S + kns_old > (TSC - offset_high) * S + kns_new
1110 *
1111 * As the sampling errors potentially range in the thousands of cycles,
1112 * it is possible such a time value has already been observed by the
1113 * guest. To protect against this, we must compute the system time as
1114 * observed by the guest and ensure the new system time is greater.
1115 */
1116 max_kernel_ns = 0;
1117 if (vcpu->hv_clock.tsc_timestamp && vcpu->last_guest_tsc) {
1118 max_kernel_ns = vcpu->last_guest_tsc -
1119 vcpu->hv_clock.tsc_timestamp;
1120 max_kernel_ns = pvclock_scale_delta(max_kernel_ns,
1121 vcpu->hv_clock.tsc_to_system_mul,
1122 vcpu->hv_clock.tsc_shift);
1123 max_kernel_ns += vcpu->last_kernel_ns;
1124 }
1125
1126 if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1127 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1128 &vcpu->hv_clock.tsc_shift,
1129 &vcpu->hv_clock.tsc_to_system_mul);
1130 vcpu->hw_tsc_khz = this_tsc_khz;
1131 }
1132
1133 if (max_kernel_ns > kernel_ns)
1134 kernel_ns = max_kernel_ns;
1135
1136 /* With all the info we got, fill in the values */
1137 vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1138 vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1139 vcpu->last_kernel_ns = kernel_ns;
1140 vcpu->last_guest_tsc = tsc_timestamp;
1141 vcpu->hv_clock.flags = 0;
1142
1143 /*
1144 * The interface expects us to write an even number signaling that the
1145 * update is finished. Since the guest won't see the intermediate
1146 * state, we just increase by 2 at the end.
1147 */
1148 vcpu->hv_clock.version += 2;
1149
1150 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
1151
1152 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
1153 sizeof(vcpu->hv_clock));
1154
1155 kunmap_atomic(shared_kaddr, KM_USER0);
1156
1157 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
1158 return 0;
1159 }
1160
1161 static bool msr_mtrr_valid(unsigned msr)
1162 {
1163 switch (msr) {
1164 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
1165 case MSR_MTRRfix64K_00000:
1166 case MSR_MTRRfix16K_80000:
1167 case MSR_MTRRfix16K_A0000:
1168 case MSR_MTRRfix4K_C0000:
1169 case MSR_MTRRfix4K_C8000:
1170 case MSR_MTRRfix4K_D0000:
1171 case MSR_MTRRfix4K_D8000:
1172 case MSR_MTRRfix4K_E0000:
1173 case MSR_MTRRfix4K_E8000:
1174 case MSR_MTRRfix4K_F0000:
1175 case MSR_MTRRfix4K_F8000:
1176 case MSR_MTRRdefType:
1177 case MSR_IA32_CR_PAT:
1178 return true;
1179 case 0x2f8:
1180 return true;
1181 }
1182 return false;
1183 }
1184
1185 static bool valid_pat_type(unsigned t)
1186 {
1187 return t < 8 && (1 << t) & 0xf3; /* 0, 1, 4, 5, 6, 7 */
1188 }
1189
1190 static bool valid_mtrr_type(unsigned t)
1191 {
1192 return t < 8 && (1 << t) & 0x73; /* 0, 1, 4, 5, 6 */
1193 }
1194
1195 static bool mtrr_valid(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1196 {
1197 int i;
1198
1199 if (!msr_mtrr_valid(msr))
1200 return false;
1201
1202 if (msr == MSR_IA32_CR_PAT) {
1203 for (i = 0; i < 8; i++)
1204 if (!valid_pat_type((data >> (i * 8)) & 0xff))
1205 return false;
1206 return true;
1207 } else if (msr == MSR_MTRRdefType) {
1208 if (data & ~0xcff)
1209 return false;
1210 return valid_mtrr_type(data & 0xff);
1211 } else if (msr >= MSR_MTRRfix64K_00000 && msr <= MSR_MTRRfix4K_F8000) {
1212 for (i = 0; i < 8 ; i++)
1213 if (!valid_mtrr_type((data >> (i * 8)) & 0xff))
1214 return false;
1215 return true;
1216 }
1217
1218 /* variable MTRRs */
1219 return valid_mtrr_type(data & 0xff);
1220 }
1221
1222 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1223 {
1224 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1225
1226 if (!mtrr_valid(vcpu, msr, data))
1227 return 1;
1228
1229 if (msr == MSR_MTRRdefType) {
1230 vcpu->arch.mtrr_state.def_type = data;
1231 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
1232 } else if (msr == MSR_MTRRfix64K_00000)
1233 p[0] = data;
1234 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1235 p[1 + msr - MSR_MTRRfix16K_80000] = data;
1236 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1237 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
1238 else if (msr == MSR_IA32_CR_PAT)
1239 vcpu->arch.pat = data;
1240 else { /* Variable MTRRs */
1241 int idx, is_mtrr_mask;
1242 u64 *pt;
1243
1244 idx = (msr - 0x200) / 2;
1245 is_mtrr_mask = msr - 0x200 - 2 * idx;
1246 if (!is_mtrr_mask)
1247 pt =
1248 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1249 else
1250 pt =
1251 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1252 *pt = data;
1253 }
1254
1255 kvm_mmu_reset_context(vcpu);
1256 return 0;
1257 }
1258
1259 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1260 {
1261 u64 mcg_cap = vcpu->arch.mcg_cap;
1262 unsigned bank_num = mcg_cap & 0xff;
1263
1264 switch (msr) {
1265 case MSR_IA32_MCG_STATUS:
1266 vcpu->arch.mcg_status = data;
1267 break;
1268 case MSR_IA32_MCG_CTL:
1269 if (!(mcg_cap & MCG_CTL_P))
1270 return 1;
1271 if (data != 0 && data != ~(u64)0)
1272 return -1;
1273 vcpu->arch.mcg_ctl = data;
1274 break;
1275 default:
1276 if (msr >= MSR_IA32_MC0_CTL &&
1277 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1278 u32 offset = msr - MSR_IA32_MC0_CTL;
1279 /* only 0 or all 1s can be written to IA32_MCi_CTL
1280 * some Linux kernels though clear bit 10 in bank 4 to
1281 * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1282 * this to avoid an uncatched #GP in the guest
1283 */
1284 if ((offset & 0x3) == 0 &&
1285 data != 0 && (data | (1 << 10)) != ~(u64)0)
1286 return -1;
1287 vcpu->arch.mce_banks[offset] = data;
1288 break;
1289 }
1290 return 1;
1291 }
1292 return 0;
1293 }
1294
1295 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1296 {
1297 struct kvm *kvm = vcpu->kvm;
1298 int lm = is_long_mode(vcpu);
1299 u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1300 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1301 u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1302 : kvm->arch.xen_hvm_config.blob_size_32;
1303 u32 page_num = data & ~PAGE_MASK;
1304 u64 page_addr = data & PAGE_MASK;
1305 u8 *page;
1306 int r;
1307
1308 r = -E2BIG;
1309 if (page_num >= blob_size)
1310 goto out;
1311 r = -ENOMEM;
1312 page = kzalloc(PAGE_SIZE, GFP_KERNEL);
1313 if (!page)
1314 goto out;
1315 r = -EFAULT;
1316 if (copy_from_user(page, blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE))
1317 goto out_free;
1318 if (kvm_write_guest(kvm, page_addr, page, PAGE_SIZE))
1319 goto out_free;
1320 r = 0;
1321 out_free:
1322 kfree(page);
1323 out:
1324 return r;
1325 }
1326
1327 static bool kvm_hv_hypercall_enabled(struct kvm *kvm)
1328 {
1329 return kvm->arch.hv_hypercall & HV_X64_MSR_HYPERCALL_ENABLE;
1330 }
1331
1332 static bool kvm_hv_msr_partition_wide(u32 msr)
1333 {
1334 bool r = false;
1335 switch (msr) {
1336 case HV_X64_MSR_GUEST_OS_ID:
1337 case HV_X64_MSR_HYPERCALL:
1338 r = true;
1339 break;
1340 }
1341
1342 return r;
1343 }
1344
1345 static int set_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1346 {
1347 struct kvm *kvm = vcpu->kvm;
1348
1349 switch (msr) {
1350 case HV_X64_MSR_GUEST_OS_ID:
1351 kvm->arch.hv_guest_os_id = data;
1352 /* setting guest os id to zero disables hypercall page */
1353 if (!kvm->arch.hv_guest_os_id)
1354 kvm->arch.hv_hypercall &= ~HV_X64_MSR_HYPERCALL_ENABLE;
1355 break;
1356 case HV_X64_MSR_HYPERCALL: {
1357 u64 gfn;
1358 unsigned long addr;
1359 u8 instructions[4];
1360
1361 /* if guest os id is not set hypercall should remain disabled */
1362 if (!kvm->arch.hv_guest_os_id)
1363 break;
1364 if (!(data & HV_X64_MSR_HYPERCALL_ENABLE)) {
1365 kvm->arch.hv_hypercall = data;
1366 break;
1367 }
1368 gfn = data >> HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT;
1369 addr = gfn_to_hva(kvm, gfn);
1370 if (kvm_is_error_hva(addr))
1371 return 1;
1372 kvm_x86_ops->patch_hypercall(vcpu, instructions);
1373 ((unsigned char *)instructions)[3] = 0xc3; /* ret */
1374 if (copy_to_user((void __user *)addr, instructions, 4))
1375 return 1;
1376 kvm->arch.hv_hypercall = data;
1377 break;
1378 }
1379 default:
1380 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1381 "data 0x%llx\n", msr, data);
1382 return 1;
1383 }
1384 return 0;
1385 }
1386
1387 static int set_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1388 {
1389 switch (msr) {
1390 case HV_X64_MSR_APIC_ASSIST_PAGE: {
1391 unsigned long addr;
1392
1393 if (!(data & HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE)) {
1394 vcpu->arch.hv_vapic = data;
1395 break;
1396 }
1397 addr = gfn_to_hva(vcpu->kvm, data >>
1398 HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT);
1399 if (kvm_is_error_hva(addr))
1400 return 1;
1401 if (clear_user((void __user *)addr, PAGE_SIZE))
1402 return 1;
1403 vcpu->arch.hv_vapic = data;
1404 break;
1405 }
1406 case HV_X64_MSR_EOI:
1407 return kvm_hv_vapic_msr_write(vcpu, APIC_EOI, data);
1408 case HV_X64_MSR_ICR:
1409 return kvm_hv_vapic_msr_write(vcpu, APIC_ICR, data);
1410 case HV_X64_MSR_TPR:
1411 return kvm_hv_vapic_msr_write(vcpu, APIC_TASKPRI, data);
1412 default:
1413 pr_unimpl(vcpu, "HYPER-V unimplemented wrmsr: 0x%x "
1414 "data 0x%llx\n", msr, data);
1415 return 1;
1416 }
1417
1418 return 0;
1419 }
1420
1421 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1422 {
1423 switch (msr) {
1424 case MSR_EFER:
1425 return set_efer(vcpu, data);
1426 case MSR_K7_HWCR:
1427 data &= ~(u64)0x40; /* ignore flush filter disable */
1428 data &= ~(u64)0x100; /* ignore ignne emulation enable */
1429 if (data != 0) {
1430 pr_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1431 data);
1432 return 1;
1433 }
1434 break;
1435 case MSR_FAM10H_MMIO_CONF_BASE:
1436 if (data != 0) {
1437 pr_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1438 "0x%llx\n", data);
1439 return 1;
1440 }
1441 break;
1442 case MSR_AMD64_NB_CFG:
1443 break;
1444 case MSR_IA32_DEBUGCTLMSR:
1445 if (!data) {
1446 /* We support the non-activated case already */
1447 break;
1448 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1449 /* Values other than LBR and BTF are vendor-specific,
1450 thus reserved and should throw a #GP */
1451 return 1;
1452 }
1453 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1454 __func__, data);
1455 break;
1456 case MSR_IA32_UCODE_REV:
1457 case MSR_IA32_UCODE_WRITE:
1458 case MSR_VM_HSAVE_PA:
1459 case MSR_AMD64_PATCH_LOADER:
1460 break;
1461 case 0x200 ... 0x2ff:
1462 return set_msr_mtrr(vcpu, msr, data);
1463 case MSR_IA32_APICBASE:
1464 kvm_set_apic_base(vcpu, data);
1465 break;
1466 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1467 return kvm_x2apic_msr_write(vcpu, msr, data);
1468 case MSR_IA32_MISC_ENABLE:
1469 vcpu->arch.ia32_misc_enable_msr = data;
1470 break;
1471 case MSR_KVM_WALL_CLOCK_NEW:
1472 case MSR_KVM_WALL_CLOCK:
1473 vcpu->kvm->arch.wall_clock = data;
1474 kvm_write_wall_clock(vcpu->kvm, data);
1475 break;
1476 case MSR_KVM_SYSTEM_TIME_NEW:
1477 case MSR_KVM_SYSTEM_TIME: {
1478 if (vcpu->arch.time_page) {
1479 kvm_release_page_dirty(vcpu->arch.time_page);
1480 vcpu->arch.time_page = NULL;
1481 }
1482
1483 vcpu->arch.time = data;
1484 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1485
1486 /* we verify if the enable bit is set... */
1487 if (!(data & 1))
1488 break;
1489
1490 /* ...but clean it before doing the actual write */
1491 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
1492
1493 vcpu->arch.time_page =
1494 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
1495
1496 if (is_error_page(vcpu->arch.time_page)) {
1497 kvm_release_page_clean(vcpu->arch.time_page);
1498 vcpu->arch.time_page = NULL;
1499 }
1500 break;
1501 }
1502 case MSR_IA32_MCG_CTL:
1503 case MSR_IA32_MCG_STATUS:
1504 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1505 return set_msr_mce(vcpu, msr, data);
1506
1507 /* Performance counters are not protected by a CPUID bit,
1508 * so we should check all of them in the generic path for the sake of
1509 * cross vendor migration.
1510 * Writing a zero into the event select MSRs disables them,
1511 * which we perfectly emulate ;-). Any other value should be at least
1512 * reported, some guests depend on them.
1513 */
1514 case MSR_P6_EVNTSEL0:
1515 case MSR_P6_EVNTSEL1:
1516 case MSR_K7_EVNTSEL0:
1517 case MSR_K7_EVNTSEL1:
1518 case MSR_K7_EVNTSEL2:
1519 case MSR_K7_EVNTSEL3:
1520 if (data != 0)
1521 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1522 "0x%x data 0x%llx\n", msr, data);
1523 break;
1524 /* at least RHEL 4 unconditionally writes to the perfctr registers,
1525 * so we ignore writes to make it happy.
1526 */
1527 case MSR_P6_PERFCTR0:
1528 case MSR_P6_PERFCTR1:
1529 case MSR_K7_PERFCTR0:
1530 case MSR_K7_PERFCTR1:
1531 case MSR_K7_PERFCTR2:
1532 case MSR_K7_PERFCTR3:
1533 pr_unimpl(vcpu, "unimplemented perfctr wrmsr: "
1534 "0x%x data 0x%llx\n", msr, data);
1535 break;
1536 case MSR_K7_CLK_CTL:
1537 /*
1538 * Ignore all writes to this no longer documented MSR.
1539 * Writes are only relevant for old K7 processors,
1540 * all pre-dating SVM, but a recommended workaround from
1541 * AMD for these chips. It is possible to speicify the
1542 * affected processor models on the command line, hence
1543 * the need to ignore the workaround.
1544 */
1545 break;
1546 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1547 if (kvm_hv_msr_partition_wide(msr)) {
1548 int r;
1549 mutex_lock(&vcpu->kvm->lock);
1550 r = set_msr_hyperv_pw(vcpu, msr, data);
1551 mutex_unlock(&vcpu->kvm->lock);
1552 return r;
1553 } else
1554 return set_msr_hyperv(vcpu, msr, data);
1555 break;
1556 default:
1557 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
1558 return xen_hvm_config(vcpu, data);
1559 if (!ignore_msrs) {
1560 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
1561 msr, data);
1562 return 1;
1563 } else {
1564 pr_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
1565 msr, data);
1566 break;
1567 }
1568 }
1569 return 0;
1570 }
1571 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
1572
1573
1574 /*
1575 * Reads an msr value (of 'msr_index') into 'pdata'.
1576 * Returns 0 on success, non-0 otherwise.
1577 * Assumes vcpu_load() was already called.
1578 */
1579 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
1580 {
1581 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
1582 }
1583
1584 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1585 {
1586 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
1587
1588 if (!msr_mtrr_valid(msr))
1589 return 1;
1590
1591 if (msr == MSR_MTRRdefType)
1592 *pdata = vcpu->arch.mtrr_state.def_type +
1593 (vcpu->arch.mtrr_state.enabled << 10);
1594 else if (msr == MSR_MTRRfix64K_00000)
1595 *pdata = p[0];
1596 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
1597 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
1598 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
1599 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
1600 else if (msr == MSR_IA32_CR_PAT)
1601 *pdata = vcpu->arch.pat;
1602 else { /* Variable MTRRs */
1603 int idx, is_mtrr_mask;
1604 u64 *pt;
1605
1606 idx = (msr - 0x200) / 2;
1607 is_mtrr_mask = msr - 0x200 - 2 * idx;
1608 if (!is_mtrr_mask)
1609 pt =
1610 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
1611 else
1612 pt =
1613 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
1614 *pdata = *pt;
1615 }
1616
1617 return 0;
1618 }
1619
1620 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1621 {
1622 u64 data;
1623 u64 mcg_cap = vcpu->arch.mcg_cap;
1624 unsigned bank_num = mcg_cap & 0xff;
1625
1626 switch (msr) {
1627 case MSR_IA32_P5_MC_ADDR:
1628 case MSR_IA32_P5_MC_TYPE:
1629 data = 0;
1630 break;
1631 case MSR_IA32_MCG_CAP:
1632 data = vcpu->arch.mcg_cap;
1633 break;
1634 case MSR_IA32_MCG_CTL:
1635 if (!(mcg_cap & MCG_CTL_P))
1636 return 1;
1637 data = vcpu->arch.mcg_ctl;
1638 break;
1639 case MSR_IA32_MCG_STATUS:
1640 data = vcpu->arch.mcg_status;
1641 break;
1642 default:
1643 if (msr >= MSR_IA32_MC0_CTL &&
1644 msr < MSR_IA32_MC0_CTL + 4 * bank_num) {
1645 u32 offset = msr - MSR_IA32_MC0_CTL;
1646 data = vcpu->arch.mce_banks[offset];
1647 break;
1648 }
1649 return 1;
1650 }
1651 *pdata = data;
1652 return 0;
1653 }
1654
1655 static int get_msr_hyperv_pw(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1656 {
1657 u64 data = 0;
1658 struct kvm *kvm = vcpu->kvm;
1659
1660 switch (msr) {
1661 case HV_X64_MSR_GUEST_OS_ID:
1662 data = kvm->arch.hv_guest_os_id;
1663 break;
1664 case HV_X64_MSR_HYPERCALL:
1665 data = kvm->arch.hv_hypercall;
1666 break;
1667 default:
1668 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1669 return 1;
1670 }
1671
1672 *pdata = data;
1673 return 0;
1674 }
1675
1676 static int get_msr_hyperv(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1677 {
1678 u64 data = 0;
1679
1680 switch (msr) {
1681 case HV_X64_MSR_VP_INDEX: {
1682 int r;
1683 struct kvm_vcpu *v;
1684 kvm_for_each_vcpu(r, v, vcpu->kvm)
1685 if (v == vcpu)
1686 data = r;
1687 break;
1688 }
1689 case HV_X64_MSR_EOI:
1690 return kvm_hv_vapic_msr_read(vcpu, APIC_EOI, pdata);
1691 case HV_X64_MSR_ICR:
1692 return kvm_hv_vapic_msr_read(vcpu, APIC_ICR, pdata);
1693 case HV_X64_MSR_TPR:
1694 return kvm_hv_vapic_msr_read(vcpu, APIC_TASKPRI, pdata);
1695 default:
1696 pr_unimpl(vcpu, "Hyper-V unhandled rdmsr: 0x%x\n", msr);
1697 return 1;
1698 }
1699 *pdata = data;
1700 return 0;
1701 }
1702
1703 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
1704 {
1705 u64 data;
1706
1707 switch (msr) {
1708 case MSR_IA32_PLATFORM_ID:
1709 case MSR_IA32_UCODE_REV:
1710 case MSR_IA32_EBL_CR_POWERON:
1711 case MSR_IA32_DEBUGCTLMSR:
1712 case MSR_IA32_LASTBRANCHFROMIP:
1713 case MSR_IA32_LASTBRANCHTOIP:
1714 case MSR_IA32_LASTINTFROMIP:
1715 case MSR_IA32_LASTINTTOIP:
1716 case MSR_K8_SYSCFG:
1717 case MSR_K7_HWCR:
1718 case MSR_VM_HSAVE_PA:
1719 case MSR_P6_PERFCTR0:
1720 case MSR_P6_PERFCTR1:
1721 case MSR_P6_EVNTSEL0:
1722 case MSR_P6_EVNTSEL1:
1723 case MSR_K7_EVNTSEL0:
1724 case MSR_K7_PERFCTR0:
1725 case MSR_K8_INT_PENDING_MSG:
1726 case MSR_AMD64_NB_CFG:
1727 case MSR_FAM10H_MMIO_CONF_BASE:
1728 data = 0;
1729 break;
1730 case MSR_MTRRcap:
1731 data = 0x500 | KVM_NR_VAR_MTRR;
1732 break;
1733 case 0x200 ... 0x2ff:
1734 return get_msr_mtrr(vcpu, msr, pdata);
1735 case 0xcd: /* fsb frequency */
1736 data = 3;
1737 break;
1738 /*
1739 * MSR_EBC_FREQUENCY_ID
1740 * Conservative value valid for even the basic CPU models.
1741 * Models 0,1: 000 in bits 23:21 indicating a bus speed of
1742 * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
1743 * and 266MHz for model 3, or 4. Set Core Clock
1744 * Frequency to System Bus Frequency Ratio to 1 (bits
1745 * 31:24) even though these are only valid for CPU
1746 * models > 2, however guests may end up dividing or
1747 * multiplying by zero otherwise.
1748 */
1749 case MSR_EBC_FREQUENCY_ID:
1750 data = 1 << 24;
1751 break;
1752 case MSR_IA32_APICBASE:
1753 data = kvm_get_apic_base(vcpu);
1754 break;
1755 case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1756 return kvm_x2apic_msr_read(vcpu, msr, pdata);
1757 break;
1758 case MSR_IA32_MISC_ENABLE:
1759 data = vcpu->arch.ia32_misc_enable_msr;
1760 break;
1761 case MSR_IA32_PERF_STATUS:
1762 /* TSC increment by tick */
1763 data = 1000ULL;
1764 /* CPU multiplier */
1765 data |= (((uint64_t)4ULL) << 40);
1766 break;
1767 case MSR_EFER:
1768 data = vcpu->arch.efer;
1769 break;
1770 case MSR_KVM_WALL_CLOCK:
1771 case MSR_KVM_WALL_CLOCK_NEW:
1772 data = vcpu->kvm->arch.wall_clock;
1773 break;
1774 case MSR_KVM_SYSTEM_TIME:
1775 case MSR_KVM_SYSTEM_TIME_NEW:
1776 data = vcpu->arch.time;
1777 break;
1778 case MSR_IA32_P5_MC_ADDR:
1779 case MSR_IA32_P5_MC_TYPE:
1780 case MSR_IA32_MCG_CAP:
1781 case MSR_IA32_MCG_CTL:
1782 case MSR_IA32_MCG_STATUS:
1783 case MSR_IA32_MC0_CTL ... MSR_IA32_MC0_CTL + 4 * KVM_MAX_MCE_BANKS - 1:
1784 return get_msr_mce(vcpu, msr, pdata);
1785 case MSR_K7_CLK_CTL:
1786 /*
1787 * Provide expected ramp-up count for K7. All other
1788 * are set to zero, indicating minimum divisors for
1789 * every field.
1790 *
1791 * This prevents guest kernels on AMD host with CPU
1792 * type 6, model 8 and higher from exploding due to
1793 * the rdmsr failing.
1794 */
1795 data = 0x20000000;
1796 break;
1797 case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
1798 if (kvm_hv_msr_partition_wide(msr)) {
1799 int r;
1800 mutex_lock(&vcpu->kvm->lock);
1801 r = get_msr_hyperv_pw(vcpu, msr, pdata);
1802 mutex_unlock(&vcpu->kvm->lock);
1803 return r;
1804 } else
1805 return get_msr_hyperv(vcpu, msr, pdata);
1806 break;
1807 default:
1808 if (!ignore_msrs) {
1809 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
1810 return 1;
1811 } else {
1812 pr_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr);
1813 data = 0;
1814 }
1815 break;
1816 }
1817 *pdata = data;
1818 return 0;
1819 }
1820 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
1821
1822 /*
1823 * Read or write a bunch of msrs. All parameters are kernel addresses.
1824 *
1825 * @return number of msrs set successfully.
1826 */
1827 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
1828 struct kvm_msr_entry *entries,
1829 int (*do_msr)(struct kvm_vcpu *vcpu,
1830 unsigned index, u64 *data))
1831 {
1832 int i, idx;
1833
1834 idx = srcu_read_lock(&vcpu->kvm->srcu);
1835 for (i = 0; i < msrs->nmsrs; ++i)
1836 if (do_msr(vcpu, entries[i].index, &entries[i].data))
1837 break;
1838 srcu_read_unlock(&vcpu->kvm->srcu, idx);
1839
1840 return i;
1841 }
1842
1843 /*
1844 * Read or write a bunch of msrs. Parameters are user addresses.
1845 *
1846 * @return number of msrs set successfully.
1847 */
1848 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
1849 int (*do_msr)(struct kvm_vcpu *vcpu,
1850 unsigned index, u64 *data),
1851 int writeback)
1852 {
1853 struct kvm_msrs msrs;
1854 struct kvm_msr_entry *entries;
1855 int r, n;
1856 unsigned size;
1857
1858 r = -EFAULT;
1859 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
1860 goto out;
1861
1862 r = -E2BIG;
1863 if (msrs.nmsrs >= MAX_IO_MSRS)
1864 goto out;
1865
1866 r = -ENOMEM;
1867 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
1868 entries = kmalloc(size, GFP_KERNEL);
1869 if (!entries)
1870 goto out;
1871
1872 r = -EFAULT;
1873 if (copy_from_user(entries, user_msrs->entries, size))
1874 goto out_free;
1875
1876 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1877 if (r < 0)
1878 goto out_free;
1879
1880 r = -EFAULT;
1881 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1882 goto out_free;
1883
1884 r = n;
1885
1886 out_free:
1887 kfree(entries);
1888 out:
1889 return r;
1890 }
1891
1892 int kvm_dev_ioctl_check_extension(long ext)
1893 {
1894 int r;
1895
1896 switch (ext) {
1897 case KVM_CAP_IRQCHIP:
1898 case KVM_CAP_HLT:
1899 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1900 case KVM_CAP_SET_TSS_ADDR:
1901 case KVM_CAP_EXT_CPUID:
1902 case KVM_CAP_CLOCKSOURCE:
1903 case KVM_CAP_PIT:
1904 case KVM_CAP_NOP_IO_DELAY:
1905 case KVM_CAP_MP_STATE:
1906 case KVM_CAP_SYNC_MMU:
1907 case KVM_CAP_REINJECT_CONTROL:
1908 case KVM_CAP_IRQ_INJECT_STATUS:
1909 case KVM_CAP_ASSIGN_DEV_IRQ:
1910 case KVM_CAP_IRQFD:
1911 case KVM_CAP_IOEVENTFD:
1912 case KVM_CAP_PIT2:
1913 case KVM_CAP_PIT_STATE2:
1914 case KVM_CAP_SET_IDENTITY_MAP_ADDR:
1915 case KVM_CAP_XEN_HVM:
1916 case KVM_CAP_ADJUST_CLOCK:
1917 case KVM_CAP_VCPU_EVENTS:
1918 case KVM_CAP_HYPERV:
1919 case KVM_CAP_HYPERV_VAPIC:
1920 case KVM_CAP_HYPERV_SPIN:
1921 case KVM_CAP_PCI_SEGMENT:
1922 case KVM_CAP_DEBUGREGS:
1923 case KVM_CAP_X86_ROBUST_SINGLESTEP:
1924 case KVM_CAP_XSAVE:
1925 r = 1;
1926 break;
1927 case KVM_CAP_COALESCED_MMIO:
1928 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1929 break;
1930 case KVM_CAP_VAPIC:
1931 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1932 break;
1933 case KVM_CAP_NR_VCPUS:
1934 r = KVM_MAX_VCPUS;
1935 break;
1936 case KVM_CAP_NR_MEMSLOTS:
1937 r = KVM_MEMORY_SLOTS;
1938 break;
1939 case KVM_CAP_PV_MMU: /* obsolete */
1940 r = 0;
1941 break;
1942 case KVM_CAP_IOMMU:
1943 r = iommu_found();
1944 break;
1945 case KVM_CAP_MCE:
1946 r = KVM_MAX_MCE_BANKS;
1947 break;
1948 case KVM_CAP_XCRS:
1949 r = cpu_has_xsave;
1950 break;
1951 default:
1952 r = 0;
1953 break;
1954 }
1955 return r;
1956
1957 }
1958
1959 long kvm_arch_dev_ioctl(struct file *filp,
1960 unsigned int ioctl, unsigned long arg)
1961 {
1962 void __user *argp = (void __user *)arg;
1963 long r;
1964
1965 switch (ioctl) {
1966 case KVM_GET_MSR_INDEX_LIST: {
1967 struct kvm_msr_list __user *user_msr_list = argp;
1968 struct kvm_msr_list msr_list;
1969 unsigned n;
1970
1971 r = -EFAULT;
1972 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1973 goto out;
1974 n = msr_list.nmsrs;
1975 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1976 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1977 goto out;
1978 r = -E2BIG;
1979 if (n < msr_list.nmsrs)
1980 goto out;
1981 r = -EFAULT;
1982 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1983 num_msrs_to_save * sizeof(u32)))
1984 goto out;
1985 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
1986 &emulated_msrs,
1987 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1988 goto out;
1989 r = 0;
1990 break;
1991 }
1992 case KVM_GET_SUPPORTED_CPUID: {
1993 struct kvm_cpuid2 __user *cpuid_arg = argp;
1994 struct kvm_cpuid2 cpuid;
1995
1996 r = -EFAULT;
1997 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1998 goto out;
1999 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
2000 cpuid_arg->entries);
2001 if (r)
2002 goto out;
2003
2004 r = -EFAULT;
2005 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2006 goto out;
2007 r = 0;
2008 break;
2009 }
2010 case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2011 u64 mce_cap;
2012
2013 mce_cap = KVM_MCE_CAP_SUPPORTED;
2014 r = -EFAULT;
2015 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2016 goto out;
2017 r = 0;
2018 break;
2019 }
2020 default:
2021 r = -EINVAL;
2022 }
2023 out:
2024 return r;
2025 }
2026
2027 static void wbinvd_ipi(void *garbage)
2028 {
2029 wbinvd();
2030 }
2031
2032 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2033 {
2034 return vcpu->kvm->arch.iommu_domain &&
2035 !(vcpu->kvm->arch.iommu_flags & KVM_IOMMU_CACHE_COHERENCY);
2036 }
2037
2038 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2039 {
2040 /* Address WBINVD may be executed by guest */
2041 if (need_emulate_wbinvd(vcpu)) {
2042 if (kvm_x86_ops->has_wbinvd_exit())
2043 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2044 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2045 smp_call_function_single(vcpu->cpu,
2046 wbinvd_ipi, NULL, 1);
2047 }
2048
2049 kvm_x86_ops->vcpu_load(vcpu, cpu);
2050 if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2051 /* Make sure TSC doesn't go backwards */
2052 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2053 native_read_tsc() - vcpu->arch.last_host_tsc;
2054 if (tsc_delta < 0)
2055 mark_tsc_unstable("KVM discovered backwards TSC");
2056 if (check_tsc_unstable()) {
2057 kvm_x86_ops->adjust_tsc_offset(vcpu, -tsc_delta);
2058 vcpu->arch.tsc_catchup = 1;
2059 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2060 }
2061 if (vcpu->cpu != cpu)
2062 kvm_migrate_timers(vcpu);
2063 vcpu->cpu = cpu;
2064 }
2065 }
2066
2067 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2068 {
2069 kvm_x86_ops->vcpu_put(vcpu);
2070 kvm_put_guest_fpu(vcpu);
2071 vcpu->arch.last_host_tsc = native_read_tsc();
2072 }
2073
2074 static int is_efer_nx(void)
2075 {
2076 unsigned long long efer = 0;
2077
2078 rdmsrl_safe(MSR_EFER, &efer);
2079 return efer & EFER_NX;
2080 }
2081
2082 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
2083 {
2084 int i;
2085 struct kvm_cpuid_entry2 *e, *entry;
2086
2087 entry = NULL;
2088 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
2089 e = &vcpu->arch.cpuid_entries[i];
2090 if (e->function == 0x80000001) {
2091 entry = e;
2092 break;
2093 }
2094 }
2095 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
2096 entry->edx &= ~(1 << 20);
2097 printk(KERN_INFO "kvm: guest NX capability removed\n");
2098 }
2099 }
2100
2101 /* when an old userspace process fills a new kernel module */
2102 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
2103 struct kvm_cpuid *cpuid,
2104 struct kvm_cpuid_entry __user *entries)
2105 {
2106 int r, i;
2107 struct kvm_cpuid_entry *cpuid_entries;
2108
2109 r = -E2BIG;
2110 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2111 goto out;
2112 r = -ENOMEM;
2113 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
2114 if (!cpuid_entries)
2115 goto out;
2116 r = -EFAULT;
2117 if (copy_from_user(cpuid_entries, entries,
2118 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
2119 goto out_free;
2120 for (i = 0; i < cpuid->nent; i++) {
2121 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
2122 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
2123 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
2124 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
2125 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
2126 vcpu->arch.cpuid_entries[i].index = 0;
2127 vcpu->arch.cpuid_entries[i].flags = 0;
2128 vcpu->arch.cpuid_entries[i].padding[0] = 0;
2129 vcpu->arch.cpuid_entries[i].padding[1] = 0;
2130 vcpu->arch.cpuid_entries[i].padding[2] = 0;
2131 }
2132 vcpu->arch.cpuid_nent = cpuid->nent;
2133 cpuid_fix_nx_cap(vcpu);
2134 r = 0;
2135 kvm_apic_set_version(vcpu);
2136 kvm_x86_ops->cpuid_update(vcpu);
2137 update_cpuid(vcpu);
2138
2139 out_free:
2140 vfree(cpuid_entries);
2141 out:
2142 return r;
2143 }
2144
2145 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
2146 struct kvm_cpuid2 *cpuid,
2147 struct kvm_cpuid_entry2 __user *entries)
2148 {
2149 int r;
2150
2151 r = -E2BIG;
2152 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2153 goto out;
2154 r = -EFAULT;
2155 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
2156 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
2157 goto out;
2158 vcpu->arch.cpuid_nent = cpuid->nent;
2159 kvm_apic_set_version(vcpu);
2160 kvm_x86_ops->cpuid_update(vcpu);
2161 update_cpuid(vcpu);
2162 return 0;
2163
2164 out:
2165 return r;
2166 }
2167
2168 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
2169 struct kvm_cpuid2 *cpuid,
2170 struct kvm_cpuid_entry2 __user *entries)
2171 {
2172 int r;
2173
2174 r = -E2BIG;
2175 if (cpuid->nent < vcpu->arch.cpuid_nent)
2176 goto out;
2177 r = -EFAULT;
2178 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
2179 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
2180 goto out;
2181 return 0;
2182
2183 out:
2184 cpuid->nent = vcpu->arch.cpuid_nent;
2185 return r;
2186 }
2187
2188 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2189 u32 index)
2190 {
2191 entry->function = function;
2192 entry->index = index;
2193 cpuid_count(entry->function, entry->index,
2194 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
2195 entry->flags = 0;
2196 }
2197
2198 #define F(x) bit(X86_FEATURE_##x)
2199
2200 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
2201 u32 index, int *nent, int maxnent)
2202 {
2203 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
2204 #ifdef CONFIG_X86_64
2205 unsigned f_gbpages = (kvm_x86_ops->get_lpage_level() == PT_PDPE_LEVEL)
2206 ? F(GBPAGES) : 0;
2207 unsigned f_lm = F(LM);
2208 #else
2209 unsigned f_gbpages = 0;
2210 unsigned f_lm = 0;
2211 #endif
2212 unsigned f_rdtscp = kvm_x86_ops->rdtscp_supported() ? F(RDTSCP) : 0;
2213
2214 /* cpuid 1.edx */
2215 const u32 kvm_supported_word0_x86_features =
2216 F(FPU) | F(VME) | F(DE) | F(PSE) |
2217 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2218 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
2219 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2220 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
2221 0 /* Reserved, DS, ACPI */ | F(MMX) |
2222 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
2223 0 /* HTT, TM, Reserved, PBE */;
2224 /* cpuid 0x80000001.edx */
2225 const u32 kvm_supported_word1_x86_features =
2226 F(FPU) | F(VME) | F(DE) | F(PSE) |
2227 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
2228 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
2229 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
2230 F(PAT) | F(PSE36) | 0 /* Reserved */ |
2231 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
2232 F(FXSR) | F(FXSR_OPT) | f_gbpages | f_rdtscp |
2233 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
2234 /* cpuid 1.ecx */
2235 const u32 kvm_supported_word4_x86_features =
2236 F(XMM3) | F(PCLMULQDQ) | 0 /* DTES64, MONITOR */ |
2237 0 /* DS-CPL, VMX, SMX, EST */ |
2238 0 /* TM2 */ | F(SSSE3) | 0 /* CNXT-ID */ | 0 /* Reserved */ |
2239 0 /* Reserved */ | F(CX16) | 0 /* xTPR Update, PDCM */ |
2240 0 /* Reserved, DCA */ | F(XMM4_1) |
2241 F(XMM4_2) | F(X2APIC) | F(MOVBE) | F(POPCNT) |
2242 0 /* Reserved*/ | F(AES) | F(XSAVE) | 0 /* OSXSAVE */ | F(AVX) |
2243 F(F16C);
2244 /* cpuid 0x80000001.ecx */
2245 const u32 kvm_supported_word6_x86_features =
2246 F(LAHF_LM) | F(CMP_LEGACY) | 0 /*SVM*/ | 0 /* ExtApicSpace */ |
2247 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
2248 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(XOP) |
2249 0 /* SKINIT, WDT, LWP */ | F(FMA4) | F(TBM);
2250
2251 /* all calls to cpuid_count() should be made on the same cpu */
2252 get_cpu();
2253 do_cpuid_1_ent(entry, function, index);
2254 ++*nent;
2255
2256 switch (function) {
2257 case 0:
2258 entry->eax = min(entry->eax, (u32)0xd);
2259 break;
2260 case 1:
2261 entry->edx &= kvm_supported_word0_x86_features;
2262 entry->ecx &= kvm_supported_word4_x86_features;
2263 /* we support x2apic emulation even if host does not support
2264 * it since we emulate x2apic in software */
2265 entry->ecx |= F(X2APIC);
2266 break;
2267 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
2268 * may return different values. This forces us to get_cpu() before
2269 * issuing the first command, and also to emulate this annoying behavior
2270 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
2271 case 2: {
2272 int t, times = entry->eax & 0xff;
2273
2274 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2275 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2276 for (t = 1; t < times && *nent < maxnent; ++t) {
2277 do_cpuid_1_ent(&entry[t], function, 0);
2278 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
2279 ++*nent;
2280 }
2281 break;
2282 }
2283 /* function 4 and 0xb have additional index. */
2284 case 4: {
2285 int i, cache_type;
2286
2287 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2288 /* read more entries until cache_type is zero */
2289 for (i = 1; *nent < maxnent; ++i) {
2290 cache_type = entry[i - 1].eax & 0x1f;
2291 if (!cache_type)
2292 break;
2293 do_cpuid_1_ent(&entry[i], function, i);
2294 entry[i].flags |=
2295 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2296 ++*nent;
2297 }
2298 break;
2299 }
2300 case 0xb: {
2301 int i, level_type;
2302
2303 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2304 /* read more entries until level_type is zero */
2305 for (i = 1; *nent < maxnent; ++i) {
2306 level_type = entry[i - 1].ecx & 0xff00;
2307 if (!level_type)
2308 break;
2309 do_cpuid_1_ent(&entry[i], function, i);
2310 entry[i].flags |=
2311 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2312 ++*nent;
2313 }
2314 break;
2315 }
2316 case 0xd: {
2317 int i;
2318
2319 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2320 for (i = 1; *nent < maxnent; ++i) {
2321 if (entry[i - 1].eax == 0 && i != 2)
2322 break;
2323 do_cpuid_1_ent(&entry[i], function, i);
2324 entry[i].flags |=
2325 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
2326 ++*nent;
2327 }
2328 break;
2329 }
2330 case KVM_CPUID_SIGNATURE: {
2331 char signature[12] = "KVMKVMKVM\0\0";
2332 u32 *sigptr = (u32 *)signature;
2333 entry->eax = 0;
2334 entry->ebx = sigptr[0];
2335 entry->ecx = sigptr[1];
2336 entry->edx = sigptr[2];
2337 break;
2338 }
2339 case KVM_CPUID_FEATURES:
2340 entry->eax = (1 << KVM_FEATURE_CLOCKSOURCE) |
2341 (1 << KVM_FEATURE_NOP_IO_DELAY) |
2342 (1 << KVM_FEATURE_CLOCKSOURCE2) |
2343 (1 << KVM_FEATURE_CLOCKSOURCE_STABLE_BIT);
2344 entry->ebx = 0;
2345 entry->ecx = 0;
2346 entry->edx = 0;
2347 break;
2348 case 0x80000000:
2349 entry->eax = min(entry->eax, 0x8000001a);
2350 break;
2351 case 0x80000001:
2352 entry->edx &= kvm_supported_word1_x86_features;
2353 entry->ecx &= kvm_supported_word6_x86_features;
2354 break;
2355 }
2356
2357 kvm_x86_ops->set_supported_cpuid(function, entry);
2358
2359 put_cpu();
2360 }
2361
2362 #undef F
2363
2364 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
2365 struct kvm_cpuid_entry2 __user *entries)
2366 {
2367 struct kvm_cpuid_entry2 *cpuid_entries;
2368 int limit, nent = 0, r = -E2BIG;
2369 u32 func;
2370
2371 if (cpuid->nent < 1)
2372 goto out;
2373 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
2374 cpuid->nent = KVM_MAX_CPUID_ENTRIES;
2375 r = -ENOMEM;
2376 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
2377 if (!cpuid_entries)
2378 goto out;
2379
2380 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
2381 limit = cpuid_entries[0].eax;
2382 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
2383 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2384 &nent, cpuid->nent);
2385 r = -E2BIG;
2386 if (nent >= cpuid->nent)
2387 goto out_free;
2388
2389 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
2390 limit = cpuid_entries[nent - 1].eax;
2391 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
2392 do_cpuid_ent(&cpuid_entries[nent], func, 0,
2393 &nent, cpuid->nent);
2394
2395
2396
2397 r = -E2BIG;
2398 if (nent >= cpuid->nent)
2399 goto out_free;
2400
2401 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_SIGNATURE, 0, &nent,
2402 cpuid->nent);
2403
2404 r = -E2BIG;
2405 if (nent >= cpuid->nent)
2406 goto out_free;
2407
2408 do_cpuid_ent(&cpuid_entries[nent], KVM_CPUID_FEATURES, 0, &nent,
2409 cpuid->nent);
2410
2411 r = -E2BIG;
2412 if (nent >= cpuid->nent)
2413 goto out_free;
2414
2415 r = -EFAULT;
2416 if (copy_to_user(entries, cpuid_entries,
2417 nent * sizeof(struct kvm_cpuid_entry2)))
2418 goto out_free;
2419 cpuid->nent = nent;
2420 r = 0;
2421
2422 out_free:
2423 vfree(cpuid_entries);
2424 out:
2425 return r;
2426 }
2427
2428 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2429 struct kvm_lapic_state *s)
2430 {
2431 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2432
2433 return 0;
2434 }
2435
2436 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2437 struct kvm_lapic_state *s)
2438 {
2439 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
2440 kvm_apic_post_state_restore(vcpu);
2441 update_cr8_intercept(vcpu);
2442
2443 return 0;
2444 }
2445
2446 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2447 struct kvm_interrupt *irq)
2448 {
2449 if (irq->irq < 0 || irq->irq >= 256)
2450 return -EINVAL;
2451 if (irqchip_in_kernel(vcpu->kvm))
2452 return -ENXIO;
2453
2454 kvm_queue_interrupt(vcpu, irq->irq, false);
2455 kvm_make_request(KVM_REQ_EVENT, vcpu);
2456
2457 return 0;
2458 }
2459
2460 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2461 {
2462 kvm_inject_nmi(vcpu);
2463
2464 return 0;
2465 }
2466
2467 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2468 struct kvm_tpr_access_ctl *tac)
2469 {
2470 if (tac->flags)
2471 return -EINVAL;
2472 vcpu->arch.tpr_access_reporting = !!tac->enabled;
2473 return 0;
2474 }
2475
2476 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2477 u64 mcg_cap)
2478 {
2479 int r;
2480 unsigned bank_num = mcg_cap & 0xff, bank;
2481
2482 r = -EINVAL;
2483 if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2484 goto out;
2485 if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2486 goto out;
2487 r = 0;
2488 vcpu->arch.mcg_cap = mcg_cap;
2489 /* Init IA32_MCG_CTL to all 1s */
2490 if (mcg_cap & MCG_CTL_P)
2491 vcpu->arch.mcg_ctl = ~(u64)0;
2492 /* Init IA32_MCi_CTL to all 1s */
2493 for (bank = 0; bank < bank_num; bank++)
2494 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2495 out:
2496 return r;
2497 }
2498
2499 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2500 struct kvm_x86_mce *mce)
2501 {
2502 u64 mcg_cap = vcpu->arch.mcg_cap;
2503 unsigned bank_num = mcg_cap & 0xff;
2504 u64 *banks = vcpu->arch.mce_banks;
2505
2506 if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2507 return -EINVAL;
2508 /*
2509 * if IA32_MCG_CTL is not all 1s, the uncorrected error
2510 * reporting is disabled
2511 */
2512 if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2513 vcpu->arch.mcg_ctl != ~(u64)0)
2514 return 0;
2515 banks += 4 * mce->bank;
2516 /*
2517 * if IA32_MCi_CTL is not all 1s, the uncorrected error
2518 * reporting is disabled for the bank
2519 */
2520 if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2521 return 0;
2522 if (mce->status & MCI_STATUS_UC) {
2523 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2524 !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2525 printk(KERN_DEBUG "kvm: set_mce: "
2526 "injects mce exception while "
2527 "previous one is in progress!\n");
2528 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2529 return 0;
2530 }
2531 if (banks[1] & MCI_STATUS_VAL)
2532 mce->status |= MCI_STATUS_OVER;
2533 banks[2] = mce->addr;
2534 banks[3] = mce->misc;
2535 vcpu->arch.mcg_status = mce->mcg_status;
2536 banks[1] = mce->status;
2537 kvm_queue_exception(vcpu, MC_VECTOR);
2538 } else if (!(banks[1] & MCI_STATUS_VAL)
2539 || !(banks[1] & MCI_STATUS_UC)) {
2540 if (banks[1] & MCI_STATUS_VAL)
2541 mce->status |= MCI_STATUS_OVER;
2542 banks[2] = mce->addr;
2543 banks[3] = mce->misc;
2544 banks[1] = mce->status;
2545 } else
2546 banks[1] |= MCI_STATUS_OVER;
2547 return 0;
2548 }
2549
2550 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2551 struct kvm_vcpu_events *events)
2552 {
2553 events->exception.injected =
2554 vcpu->arch.exception.pending &&
2555 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2556 events->exception.nr = vcpu->arch.exception.nr;
2557 events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2558 events->exception.pad = 0;
2559 events->exception.error_code = vcpu->arch.exception.error_code;
2560
2561 events->interrupt.injected =
2562 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2563 events->interrupt.nr = vcpu->arch.interrupt.nr;
2564 events->interrupt.soft = 0;
2565 events->interrupt.shadow =
2566 kvm_x86_ops->get_interrupt_shadow(vcpu,
2567 KVM_X86_SHADOW_INT_MOV_SS | KVM_X86_SHADOW_INT_STI);
2568
2569 events->nmi.injected = vcpu->arch.nmi_injected;
2570 events->nmi.pending = vcpu->arch.nmi_pending;
2571 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2572 events->nmi.pad = 0;
2573
2574 events->sipi_vector = vcpu->arch.sipi_vector;
2575
2576 events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2577 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2578 | KVM_VCPUEVENT_VALID_SHADOW);
2579 memset(&events->reserved, 0, sizeof(events->reserved));
2580 }
2581
2582 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2583 struct kvm_vcpu_events *events)
2584 {
2585 if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2586 | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2587 | KVM_VCPUEVENT_VALID_SHADOW))
2588 return -EINVAL;
2589
2590 vcpu->arch.exception.pending = events->exception.injected;
2591 vcpu->arch.exception.nr = events->exception.nr;
2592 vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2593 vcpu->arch.exception.error_code = events->exception.error_code;
2594
2595 vcpu->arch.interrupt.pending = events->interrupt.injected;
2596 vcpu->arch.interrupt.nr = events->interrupt.nr;
2597 vcpu->arch.interrupt.soft = events->interrupt.soft;
2598 if (vcpu->arch.interrupt.pending && irqchip_in_kernel(vcpu->kvm))
2599 kvm_pic_clear_isr_ack(vcpu->kvm);
2600 if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2601 kvm_x86_ops->set_interrupt_shadow(vcpu,
2602 events->interrupt.shadow);
2603
2604 vcpu->arch.nmi_injected = events->nmi.injected;
2605 if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2606 vcpu->arch.nmi_pending = events->nmi.pending;
2607 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2608
2609 if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR)
2610 vcpu->arch.sipi_vector = events->sipi_vector;
2611
2612 kvm_make_request(KVM_REQ_EVENT, vcpu);
2613
2614 return 0;
2615 }
2616
2617 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2618 struct kvm_debugregs *dbgregs)
2619 {
2620 memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2621 dbgregs->dr6 = vcpu->arch.dr6;
2622 dbgregs->dr7 = vcpu->arch.dr7;
2623 dbgregs->flags = 0;
2624 memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2625 }
2626
2627 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2628 struct kvm_debugregs *dbgregs)
2629 {
2630 if (dbgregs->flags)
2631 return -EINVAL;
2632
2633 memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2634 vcpu->arch.dr6 = dbgregs->dr6;
2635 vcpu->arch.dr7 = dbgregs->dr7;
2636
2637 return 0;
2638 }
2639
2640 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2641 struct kvm_xsave *guest_xsave)
2642 {
2643 if (cpu_has_xsave)
2644 memcpy(guest_xsave->region,
2645 &vcpu->arch.guest_fpu.state->xsave,
2646 xstate_size);
2647 else {
2648 memcpy(guest_xsave->region,
2649 &vcpu->arch.guest_fpu.state->fxsave,
2650 sizeof(struct i387_fxsave_struct));
2651 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2652 XSTATE_FPSSE;
2653 }
2654 }
2655
2656 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2657 struct kvm_xsave *guest_xsave)
2658 {
2659 u64 xstate_bv =
2660 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2661
2662 if (cpu_has_xsave)
2663 memcpy(&vcpu->arch.guest_fpu.state->xsave,
2664 guest_xsave->region, xstate_size);
2665 else {
2666 if (xstate_bv & ~XSTATE_FPSSE)
2667 return -EINVAL;
2668 memcpy(&vcpu->arch.guest_fpu.state->fxsave,
2669 guest_xsave->region, sizeof(struct i387_fxsave_struct));
2670 }
2671 return 0;
2672 }
2673
2674 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
2675 struct kvm_xcrs *guest_xcrs)
2676 {
2677 if (!cpu_has_xsave) {
2678 guest_xcrs->nr_xcrs = 0;
2679 return;
2680 }
2681
2682 guest_xcrs->nr_xcrs = 1;
2683 guest_xcrs->flags = 0;
2684 guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
2685 guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
2686 }
2687
2688 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
2689 struct kvm_xcrs *guest_xcrs)
2690 {
2691 int i, r = 0;
2692
2693 if (!cpu_has_xsave)
2694 return -EINVAL;
2695
2696 if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
2697 return -EINVAL;
2698
2699 for (i = 0; i < guest_xcrs->nr_xcrs; i++)
2700 /* Only support XCR0 currently */
2701 if (guest_xcrs->xcrs[0].xcr == XCR_XFEATURE_ENABLED_MASK) {
2702 r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
2703 guest_xcrs->xcrs[0].value);
2704 break;
2705 }
2706 if (r)
2707 r = -EINVAL;
2708 return r;
2709 }
2710
2711 long kvm_arch_vcpu_ioctl(struct file *filp,
2712 unsigned int ioctl, unsigned long arg)
2713 {
2714 struct kvm_vcpu *vcpu = filp->private_data;
2715 void __user *argp = (void __user *)arg;
2716 int r;
2717 union {
2718 struct kvm_lapic_state *lapic;
2719 struct kvm_xsave *xsave;
2720 struct kvm_xcrs *xcrs;
2721 void *buffer;
2722 } u;
2723
2724 u.buffer = NULL;
2725 switch (ioctl) {
2726 case KVM_GET_LAPIC: {
2727 r = -EINVAL;
2728 if (!vcpu->arch.apic)
2729 goto out;
2730 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2731
2732 r = -ENOMEM;
2733 if (!u.lapic)
2734 goto out;
2735 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
2736 if (r)
2737 goto out;
2738 r = -EFAULT;
2739 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
2740 goto out;
2741 r = 0;
2742 break;
2743 }
2744 case KVM_SET_LAPIC: {
2745 r = -EINVAL;
2746 if (!vcpu->arch.apic)
2747 goto out;
2748 u.lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
2749 r = -ENOMEM;
2750 if (!u.lapic)
2751 goto out;
2752 r = -EFAULT;
2753 if (copy_from_user(u.lapic, argp, sizeof(struct kvm_lapic_state)))
2754 goto out;
2755 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
2756 if (r)
2757 goto out;
2758 r = 0;
2759 break;
2760 }
2761 case KVM_INTERRUPT: {
2762 struct kvm_interrupt irq;
2763
2764 r = -EFAULT;
2765 if (copy_from_user(&irq, argp, sizeof irq))
2766 goto out;
2767 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
2768 if (r)
2769 goto out;
2770 r = 0;
2771 break;
2772 }
2773 case KVM_NMI: {
2774 r = kvm_vcpu_ioctl_nmi(vcpu);
2775 if (r)
2776 goto out;
2777 r = 0;
2778 break;
2779 }
2780 case KVM_SET_CPUID: {
2781 struct kvm_cpuid __user *cpuid_arg = argp;
2782 struct kvm_cpuid cpuid;
2783
2784 r = -EFAULT;
2785 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2786 goto out;
2787 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
2788 if (r)
2789 goto out;
2790 break;
2791 }
2792 case KVM_SET_CPUID2: {
2793 struct kvm_cpuid2 __user *cpuid_arg = argp;
2794 struct kvm_cpuid2 cpuid;
2795
2796 r = -EFAULT;
2797 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2798 goto out;
2799 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
2800 cpuid_arg->entries);
2801 if (r)
2802 goto out;
2803 break;
2804 }
2805 case KVM_GET_CPUID2: {
2806 struct kvm_cpuid2 __user *cpuid_arg = argp;
2807 struct kvm_cpuid2 cpuid;
2808
2809 r = -EFAULT;
2810 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2811 goto out;
2812 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
2813 cpuid_arg->entries);
2814 if (r)
2815 goto out;
2816 r = -EFAULT;
2817 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2818 goto out;
2819 r = 0;
2820 break;
2821 }
2822 case KVM_GET_MSRS:
2823 r = msr_io(vcpu, argp, kvm_get_msr, 1);
2824 break;
2825 case KVM_SET_MSRS:
2826 r = msr_io(vcpu, argp, do_set_msr, 0);
2827 break;
2828 case KVM_TPR_ACCESS_REPORTING: {
2829 struct kvm_tpr_access_ctl tac;
2830
2831 r = -EFAULT;
2832 if (copy_from_user(&tac, argp, sizeof tac))
2833 goto out;
2834 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
2835 if (r)
2836 goto out;
2837 r = -EFAULT;
2838 if (copy_to_user(argp, &tac, sizeof tac))
2839 goto out;
2840 r = 0;
2841 break;
2842 };
2843 case KVM_SET_VAPIC_ADDR: {
2844 struct kvm_vapic_addr va;
2845
2846 r = -EINVAL;
2847 if (!irqchip_in_kernel(vcpu->kvm))
2848 goto out;
2849 r = -EFAULT;
2850 if (copy_from_user(&va, argp, sizeof va))
2851 goto out;
2852 r = 0;
2853 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
2854 break;
2855 }
2856 case KVM_X86_SETUP_MCE: {
2857 u64 mcg_cap;
2858
2859 r = -EFAULT;
2860 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
2861 goto out;
2862 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
2863 break;
2864 }
2865 case KVM_X86_SET_MCE: {
2866 struct kvm_x86_mce mce;
2867
2868 r = -EFAULT;
2869 if (copy_from_user(&mce, argp, sizeof mce))
2870 goto out;
2871 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
2872 break;
2873 }
2874 case KVM_GET_VCPU_EVENTS: {
2875 struct kvm_vcpu_events events;
2876
2877 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
2878
2879 r = -EFAULT;
2880 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
2881 break;
2882 r = 0;
2883 break;
2884 }
2885 case KVM_SET_VCPU_EVENTS: {
2886 struct kvm_vcpu_events events;
2887
2888 r = -EFAULT;
2889 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
2890 break;
2891
2892 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
2893 break;
2894 }
2895 case KVM_GET_DEBUGREGS: {
2896 struct kvm_debugregs dbgregs;
2897
2898 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
2899
2900 r = -EFAULT;
2901 if (copy_to_user(argp, &dbgregs,
2902 sizeof(struct kvm_debugregs)))
2903 break;
2904 r = 0;
2905 break;
2906 }
2907 case KVM_SET_DEBUGREGS: {
2908 struct kvm_debugregs dbgregs;
2909
2910 r = -EFAULT;
2911 if (copy_from_user(&dbgregs, argp,
2912 sizeof(struct kvm_debugregs)))
2913 break;
2914
2915 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
2916 break;
2917 }
2918 case KVM_GET_XSAVE: {
2919 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2920 r = -ENOMEM;
2921 if (!u.xsave)
2922 break;
2923
2924 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
2925
2926 r = -EFAULT;
2927 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
2928 break;
2929 r = 0;
2930 break;
2931 }
2932 case KVM_SET_XSAVE: {
2933 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
2934 r = -ENOMEM;
2935 if (!u.xsave)
2936 break;
2937
2938 r = -EFAULT;
2939 if (copy_from_user(u.xsave, argp, sizeof(struct kvm_xsave)))
2940 break;
2941
2942 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
2943 break;
2944 }
2945 case KVM_GET_XCRS: {
2946 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2947 r = -ENOMEM;
2948 if (!u.xcrs)
2949 break;
2950
2951 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
2952
2953 r = -EFAULT;
2954 if (copy_to_user(argp, u.xcrs,
2955 sizeof(struct kvm_xcrs)))
2956 break;
2957 r = 0;
2958 break;
2959 }
2960 case KVM_SET_XCRS: {
2961 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
2962 r = -ENOMEM;
2963 if (!u.xcrs)
2964 break;
2965
2966 r = -EFAULT;
2967 if (copy_from_user(u.xcrs, argp,
2968 sizeof(struct kvm_xcrs)))
2969 break;
2970
2971 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
2972 break;
2973 }
2974 default:
2975 r = -EINVAL;
2976 }
2977 out:
2978 kfree(u.buffer);
2979 return r;
2980 }
2981
2982 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
2983 {
2984 int ret;
2985
2986 if (addr > (unsigned int)(-3 * PAGE_SIZE))
2987 return -1;
2988 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
2989 return ret;
2990 }
2991
2992 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
2993 u64 ident_addr)
2994 {
2995 kvm->arch.ept_identity_map_addr = ident_addr;
2996 return 0;
2997 }
2998
2999 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3000 u32 kvm_nr_mmu_pages)
3001 {
3002 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3003 return -EINVAL;
3004
3005 mutex_lock(&kvm->slots_lock);
3006 spin_lock(&kvm->mmu_lock);
3007
3008 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3009 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3010
3011 spin_unlock(&kvm->mmu_lock);
3012 mutex_unlock(&kvm->slots_lock);
3013 return 0;
3014 }
3015
3016 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3017 {
3018 return kvm->arch.n_max_mmu_pages;
3019 }
3020
3021 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3022 {
3023 int r;
3024
3025 r = 0;
3026 switch (chip->chip_id) {
3027 case KVM_IRQCHIP_PIC_MASTER:
3028 memcpy(&chip->chip.pic,
3029 &pic_irqchip(kvm)->pics[0],
3030 sizeof(struct kvm_pic_state));
3031 break;
3032 case KVM_IRQCHIP_PIC_SLAVE:
3033 memcpy(&chip->chip.pic,
3034 &pic_irqchip(kvm)->pics[1],
3035 sizeof(struct kvm_pic_state));
3036 break;
3037 case KVM_IRQCHIP_IOAPIC:
3038 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3039 break;
3040 default:
3041 r = -EINVAL;
3042 break;
3043 }
3044 return r;
3045 }
3046
3047 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3048 {
3049 int r;
3050
3051 r = 0;
3052 switch (chip->chip_id) {
3053 case KVM_IRQCHIP_PIC_MASTER:
3054 spin_lock(&pic_irqchip(kvm)->lock);
3055 memcpy(&pic_irqchip(kvm)->pics[0],
3056 &chip->chip.pic,
3057 sizeof(struct kvm_pic_state));
3058 spin_unlock(&pic_irqchip(kvm)->lock);
3059 break;
3060 case KVM_IRQCHIP_PIC_SLAVE:
3061 spin_lock(&pic_irqchip(kvm)->lock);
3062 memcpy(&pic_irqchip(kvm)->pics[1],
3063 &chip->chip.pic,
3064 sizeof(struct kvm_pic_state));
3065 spin_unlock(&pic_irqchip(kvm)->lock);
3066 break;
3067 case KVM_IRQCHIP_IOAPIC:
3068 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3069 break;
3070 default:
3071 r = -EINVAL;
3072 break;
3073 }
3074 kvm_pic_update_irq(pic_irqchip(kvm));
3075 return r;
3076 }
3077
3078 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3079 {
3080 int r = 0;
3081
3082 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3083 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3084 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3085 return r;
3086 }
3087
3088 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3089 {
3090 int r = 0;
3091
3092 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3093 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3094 kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3095 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3096 return r;
3097 }
3098
3099 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3100 {
3101 int r = 0;
3102
3103 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3104 memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3105 sizeof(ps->channels));
3106 ps->flags = kvm->arch.vpit->pit_state.flags;
3107 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3108 memset(&ps->reserved, 0, sizeof(ps->reserved));
3109 return r;
3110 }
3111
3112 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3113 {
3114 int r = 0, start = 0;
3115 u32 prev_legacy, cur_legacy;
3116 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3117 prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3118 cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3119 if (!prev_legacy && cur_legacy)
3120 start = 1;
3121 memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3122 sizeof(kvm->arch.vpit->pit_state.channels));
3123 kvm->arch.vpit->pit_state.flags = ps->flags;
3124 kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3125 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3126 return r;
3127 }
3128
3129 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3130 struct kvm_reinject_control *control)
3131 {
3132 if (!kvm->arch.vpit)
3133 return -ENXIO;
3134 mutex_lock(&kvm->arch.vpit->pit_state.lock);
3135 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
3136 mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3137 return 0;
3138 }
3139
3140 /*
3141 * Get (and clear) the dirty memory log for a memory slot.
3142 */
3143 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
3144 struct kvm_dirty_log *log)
3145 {
3146 int r, i;
3147 struct kvm_memory_slot *memslot;
3148 unsigned long n;
3149 unsigned long is_dirty = 0;
3150
3151 mutex_lock(&kvm->slots_lock);
3152
3153 r = -EINVAL;
3154 if (log->slot >= KVM_MEMORY_SLOTS)
3155 goto out;
3156
3157 memslot = &kvm->memslots->memslots[log->slot];
3158 r = -ENOENT;
3159 if (!memslot->dirty_bitmap)
3160 goto out;
3161
3162 n = kvm_dirty_bitmap_bytes(memslot);
3163
3164 for (i = 0; !is_dirty && i < n/sizeof(long); i++)
3165 is_dirty = memslot->dirty_bitmap[i];
3166
3167 /* If nothing is dirty, don't bother messing with page tables. */
3168 if (is_dirty) {
3169 struct kvm_memslots *slots, *old_slots;
3170 unsigned long *dirty_bitmap;
3171
3172 r = -ENOMEM;
3173 dirty_bitmap = vmalloc(n);
3174 if (!dirty_bitmap)
3175 goto out;
3176 memset(dirty_bitmap, 0, n);
3177
3178 r = -ENOMEM;
3179 slots = kzalloc(sizeof(struct kvm_memslots), GFP_KERNEL);
3180 if (!slots) {
3181 vfree(dirty_bitmap);
3182 goto out;
3183 }
3184 memcpy(slots, kvm->memslots, sizeof(struct kvm_memslots));
3185 slots->memslots[log->slot].dirty_bitmap = dirty_bitmap;
3186
3187 old_slots = kvm->memslots;
3188 rcu_assign_pointer(kvm->memslots, slots);
3189 synchronize_srcu_expedited(&kvm->srcu);
3190 dirty_bitmap = old_slots->memslots[log->slot].dirty_bitmap;
3191 kfree(old_slots);
3192
3193 spin_lock(&kvm->mmu_lock);
3194 kvm_mmu_slot_remove_write_access(kvm, log->slot);
3195 spin_unlock(&kvm->mmu_lock);
3196
3197 r = -EFAULT;
3198 if (copy_to_user(log->dirty_bitmap, dirty_bitmap, n)) {
3199 vfree(dirty_bitmap);
3200 goto out;
3201 }
3202 vfree(dirty_bitmap);
3203 } else {
3204 r = -EFAULT;
3205 if (clear_user(log->dirty_bitmap, n))
3206 goto out;
3207 }
3208
3209 r = 0;
3210 out:
3211 mutex_unlock(&kvm->slots_lock);
3212 return r;
3213 }
3214
3215 long kvm_arch_vm_ioctl(struct file *filp,
3216 unsigned int ioctl, unsigned long arg)
3217 {
3218 struct kvm *kvm = filp->private_data;
3219 void __user *argp = (void __user *)arg;
3220 int r = -ENOTTY;
3221 /*
3222 * This union makes it completely explicit to gcc-3.x
3223 * that these two variables' stack usage should be
3224 * combined, not added together.
3225 */
3226 union {
3227 struct kvm_pit_state ps;
3228 struct kvm_pit_state2 ps2;
3229 struct kvm_pit_config pit_config;
3230 } u;
3231
3232 switch (ioctl) {
3233 case KVM_SET_TSS_ADDR:
3234 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3235 if (r < 0)
3236 goto out;
3237 break;
3238 case KVM_SET_IDENTITY_MAP_ADDR: {
3239 u64 ident_addr;
3240
3241 r = -EFAULT;
3242 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3243 goto out;
3244 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3245 if (r < 0)
3246 goto out;
3247 break;
3248 }
3249 case KVM_SET_NR_MMU_PAGES:
3250 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3251 if (r)
3252 goto out;
3253 break;
3254 case KVM_GET_NR_MMU_PAGES:
3255 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3256 break;
3257 case KVM_CREATE_IRQCHIP: {
3258 struct kvm_pic *vpic;
3259
3260 mutex_lock(&kvm->lock);
3261 r = -EEXIST;
3262 if (kvm->arch.vpic)
3263 goto create_irqchip_unlock;
3264 r = -ENOMEM;
3265 vpic = kvm_create_pic(kvm);
3266 if (vpic) {
3267 r = kvm_ioapic_init(kvm);
3268 if (r) {
3269 kvm_io_bus_unregister_dev(kvm, KVM_PIO_BUS,
3270 &vpic->dev);
3271 kfree(vpic);
3272 goto create_irqchip_unlock;
3273 }
3274 } else
3275 goto create_irqchip_unlock;
3276 smp_wmb();
3277 kvm->arch.vpic = vpic;
3278 smp_wmb();
3279 r = kvm_setup_default_irq_routing(kvm);
3280 if (r) {
3281 mutex_lock(&kvm->irq_lock);
3282 kvm_ioapic_destroy(kvm);
3283 kvm_destroy_pic(kvm);
3284 mutex_unlock(&kvm->irq_lock);
3285 }
3286 create_irqchip_unlock:
3287 mutex_unlock(&kvm->lock);
3288 break;
3289 }
3290 case KVM_CREATE_PIT:
3291 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3292 goto create_pit;
3293 case KVM_CREATE_PIT2:
3294 r = -EFAULT;
3295 if (copy_from_user(&u.pit_config, argp,
3296 sizeof(struct kvm_pit_config)))
3297 goto out;
3298 create_pit:
3299 mutex_lock(&kvm->slots_lock);
3300 r = -EEXIST;
3301 if (kvm->arch.vpit)
3302 goto create_pit_unlock;
3303 r = -ENOMEM;
3304 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3305 if (kvm->arch.vpit)
3306 r = 0;
3307 create_pit_unlock:
3308 mutex_unlock(&kvm->slots_lock);
3309 break;
3310 case KVM_IRQ_LINE_STATUS:
3311 case KVM_IRQ_LINE: {
3312 struct kvm_irq_level irq_event;
3313
3314 r = -EFAULT;
3315 if (copy_from_user(&irq_event, argp, sizeof irq_event))
3316 goto out;
3317 r = -ENXIO;
3318 if (irqchip_in_kernel(kvm)) {
3319 __s32 status;
3320 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3321 irq_event.irq, irq_event.level);
3322 if (ioctl == KVM_IRQ_LINE_STATUS) {
3323 r = -EFAULT;
3324 irq_event.status = status;
3325 if (copy_to_user(argp, &irq_event,
3326 sizeof irq_event))
3327 goto out;
3328 }
3329 r = 0;
3330 }
3331 break;
3332 }
3333 case KVM_GET_IRQCHIP: {
3334 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3335 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3336
3337 r = -ENOMEM;
3338 if (!chip)
3339 goto out;
3340 r = -EFAULT;
3341 if (copy_from_user(chip, argp, sizeof *chip))
3342 goto get_irqchip_out;
3343 r = -ENXIO;
3344 if (!irqchip_in_kernel(kvm))
3345 goto get_irqchip_out;
3346 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3347 if (r)
3348 goto get_irqchip_out;
3349 r = -EFAULT;
3350 if (copy_to_user(argp, chip, sizeof *chip))
3351 goto get_irqchip_out;
3352 r = 0;
3353 get_irqchip_out:
3354 kfree(chip);
3355 if (r)
3356 goto out;
3357 break;
3358 }
3359 case KVM_SET_IRQCHIP: {
3360 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3361 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
3362
3363 r = -ENOMEM;
3364 if (!chip)
3365 goto out;
3366 r = -EFAULT;
3367 if (copy_from_user(chip, argp, sizeof *chip))
3368 goto set_irqchip_out;
3369 r = -ENXIO;
3370 if (!irqchip_in_kernel(kvm))
3371 goto set_irqchip_out;
3372 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3373 if (r)
3374 goto set_irqchip_out;
3375 r = 0;
3376 set_irqchip_out:
3377 kfree(chip);
3378 if (r)
3379 goto out;
3380 break;
3381 }
3382 case KVM_GET_PIT: {
3383 r = -EFAULT;
3384 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3385 goto out;
3386 r = -ENXIO;
3387 if (!kvm->arch.vpit)
3388 goto out;
3389 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3390 if (r)
3391 goto out;
3392 r = -EFAULT;
3393 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3394 goto out;
3395 r = 0;
3396 break;
3397 }
3398 case KVM_SET_PIT: {
3399 r = -EFAULT;
3400 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3401 goto out;
3402 r = -ENXIO;
3403 if (!kvm->arch.vpit)
3404 goto out;
3405 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3406 if (r)
3407 goto out;
3408 r = 0;
3409 break;
3410 }
3411 case KVM_GET_PIT2: {
3412 r = -ENXIO;
3413 if (!kvm->arch.vpit)
3414 goto out;
3415 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3416 if (r)
3417 goto out;
3418 r = -EFAULT;
3419 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3420 goto out;
3421 r = 0;
3422 break;
3423 }
3424 case KVM_SET_PIT2: {
3425 r = -EFAULT;
3426 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3427 goto out;
3428 r = -ENXIO;
3429 if (!kvm->arch.vpit)
3430 goto out;
3431 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3432 if (r)
3433 goto out;
3434 r = 0;
3435 break;
3436 }
3437 case KVM_REINJECT_CONTROL: {
3438 struct kvm_reinject_control control;
3439 r = -EFAULT;
3440 if (copy_from_user(&control, argp, sizeof(control)))
3441 goto out;
3442 r = kvm_vm_ioctl_reinject(kvm, &control);
3443 if (r)
3444 goto out;
3445 r = 0;
3446 break;
3447 }
3448 case KVM_XEN_HVM_CONFIG: {
3449 r = -EFAULT;
3450 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3451 sizeof(struct kvm_xen_hvm_config)))
3452 goto out;
3453 r = -EINVAL;
3454 if (kvm->arch.xen_hvm_config.flags)
3455 goto out;
3456 r = 0;
3457 break;
3458 }
3459 case KVM_SET_CLOCK: {
3460 struct kvm_clock_data user_ns;
3461 u64 now_ns;
3462 s64 delta;
3463
3464 r = -EFAULT;
3465 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3466 goto out;
3467
3468 r = -EINVAL;
3469 if (user_ns.flags)
3470 goto out;
3471
3472 r = 0;
3473 local_irq_disable();
3474 now_ns = get_kernel_ns();
3475 delta = user_ns.clock - now_ns;
3476 local_irq_enable();
3477 kvm->arch.kvmclock_offset = delta;
3478 break;
3479 }
3480 case KVM_GET_CLOCK: {
3481 struct kvm_clock_data user_ns;
3482 u64 now_ns;
3483
3484 local_irq_disable();
3485 now_ns = get_kernel_ns();
3486 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3487 local_irq_enable();
3488 user_ns.flags = 0;
3489 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3490
3491 r = -EFAULT;
3492 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3493 goto out;
3494 r = 0;
3495 break;
3496 }
3497
3498 default:
3499 ;
3500 }
3501 out:
3502 return r;
3503 }
3504
3505 static void kvm_init_msr_list(void)
3506 {
3507 u32 dummy[2];
3508 unsigned i, j;
3509
3510 /* skip the first msrs in the list. KVM-specific */
3511 for (i = j = KVM_SAVE_MSRS_BEGIN; i < ARRAY_SIZE(msrs_to_save); i++) {
3512 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3513 continue;
3514 if (j < i)
3515 msrs_to_save[j] = msrs_to_save[i];
3516 j++;
3517 }
3518 num_msrs_to_save = j;
3519 }
3520
3521 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3522 const void *v)
3523 {
3524 if (vcpu->arch.apic &&
3525 !kvm_iodevice_write(&vcpu->arch.apic->dev, addr, len, v))
3526 return 0;
3527
3528 return kvm_io_bus_write(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3529 }
3530
3531 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3532 {
3533 if (vcpu->arch.apic &&
3534 !kvm_iodevice_read(&vcpu->arch.apic->dev, addr, len, v))
3535 return 0;
3536
3537 return kvm_io_bus_read(vcpu->kvm, KVM_MMIO_BUS, addr, len, v);
3538 }
3539
3540 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3541 struct kvm_segment *var, int seg)
3542 {
3543 kvm_x86_ops->set_segment(vcpu, var, seg);
3544 }
3545
3546 void kvm_get_segment(struct kvm_vcpu *vcpu,
3547 struct kvm_segment *var, int seg)
3548 {
3549 kvm_x86_ops->get_segment(vcpu, var, seg);
3550 }
3551
3552 static gpa_t translate_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3553 {
3554 return gpa;
3555 }
3556
3557 static gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access)
3558 {
3559 gpa_t t_gpa;
3560 u32 error;
3561
3562 BUG_ON(!mmu_is_nested(vcpu));
3563
3564 /* NPT walks are always user-walks */
3565 access |= PFERR_USER_MASK;
3566 t_gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, &error);
3567 if (t_gpa == UNMAPPED_GVA)
3568 vcpu->arch.fault.nested = true;
3569
3570 return t_gpa;
3571 }
3572
3573 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3574 {
3575 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3576 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3577 }
3578
3579 gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3580 {
3581 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3582 access |= PFERR_FETCH_MASK;
3583 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3584 }
3585
3586 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3587 {
3588 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3589 access |= PFERR_WRITE_MASK;
3590 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, error);
3591 }
3592
3593 /* uses this to access any guest's mapped memory without checking CPL */
3594 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva, u32 *error)
3595 {
3596 return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, error);
3597 }
3598
3599 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
3600 struct kvm_vcpu *vcpu, u32 access,
3601 u32 *error)
3602 {
3603 void *data = val;
3604 int r = X86EMUL_CONTINUE;
3605
3606 while (bytes) {
3607 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
3608 error);
3609 unsigned offset = addr & (PAGE_SIZE-1);
3610 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
3611 int ret;
3612
3613 if (gpa == UNMAPPED_GVA) {
3614 r = X86EMUL_PROPAGATE_FAULT;
3615 goto out;
3616 }
3617 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
3618 if (ret < 0) {
3619 r = X86EMUL_IO_NEEDED;
3620 goto out;
3621 }
3622
3623 bytes -= toread;
3624 data += toread;
3625 addr += toread;
3626 }
3627 out:
3628 return r;
3629 }
3630
3631 /* used for instruction fetching */
3632 static int kvm_fetch_guest_virt(gva_t addr, void *val, unsigned int bytes,
3633 struct kvm_vcpu *vcpu, u32 *error)
3634 {
3635 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3636 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu,
3637 access | PFERR_FETCH_MASK, error);
3638 }
3639
3640 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
3641 struct kvm_vcpu *vcpu, u32 *error)
3642 {
3643 u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3644 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
3645 error);
3646 }
3647
3648 static int kvm_read_guest_virt_system(gva_t addr, void *val, unsigned int bytes,
3649 struct kvm_vcpu *vcpu, u32 *error)
3650 {
3651 return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, error);
3652 }
3653
3654 static int kvm_write_guest_virt_system(gva_t addr, void *val,
3655 unsigned int bytes,
3656 struct kvm_vcpu *vcpu,
3657 u32 *error)
3658 {
3659 void *data = val;
3660 int r = X86EMUL_CONTINUE;
3661
3662 while (bytes) {
3663 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
3664 PFERR_WRITE_MASK,
3665 error);
3666 unsigned offset = addr & (PAGE_SIZE-1);
3667 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
3668 int ret;
3669
3670 if (gpa == UNMAPPED_GVA) {
3671 r = X86EMUL_PROPAGATE_FAULT;
3672 goto out;
3673 }
3674 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
3675 if (ret < 0) {
3676 r = X86EMUL_IO_NEEDED;
3677 goto out;
3678 }
3679
3680 bytes -= towrite;
3681 data += towrite;
3682 addr += towrite;
3683 }
3684 out:
3685 return r;
3686 }
3687
3688 static int emulator_read_emulated(unsigned long addr,
3689 void *val,
3690 unsigned int bytes,
3691 unsigned int *error_code,
3692 struct kvm_vcpu *vcpu)
3693 {
3694 gpa_t gpa;
3695
3696 if (vcpu->mmio_read_completed) {
3697 memcpy(val, vcpu->mmio_data, bytes);
3698 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
3699 vcpu->mmio_phys_addr, *(u64 *)val);
3700 vcpu->mmio_read_completed = 0;
3701 return X86EMUL_CONTINUE;
3702 }
3703
3704 gpa = kvm_mmu_gva_to_gpa_read(vcpu, addr, error_code);
3705
3706 if (gpa == UNMAPPED_GVA)
3707 return X86EMUL_PROPAGATE_FAULT;
3708
3709 /* For APIC access vmexit */
3710 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3711 goto mmio;
3712
3713 if (kvm_read_guest_virt(addr, val, bytes, vcpu, NULL)
3714 == X86EMUL_CONTINUE)
3715 return X86EMUL_CONTINUE;
3716
3717 mmio:
3718 /*
3719 * Is this MMIO handled locally?
3720 */
3721 if (!vcpu_mmio_read(vcpu, gpa, bytes, val)) {
3722 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes, gpa, *(u64 *)val);
3723 return X86EMUL_CONTINUE;
3724 }
3725
3726 trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
3727
3728 vcpu->mmio_needed = 1;
3729 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3730 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3731 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3732 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 0;
3733
3734 return X86EMUL_IO_NEEDED;
3735 }
3736
3737 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
3738 const void *val, int bytes)
3739 {
3740 int ret;
3741
3742 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
3743 if (ret < 0)
3744 return 0;
3745 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
3746 return 1;
3747 }
3748
3749 static int emulator_write_emulated_onepage(unsigned long addr,
3750 const void *val,
3751 unsigned int bytes,
3752 unsigned int *error_code,
3753 struct kvm_vcpu *vcpu)
3754 {
3755 gpa_t gpa;
3756
3757 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, error_code);
3758
3759 if (gpa == UNMAPPED_GVA)
3760 return X86EMUL_PROPAGATE_FAULT;
3761
3762 /* For APIC access vmexit */
3763 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3764 goto mmio;
3765
3766 if (emulator_write_phys(vcpu, gpa, val, bytes))
3767 return X86EMUL_CONTINUE;
3768
3769 mmio:
3770 trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
3771 /*
3772 * Is this MMIO handled locally?
3773 */
3774 if (!vcpu_mmio_write(vcpu, gpa, bytes, val))
3775 return X86EMUL_CONTINUE;
3776
3777 vcpu->mmio_needed = 1;
3778 vcpu->run->exit_reason = KVM_EXIT_MMIO;
3779 vcpu->run->mmio.phys_addr = vcpu->mmio_phys_addr = gpa;
3780 vcpu->run->mmio.len = vcpu->mmio_size = bytes;
3781 vcpu->run->mmio.is_write = vcpu->mmio_is_write = 1;
3782 memcpy(vcpu->run->mmio.data, val, bytes);
3783
3784 return X86EMUL_CONTINUE;
3785 }
3786
3787 int emulator_write_emulated(unsigned long addr,
3788 const void *val,
3789 unsigned int bytes,
3790 unsigned int *error_code,
3791 struct kvm_vcpu *vcpu)
3792 {
3793 /* Crossing a page boundary? */
3794 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
3795 int rc, now;
3796
3797 now = -addr & ~PAGE_MASK;
3798 rc = emulator_write_emulated_onepage(addr, val, now, error_code,
3799 vcpu);
3800 if (rc != X86EMUL_CONTINUE)
3801 return rc;
3802 addr += now;
3803 val += now;
3804 bytes -= now;
3805 }
3806 return emulator_write_emulated_onepage(addr, val, bytes, error_code,
3807 vcpu);
3808 }
3809
3810 #define CMPXCHG_TYPE(t, ptr, old, new) \
3811 (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
3812
3813 #ifdef CONFIG_X86_64
3814 # define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
3815 #else
3816 # define CMPXCHG64(ptr, old, new) \
3817 (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
3818 #endif
3819
3820 static int emulator_cmpxchg_emulated(unsigned long addr,
3821 const void *old,
3822 const void *new,
3823 unsigned int bytes,
3824 unsigned int *error_code,
3825 struct kvm_vcpu *vcpu)
3826 {
3827 gpa_t gpa;
3828 struct page *page;
3829 char *kaddr;
3830 bool exchanged;
3831
3832 /* guests cmpxchg8b have to be emulated atomically */
3833 if (bytes > 8 || (bytes & (bytes - 1)))
3834 goto emul_write;
3835
3836 gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
3837
3838 if (gpa == UNMAPPED_GVA ||
3839 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
3840 goto emul_write;
3841
3842 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
3843 goto emul_write;
3844
3845 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
3846 if (is_error_page(page)) {
3847 kvm_release_page_clean(page);
3848 goto emul_write;
3849 }
3850
3851 kaddr = kmap_atomic(page, KM_USER0);
3852 kaddr += offset_in_page(gpa);
3853 switch (bytes) {
3854 case 1:
3855 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
3856 break;
3857 case 2:
3858 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
3859 break;
3860 case 4:
3861 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
3862 break;
3863 case 8:
3864 exchanged = CMPXCHG64(kaddr, old, new);
3865 break;
3866 default:
3867 BUG();
3868 }
3869 kunmap_atomic(kaddr, KM_USER0);
3870 kvm_release_page_dirty(page);
3871
3872 if (!exchanged)
3873 return X86EMUL_CMPXCHG_FAILED;
3874
3875 kvm_mmu_pte_write(vcpu, gpa, new, bytes, 1);
3876
3877 return X86EMUL_CONTINUE;
3878
3879 emul_write:
3880 printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
3881
3882 return emulator_write_emulated(addr, new, bytes, error_code, vcpu);
3883 }
3884
3885 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
3886 {
3887 /* TODO: String I/O for in kernel device */
3888 int r;
3889
3890 if (vcpu->arch.pio.in)
3891 r = kvm_io_bus_read(vcpu->kvm, KVM_PIO_BUS, vcpu->arch.pio.port,
3892 vcpu->arch.pio.size, pd);
3893 else
3894 r = kvm_io_bus_write(vcpu->kvm, KVM_PIO_BUS,
3895 vcpu->arch.pio.port, vcpu->arch.pio.size,
3896 pd);
3897 return r;
3898 }
3899
3900
3901 static int emulator_pio_in_emulated(int size, unsigned short port, void *val,
3902 unsigned int count, struct kvm_vcpu *vcpu)
3903 {
3904 if (vcpu->arch.pio.count)
3905 goto data_avail;
3906
3907 trace_kvm_pio(0, port, size, 1);
3908
3909 vcpu->arch.pio.port = port;
3910 vcpu->arch.pio.in = 1;
3911 vcpu->arch.pio.count = count;
3912 vcpu->arch.pio.size = size;
3913
3914 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3915 data_avail:
3916 memcpy(val, vcpu->arch.pio_data, size * count);
3917 vcpu->arch.pio.count = 0;
3918 return 1;
3919 }
3920
3921 vcpu->run->exit_reason = KVM_EXIT_IO;
3922 vcpu->run->io.direction = KVM_EXIT_IO_IN;
3923 vcpu->run->io.size = size;
3924 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3925 vcpu->run->io.count = count;
3926 vcpu->run->io.port = port;
3927
3928 return 0;
3929 }
3930
3931 static int emulator_pio_out_emulated(int size, unsigned short port,
3932 const void *val, unsigned int count,
3933 struct kvm_vcpu *vcpu)
3934 {
3935 trace_kvm_pio(1, port, size, 1);
3936
3937 vcpu->arch.pio.port = port;
3938 vcpu->arch.pio.in = 0;
3939 vcpu->arch.pio.count = count;
3940 vcpu->arch.pio.size = size;
3941
3942 memcpy(vcpu->arch.pio_data, val, size * count);
3943
3944 if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
3945 vcpu->arch.pio.count = 0;
3946 return 1;
3947 }
3948
3949 vcpu->run->exit_reason = KVM_EXIT_IO;
3950 vcpu->run->io.direction = KVM_EXIT_IO_OUT;
3951 vcpu->run->io.size = size;
3952 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
3953 vcpu->run->io.count = count;
3954 vcpu->run->io.port = port;
3955
3956 return 0;
3957 }
3958
3959 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
3960 {
3961 return kvm_x86_ops->get_segment_base(vcpu, seg);
3962 }
3963
3964 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
3965 {
3966 kvm_mmu_invlpg(vcpu, address);
3967 return X86EMUL_CONTINUE;
3968 }
3969
3970 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
3971 {
3972 if (!need_emulate_wbinvd(vcpu))
3973 return X86EMUL_CONTINUE;
3974
3975 if (kvm_x86_ops->has_wbinvd_exit()) {
3976 preempt_disable();
3977 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
3978 wbinvd_ipi, NULL, 1);
3979 preempt_enable();
3980 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
3981 }
3982 wbinvd();
3983 return X86EMUL_CONTINUE;
3984 }
3985 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
3986
3987 int emulate_clts(struct kvm_vcpu *vcpu)
3988 {
3989 kvm_x86_ops->set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~X86_CR0_TS));
3990 kvm_x86_ops->fpu_activate(vcpu);
3991 return X86EMUL_CONTINUE;
3992 }
3993
3994 int emulator_get_dr(int dr, unsigned long *dest, struct kvm_vcpu *vcpu)
3995 {
3996 return _kvm_get_dr(vcpu, dr, dest);
3997 }
3998
3999 int emulator_set_dr(int dr, unsigned long value, struct kvm_vcpu *vcpu)
4000 {
4001
4002 return __kvm_set_dr(vcpu, dr, value);
4003 }
4004
4005 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4006 {
4007 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4008 }
4009
4010 static unsigned long emulator_get_cr(int cr, struct kvm_vcpu *vcpu)
4011 {
4012 unsigned long value;
4013
4014 switch (cr) {
4015 case 0:
4016 value = kvm_read_cr0(vcpu);
4017 break;
4018 case 2:
4019 value = vcpu->arch.cr2;
4020 break;
4021 case 3:
4022 value = vcpu->arch.cr3;
4023 break;
4024 case 4:
4025 value = kvm_read_cr4(vcpu);
4026 break;
4027 case 8:
4028 value = kvm_get_cr8(vcpu);
4029 break;
4030 default:
4031 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4032 return 0;
4033 }
4034
4035 return value;
4036 }
4037
4038 static int emulator_set_cr(int cr, unsigned long val, struct kvm_vcpu *vcpu)
4039 {
4040 int res = 0;
4041
4042 switch (cr) {
4043 case 0:
4044 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4045 break;
4046 case 2:
4047 vcpu->arch.cr2 = val;
4048 break;
4049 case 3:
4050 res = kvm_set_cr3(vcpu, val);
4051 break;
4052 case 4:
4053 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4054 break;
4055 case 8:
4056 res = __kvm_set_cr8(vcpu, val & 0xfUL);
4057 break;
4058 default:
4059 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
4060 res = -1;
4061 }
4062
4063 return res;
4064 }
4065
4066 static int emulator_get_cpl(struct kvm_vcpu *vcpu)
4067 {
4068 return kvm_x86_ops->get_cpl(vcpu);
4069 }
4070
4071 static void emulator_get_gdt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4072 {
4073 kvm_x86_ops->get_gdt(vcpu, dt);
4074 }
4075
4076 static void emulator_get_idt(struct desc_ptr *dt, struct kvm_vcpu *vcpu)
4077 {
4078 kvm_x86_ops->get_idt(vcpu, dt);
4079 }
4080
4081 static unsigned long emulator_get_cached_segment_base(int seg,
4082 struct kvm_vcpu *vcpu)
4083 {
4084 return get_segment_base(vcpu, seg);
4085 }
4086
4087 static bool emulator_get_cached_descriptor(struct desc_struct *desc, int seg,
4088 struct kvm_vcpu *vcpu)
4089 {
4090 struct kvm_segment var;
4091
4092 kvm_get_segment(vcpu, &var, seg);
4093
4094 if (var.unusable)
4095 return false;
4096
4097 if (var.g)
4098 var.limit >>= 12;
4099 set_desc_limit(desc, var.limit);
4100 set_desc_base(desc, (unsigned long)var.base);
4101 desc->type = var.type;
4102 desc->s = var.s;
4103 desc->dpl = var.dpl;
4104 desc->p = var.present;
4105 desc->avl = var.avl;
4106 desc->l = var.l;
4107 desc->d = var.db;
4108 desc->g = var.g;
4109
4110 return true;
4111 }
4112
4113 static void emulator_set_cached_descriptor(struct desc_struct *desc, int seg,
4114 struct kvm_vcpu *vcpu)
4115 {
4116 struct kvm_segment var;
4117
4118 /* needed to preserve selector */
4119 kvm_get_segment(vcpu, &var, seg);
4120
4121 var.base = get_desc_base(desc);
4122 var.limit = get_desc_limit(desc);
4123 if (desc->g)
4124 var.limit = (var.limit << 12) | 0xfff;
4125 var.type = desc->type;
4126 var.present = desc->p;
4127 var.dpl = desc->dpl;
4128 var.db = desc->d;
4129 var.s = desc->s;
4130 var.l = desc->l;
4131 var.g = desc->g;
4132 var.avl = desc->avl;
4133 var.present = desc->p;
4134 var.unusable = !var.present;
4135 var.padding = 0;
4136
4137 kvm_set_segment(vcpu, &var, seg);
4138 return;
4139 }
4140
4141 static u16 emulator_get_segment_selector(int seg, struct kvm_vcpu *vcpu)
4142 {
4143 struct kvm_segment kvm_seg;
4144
4145 kvm_get_segment(vcpu, &kvm_seg, seg);
4146 return kvm_seg.selector;
4147 }
4148
4149 static void emulator_set_segment_selector(u16 sel, int seg,
4150 struct kvm_vcpu *vcpu)
4151 {
4152 struct kvm_segment kvm_seg;
4153
4154 kvm_get_segment(vcpu, &kvm_seg, seg);
4155 kvm_seg.selector = sel;
4156 kvm_set_segment(vcpu, &kvm_seg, seg);
4157 }
4158
4159 static struct x86_emulate_ops emulate_ops = {
4160 .read_std = kvm_read_guest_virt_system,
4161 .write_std = kvm_write_guest_virt_system,
4162 .fetch = kvm_fetch_guest_virt,
4163 .read_emulated = emulator_read_emulated,
4164 .write_emulated = emulator_write_emulated,
4165 .cmpxchg_emulated = emulator_cmpxchg_emulated,
4166 .pio_in_emulated = emulator_pio_in_emulated,
4167 .pio_out_emulated = emulator_pio_out_emulated,
4168 .get_cached_descriptor = emulator_get_cached_descriptor,
4169 .set_cached_descriptor = emulator_set_cached_descriptor,
4170 .get_segment_selector = emulator_get_segment_selector,
4171 .set_segment_selector = emulator_set_segment_selector,
4172 .get_cached_segment_base = emulator_get_cached_segment_base,
4173 .get_gdt = emulator_get_gdt,
4174 .get_idt = emulator_get_idt,
4175 .get_cr = emulator_get_cr,
4176 .set_cr = emulator_set_cr,
4177 .cpl = emulator_get_cpl,
4178 .get_dr = emulator_get_dr,
4179 .set_dr = emulator_set_dr,
4180 .set_msr = kvm_set_msr,
4181 .get_msr = kvm_get_msr,
4182 };
4183
4184 static void cache_all_regs(struct kvm_vcpu *vcpu)
4185 {
4186 kvm_register_read(vcpu, VCPU_REGS_RAX);
4187 kvm_register_read(vcpu, VCPU_REGS_RSP);
4188 kvm_register_read(vcpu, VCPU_REGS_RIP);
4189 vcpu->arch.regs_dirty = ~0;
4190 }
4191
4192 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4193 {
4194 u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu, mask);
4195 /*
4196 * an sti; sti; sequence only disable interrupts for the first
4197 * instruction. So, if the last instruction, be it emulated or
4198 * not, left the system with the INT_STI flag enabled, it
4199 * means that the last instruction is an sti. We should not
4200 * leave the flag on in this case. The same goes for mov ss
4201 */
4202 if (!(int_shadow & mask))
4203 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4204 }
4205
4206 static void inject_emulated_exception(struct kvm_vcpu *vcpu)
4207 {
4208 struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4209 if (ctxt->exception == PF_VECTOR)
4210 kvm_propagate_fault(vcpu);
4211 else if (ctxt->error_code_valid)
4212 kvm_queue_exception_e(vcpu, ctxt->exception, ctxt->error_code);
4213 else
4214 kvm_queue_exception(vcpu, ctxt->exception);
4215 }
4216
4217 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4218 {
4219 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4220 int cs_db, cs_l;
4221
4222 cache_all_regs(vcpu);
4223
4224 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4225
4226 vcpu->arch.emulate_ctxt.vcpu = vcpu;
4227 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
4228 vcpu->arch.emulate_ctxt.eip = kvm_rip_read(vcpu);
4229 vcpu->arch.emulate_ctxt.mode =
4230 (!is_protmode(vcpu)) ? X86EMUL_MODE_REAL :
4231 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
4232 ? X86EMUL_MODE_VM86 : cs_l
4233 ? X86EMUL_MODE_PROT64 : cs_db
4234 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
4235 memset(c, 0, sizeof(struct decode_cache));
4236 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4237 }
4238
4239 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq)
4240 {
4241 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4242 int ret;
4243
4244 init_emulate_ctxt(vcpu);
4245
4246 vcpu->arch.emulate_ctxt.decode.op_bytes = 2;
4247 vcpu->arch.emulate_ctxt.decode.ad_bytes = 2;
4248 vcpu->arch.emulate_ctxt.decode.eip = vcpu->arch.emulate_ctxt.eip;
4249 ret = emulate_int_real(&vcpu->arch.emulate_ctxt, &emulate_ops, irq);
4250
4251 if (ret != X86EMUL_CONTINUE)
4252 return EMULATE_FAIL;
4253
4254 vcpu->arch.emulate_ctxt.eip = c->eip;
4255 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4256 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4257 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4258
4259 if (irq == NMI_VECTOR)
4260 vcpu->arch.nmi_pending = false;
4261 else
4262 vcpu->arch.interrupt.pending = false;
4263
4264 return EMULATE_DONE;
4265 }
4266 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4267
4268 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4269 {
4270 ++vcpu->stat.insn_emulation_fail;
4271 trace_kvm_emulate_insn_failed(vcpu);
4272 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4273 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4274 vcpu->run->internal.ndata = 0;
4275 kvm_queue_exception(vcpu, UD_VECTOR);
4276 return EMULATE_FAIL;
4277 }
4278
4279 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t gva)
4280 {
4281 gpa_t gpa;
4282
4283 if (tdp_enabled)
4284 return false;
4285
4286 /*
4287 * if emulation was due to access to shadowed page table
4288 * and it failed try to unshadow page and re-entetr the
4289 * guest to let CPU execute the instruction.
4290 */
4291 if (kvm_mmu_unprotect_page_virt(vcpu, gva))
4292 return true;
4293
4294 gpa = kvm_mmu_gva_to_gpa_system(vcpu, gva, NULL);
4295
4296 if (gpa == UNMAPPED_GVA)
4297 return true; /* let cpu generate fault */
4298
4299 if (!kvm_is_error_hva(gfn_to_hva(vcpu->kvm, gpa >> PAGE_SHIFT)))
4300 return true;
4301
4302 return false;
4303 }
4304
4305 int emulate_instruction(struct kvm_vcpu *vcpu,
4306 unsigned long cr2,
4307 u16 error_code,
4308 int emulation_type)
4309 {
4310 int r;
4311 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
4312
4313 kvm_clear_exception_queue(vcpu);
4314 vcpu->arch.mmio_fault_cr2 = cr2;
4315 /*
4316 * TODO: fix emulate.c to use guest_read/write_register
4317 * instead of direct ->regs accesses, can save hundred cycles
4318 * on Intel for instructions that don't read/change RSP, for
4319 * for example.
4320 */
4321 cache_all_regs(vcpu);
4322
4323 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
4324 init_emulate_ctxt(vcpu);
4325 vcpu->arch.emulate_ctxt.interruptibility = 0;
4326 vcpu->arch.emulate_ctxt.exception = -1;
4327 vcpu->arch.emulate_ctxt.perm_ok = false;
4328
4329 r = x86_decode_insn(&vcpu->arch.emulate_ctxt);
4330 if (r == X86EMUL_PROPAGATE_FAULT)
4331 goto done;
4332
4333 trace_kvm_emulate_insn_start(vcpu);
4334
4335 /* Only allow emulation of specific instructions on #UD
4336 * (namely VMMCALL, sysenter, sysexit, syscall)*/
4337 if (emulation_type & EMULTYPE_TRAP_UD) {
4338 if (!c->twobyte)
4339 return EMULATE_FAIL;
4340 switch (c->b) {
4341 case 0x01: /* VMMCALL */
4342 if (c->modrm_mod != 3 || c->modrm_rm != 1)
4343 return EMULATE_FAIL;
4344 break;
4345 case 0x34: /* sysenter */
4346 case 0x35: /* sysexit */
4347 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4348 return EMULATE_FAIL;
4349 break;
4350 case 0x05: /* syscall */
4351 if (c->modrm_mod != 0 || c->modrm_rm != 0)
4352 return EMULATE_FAIL;
4353 break;
4354 default:
4355 return EMULATE_FAIL;
4356 }
4357
4358 if (!(c->modrm_reg == 0 || c->modrm_reg == 3))
4359 return EMULATE_FAIL;
4360 }
4361
4362 ++vcpu->stat.insn_emulation;
4363 if (r) {
4364 if (reexecute_instruction(vcpu, cr2))
4365 return EMULATE_DONE;
4366 if (emulation_type & EMULTYPE_SKIP)
4367 return EMULATE_FAIL;
4368 return handle_emulation_failure(vcpu);
4369 }
4370 }
4371
4372 if (emulation_type & EMULTYPE_SKIP) {
4373 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
4374 return EMULATE_DONE;
4375 }
4376
4377 /* this is needed for vmware backdor interface to work since it
4378 changes registers values during IO operation */
4379 memcpy(c->regs, vcpu->arch.regs, sizeof c->regs);
4380
4381 restart:
4382 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt);
4383
4384 if (r == EMULATION_FAILED) {
4385 if (reexecute_instruction(vcpu, cr2))
4386 return EMULATE_DONE;
4387
4388 return handle_emulation_failure(vcpu);
4389 }
4390
4391 done:
4392 if (vcpu->arch.emulate_ctxt.exception >= 0) {
4393 inject_emulated_exception(vcpu);
4394 r = EMULATE_DONE;
4395 } else if (vcpu->arch.pio.count) {
4396 if (!vcpu->arch.pio.in)
4397 vcpu->arch.pio.count = 0;
4398 r = EMULATE_DO_MMIO;
4399 } else if (vcpu->mmio_needed) {
4400 if (vcpu->mmio_is_write)
4401 vcpu->mmio_needed = 0;
4402 r = EMULATE_DO_MMIO;
4403 } else if (r == EMULATION_RESTART)
4404 goto restart;
4405 else
4406 r = EMULATE_DONE;
4407
4408 toggle_interruptibility(vcpu, vcpu->arch.emulate_ctxt.interruptibility);
4409 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
4410 kvm_make_request(KVM_REQ_EVENT, vcpu);
4411 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
4412 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
4413
4414 return r;
4415 }
4416 EXPORT_SYMBOL_GPL(emulate_instruction);
4417
4418 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
4419 {
4420 unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
4421 int ret = emulator_pio_out_emulated(size, port, &val, 1, vcpu);
4422 /* do not return to emulator after return from userspace */
4423 vcpu->arch.pio.count = 0;
4424 return ret;
4425 }
4426 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
4427
4428 static void tsc_bad(void *info)
4429 {
4430 __get_cpu_var(cpu_tsc_khz) = 0;
4431 }
4432
4433 static void tsc_khz_changed(void *data)
4434 {
4435 struct cpufreq_freqs *freq = data;
4436 unsigned long khz = 0;
4437
4438 if (data)
4439 khz = freq->new;
4440 else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4441 khz = cpufreq_quick_get(raw_smp_processor_id());
4442 if (!khz)
4443 khz = tsc_khz;
4444 __get_cpu_var(cpu_tsc_khz) = khz;
4445 }
4446
4447 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
4448 void *data)
4449 {
4450 struct cpufreq_freqs *freq = data;
4451 struct kvm *kvm;
4452 struct kvm_vcpu *vcpu;
4453 int i, send_ipi = 0;
4454
4455 /*
4456 * We allow guests to temporarily run on slowing clocks,
4457 * provided we notify them after, or to run on accelerating
4458 * clocks, provided we notify them before. Thus time never
4459 * goes backwards.
4460 *
4461 * However, we have a problem. We can't atomically update
4462 * the frequency of a given CPU from this function; it is
4463 * merely a notifier, which can be called from any CPU.
4464 * Changing the TSC frequency at arbitrary points in time
4465 * requires a recomputation of local variables related to
4466 * the TSC for each VCPU. We must flag these local variables
4467 * to be updated and be sure the update takes place with the
4468 * new frequency before any guests proceed.
4469 *
4470 * Unfortunately, the combination of hotplug CPU and frequency
4471 * change creates an intractable locking scenario; the order
4472 * of when these callouts happen is undefined with respect to
4473 * CPU hotplug, and they can race with each other. As such,
4474 * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
4475 * undefined; you can actually have a CPU frequency change take
4476 * place in between the computation of X and the setting of the
4477 * variable. To protect against this problem, all updates of
4478 * the per_cpu tsc_khz variable are done in an interrupt
4479 * protected IPI, and all callers wishing to update the value
4480 * must wait for a synchronous IPI to complete (which is trivial
4481 * if the caller is on the CPU already). This establishes the
4482 * necessary total order on variable updates.
4483 *
4484 * Note that because a guest time update may take place
4485 * anytime after the setting of the VCPU's request bit, the
4486 * correct TSC value must be set before the request. However,
4487 * to ensure the update actually makes it to any guest which
4488 * starts running in hardware virtualization between the set
4489 * and the acquisition of the spinlock, we must also ping the
4490 * CPU after setting the request bit.
4491 *
4492 */
4493
4494 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
4495 return 0;
4496 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
4497 return 0;
4498
4499 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4500
4501 spin_lock(&kvm_lock);
4502 list_for_each_entry(kvm, &vm_list, vm_list) {
4503 kvm_for_each_vcpu(i, vcpu, kvm) {
4504 if (vcpu->cpu != freq->cpu)
4505 continue;
4506 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4507 if (vcpu->cpu != smp_processor_id())
4508 send_ipi = 1;
4509 }
4510 }
4511 spin_unlock(&kvm_lock);
4512
4513 if (freq->old < freq->new && send_ipi) {
4514 /*
4515 * We upscale the frequency. Must make the guest
4516 * doesn't see old kvmclock values while running with
4517 * the new frequency, otherwise we risk the guest sees
4518 * time go backwards.
4519 *
4520 * In case we update the frequency for another cpu
4521 * (which might be in guest context) send an interrupt
4522 * to kick the cpu out of guest context. Next time
4523 * guest context is entered kvmclock will be updated,
4524 * so the guest will not see stale values.
4525 */
4526 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
4527 }
4528 return 0;
4529 }
4530
4531 static struct notifier_block kvmclock_cpufreq_notifier_block = {
4532 .notifier_call = kvmclock_cpufreq_notifier
4533 };
4534
4535 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
4536 unsigned long action, void *hcpu)
4537 {
4538 unsigned int cpu = (unsigned long)hcpu;
4539
4540 switch (action) {
4541 case CPU_ONLINE:
4542 case CPU_DOWN_FAILED:
4543 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4544 break;
4545 case CPU_DOWN_PREPARE:
4546 smp_call_function_single(cpu, tsc_bad, NULL, 1);
4547 break;
4548 }
4549 return NOTIFY_OK;
4550 }
4551
4552 static struct notifier_block kvmclock_cpu_notifier_block = {
4553 .notifier_call = kvmclock_cpu_notifier,
4554 .priority = -INT_MAX
4555 };
4556
4557 static void kvm_timer_init(void)
4558 {
4559 int cpu;
4560
4561 max_tsc_khz = tsc_khz;
4562 register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4563 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
4564 #ifdef CONFIG_CPU_FREQ
4565 struct cpufreq_policy policy;
4566 memset(&policy, 0, sizeof(policy));
4567 cpu = get_cpu();
4568 cpufreq_get_policy(&policy, cpu);
4569 if (policy.cpuinfo.max_freq)
4570 max_tsc_khz = policy.cpuinfo.max_freq;
4571 put_cpu();
4572 #endif
4573 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
4574 CPUFREQ_TRANSITION_NOTIFIER);
4575 }
4576 pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
4577 for_each_online_cpu(cpu)
4578 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
4579 }
4580
4581 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
4582
4583 static int kvm_is_in_guest(void)
4584 {
4585 return percpu_read(current_vcpu) != NULL;
4586 }
4587
4588 static int kvm_is_user_mode(void)
4589 {
4590 int user_mode = 3;
4591
4592 if (percpu_read(current_vcpu))
4593 user_mode = kvm_x86_ops->get_cpl(percpu_read(current_vcpu));
4594
4595 return user_mode != 0;
4596 }
4597
4598 static unsigned long kvm_get_guest_ip(void)
4599 {
4600 unsigned long ip = 0;
4601
4602 if (percpu_read(current_vcpu))
4603 ip = kvm_rip_read(percpu_read(current_vcpu));
4604
4605 return ip;
4606 }
4607
4608 static struct perf_guest_info_callbacks kvm_guest_cbs = {
4609 .is_in_guest = kvm_is_in_guest,
4610 .is_user_mode = kvm_is_user_mode,
4611 .get_guest_ip = kvm_get_guest_ip,
4612 };
4613
4614 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
4615 {
4616 percpu_write(current_vcpu, vcpu);
4617 }
4618 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
4619
4620 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
4621 {
4622 percpu_write(current_vcpu, NULL);
4623 }
4624 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
4625
4626 int kvm_arch_init(void *opaque)
4627 {
4628 int r;
4629 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
4630
4631 if (kvm_x86_ops) {
4632 printk(KERN_ERR "kvm: already loaded the other module\n");
4633 r = -EEXIST;
4634 goto out;
4635 }
4636
4637 if (!ops->cpu_has_kvm_support()) {
4638 printk(KERN_ERR "kvm: no hardware support\n");
4639 r = -EOPNOTSUPP;
4640 goto out;
4641 }
4642 if (ops->disabled_by_bios()) {
4643 printk(KERN_ERR "kvm: disabled by bios\n");
4644 r = -EOPNOTSUPP;
4645 goto out;
4646 }
4647
4648 r = kvm_mmu_module_init();
4649 if (r)
4650 goto out;
4651
4652 kvm_init_msr_list();
4653
4654 kvm_x86_ops = ops;
4655 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
4656 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
4657 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
4658 PT_DIRTY_MASK, PT64_NX_MASK, 0);
4659
4660 kvm_timer_init();
4661
4662 perf_register_guest_info_callbacks(&kvm_guest_cbs);
4663
4664 if (cpu_has_xsave)
4665 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
4666
4667 return 0;
4668
4669 out:
4670 return r;
4671 }
4672
4673 void kvm_arch_exit(void)
4674 {
4675 perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
4676
4677 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
4678 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
4679 CPUFREQ_TRANSITION_NOTIFIER);
4680 unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
4681 kvm_x86_ops = NULL;
4682 kvm_mmu_module_exit();
4683 }
4684
4685 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
4686 {
4687 ++vcpu->stat.halt_exits;
4688 if (irqchip_in_kernel(vcpu->kvm)) {
4689 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
4690 return 1;
4691 } else {
4692 vcpu->run->exit_reason = KVM_EXIT_HLT;
4693 return 0;
4694 }
4695 }
4696 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
4697
4698 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
4699 unsigned long a1)
4700 {
4701 if (is_long_mode(vcpu))
4702 return a0;
4703 else
4704 return a0 | ((gpa_t)a1 << 32);
4705 }
4706
4707 int kvm_hv_hypercall(struct kvm_vcpu *vcpu)
4708 {
4709 u64 param, ingpa, outgpa, ret;
4710 uint16_t code, rep_idx, rep_cnt, res = HV_STATUS_SUCCESS, rep_done = 0;
4711 bool fast, longmode;
4712 int cs_db, cs_l;
4713
4714 /*
4715 * hypercall generates UD from non zero cpl and real mode
4716 * per HYPER-V spec
4717 */
4718 if (kvm_x86_ops->get_cpl(vcpu) != 0 || !is_protmode(vcpu)) {
4719 kvm_queue_exception(vcpu, UD_VECTOR);
4720 return 0;
4721 }
4722
4723 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4724 longmode = is_long_mode(vcpu) && cs_l == 1;
4725
4726 if (!longmode) {
4727 param = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDX) << 32) |
4728 (kvm_register_read(vcpu, VCPU_REGS_RAX) & 0xffffffff);
4729 ingpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RBX) << 32) |
4730 (kvm_register_read(vcpu, VCPU_REGS_RCX) & 0xffffffff);
4731 outgpa = ((u64)kvm_register_read(vcpu, VCPU_REGS_RDI) << 32) |
4732 (kvm_register_read(vcpu, VCPU_REGS_RSI) & 0xffffffff);
4733 }
4734 #ifdef CONFIG_X86_64
4735 else {
4736 param = kvm_register_read(vcpu, VCPU_REGS_RCX);
4737 ingpa = kvm_register_read(vcpu, VCPU_REGS_RDX);
4738 outgpa = kvm_register_read(vcpu, VCPU_REGS_R8);
4739 }
4740 #endif
4741
4742 code = param & 0xffff;
4743 fast = (param >> 16) & 0x1;
4744 rep_cnt = (param >> 32) & 0xfff;
4745 rep_idx = (param >> 48) & 0xfff;
4746
4747 trace_kvm_hv_hypercall(code, fast, rep_cnt, rep_idx, ingpa, outgpa);
4748
4749 switch (code) {
4750 case HV_X64_HV_NOTIFY_LONG_SPIN_WAIT:
4751 kvm_vcpu_on_spin(vcpu);
4752 break;
4753 default:
4754 res = HV_STATUS_INVALID_HYPERCALL_CODE;
4755 break;
4756 }
4757
4758 ret = res | (((u64)rep_done & 0xfff) << 32);
4759 if (longmode) {
4760 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4761 } else {
4762 kvm_register_write(vcpu, VCPU_REGS_RDX, ret >> 32);
4763 kvm_register_write(vcpu, VCPU_REGS_RAX, ret & 0xffffffff);
4764 }
4765
4766 return 1;
4767 }
4768
4769 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
4770 {
4771 unsigned long nr, a0, a1, a2, a3, ret;
4772 int r = 1;
4773
4774 if (kvm_hv_hypercall_enabled(vcpu->kvm))
4775 return kvm_hv_hypercall(vcpu);
4776
4777 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
4778 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
4779 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
4780 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
4781 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
4782
4783 trace_kvm_hypercall(nr, a0, a1, a2, a3);
4784
4785 if (!is_long_mode(vcpu)) {
4786 nr &= 0xFFFFFFFF;
4787 a0 &= 0xFFFFFFFF;
4788 a1 &= 0xFFFFFFFF;
4789 a2 &= 0xFFFFFFFF;
4790 a3 &= 0xFFFFFFFF;
4791 }
4792
4793 if (kvm_x86_ops->get_cpl(vcpu) != 0) {
4794 ret = -KVM_EPERM;
4795 goto out;
4796 }
4797
4798 switch (nr) {
4799 case KVM_HC_VAPIC_POLL_IRQ:
4800 ret = 0;
4801 break;
4802 case KVM_HC_MMU_OP:
4803 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
4804 break;
4805 default:
4806 ret = -KVM_ENOSYS;
4807 break;
4808 }
4809 out:
4810 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
4811 ++vcpu->stat.hypercalls;
4812 return r;
4813 }
4814 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
4815
4816 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
4817 {
4818 char instruction[3];
4819 unsigned long rip = kvm_rip_read(vcpu);
4820
4821 /*
4822 * Blow out the MMU to ensure that no other VCPU has an active mapping
4823 * to ensure that the updated hypercall appears atomically across all
4824 * VCPUs.
4825 */
4826 kvm_mmu_zap_all(vcpu->kvm);
4827
4828 kvm_x86_ops->patch_hypercall(vcpu, instruction);
4829
4830 return emulator_write_emulated(rip, instruction, 3, NULL, vcpu);
4831 }
4832
4833 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4834 {
4835 struct desc_ptr dt = { limit, base };
4836
4837 kvm_x86_ops->set_gdt(vcpu, &dt);
4838 }
4839
4840 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
4841 {
4842 struct desc_ptr dt = { limit, base };
4843
4844 kvm_x86_ops->set_idt(vcpu, &dt);
4845 }
4846
4847 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
4848 {
4849 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
4850 int j, nent = vcpu->arch.cpuid_nent;
4851
4852 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
4853 /* when no next entry is found, the current entry[i] is reselected */
4854 for (j = i + 1; ; j = (j + 1) % nent) {
4855 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
4856 if (ej->function == e->function) {
4857 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
4858 return j;
4859 }
4860 }
4861 return 0; /* silence gcc, even though control never reaches here */
4862 }
4863
4864 /* find an entry with matching function, matching index (if needed), and that
4865 * should be read next (if it's stateful) */
4866 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
4867 u32 function, u32 index)
4868 {
4869 if (e->function != function)
4870 return 0;
4871 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
4872 return 0;
4873 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
4874 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
4875 return 0;
4876 return 1;
4877 }
4878
4879 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
4880 u32 function, u32 index)
4881 {
4882 int i;
4883 struct kvm_cpuid_entry2 *best = NULL;
4884
4885 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
4886 struct kvm_cpuid_entry2 *e;
4887
4888 e = &vcpu->arch.cpuid_entries[i];
4889 if (is_matching_cpuid_entry(e, function, index)) {
4890 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
4891 move_to_next_stateful_cpuid_entry(vcpu, i);
4892 best = e;
4893 break;
4894 }
4895 /*
4896 * Both basic or both extended?
4897 */
4898 if (((e->function ^ function) & 0x80000000) == 0)
4899 if (!best || e->function > best->function)
4900 best = e;
4901 }
4902 return best;
4903 }
4904 EXPORT_SYMBOL_GPL(kvm_find_cpuid_entry);
4905
4906 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
4907 {
4908 struct kvm_cpuid_entry2 *best;
4909
4910 best = kvm_find_cpuid_entry(vcpu, 0x80000000, 0);
4911 if (!best || best->eax < 0x80000008)
4912 goto not_found;
4913 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
4914 if (best)
4915 return best->eax & 0xff;
4916 not_found:
4917 return 36;
4918 }
4919
4920 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
4921 {
4922 u32 function, index;
4923 struct kvm_cpuid_entry2 *best;
4924
4925 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
4926 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
4927 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
4928 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
4929 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
4930 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
4931 best = kvm_find_cpuid_entry(vcpu, function, index);
4932 if (best) {
4933 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
4934 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
4935 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
4936 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
4937 }
4938 kvm_x86_ops->skip_emulated_instruction(vcpu);
4939 trace_kvm_cpuid(function,
4940 kvm_register_read(vcpu, VCPU_REGS_RAX),
4941 kvm_register_read(vcpu, VCPU_REGS_RBX),
4942 kvm_register_read(vcpu, VCPU_REGS_RCX),
4943 kvm_register_read(vcpu, VCPU_REGS_RDX));
4944 }
4945 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
4946
4947 /*
4948 * Check if userspace requested an interrupt window, and that the
4949 * interrupt window is open.
4950 *
4951 * No need to exit to userspace if we already have an interrupt queued.
4952 */
4953 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
4954 {
4955 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
4956 vcpu->run->request_interrupt_window &&
4957 kvm_arch_interrupt_allowed(vcpu));
4958 }
4959
4960 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
4961 {
4962 struct kvm_run *kvm_run = vcpu->run;
4963
4964 kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
4965 kvm_run->cr8 = kvm_get_cr8(vcpu);
4966 kvm_run->apic_base = kvm_get_apic_base(vcpu);
4967 if (irqchip_in_kernel(vcpu->kvm))
4968 kvm_run->ready_for_interrupt_injection = 1;
4969 else
4970 kvm_run->ready_for_interrupt_injection =
4971 kvm_arch_interrupt_allowed(vcpu) &&
4972 !kvm_cpu_has_interrupt(vcpu) &&
4973 !kvm_event_needs_reinjection(vcpu);
4974 }
4975
4976 static void vapic_enter(struct kvm_vcpu *vcpu)
4977 {
4978 struct kvm_lapic *apic = vcpu->arch.apic;
4979 struct page *page;
4980
4981 if (!apic || !apic->vapic_addr)
4982 return;
4983
4984 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
4985
4986 vcpu->arch.apic->vapic_page = page;
4987 }
4988
4989 static void vapic_exit(struct kvm_vcpu *vcpu)
4990 {
4991 struct kvm_lapic *apic = vcpu->arch.apic;
4992 int idx;
4993
4994 if (!apic || !apic->vapic_addr)
4995 return;
4996
4997 idx = srcu_read_lock(&vcpu->kvm->srcu);
4998 kvm_release_page_dirty(apic->vapic_page);
4999 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
5000 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5001 }
5002
5003 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5004 {
5005 int max_irr, tpr;
5006
5007 if (!kvm_x86_ops->update_cr8_intercept)
5008 return;
5009
5010 if (!vcpu->arch.apic)
5011 return;
5012
5013 if (!vcpu->arch.apic->vapic_addr)
5014 max_irr = kvm_lapic_find_highest_irr(vcpu);
5015 else
5016 max_irr = -1;
5017
5018 if (max_irr != -1)
5019 max_irr >>= 4;
5020
5021 tpr = kvm_lapic_get_cr8(vcpu);
5022
5023 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5024 }
5025
5026 static void inject_pending_event(struct kvm_vcpu *vcpu)
5027 {
5028 /* try to reinject previous events if any */
5029 if (vcpu->arch.exception.pending) {
5030 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5031 vcpu->arch.exception.has_error_code,
5032 vcpu->arch.exception.error_code);
5033 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5034 vcpu->arch.exception.has_error_code,
5035 vcpu->arch.exception.error_code,
5036 vcpu->arch.exception.reinject);
5037 return;
5038 }
5039
5040 if (vcpu->arch.nmi_injected) {
5041 kvm_x86_ops->set_nmi(vcpu);
5042 return;
5043 }
5044
5045 if (vcpu->arch.interrupt.pending) {
5046 kvm_x86_ops->set_irq(vcpu);
5047 return;
5048 }
5049
5050 /* try to inject new event if pending */
5051 if (vcpu->arch.nmi_pending) {
5052 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5053 vcpu->arch.nmi_pending = false;
5054 vcpu->arch.nmi_injected = true;
5055 kvm_x86_ops->set_nmi(vcpu);
5056 }
5057 } else if (kvm_cpu_has_interrupt(vcpu)) {
5058 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5059 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5060 false);
5061 kvm_x86_ops->set_irq(vcpu);
5062 }
5063 }
5064 }
5065
5066 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
5067 {
5068 if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
5069 !vcpu->guest_xcr0_loaded) {
5070 /* kvm_set_xcr() also depends on this */
5071 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
5072 vcpu->guest_xcr0_loaded = 1;
5073 }
5074 }
5075
5076 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
5077 {
5078 if (vcpu->guest_xcr0_loaded) {
5079 if (vcpu->arch.xcr0 != host_xcr0)
5080 xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
5081 vcpu->guest_xcr0_loaded = 0;
5082 }
5083 }
5084
5085 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
5086 {
5087 int r;
5088 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
5089 vcpu->run->request_interrupt_window;
5090
5091 if (vcpu->requests) {
5092 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
5093 kvm_mmu_unload(vcpu);
5094 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
5095 __kvm_migrate_timers(vcpu);
5096 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
5097 r = kvm_guest_time_update(vcpu);
5098 if (unlikely(r))
5099 goto out;
5100 }
5101 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
5102 kvm_mmu_sync_roots(vcpu);
5103 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
5104 kvm_x86_ops->tlb_flush(vcpu);
5105 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
5106 vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
5107 r = 0;
5108 goto out;
5109 }
5110 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
5111 vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
5112 r = 0;
5113 goto out;
5114 }
5115 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
5116 vcpu->fpu_active = 0;
5117 kvm_x86_ops->fpu_deactivate(vcpu);
5118 }
5119 }
5120
5121 r = kvm_mmu_reload(vcpu);
5122 if (unlikely(r))
5123 goto out;
5124
5125 if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
5126 inject_pending_event(vcpu);
5127
5128 /* enable NMI/IRQ window open exits if needed */
5129 if (vcpu->arch.nmi_pending)
5130 kvm_x86_ops->enable_nmi_window(vcpu);
5131 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
5132 kvm_x86_ops->enable_irq_window(vcpu);
5133
5134 if (kvm_lapic_enabled(vcpu)) {
5135 update_cr8_intercept(vcpu);
5136 kvm_lapic_sync_to_vapic(vcpu);
5137 }
5138 }
5139
5140 preempt_disable();
5141
5142 kvm_x86_ops->prepare_guest_switch(vcpu);
5143 if (vcpu->fpu_active)
5144 kvm_load_guest_fpu(vcpu);
5145 kvm_load_guest_xcr0(vcpu);
5146
5147 atomic_set(&vcpu->guest_mode, 1);
5148 smp_wmb();
5149
5150 local_irq_disable();
5151
5152 if (!atomic_read(&vcpu->guest_mode) || vcpu->requests
5153 || need_resched() || signal_pending(current)) {
5154 atomic_set(&vcpu->guest_mode, 0);
5155 smp_wmb();
5156 local_irq_enable();
5157 preempt_enable();
5158 kvm_x86_ops->cancel_injection(vcpu);
5159 r = 1;
5160 goto out;
5161 }
5162
5163 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5164
5165 kvm_guest_enter();
5166
5167 if (unlikely(vcpu->arch.switch_db_regs)) {
5168 set_debugreg(0, 7);
5169 set_debugreg(vcpu->arch.eff_db[0], 0);
5170 set_debugreg(vcpu->arch.eff_db[1], 1);
5171 set_debugreg(vcpu->arch.eff_db[2], 2);
5172 set_debugreg(vcpu->arch.eff_db[3], 3);
5173 }
5174
5175 trace_kvm_entry(vcpu->vcpu_id);
5176 kvm_x86_ops->run(vcpu);
5177
5178 /*
5179 * If the guest has used debug registers, at least dr7
5180 * will be disabled while returning to the host.
5181 * If we don't have active breakpoints in the host, we don't
5182 * care about the messed up debug address registers. But if
5183 * we have some of them active, restore the old state.
5184 */
5185 if (hw_breakpoint_active())
5186 hw_breakpoint_restore();
5187
5188 kvm_get_msr(vcpu, MSR_IA32_TSC, &vcpu->arch.last_guest_tsc);
5189
5190 atomic_set(&vcpu->guest_mode, 0);
5191 smp_wmb();
5192 local_irq_enable();
5193
5194 ++vcpu->stat.exits;
5195
5196 /*
5197 * We must have an instruction between local_irq_enable() and
5198 * kvm_guest_exit(), so the timer interrupt isn't delayed by
5199 * the interrupt shadow. The stat.exits increment will do nicely.
5200 * But we need to prevent reordering, hence this barrier():
5201 */
5202 barrier();
5203
5204 kvm_guest_exit();
5205
5206 preempt_enable();
5207
5208 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5209
5210 /*
5211 * Profile KVM exit RIPs:
5212 */
5213 if (unlikely(prof_on == KVM_PROFILING)) {
5214 unsigned long rip = kvm_rip_read(vcpu);
5215 profile_hit(KVM_PROFILING, (void *)rip);
5216 }
5217
5218
5219 kvm_lapic_sync_from_vapic(vcpu);
5220
5221 r = kvm_x86_ops->handle_exit(vcpu);
5222 out:
5223 return r;
5224 }
5225
5226
5227 static int __vcpu_run(struct kvm_vcpu *vcpu)
5228 {
5229 int r;
5230 struct kvm *kvm = vcpu->kvm;
5231
5232 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
5233 pr_debug("vcpu %d received sipi with vector # %x\n",
5234 vcpu->vcpu_id, vcpu->arch.sipi_vector);
5235 kvm_lapic_reset(vcpu);
5236 r = kvm_arch_vcpu_reset(vcpu);
5237 if (r)
5238 return r;
5239 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5240 }
5241
5242 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5243 vapic_enter(vcpu);
5244
5245 r = 1;
5246 while (r > 0) {
5247 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
5248 r = vcpu_enter_guest(vcpu);
5249 else {
5250 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5251 kvm_vcpu_block(vcpu);
5252 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5253 if (kvm_check_request(KVM_REQ_UNHALT, vcpu))
5254 {
5255 switch(vcpu->arch.mp_state) {
5256 case KVM_MP_STATE_HALTED:
5257 vcpu->arch.mp_state =
5258 KVM_MP_STATE_RUNNABLE;
5259 case KVM_MP_STATE_RUNNABLE:
5260 break;
5261 case KVM_MP_STATE_SIPI_RECEIVED:
5262 default:
5263 r = -EINTR;
5264 break;
5265 }
5266 }
5267 }
5268
5269 if (r <= 0)
5270 break;
5271
5272 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
5273 if (kvm_cpu_has_pending_timer(vcpu))
5274 kvm_inject_pending_timer_irqs(vcpu);
5275
5276 if (dm_request_for_irq_injection(vcpu)) {
5277 r = -EINTR;
5278 vcpu->run->exit_reason = KVM_EXIT_INTR;
5279 ++vcpu->stat.request_irq_exits;
5280 }
5281 if (signal_pending(current)) {
5282 r = -EINTR;
5283 vcpu->run->exit_reason = KVM_EXIT_INTR;
5284 ++vcpu->stat.signal_exits;
5285 }
5286 if (need_resched()) {
5287 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5288 kvm_resched(vcpu);
5289 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
5290 }
5291 }
5292
5293 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
5294
5295 vapic_exit(vcpu);
5296
5297 return r;
5298 }
5299
5300 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
5301 {
5302 int r;
5303 sigset_t sigsaved;
5304
5305 if (vcpu->sigset_active)
5306 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
5307
5308 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
5309 kvm_vcpu_block(vcpu);
5310 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
5311 r = -EAGAIN;
5312 goto out;
5313 }
5314
5315 /* re-sync apic's tpr */
5316 if (!irqchip_in_kernel(vcpu->kvm))
5317 kvm_set_cr8(vcpu, kvm_run->cr8);
5318
5319 if (vcpu->arch.pio.count || vcpu->mmio_needed) {
5320 if (vcpu->mmio_needed) {
5321 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
5322 vcpu->mmio_read_completed = 1;
5323 vcpu->mmio_needed = 0;
5324 }
5325 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
5326 r = emulate_instruction(vcpu, 0, 0, EMULTYPE_NO_DECODE);
5327 srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
5328 if (r != EMULATE_DONE) {
5329 r = 0;
5330 goto out;
5331 }
5332 }
5333 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
5334 kvm_register_write(vcpu, VCPU_REGS_RAX,
5335 kvm_run->hypercall.ret);
5336
5337 r = __vcpu_run(vcpu);
5338
5339 out:
5340 post_kvm_run_save(vcpu);
5341 if (vcpu->sigset_active)
5342 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
5343
5344 return r;
5345 }
5346
5347 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5348 {
5349 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
5350 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
5351 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
5352 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
5353 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
5354 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
5355 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
5356 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
5357 #ifdef CONFIG_X86_64
5358 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
5359 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
5360 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
5361 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
5362 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
5363 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
5364 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
5365 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
5366 #endif
5367
5368 regs->rip = kvm_rip_read(vcpu);
5369 regs->rflags = kvm_get_rflags(vcpu);
5370
5371 return 0;
5372 }
5373
5374 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
5375 {
5376 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
5377 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
5378 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
5379 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
5380 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
5381 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
5382 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
5383 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
5384 #ifdef CONFIG_X86_64
5385 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
5386 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
5387 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
5388 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
5389 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
5390 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
5391 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
5392 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
5393 #endif
5394
5395 kvm_rip_write(vcpu, regs->rip);
5396 kvm_set_rflags(vcpu, regs->rflags);
5397
5398 vcpu->arch.exception.pending = false;
5399
5400 kvm_make_request(KVM_REQ_EVENT, vcpu);
5401
5402 return 0;
5403 }
5404
5405 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
5406 {
5407 struct kvm_segment cs;
5408
5409 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
5410 *db = cs.db;
5411 *l = cs.l;
5412 }
5413 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
5414
5415 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
5416 struct kvm_sregs *sregs)
5417 {
5418 struct desc_ptr dt;
5419
5420 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5421 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5422 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5423 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5424 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5425 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5426
5427 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5428 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5429
5430 kvm_x86_ops->get_idt(vcpu, &dt);
5431 sregs->idt.limit = dt.size;
5432 sregs->idt.base = dt.address;
5433 kvm_x86_ops->get_gdt(vcpu, &dt);
5434 sregs->gdt.limit = dt.size;
5435 sregs->gdt.base = dt.address;
5436
5437 sregs->cr0 = kvm_read_cr0(vcpu);
5438 sregs->cr2 = vcpu->arch.cr2;
5439 sregs->cr3 = vcpu->arch.cr3;
5440 sregs->cr4 = kvm_read_cr4(vcpu);
5441 sregs->cr8 = kvm_get_cr8(vcpu);
5442 sregs->efer = vcpu->arch.efer;
5443 sregs->apic_base = kvm_get_apic_base(vcpu);
5444
5445 memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
5446
5447 if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
5448 set_bit(vcpu->arch.interrupt.nr,
5449 (unsigned long *)sregs->interrupt_bitmap);
5450
5451 return 0;
5452 }
5453
5454 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
5455 struct kvm_mp_state *mp_state)
5456 {
5457 mp_state->mp_state = vcpu->arch.mp_state;
5458 return 0;
5459 }
5460
5461 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
5462 struct kvm_mp_state *mp_state)
5463 {
5464 vcpu->arch.mp_state = mp_state->mp_state;
5465 kvm_make_request(KVM_REQ_EVENT, vcpu);
5466 return 0;
5467 }
5468
5469 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason,
5470 bool has_error_code, u32 error_code)
5471 {
5472 struct decode_cache *c = &vcpu->arch.emulate_ctxt.decode;
5473 int ret;
5474
5475 init_emulate_ctxt(vcpu);
5476
5477 ret = emulator_task_switch(&vcpu->arch.emulate_ctxt,
5478 tss_selector, reason, has_error_code,
5479 error_code);
5480
5481 if (ret)
5482 return EMULATE_FAIL;
5483
5484 memcpy(vcpu->arch.regs, c->regs, sizeof c->regs);
5485 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.eip);
5486 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
5487 kvm_make_request(KVM_REQ_EVENT, vcpu);
5488 return EMULATE_DONE;
5489 }
5490 EXPORT_SYMBOL_GPL(kvm_task_switch);
5491
5492 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
5493 struct kvm_sregs *sregs)
5494 {
5495 int mmu_reset_needed = 0;
5496 int pending_vec, max_bits;
5497 struct desc_ptr dt;
5498
5499 dt.size = sregs->idt.limit;
5500 dt.address = sregs->idt.base;
5501 kvm_x86_ops->set_idt(vcpu, &dt);
5502 dt.size = sregs->gdt.limit;
5503 dt.address = sregs->gdt.base;
5504 kvm_x86_ops->set_gdt(vcpu, &dt);
5505
5506 vcpu->arch.cr2 = sregs->cr2;
5507 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
5508 vcpu->arch.cr3 = sregs->cr3;
5509
5510 kvm_set_cr8(vcpu, sregs->cr8);
5511
5512 mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
5513 kvm_x86_ops->set_efer(vcpu, sregs->efer);
5514 kvm_set_apic_base(vcpu, sregs->apic_base);
5515
5516 mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
5517 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
5518 vcpu->arch.cr0 = sregs->cr0;
5519
5520 mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
5521 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
5522 if (sregs->cr4 & X86_CR4_OSXSAVE)
5523 update_cpuid(vcpu);
5524 if (!is_long_mode(vcpu) && is_pae(vcpu)) {
5525 load_pdptrs(vcpu, vcpu->arch.walk_mmu, vcpu->arch.cr3);
5526 mmu_reset_needed = 1;
5527 }
5528
5529 if (mmu_reset_needed)
5530 kvm_mmu_reset_context(vcpu);
5531
5532 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
5533 pending_vec = find_first_bit(
5534 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
5535 if (pending_vec < max_bits) {
5536 kvm_queue_interrupt(vcpu, pending_vec, false);
5537 pr_debug("Set back pending irq %d\n", pending_vec);
5538 if (irqchip_in_kernel(vcpu->kvm))
5539 kvm_pic_clear_isr_ack(vcpu->kvm);
5540 }
5541
5542 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
5543 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
5544 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
5545 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
5546 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
5547 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
5548
5549 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
5550 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
5551
5552 update_cr8_intercept(vcpu);
5553
5554 /* Older userspace won't unhalt the vcpu on reset. */
5555 if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
5556 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
5557 !is_protmode(vcpu))
5558 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5559
5560 kvm_make_request(KVM_REQ_EVENT, vcpu);
5561
5562 return 0;
5563 }
5564
5565 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
5566 struct kvm_guest_debug *dbg)
5567 {
5568 unsigned long rflags;
5569 int i, r;
5570
5571 if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
5572 r = -EBUSY;
5573 if (vcpu->arch.exception.pending)
5574 goto out;
5575 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
5576 kvm_queue_exception(vcpu, DB_VECTOR);
5577 else
5578 kvm_queue_exception(vcpu, BP_VECTOR);
5579 }
5580
5581 /*
5582 * Read rflags as long as potentially injected trace flags are still
5583 * filtered out.
5584 */
5585 rflags = kvm_get_rflags(vcpu);
5586
5587 vcpu->guest_debug = dbg->control;
5588 if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
5589 vcpu->guest_debug = 0;
5590
5591 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
5592 for (i = 0; i < KVM_NR_DB_REGS; ++i)
5593 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
5594 vcpu->arch.switch_db_regs =
5595 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
5596 } else {
5597 for (i = 0; i < KVM_NR_DB_REGS; i++)
5598 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
5599 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
5600 }
5601
5602 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
5603 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
5604 get_segment_base(vcpu, VCPU_SREG_CS);
5605
5606 /*
5607 * Trigger an rflags update that will inject or remove the trace
5608 * flags.
5609 */
5610 kvm_set_rflags(vcpu, rflags);
5611
5612 kvm_x86_ops->set_guest_debug(vcpu, dbg);
5613
5614 r = 0;
5615
5616 out:
5617
5618 return r;
5619 }
5620
5621 /*
5622 * Translate a guest virtual address to a guest physical address.
5623 */
5624 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
5625 struct kvm_translation *tr)
5626 {
5627 unsigned long vaddr = tr->linear_address;
5628 gpa_t gpa;
5629 int idx;
5630
5631 idx = srcu_read_lock(&vcpu->kvm->srcu);
5632 gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
5633 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5634 tr->physical_address = gpa;
5635 tr->valid = gpa != UNMAPPED_GVA;
5636 tr->writeable = 1;
5637 tr->usermode = 0;
5638
5639 return 0;
5640 }
5641
5642 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5643 {
5644 struct i387_fxsave_struct *fxsave =
5645 &vcpu->arch.guest_fpu.state->fxsave;
5646
5647 memcpy(fpu->fpr, fxsave->st_space, 128);
5648 fpu->fcw = fxsave->cwd;
5649 fpu->fsw = fxsave->swd;
5650 fpu->ftwx = fxsave->twd;
5651 fpu->last_opcode = fxsave->fop;
5652 fpu->last_ip = fxsave->rip;
5653 fpu->last_dp = fxsave->rdp;
5654 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
5655
5656 return 0;
5657 }
5658
5659 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
5660 {
5661 struct i387_fxsave_struct *fxsave =
5662 &vcpu->arch.guest_fpu.state->fxsave;
5663
5664 memcpy(fxsave->st_space, fpu->fpr, 128);
5665 fxsave->cwd = fpu->fcw;
5666 fxsave->swd = fpu->fsw;
5667 fxsave->twd = fpu->ftwx;
5668 fxsave->fop = fpu->last_opcode;
5669 fxsave->rip = fpu->last_ip;
5670 fxsave->rdp = fpu->last_dp;
5671 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
5672
5673 return 0;
5674 }
5675
5676 int fx_init(struct kvm_vcpu *vcpu)
5677 {
5678 int err;
5679
5680 err = fpu_alloc(&vcpu->arch.guest_fpu);
5681 if (err)
5682 return err;
5683
5684 fpu_finit(&vcpu->arch.guest_fpu);
5685
5686 /*
5687 * Ensure guest xcr0 is valid for loading
5688 */
5689 vcpu->arch.xcr0 = XSTATE_FP;
5690
5691 vcpu->arch.cr0 |= X86_CR0_ET;
5692
5693 return 0;
5694 }
5695 EXPORT_SYMBOL_GPL(fx_init);
5696
5697 static void fx_free(struct kvm_vcpu *vcpu)
5698 {
5699 fpu_free(&vcpu->arch.guest_fpu);
5700 }
5701
5702 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
5703 {
5704 if (vcpu->guest_fpu_loaded)
5705 return;
5706
5707 /*
5708 * Restore all possible states in the guest,
5709 * and assume host would use all available bits.
5710 * Guest xcr0 would be loaded later.
5711 */
5712 kvm_put_guest_xcr0(vcpu);
5713 vcpu->guest_fpu_loaded = 1;
5714 unlazy_fpu(current);
5715 fpu_restore_checking(&vcpu->arch.guest_fpu);
5716 trace_kvm_fpu(1);
5717 }
5718
5719 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
5720 {
5721 kvm_put_guest_xcr0(vcpu);
5722
5723 if (!vcpu->guest_fpu_loaded)
5724 return;
5725
5726 vcpu->guest_fpu_loaded = 0;
5727 fpu_save_init(&vcpu->arch.guest_fpu);
5728 ++vcpu->stat.fpu_reload;
5729 kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
5730 trace_kvm_fpu(0);
5731 }
5732
5733 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
5734 {
5735 if (vcpu->arch.time_page) {
5736 kvm_release_page_dirty(vcpu->arch.time_page);
5737 vcpu->arch.time_page = NULL;
5738 }
5739
5740 free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
5741 fx_free(vcpu);
5742 kvm_x86_ops->vcpu_free(vcpu);
5743 }
5744
5745 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
5746 unsigned int id)
5747 {
5748 if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
5749 printk_once(KERN_WARNING
5750 "kvm: SMP vm created on host with unstable TSC; "
5751 "guest TSC will not be reliable\n");
5752 return kvm_x86_ops->vcpu_create(kvm, id);
5753 }
5754
5755 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
5756 {
5757 int r;
5758
5759 vcpu->arch.mtrr_state.have_fixed = 1;
5760 vcpu_load(vcpu);
5761 r = kvm_arch_vcpu_reset(vcpu);
5762 if (r == 0)
5763 r = kvm_mmu_setup(vcpu);
5764 vcpu_put(vcpu);
5765 if (r < 0)
5766 goto free_vcpu;
5767
5768 return 0;
5769 free_vcpu:
5770 kvm_x86_ops->vcpu_free(vcpu);
5771 return r;
5772 }
5773
5774 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
5775 {
5776 vcpu_load(vcpu);
5777 kvm_mmu_unload(vcpu);
5778 vcpu_put(vcpu);
5779
5780 fx_free(vcpu);
5781 kvm_x86_ops->vcpu_free(vcpu);
5782 }
5783
5784 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
5785 {
5786 vcpu->arch.nmi_pending = false;
5787 vcpu->arch.nmi_injected = false;
5788
5789 vcpu->arch.switch_db_regs = 0;
5790 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
5791 vcpu->arch.dr6 = DR6_FIXED_1;
5792 vcpu->arch.dr7 = DR7_FIXED_1;
5793
5794 kvm_make_request(KVM_REQ_EVENT, vcpu);
5795
5796 return kvm_x86_ops->vcpu_reset(vcpu);
5797 }
5798
5799 int kvm_arch_hardware_enable(void *garbage)
5800 {
5801 struct kvm *kvm;
5802 struct kvm_vcpu *vcpu;
5803 int i;
5804
5805 kvm_shared_msr_cpu_online();
5806 list_for_each_entry(kvm, &vm_list, vm_list)
5807 kvm_for_each_vcpu(i, vcpu, kvm)
5808 if (vcpu->cpu == smp_processor_id())
5809 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5810 return kvm_x86_ops->hardware_enable(garbage);
5811 }
5812
5813 void kvm_arch_hardware_disable(void *garbage)
5814 {
5815 kvm_x86_ops->hardware_disable(garbage);
5816 drop_user_return_notifiers(garbage);
5817 }
5818
5819 int kvm_arch_hardware_setup(void)
5820 {
5821 return kvm_x86_ops->hardware_setup();
5822 }
5823
5824 void kvm_arch_hardware_unsetup(void)
5825 {
5826 kvm_x86_ops->hardware_unsetup();
5827 }
5828
5829 void kvm_arch_check_processor_compat(void *rtn)
5830 {
5831 kvm_x86_ops->check_processor_compatibility(rtn);
5832 }
5833
5834 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
5835 {
5836 struct page *page;
5837 struct kvm *kvm;
5838 int r;
5839
5840 BUG_ON(vcpu->kvm == NULL);
5841 kvm = vcpu->kvm;
5842
5843 vcpu->arch.emulate_ctxt.ops = &emulate_ops;
5844 vcpu->arch.walk_mmu = &vcpu->arch.mmu;
5845 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
5846 vcpu->arch.mmu.translate_gpa = translate_gpa;
5847 vcpu->arch.nested_mmu.translate_gpa = translate_nested_gpa;
5848 if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_bsp(vcpu))
5849 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
5850 else
5851 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
5852
5853 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
5854 if (!page) {
5855 r = -ENOMEM;
5856 goto fail;
5857 }
5858 vcpu->arch.pio_data = page_address(page);
5859
5860 if (!kvm->arch.virtual_tsc_khz)
5861 kvm_arch_set_tsc_khz(kvm, max_tsc_khz);
5862
5863 r = kvm_mmu_create(vcpu);
5864 if (r < 0)
5865 goto fail_free_pio_data;
5866
5867 if (irqchip_in_kernel(kvm)) {
5868 r = kvm_create_lapic(vcpu);
5869 if (r < 0)
5870 goto fail_mmu_destroy;
5871 }
5872
5873 vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
5874 GFP_KERNEL);
5875 if (!vcpu->arch.mce_banks) {
5876 r = -ENOMEM;
5877 goto fail_free_lapic;
5878 }
5879 vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
5880
5881 if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL))
5882 goto fail_free_mce_banks;
5883
5884 return 0;
5885 fail_free_mce_banks:
5886 kfree(vcpu->arch.mce_banks);
5887 fail_free_lapic:
5888 kvm_free_lapic(vcpu);
5889 fail_mmu_destroy:
5890 kvm_mmu_destroy(vcpu);
5891 fail_free_pio_data:
5892 free_page((unsigned long)vcpu->arch.pio_data);
5893 fail:
5894 return r;
5895 }
5896
5897 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
5898 {
5899 int idx;
5900
5901 kfree(vcpu->arch.mce_banks);
5902 kvm_free_lapic(vcpu);
5903 idx = srcu_read_lock(&vcpu->kvm->srcu);
5904 kvm_mmu_destroy(vcpu);
5905 srcu_read_unlock(&vcpu->kvm->srcu, idx);
5906 free_page((unsigned long)vcpu->arch.pio_data);
5907 }
5908
5909 struct kvm *kvm_arch_create_vm(void)
5910 {
5911 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
5912
5913 if (!kvm)
5914 return ERR_PTR(-ENOMEM);
5915
5916 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
5917 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
5918
5919 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
5920 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
5921
5922 spin_lock_init(&kvm->arch.tsc_write_lock);
5923
5924 return kvm;
5925 }
5926
5927 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
5928 {
5929 vcpu_load(vcpu);
5930 kvm_mmu_unload(vcpu);
5931 vcpu_put(vcpu);
5932 }
5933
5934 static void kvm_free_vcpus(struct kvm *kvm)
5935 {
5936 unsigned int i;
5937 struct kvm_vcpu *vcpu;
5938
5939 /*
5940 * Unpin any mmu pages first.
5941 */
5942 kvm_for_each_vcpu(i, vcpu, kvm)
5943 kvm_unload_vcpu_mmu(vcpu);
5944 kvm_for_each_vcpu(i, vcpu, kvm)
5945 kvm_arch_vcpu_free(vcpu);
5946
5947 mutex_lock(&kvm->lock);
5948 for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
5949 kvm->vcpus[i] = NULL;
5950
5951 atomic_set(&kvm->online_vcpus, 0);
5952 mutex_unlock(&kvm->lock);
5953 }
5954
5955 void kvm_arch_sync_events(struct kvm *kvm)
5956 {
5957 kvm_free_all_assigned_devices(kvm);
5958 kvm_free_pit(kvm);
5959 }
5960
5961 void kvm_arch_destroy_vm(struct kvm *kvm)
5962 {
5963 kvm_iommu_unmap_guest(kvm);
5964 kfree(kvm->arch.vpic);
5965 kfree(kvm->arch.vioapic);
5966 kvm_free_vcpus(kvm);
5967 kvm_free_physmem(kvm);
5968 if (kvm->arch.apic_access_page)
5969 put_page(kvm->arch.apic_access_page);
5970 if (kvm->arch.ept_identity_pagetable)
5971 put_page(kvm->arch.ept_identity_pagetable);
5972 cleanup_srcu_struct(&kvm->srcu);
5973 kfree(kvm);
5974 }
5975
5976 int kvm_arch_prepare_memory_region(struct kvm *kvm,
5977 struct kvm_memory_slot *memslot,
5978 struct kvm_memory_slot old,
5979 struct kvm_userspace_memory_region *mem,
5980 int user_alloc)
5981 {
5982 int npages = memslot->npages;
5983 int map_flags = MAP_PRIVATE | MAP_ANONYMOUS;
5984
5985 /* Prevent internal slot pages from being moved by fork()/COW. */
5986 if (memslot->id >= KVM_MEMORY_SLOTS)
5987 map_flags = MAP_SHARED | MAP_ANONYMOUS;
5988
5989 /*To keep backward compatibility with older userspace,
5990 *x86 needs to hanlde !user_alloc case.
5991 */
5992 if (!user_alloc) {
5993 if (npages && !old.rmap) {
5994 unsigned long userspace_addr;
5995
5996 down_write(&current->mm->mmap_sem);
5997 userspace_addr = do_mmap(NULL, 0,
5998 npages * PAGE_SIZE,
5999 PROT_READ | PROT_WRITE,
6000 map_flags,
6001 0);
6002 up_write(&current->mm->mmap_sem);
6003
6004 if (IS_ERR((void *)userspace_addr))
6005 return PTR_ERR((void *)userspace_addr);
6006
6007 memslot->userspace_addr = userspace_addr;
6008 }
6009 }
6010
6011
6012 return 0;
6013 }
6014
6015 void kvm_arch_commit_memory_region(struct kvm *kvm,
6016 struct kvm_userspace_memory_region *mem,
6017 struct kvm_memory_slot old,
6018 int user_alloc)
6019 {
6020
6021 int npages = mem->memory_size >> PAGE_SHIFT;
6022
6023 if (!user_alloc && !old.user_alloc && old.rmap && !npages) {
6024 int ret;
6025
6026 down_write(&current->mm->mmap_sem);
6027 ret = do_munmap(current->mm, old.userspace_addr,
6028 old.npages * PAGE_SIZE);
6029 up_write(&current->mm->mmap_sem);
6030 if (ret < 0)
6031 printk(KERN_WARNING
6032 "kvm_vm_ioctl_set_memory_region: "
6033 "failed to munmap memory\n");
6034 }
6035
6036 spin_lock(&kvm->mmu_lock);
6037 if (!kvm->arch.n_requested_mmu_pages) {
6038 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
6039 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
6040 }
6041
6042 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
6043 spin_unlock(&kvm->mmu_lock);
6044 }
6045
6046 void kvm_arch_flush_shadow(struct kvm *kvm)
6047 {
6048 kvm_mmu_zap_all(kvm);
6049 kvm_reload_remote_mmus(kvm);
6050 }
6051
6052 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
6053 {
6054 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
6055 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
6056 || vcpu->arch.nmi_pending ||
6057 (kvm_arch_interrupt_allowed(vcpu) &&
6058 kvm_cpu_has_interrupt(vcpu));
6059 }
6060
6061 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
6062 {
6063 int me;
6064 int cpu = vcpu->cpu;
6065
6066 if (waitqueue_active(&vcpu->wq)) {
6067 wake_up_interruptible(&vcpu->wq);
6068 ++vcpu->stat.halt_wakeup;
6069 }
6070
6071 me = get_cpu();
6072 if (cpu != me && (unsigned)cpu < nr_cpu_ids && cpu_online(cpu))
6073 if (atomic_xchg(&vcpu->guest_mode, 0))
6074 smp_send_reschedule(cpu);
6075 put_cpu();
6076 }
6077
6078 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
6079 {
6080 return kvm_x86_ops->interrupt_allowed(vcpu);
6081 }
6082
6083 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
6084 {
6085 unsigned long current_rip = kvm_rip_read(vcpu) +
6086 get_segment_base(vcpu, VCPU_SREG_CS);
6087
6088 return current_rip == linear_rip;
6089 }
6090 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
6091
6092 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
6093 {
6094 unsigned long rflags;
6095
6096 rflags = kvm_x86_ops->get_rflags(vcpu);
6097 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6098 rflags &= ~X86_EFLAGS_TF;
6099 return rflags;
6100 }
6101 EXPORT_SYMBOL_GPL(kvm_get_rflags);
6102
6103 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
6104 {
6105 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
6106 kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
6107 rflags |= X86_EFLAGS_TF;
6108 kvm_x86_ops->set_rflags(vcpu, rflags);
6109 kvm_make_request(KVM_REQ_EVENT, vcpu);
6110 }
6111 EXPORT_SYMBOL_GPL(kvm_set_rflags);
6112
6113 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
6114 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
6115 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
6116 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
6117 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
6118 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
6119 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
6120 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
6121 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
6122 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
6123 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
6124 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
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