2 * Copyright (c) 2006, 2007 QLogic Corporation. All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/pci.h>
36 #include "ipath_kernel.h"
37 #include "ipath_verbs.h"
38 #include "ipath_common.h"
41 * clear (write) a pio buffer, to clear a parity error. This routine
42 * should only be called when in freeze mode, and the buffer should be
43 * canceled afterwards.
45 static void ipath_clrpiobuf(struct ipath_devdata
*dd
, u32 pnum
)
48 u32 dwcnt
; /* dword count to write */
49 if (pnum
< dd
->ipath_piobcnt2k
) {
50 pbuf
= (u32 __iomem
*) (dd
->ipath_pio2kbase
+ pnum
*
52 dwcnt
= dd
->ipath_piosize2k
>> 2;
55 pbuf
= (u32 __iomem
*) (dd
->ipath_pio4kbase
+
56 (pnum
- dd
->ipath_piobcnt2k
) * dd
->ipath_4kalign
);
57 dwcnt
= dd
->ipath_piosize4k
>> 2;
59 dev_info(&dd
->pcidev
->dev
,
60 "Rewrite PIO buffer %u, to recover from parity error\n",
63 /* no flush required, since already in freeze */
64 writel(dwcnt
+ 1, pbuf
);
70 * Called when we might have an error that is specific to a particular
71 * PIO buffer, and may need to cancel that buffer, so it can be re-used.
72 * If rewrite is true, and bits are set in the sendbufferror registers,
73 * we'll write to the buffer, for error recovery on parity errors.
75 static void ipath_disarm_senderrbufs(struct ipath_devdata
*dd
, int rewrite
)
78 unsigned long sbuf
[4];
80 * it's possible that sendbuffererror could have bits set; might
81 * have already done this as a result of hardware error handling
83 piobcnt
= dd
->ipath_piobcnt2k
+ dd
->ipath_piobcnt4k
;
84 /* read these before writing errorclear */
85 sbuf
[0] = ipath_read_kreg64(
86 dd
, dd
->ipath_kregs
->kr_sendbuffererror
);
87 sbuf
[1] = ipath_read_kreg64(
88 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 1);
90 sbuf
[2] = ipath_read_kreg64(
91 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 2);
92 sbuf
[3] = ipath_read_kreg64(
93 dd
, dd
->ipath_kregs
->kr_sendbuffererror
+ 3);
96 if (sbuf
[0] || sbuf
[1] || (piobcnt
> 128 && (sbuf
[2] || sbuf
[3]))) {
98 if (ipath_debug
& (__IPATH_PKTDBG
|__IPATH_DBG
) &&
99 dd
->ipath_lastcancel
> jiffies
) {
100 __IPATH_DBG_WHICH(__IPATH_PKTDBG
|__IPATH_DBG
,
101 "SendbufErrs %lx %lx", sbuf
[0],
103 if (ipath_debug
& __IPATH_PKTDBG
&& piobcnt
> 128)
104 printk(" %lx %lx ", sbuf
[2], sbuf
[3]);
108 for (i
= 0; i
< piobcnt
; i
++)
109 if (test_bit(i
, sbuf
)) {
111 ipath_clrpiobuf(dd
, i
);
112 ipath_disarm_piobufs(dd
, i
, 1);
114 /* ignore armlaunch errs for a bit */
115 dd
->ipath_lastcancel
= jiffies
+3;
120 /* These are all rcv-related errors which we want to count for stats */
121 #define E_SUM_PKTERRS \
122 (INFINIPATH_E_RHDRLEN | INFINIPATH_E_RBADTID | \
123 INFINIPATH_E_RBADVERSION | INFINIPATH_E_RHDR | \
124 INFINIPATH_E_RLONGPKTLEN | INFINIPATH_E_RSHORTPKTLEN | \
125 INFINIPATH_E_RMAXPKTLEN | INFINIPATH_E_RMINPKTLEN | \
126 INFINIPATH_E_RFORMATERR | INFINIPATH_E_RUNSUPVL | \
127 INFINIPATH_E_RUNEXPCHAR | INFINIPATH_E_REBP)
129 /* These are all send-related errors which we want to count for stats */
131 (INFINIPATH_E_SPIOARMLAUNCH | INFINIPATH_E_SUNEXPERRPKTNUM | \
132 INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
133 INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SUNSUPVL | \
134 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
135 INFINIPATH_E_INVALIDADDR)
138 * this is similar to E_SUM_ERRS, but can't ignore armlaunch, don't ignore
139 * errors not related to freeze and cancelling buffers. Can't ignore
140 * armlaunch because could get more while still cleaning up, and need
141 * to cancel those as they happen.
143 #define E_SPKT_ERRS_IGNORE \
144 (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
145 INFINIPATH_E_SMAXPKTLEN | INFINIPATH_E_SMINPKTLEN | \
146 INFINIPATH_E_SPKTLEN)
149 * these are errors that can occur when the link changes state while
150 * a packet is being sent or received. This doesn't cover things
151 * like EBP or VCRC that can be the result of a sending having the
152 * link change state, so we receive a "known bad" packet.
154 #define E_SUM_LINK_PKTERRS \
155 (INFINIPATH_E_SDROPPEDDATAPKT | INFINIPATH_E_SDROPPEDSMPPKT | \
156 INFINIPATH_E_SMINPKTLEN | INFINIPATH_E_SPKTLEN | \
157 INFINIPATH_E_RSHORTPKTLEN | INFINIPATH_E_RMINPKTLEN | \
158 INFINIPATH_E_RUNEXPCHAR)
160 static u64
handle_e_sum_errs(struct ipath_devdata
*dd
, ipath_err_t errs
)
162 u64 ignore_this_time
= 0;
164 ipath_disarm_senderrbufs(dd
, 0);
165 if ((errs
& E_SUM_LINK_PKTERRS
) &&
166 !(dd
->ipath_flags
& IPATH_LINKACTIVE
)) {
168 * This can happen when SMA is trying to bring the link
169 * up, but the IB link changes state at the "wrong" time.
170 * The IB logic then complains that the packet isn't
171 * valid. We don't want to confuse people, so we just
172 * don't print them, except at debug
174 ipath_dbg("Ignoring packet errors %llx, because link not "
175 "ACTIVE\n", (unsigned long long) errs
);
176 ignore_this_time
= errs
& E_SUM_LINK_PKTERRS
;
179 return ignore_this_time
;
182 /* generic hw error messages... */
183 #define INFINIPATH_HWE_TXEMEMPARITYERR_MSG(a) \
185 .mask = ( INFINIPATH_HWE_TXEMEMPARITYERR_##a << \
186 INFINIPATH_HWE_TXEMEMPARITYERR_SHIFT ), \
187 .msg = "TXE " #a " Memory Parity" \
189 #define INFINIPATH_HWE_RXEMEMPARITYERR_MSG(a) \
191 .mask = ( INFINIPATH_HWE_RXEMEMPARITYERR_##a << \
192 INFINIPATH_HWE_RXEMEMPARITYERR_SHIFT ), \
193 .msg = "RXE " #a " Memory Parity" \
196 static const struct ipath_hwerror_msgs ipath_generic_hwerror_msgs
[] = {
197 INFINIPATH_HWE_MSG(IBCBUSFRSPCPARITYERR
, "IPATH2IB Parity"),
198 INFINIPATH_HWE_MSG(IBCBUSTOSPCPARITYERR
, "IB2IPATH Parity"),
200 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOBUF
),
201 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOPBC
),
202 INFINIPATH_HWE_TXEMEMPARITYERR_MSG(PIOLAUNCHFIFO
),
204 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(RCVBUF
),
205 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(LOOKUPQ
),
206 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EAGERTID
),
207 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(EXPTID
),
208 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(FLAGBUF
),
209 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(DATAINFO
),
210 INFINIPATH_HWE_RXEMEMPARITYERR_MSG(HDRINFO
),
214 * ipath_format_hwmsg - format a single hwerror message
215 * @msg message buffer
216 * @msgl length of message buffer
217 * @hwmsg message to add to message buffer
219 static void ipath_format_hwmsg(char *msg
, size_t msgl
, const char *hwmsg
)
221 strlcat(msg
, "[", msgl
);
222 strlcat(msg
, hwmsg
, msgl
);
223 strlcat(msg
, "]", msgl
);
227 * ipath_format_hwerrors - format hardware error messages for display
228 * @hwerrs hardware errors bit vector
229 * @hwerrmsgs hardware error descriptions
230 * @nhwerrmsgs number of hwerrmsgs
231 * @msg message buffer
232 * @msgl message buffer length
234 void ipath_format_hwerrors(u64 hwerrs
,
235 const struct ipath_hwerror_msgs
*hwerrmsgs
,
237 char *msg
, size_t msgl
)
241 sizeof(ipath_generic_hwerror_msgs
) /
242 sizeof(ipath_generic_hwerror_msgs
[0]);
244 for (i
=0; i
<glen
; i
++) {
245 if (hwerrs
& ipath_generic_hwerror_msgs
[i
].mask
) {
246 ipath_format_hwmsg(msg
, msgl
,
247 ipath_generic_hwerror_msgs
[i
].msg
);
251 for (i
=0; i
<nhwerrmsgs
; i
++) {
252 if (hwerrs
& hwerrmsgs
[i
].mask
) {
253 ipath_format_hwmsg(msg
, msgl
, hwerrmsgs
[i
].msg
);
258 /* return the strings for the most common link states */
259 static char *ib_linkstate(u32 linkstate
)
264 case IPATH_IBSTATE_INIT
:
267 case IPATH_IBSTATE_ARM
:
270 case IPATH_IBSTATE_ACTIVE
:
280 void signal_ib_event(struct ipath_devdata
*dd
, enum ib_event_type ev
)
282 struct ib_event event
;
284 event
.device
= &dd
->verbs_dev
->ibdev
;
285 event
.element
.port_num
= 1;
287 ib_dispatch_event(&event
);
290 static void handle_e_ibstatuschanged(struct ipath_devdata
*dd
,
291 ipath_err_t errs
, int noprint
)
297 * even if diags are enabled, we want to notice LINKINIT, etc.
298 * We just don't want to change the LED state, or
299 * dd->ipath_kregs->kr_ibcctrl
301 val
= ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_ibcstatus
);
302 lstate
= val
& IPATH_IBSTATE_MASK
;
305 * this is confusing enough when it happens that I want to always put it
306 * on the console and in the logs. If it was a requested state change,
307 * we'll have already cleared the flags, so we won't print this warning
309 if ((lstate
!= IPATH_IBSTATE_ARM
&& lstate
!= IPATH_IBSTATE_ACTIVE
)
310 && (dd
->ipath_flags
& (IPATH_LINKARMED
| IPATH_LINKACTIVE
))) {
311 dev_info(&dd
->pcidev
->dev
, "Link state changed from %s to %s\n",
312 (dd
->ipath_flags
& IPATH_LINKARMED
) ? "ARM" : "ACTIVE",
313 ib_linkstate(lstate
));
315 * Flush all queued sends when link went to DOWN or INIT,
316 * to be sure that they don't block SMA and other MAD packets
318 ipath_cancel_sends(dd
, 1);
320 else if (lstate
== IPATH_IBSTATE_INIT
|| lstate
== IPATH_IBSTATE_ARM
||
321 lstate
== IPATH_IBSTATE_ACTIVE
) {
323 * only print at SMA if there is a change, debug if not
324 * (sometimes we want to know that, usually not).
326 if (lstate
== ((unsigned) dd
->ipath_lastibcstat
327 & IPATH_IBSTATE_MASK
)) {
328 ipath_dbg("Status change intr but no change (%s)\n",
329 ib_linkstate(lstate
));
332 ipath_cdbg(VERBOSE
, "Unit %u link state %s, last "
333 "was %s\n", dd
->ipath_unit
,
334 ib_linkstate(lstate
),
335 ib_linkstate((unsigned)
336 dd
->ipath_lastibcstat
337 & IPATH_IBSTATE_MASK
));
340 lstate
= dd
->ipath_lastibcstat
& IPATH_IBSTATE_MASK
;
341 if (lstate
== IPATH_IBSTATE_INIT
||
342 lstate
== IPATH_IBSTATE_ARM
||
343 lstate
== IPATH_IBSTATE_ACTIVE
)
344 ipath_cdbg(VERBOSE
, "Unit %u link state down"
345 " (state 0x%x), from %s\n",
347 (u32
)val
& IPATH_IBSTATE_MASK
,
348 ib_linkstate(lstate
));
350 ipath_cdbg(VERBOSE
, "Unit %u link state changed "
351 "to 0x%x from down (%x)\n",
352 dd
->ipath_unit
, (u32
) val
, lstate
);
354 ltstate
= (val
>> INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
) &
355 INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
;
356 lstate
= (val
>> INFINIPATH_IBCS_LINKSTATE_SHIFT
) &
357 INFINIPATH_IBCS_LINKSTATE_MASK
;
359 if (ltstate
== INFINIPATH_IBCS_LT_STATE_POLLACTIVE
||
360 ltstate
== INFINIPATH_IBCS_LT_STATE_POLLQUIET
) {
364 * Ignore cycling back and forth from Polling.Active
365 * to Polling.Quiet while waiting for the other end of
366 * the link to come up. We will cycle back and forth
367 * between them if no cable is plugged in,
368 * the other device is powered off or disabled, etc.
370 last_ltstate
= (dd
->ipath_lastibcstat
>>
371 INFINIPATH_IBCS_LINKTRAININGSTATE_SHIFT
)
372 & INFINIPATH_IBCS_LINKTRAININGSTATE_MASK
;
373 if (last_ltstate
== INFINIPATH_IBCS_LT_STATE_POLLACTIVE
375 INFINIPATH_IBCS_LT_STATE_POLLQUIET
) {
376 if (dd
->ipath_ibpollcnt
> 40) {
377 dd
->ipath_flags
|= IPATH_NOCABLE
;
378 *dd
->ipath_statusp
|=
379 IPATH_STATUS_IB_NOCABLE
;
381 dd
->ipath_ibpollcnt
++;
385 dd
->ipath_ibpollcnt
= 0; /* some state other than 2 or 3 */
386 ipath_stats
.sps_iblink
++;
387 if (ltstate
!= INFINIPATH_IBCS_LT_STATE_LINKUP
) {
388 if (dd
->ipath_flags
& IPATH_LINKACTIVE
)
389 signal_ib_event(dd
, IB_EVENT_PORT_ERR
);
390 dd
->ipath_flags
|= IPATH_LINKDOWN
;
391 dd
->ipath_flags
&= ~(IPATH_LINKUNK
| IPATH_LINKINIT
394 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_READY
;
395 dd
->ipath_lli_counter
= 0;
397 if (((dd
->ipath_lastibcstat
>>
398 INFINIPATH_IBCS_LINKSTATE_SHIFT
) &
399 INFINIPATH_IBCS_LINKSTATE_MASK
)
400 == INFINIPATH_IBCS_L_STATE_ACTIVE
)
401 /* if from up to down be more vocal */
403 "Unit %u link now down (%s)\n",
405 ipath_ibcstatus_str
[ltstate
]);
407 ipath_cdbg(VERBOSE
, "Unit %u link is "
408 "down (%s)\n", dd
->ipath_unit
,
409 ipath_ibcstatus_str
[ltstate
]);
412 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
413 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_ACTIVE
) {
414 dd
->ipath_flags
|= IPATH_LINKACTIVE
;
416 ~(IPATH_LINKUNK
| IPATH_LINKINIT
| IPATH_LINKDOWN
|
417 IPATH_LINKARMED
| IPATH_NOCABLE
);
418 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_NOCABLE
;
419 *dd
->ipath_statusp
|=
420 IPATH_STATUS_IB_READY
| IPATH_STATUS_IB_CONF
;
421 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
422 signal_ib_event(dd
, IB_EVENT_PORT_ACTIVE
);
423 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_INIT
) {
424 if (dd
->ipath_flags
& IPATH_LINKACTIVE
)
425 signal_ib_event(dd
, IB_EVENT_PORT_ERR
);
427 * set INIT and DOWN. Down is checked by most of the other
428 * code, but INIT is useful to know in a few places.
430 dd
->ipath_flags
|= IPATH_LINKINIT
| IPATH_LINKDOWN
;
432 ~(IPATH_LINKUNK
| IPATH_LINKACTIVE
| IPATH_LINKARMED
434 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_NOCABLE
435 | IPATH_STATUS_IB_READY
);
436 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
437 } else if ((val
& IPATH_IBSTATE_MASK
) == IPATH_IBSTATE_ARM
) {
438 if (dd
->ipath_flags
& IPATH_LINKACTIVE
)
439 signal_ib_event(dd
, IB_EVENT_PORT_ERR
);
440 dd
->ipath_flags
|= IPATH_LINKARMED
;
442 ~(IPATH_LINKUNK
| IPATH_LINKDOWN
| IPATH_LINKINIT
|
443 IPATH_LINKACTIVE
| IPATH_NOCABLE
);
444 *dd
->ipath_statusp
&= ~(IPATH_STATUS_IB_NOCABLE
445 | IPATH_STATUS_IB_READY
);
446 dd
->ipath_f_setextled(dd
, lstate
, ltstate
);
449 ipath_dbg("IBstatuschange unit %u: %s (%x)\n",
451 ipath_ibcstatus_str
[ltstate
], ltstate
);
454 dd
->ipath_lastibcstat
= val
;
457 static void handle_supp_msgs(struct ipath_devdata
*dd
,
458 unsigned supp_msgs
, char *msg
, int msgsz
)
461 * Print the message unless it's ibc status change only, which
462 * happens so often we never want to count it.
464 if (dd
->ipath_lasterror
& ~INFINIPATH_E_IBSTATUSCHANGED
) {
466 iserr
= ipath_decode_err(msg
, msgsz
,
467 dd
->ipath_lasterror
&
468 ~INFINIPATH_E_IBSTATUSCHANGED
);
469 if (dd
->ipath_lasterror
&
470 ~(INFINIPATH_E_RRCVEGRFULL
|
471 INFINIPATH_E_RRCVHDRFULL
| INFINIPATH_E_PKTERRS
))
472 ipath_dev_err(dd
, "Suppressed %u messages for "
473 "fast-repeating errors (%s) (%llx)\n",
476 dd
->ipath_lasterror
);
479 * rcvegrfull and rcvhdrqfull are "normal", for some
480 * types of processes (mostly benchmarks) that send
481 * huge numbers of messages, while not processing
482 * them. So only complain about these at debug
486 ipath_dbg("Suppressed %u messages for %s\n",
490 "Suppressed %u messages for %s\n",
496 static unsigned handle_frequent_errors(struct ipath_devdata
*dd
,
497 ipath_err_t errs
, char *msg
,
498 int msgsz
, int *noprint
)
501 static unsigned long nextmsg_time
;
502 static unsigned nmsgs
, supp_msgs
;
505 * Throttle back "fast" messages to no more than 10 per 5 seconds.
506 * This isn't perfect, but it's a reasonable heuristic. If we get
507 * more than 10, give a 6x longer delay.
511 if (time_before(nc
, nextmsg_time
)) {
514 nextmsg_time
= nc
+ HZ
* 3;
516 else if (supp_msgs
) {
517 handle_supp_msgs(dd
, supp_msgs
, msg
, msgsz
);
522 else if (!nmsgs
++ || time_after(nc
, nextmsg_time
))
523 nextmsg_time
= nc
+ HZ
/ 2;
528 static int handle_errors(struct ipath_devdata
*dd
, ipath_err_t errs
)
531 u64 ignore_this_time
= 0;
533 int chkerrpkts
= 0, noprint
= 0;
537 supp_msgs
= handle_frequent_errors(dd
, errs
, msg
, sizeof msg
, &noprint
);
539 /* don't report errors that are masked */
540 errs
&= ~dd
->ipath_maskederrs
;
542 /* do these first, they are most important */
543 if (errs
& INFINIPATH_E_HARDWARE
) {
544 /* reuse same msg buf */
545 dd
->ipath_f_handle_hwerrors(dd
, msg
, sizeof msg
);
548 for (log_idx
= 0; log_idx
< IPATH_EEP_LOG_CNT
; ++log_idx
) {
549 mask
= dd
->ipath_eep_st_masks
[log_idx
].errs_to_log
;
551 ipath_inc_eeprom_err(dd
, log_idx
, 1);
555 if (!noprint
&& (errs
& ~dd
->ipath_e_bitsextant
))
556 ipath_dev_err(dd
, "error interrupt with unknown errors "
557 "%llx set\n", (unsigned long long)
558 (errs
& ~dd
->ipath_e_bitsextant
));
560 if (errs
& E_SUM_ERRS
)
561 ignore_this_time
= handle_e_sum_errs(dd
, errs
);
562 else if ((errs
& E_SUM_LINK_PKTERRS
) &&
563 !(dd
->ipath_flags
& IPATH_LINKACTIVE
)) {
565 * This can happen when SMA is trying to bring the link
566 * up, but the IB link changes state at the "wrong" time.
567 * The IB logic then complains that the packet isn't
568 * valid. We don't want to confuse people, so we just
569 * don't print them, except at debug
571 ipath_dbg("Ignoring packet errors %llx, because link not "
572 "ACTIVE\n", (unsigned long long) errs
);
573 ignore_this_time
= errs
& E_SUM_LINK_PKTERRS
;
576 if (supp_msgs
== 250000) {
579 * It's not entirely reasonable assuming that the errors set
580 * in the last clear period are all responsible for the
581 * problem, but the alternative is to assume it's the only
582 * ones on this particular interrupt, which also isn't great
584 dd
->ipath_maskederrs
|= dd
->ipath_lasterror
| errs
;
585 dd
->ipath_errormask
&= ~dd
->ipath_maskederrs
;
586 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
,
587 dd
->ipath_errormask
);
588 s_iserr
= ipath_decode_err(msg
, sizeof msg
,
589 dd
->ipath_maskederrs
);
591 if (dd
->ipath_maskederrs
&
592 ~(INFINIPATH_E_RRCVEGRFULL
|
593 INFINIPATH_E_RRCVHDRFULL
| INFINIPATH_E_PKTERRS
))
594 ipath_dev_err(dd
, "Temporarily disabling "
595 "error(s) %llx reporting; too frequent (%s)\n",
596 (unsigned long long)dd
->ipath_maskederrs
,
600 * rcvegrfull and rcvhdrqfull are "normal",
601 * for some types of processes (mostly benchmarks)
602 * that send huge numbers of messages, while not
603 * processing them. So only complain about
604 * these at debug level.
607 ipath_dbg("Temporarily disabling reporting "
608 "too frequent queue full errors (%s)\n",
612 "Temporarily disabling reporting too"
613 " frequent packet errors (%s)\n",
618 * Re-enable the masked errors after around 3 minutes. in
619 * ipath_get_faststats(). If we have a series of fast
620 * repeating but different errors, the interval will keep
621 * stretching out, but that's OK, as that's pretty
624 dd
->ipath_unmasktime
= jiffies
+ HZ
* 180;
627 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
, errs
);
628 if (ignore_this_time
)
629 errs
&= ~ignore_this_time
;
630 if (errs
& ~dd
->ipath_lasterror
) {
631 errs
&= ~dd
->ipath_lasterror
;
632 /* never suppress duplicate hwerrors or ibstatuschange */
633 dd
->ipath_lasterror
|= errs
&
634 ~(INFINIPATH_E_HARDWARE
|
635 INFINIPATH_E_IBSTATUSCHANGED
);
638 /* likely due to cancel, so suppress */
639 if ((errs
& (INFINIPATH_E_SPKTLEN
| INFINIPATH_E_SPIOARMLAUNCH
)) &&
640 dd
->ipath_lastcancel
> jiffies
) {
641 ipath_dbg("Suppressed armlaunch/spktlen after error send cancel\n");
642 errs
&= ~(INFINIPATH_E_SPIOARMLAUNCH
| INFINIPATH_E_SPKTLEN
);
650 * the ones we mask off are handled specially below or above
652 ipath_decode_err(msg
, sizeof msg
,
653 errs
& ~(INFINIPATH_E_IBSTATUSCHANGED
|
654 INFINIPATH_E_RRCVEGRFULL
|
655 INFINIPATH_E_RRCVHDRFULL
|
656 INFINIPATH_E_HARDWARE
));
658 /* so we don't need if (!noprint) at strlcat's below */
661 if (errs
& E_SUM_PKTERRS
) {
662 ipath_stats
.sps_pkterrs
++;
665 if (errs
& E_SUM_ERRS
)
666 ipath_stats
.sps_errs
++;
668 if (errs
& (INFINIPATH_E_RICRC
| INFINIPATH_E_RVCRC
)) {
669 ipath_stats
.sps_crcerrs
++;
672 iserr
= errs
& ~(E_SUM_PKTERRS
| INFINIPATH_E_PKTERRS
);
676 * We don't want to print these two as they happen, or we can make
677 * the situation even worse, because it takes so long to print
678 * messages to serial consoles. Kernel ports get printed from
679 * fast_stats, no more than every 5 seconds, user ports get printed
682 if (errs
& INFINIPATH_E_RRCVHDRFULL
) {
684 ipath_stats
.sps_hdrqfull
++;
685 for (i
= 0; i
< dd
->ipath_cfgports
; i
++) {
686 struct ipath_portdata
*pd
= dd
->ipath_pd
[i
];
689 tl
= (u32
) le64_to_cpu(
690 *dd
->ipath_hdrqtailptr
);
691 } else if (pd
&& pd
->port_cnt
&&
692 pd
->port_rcvhdrtail_kvaddr
) {
694 * don't report same point multiple times,
697 tl
= *(u64
*) pd
->port_rcvhdrtail_kvaddr
;
698 if (tl
== pd
->port_lastrcvhdrqtail
)
700 hd
= ipath_read_ureg32(dd
, ur_rcvhdrhead
,
704 if (hd
== (tl
+ 1) ||
705 (!hd
&& tl
== dd
->ipath_hdrqlast
)) {
708 pd
->port_lastrcvhdrqtail
= tl
;
710 /* flush hdrqfull so that poll() sees it */
712 wake_up_interruptible(&pd
->port_wait
);
716 if (errs
& INFINIPATH_E_RRCVEGRFULL
) {
717 struct ipath_portdata
*pd
= dd
->ipath_pd
[0];
720 * since this is of less importance and not likely to
721 * happen without also getting hdrfull, only count
722 * occurrences; don't check each port (or even the kernel
725 ipath_stats
.sps_etidfull
++;
727 (u32
) le64_to_cpu(*dd
->ipath_hdrqtailptr
))
732 * do this before IBSTATUSCHANGED, in case both bits set in a single
733 * interrupt; we want the STATUSCHANGE to "win", so we do our
734 * internal copy of state machine correctly
736 if (errs
& INFINIPATH_E_RIBLOSTLINK
) {
738 * force through block below
740 errs
|= INFINIPATH_E_IBSTATUSCHANGED
;
741 ipath_stats
.sps_iblink
++;
742 dd
->ipath_flags
|= IPATH_LINKDOWN
;
743 dd
->ipath_flags
&= ~(IPATH_LINKUNK
| IPATH_LINKINIT
744 | IPATH_LINKARMED
| IPATH_LINKACTIVE
);
745 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_READY
;
747 u64 st
= ipath_read_kreg64(
748 dd
, dd
->ipath_kregs
->kr_ibcstatus
);
750 ipath_dbg("Lost link, link now down (%s)\n",
751 ipath_ibcstatus_str
[st
& 0xf]);
754 if (errs
& INFINIPATH_E_IBSTATUSCHANGED
)
755 handle_e_ibstatuschanged(dd
, errs
, noprint
);
757 if (errs
& INFINIPATH_E_RESET
) {
759 ipath_dev_err(dd
, "Got reset, requires re-init "
760 "(unload and reload driver)\n");
761 dd
->ipath_flags
&= ~IPATH_INITTED
; /* needs re-init */
762 /* mark as having had error */
763 *dd
->ipath_statusp
|= IPATH_STATUS_HWERROR
;
764 *dd
->ipath_statusp
&= ~IPATH_STATUS_IB_CONF
;
767 if (!noprint
&& *msg
) {
769 ipath_dev_err(dd
, "%s error\n", msg
);
771 dev_info(&dd
->pcidev
->dev
, "%s packet problems\n",
774 if (dd
->ipath_state_wanted
& dd
->ipath_flags
) {
775 ipath_cdbg(VERBOSE
, "driver wanted state %x, iflags now %x, "
776 "waking\n", dd
->ipath_state_wanted
,
778 wake_up_interruptible(&ipath_state_wait
);
786 * try to cleanup as much as possible for anything that might have gone
787 * wrong while in freeze mode, such as pio buffers being written by user
788 * processes (causing armlaunch), send errors due to going into freeze mode,
789 * etc., and try to avoid causing extra interrupts while doing so.
790 * Forcibly update the in-memory pioavail register copies after cleanup
791 * because the chip won't do it for anything changing while in freeze mode
792 * (we don't want to wait for the next pio buffer state change).
793 * Make sure that we don't lose any important interrupts by using the chip
794 * feature that says that writing 0 to a bit in *clear that is set in
795 * *status will cause an interrupt to be generated again (if allowed by
798 void ipath_clear_freeze(struct ipath_devdata
*dd
)
804 /* disable error interrupts, to avoid confusion */
805 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
, 0ULL);
807 /* also disable interrupts; errormask is sometimes overwriten */
808 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
811 * clear all sends, because they have may been
812 * completed by usercode while in freeze mode, and
813 * therefore would not be sent, and eventually
814 * might cause the process to run out of bufs
816 ipath_cancel_sends(dd
, 0);
817 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_control
,
820 /* ensure pio avail updates continue */
821 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
822 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
823 dd
->ipath_sendctrl
& ~INFINIPATH_S_PIOBUFAVAILUPD
);
824 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
825 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
827 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
828 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
831 * We just enabled pioavailupdate, so dma copy is almost certainly
832 * not yet right, so read the registers directly. Similar to init
834 for (i
= 0; i
< dd
->ipath_pioavregs
; i
++) {
835 /* deal with 6110 chip bug */
836 im
= i
> 3 ? i
^ 1 : i
;
837 val
= ipath_read_kreg64(dd
, (0x1000 / sizeof(u64
)) + im
);
838 dd
->ipath_pioavailregs_dma
[i
] = dd
->ipath_pioavailshadow
[i
]
843 * force new interrupt if any hwerr, error or interrupt bits are
844 * still set, and clear "safe" send packet errors related to freeze
845 * and cancelling sends. Re-enable error interrupts before possible
846 * force of re-interrupt on pending interrupts.
848 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_hwerrclear
, 0ULL);
849 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errorclear
,
851 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_errormask
,
852 dd
->ipath_errormask
);
853 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, -1LL);
854 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, 0ULL);
858 /* this is separate to allow for better optimization of ipath_intr() */
860 static noinline
void ipath_bad_intr(struct ipath_devdata
*dd
, u32
*unexpectp
)
863 * sometimes happen during driver init and unload, don't want
864 * to process any interrupts at that point
867 /* this is just a bandaid, not a fix, if something goes badly
869 if (++*unexpectp
> 100) {
870 if (++*unexpectp
> 105) {
872 * ok, we must be taking somebody else's interrupts,
873 * due to a messed up mptable and/or PIRQ table, so
874 * unregister the interrupt. We've seen this during
875 * linuxbios development work, and it may happen in
878 if (dd
->pcidev
&& dd
->ipath_irq
) {
879 ipath_dev_err(dd
, "Now %u unexpected "
880 "interrupts, unregistering "
881 "interrupt handler\n",
883 ipath_dbg("free_irq of irq %d\n",
885 dd
->ipath_f_free_irq(dd
);
888 if (ipath_read_ireg(dd
, dd
->ipath_kregs
->kr_intmask
)) {
889 ipath_dev_err(dd
, "%u unexpected interrupts, "
890 "disabling interrupts completely\n",
893 * disable all interrupts, something is very wrong
895 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
,
898 } else if (*unexpectp
> 1)
899 ipath_dbg("Interrupt when not ready, should not happen, "
903 static noinline
void ipath_bad_regread(struct ipath_devdata
*dd
)
907 /* separate routine, for better optimization of ipath_intr() */
910 * We print the message and disable interrupts, in hope of
911 * having a better chance of debugging the problem.
914 "Read of interrupt status failed (all bits set)\n");
916 /* disable all interrupts, something is very wrong */
917 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intmask
, 0ULL);
919 ipath_dev_err(dd
, "Still bad interrupt status, "
920 "unregistering interrupt\n");
921 dd
->ipath_f_free_irq(dd
);
922 } else if (allbits
> 2) {
923 if ((allbits
% 10000) == 0)
926 ipath_dev_err(dd
, "Disabling interrupts, "
927 "multiple errors\n");
931 static void handle_layer_pioavail(struct ipath_devdata
*dd
)
936 ret
= ipath_ib_piobufavail(dd
->verbs_dev
);
942 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
943 dd
->ipath_sendctrl
|= INFINIPATH_S_PIOINTBUFAVAIL
;
944 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
946 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
947 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
951 * Handle receive interrupts for user ports; this means a user
952 * process was waiting for a packet to arrive, and didn't want
955 static void handle_urcv(struct ipath_devdata
*dd
, u32 istat
)
962 * test_and_clear_bit(IPATH_PORT_WAITING_RCV) and
963 * test_and_clear_bit(IPATH_PORT_WAITING_URG) below
964 * would both like timely updates of the bits so that
965 * we don't pass them by unnecessarily. the rmb()
966 * here ensures that we see them promptly -- the
967 * corresponding wmb()'s are in ipath_poll_urgent()
968 * and ipath_poll_next()...
971 portr
= ((istat
>> INFINIPATH_I_RCVAVAIL_SHIFT
) &
972 dd
->ipath_i_rcvavail_mask
)
973 | ((istat
>> INFINIPATH_I_RCVURG_SHIFT
) &
974 dd
->ipath_i_rcvurg_mask
);
975 for (i
= 1; i
< dd
->ipath_cfgports
; i
++) {
976 struct ipath_portdata
*pd
= dd
->ipath_pd
[i
];
977 if (portr
& (1 << i
) && pd
&& pd
->port_cnt
) {
978 if (test_and_clear_bit(IPATH_PORT_WAITING_RCV
,
980 clear_bit(i
+ dd
->ipath_r_intravail_shift
,
982 wake_up_interruptible(&pd
->port_wait
);
984 } else if (test_and_clear_bit(IPATH_PORT_WAITING_URG
,
987 wake_up_interruptible(&pd
->port_wait
);
992 /* only want to take one interrupt, so turn off the rcv
993 * interrupt for all the ports that we did the wakeup on
994 * (but never for kernel port)
996 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_rcvctrl
,
1001 irqreturn_t
ipath_intr(int irq
, void *data
)
1003 struct ipath_devdata
*dd
= data
;
1004 u32 istat
, chk0rcv
= 0;
1005 ipath_err_t estat
= 0;
1007 static unsigned unexpected
= 0;
1008 static const u32 port0rbits
= (1U<<INFINIPATH_I_RCVAVAIL_SHIFT
) |
1009 (1U<<INFINIPATH_I_RCVURG_SHIFT
);
1011 ipath_stats
.sps_ints
++;
1013 if (dd
->ipath_int_counter
!= (u32
) -1)
1014 dd
->ipath_int_counter
++;
1016 if (!(dd
->ipath_flags
& IPATH_PRESENT
)) {
1018 * This return value is not great, but we do not want the
1019 * interrupt core code to remove our interrupt handler
1020 * because we don't appear to be handling an interrupt
1021 * during a chip reset.
1027 * this needs to be flags&initted, not statusp, so we keep
1028 * taking interrupts even after link goes down, etc.
1029 * Also, we *must* clear the interrupt at some point, or we won't
1030 * take it again, which can be real bad for errors, etc...
1033 if (!(dd
->ipath_flags
& IPATH_INITTED
)) {
1034 ipath_bad_intr(dd
, &unexpected
);
1039 istat
= ipath_read_ireg(dd
, dd
->ipath_kregs
->kr_intstatus
);
1041 if (unlikely(!istat
)) {
1042 ipath_stats
.sps_nullintr
++;
1043 ret
= IRQ_NONE
; /* not our interrupt, or already handled */
1046 if (unlikely(istat
== -1)) {
1047 ipath_bad_regread(dd
);
1048 /* don't know if it was our interrupt or not */
1056 if (unlikely(istat
& ~dd
->ipath_i_bitsextant
))
1058 "interrupt with unknown interrupts %x set\n",
1059 istat
& (u32
) ~ dd
->ipath_i_bitsextant
);
1061 ipath_cdbg(VERBOSE
, "intr stat=0x%x\n", istat
);
1063 if (unlikely(istat
& INFINIPATH_I_ERROR
)) {
1064 ipath_stats
.sps_errints
++;
1065 estat
= ipath_read_kreg64(dd
,
1066 dd
->ipath_kregs
->kr_errorstatus
);
1068 dev_info(&dd
->pcidev
->dev
, "error interrupt (%x), "
1069 "but no error bits set!\n", istat
);
1070 else if (estat
== -1LL)
1072 * should we try clearing all, or hope next read
1075 ipath_dev_err(dd
, "Read of error status failed "
1076 "(all bits set); ignoring\n");
1078 if (handle_errors(dd
, estat
))
1079 /* force calling ipath_kreceive() */
1083 if (istat
& INFINIPATH_I_GPIO
) {
1085 * GPIO interrupts fall in two broad classes:
1086 * GPIO_2 indicates (on some HT4xx boards) that a packet
1087 * has arrived for Port 0. Checking for this
1088 * is controlled by flag IPATH_GPIO_INTR.
1089 * GPIO_3..5 on IBA6120 Rev2 and IBA6110 Rev4 chips indicate
1090 * errors that we need to count. Checking for this
1091 * is controlled by flag IPATH_GPIO_ERRINTRS.
1096 gpiostatus
= ipath_read_kreg32(
1097 dd
, dd
->ipath_kregs
->kr_gpio_status
);
1098 /* First the error-counter case.
1100 if ((gpiostatus
& IPATH_GPIO_ERRINTR_MASK
) &&
1101 (dd
->ipath_flags
& IPATH_GPIO_ERRINTRS
)) {
1102 /* want to clear the bits we see asserted. */
1103 to_clear
|= (gpiostatus
& IPATH_GPIO_ERRINTR_MASK
);
1106 * Count appropriately, clear bits out of our copy,
1107 * as they have been "handled".
1109 if (gpiostatus
& (1 << IPATH_GPIO_RXUVL_BIT
)) {
1110 ipath_dbg("FlowCtl on UnsupVL\n");
1111 dd
->ipath_rxfc_unsupvl_errs
++;
1113 if (gpiostatus
& (1 << IPATH_GPIO_OVRUN_BIT
)) {
1114 ipath_dbg("Overrun Threshold exceeded\n");
1115 dd
->ipath_overrun_thresh_errs
++;
1117 if (gpiostatus
& (1 << IPATH_GPIO_LLI_BIT
)) {
1118 ipath_dbg("Local Link Integrity error\n");
1119 dd
->ipath_lli_errs
++;
1121 gpiostatus
&= ~IPATH_GPIO_ERRINTR_MASK
;
1123 /* Now the Port0 Receive case */
1124 if ((gpiostatus
& (1 << IPATH_GPIO_PORT0_BIT
)) &&
1125 (dd
->ipath_flags
& IPATH_GPIO_INTR
)) {
1127 * GPIO status bit 2 is set, and we expected it.
1128 * clear it and indicate in p0bits.
1129 * This probably only happens if a Port0 pkt
1130 * arrives at _just_ the wrong time, and we
1131 * handle that by seting chk0rcv;
1133 to_clear
|= (1 << IPATH_GPIO_PORT0_BIT
);
1134 gpiostatus
&= ~(1 << IPATH_GPIO_PORT0_BIT
);
1139 * Some unexpected bits remain. If they could have
1140 * caused the interrupt, complain and clear.
1141 * To avoid repetition of this condition, also clear
1142 * the mask. It is almost certainly due to error.
1144 const u32 mask
= (u32
) dd
->ipath_gpio_mask
;
1146 if (mask
& gpiostatus
) {
1147 ipath_dbg("Unexpected GPIO IRQ bits %x\n",
1149 to_clear
|= (gpiostatus
& mask
);
1150 dd
->ipath_gpio_mask
&= ~(gpiostatus
& mask
);
1151 ipath_write_kreg(dd
,
1152 dd
->ipath_kregs
->kr_gpio_mask
,
1153 dd
->ipath_gpio_mask
);
1157 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_gpio_clear
,
1161 chk0rcv
|= istat
& port0rbits
;
1164 * Clear the interrupt bits we found set, unless they are receive
1165 * related, in which case we already cleared them above, and don't
1166 * want to clear them again, because we might lose an interrupt.
1167 * Clear it early, so we "know" know the chip will have seen this by
1168 * the time we process the queue, and will re-interrupt if necessary.
1169 * The processor itself won't take the interrupt again until we return.
1171 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_intclear
, istat
);
1174 * handle port0 receive before checking for pio buffers available,
1175 * since receives can overflow; piobuf waiters can afford a few
1176 * extra cycles, since they were waiting anyway, and user's waiting
1177 * for receive are at the bottom.
1180 ipath_kreceive(dd
->ipath_pd
[0]);
1181 istat
&= ~port0rbits
;
1184 if (istat
& ((dd
->ipath_i_rcvavail_mask
<<
1185 INFINIPATH_I_RCVAVAIL_SHIFT
)
1186 | (dd
->ipath_i_rcvurg_mask
<<
1187 INFINIPATH_I_RCVURG_SHIFT
)))
1188 handle_urcv(dd
, istat
);
1190 if (istat
& INFINIPATH_I_SPIOBUFAVAIL
) {
1191 unsigned long flags
;
1193 spin_lock_irqsave(&dd
->ipath_sendctrl_lock
, flags
);
1194 dd
->ipath_sendctrl
&= ~INFINIPATH_S_PIOINTBUFAVAIL
;
1195 ipath_write_kreg(dd
, dd
->ipath_kregs
->kr_sendctrl
,
1196 dd
->ipath_sendctrl
);
1197 ipath_read_kreg64(dd
, dd
->ipath_kregs
->kr_scratch
);
1198 spin_unlock_irqrestore(&dd
->ipath_sendctrl_lock
, flags
);
1200 handle_layer_pioavail(dd
);