drivers/gpu/drm/msm/hdmi/hdmi_bridge.c

   1 /*
   2  * Copyright (C) 2013 Red Hat
   3  * Author: Rob Clark <robdclark@gmail.com>
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 as published by
   7  * the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include "hdmi.h"
  19
  20 struct hdmi_bridge {
  21         struct drm_bridge base;
  22         struct hdmi *hdmi;
  23 };
  24 #define to_hdmi_bridge(x) container_of(x, struct hdmi_bridge, base)
  25
  26 void hdmi_bridge_destroy(struct drm_bridge *bridge)
  27 {
  28         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  29         kfree(hdmi_bridge);
  30 }
  31
  32 static void power_on(struct drm_bridge *bridge)
  33 {
  34         struct drm_device *dev = bridge->dev;
  35         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  36         struct hdmi *hdmi = hdmi_bridge->hdmi;
  37         const struct hdmi_platform_config *config = hdmi->config;
  38         int i, ret;
  39
  40         for (i = 0; i < config->pwr_reg_cnt; i++) {
  41                 ret = regulator_enable(hdmi->pwr_regs[i]);
  42                 if (ret) {
  43                         dev_err(dev->dev, "failed to enable pwr regulator: %s (%d)\n",
  44                                         config->pwr_reg_names[i], ret);
  45                 }
  46         }
  47
  48         if (config->pwr_clk_cnt > 0) {
  49                 DBG("pixclock: %lu", hdmi->pixclock);
  50                 ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock);
  51                 if (ret) {
  52                         dev_err(dev->dev, "failed to set pixel clk: %s (%d)\n",
  53                                         config->pwr_clk_names[0], ret);
  54                 }
  55         }
  56
  57         for (i = 0; i < config->pwr_clk_cnt; i++) {
  58                 ret = clk_prepare_enable(hdmi->pwr_clks[i]);
  59                 if (ret) {
  60                         dev_err(dev->dev, "failed to enable pwr clk: %s (%d)\n",
  61                                         config->pwr_clk_names[i], ret);
  62                 }
  63         }
  64 }
  65
  66 static void power_off(struct drm_bridge *bridge)
  67 {
  68         struct drm_device *dev = bridge->dev;
  69         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  70         struct hdmi *hdmi = hdmi_bridge->hdmi;
  71         const struct hdmi_platform_config *config = hdmi->config;
  72         int i, ret;
  73
  74         /* TODO do we need to wait for final vblank somewhere before
  75          * cutting the clocks?
  76          */
  77         mdelay(16 + 4);
  78
  79         for (i = 0; i < config->pwr_clk_cnt; i++)
  80                 clk_disable_unprepare(hdmi->pwr_clks[i]);
  81
  82         for (i = 0; i < config->pwr_reg_cnt; i++) {
  83                 ret = regulator_disable(hdmi->pwr_regs[i]);
  84                 if (ret) {
  85                         dev_err(dev->dev, "failed to disable pwr regulator: %s (%d)\n",
  86                                         config->pwr_reg_names[i], ret);
  87                 }
  88         }
  89 }
  90
  91 static void hdmi_bridge_pre_enable(struct drm_bridge *bridge)
  92 {
  93         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  94         struct hdmi *hdmi = hdmi_bridge->hdmi;
  95         struct hdmi_phy *phy = hdmi->phy;
  96
  97         DBG("power up");
  98
  99         if (!hdmi->power_on) {
 100                 power_on(bridge);
 101                 hdmi->power_on = true;
 102                 hdmi_audio_update(hdmi);
 103         }
 104
 105         phy->funcs->powerup(phy, hdmi->pixclock);
 106         hdmi_set_mode(hdmi, true);
 107 }
 108
 109 static void hdmi_bridge_enable(struct drm_bridge *bridge)
 110 {
 111 }
 112
 113 static void hdmi_bridge_disable(struct drm_bridge *bridge)
 114 {
 115 }
 116
 117 static void hdmi_bridge_post_disable(struct drm_bridge *bridge)
 118 {
 119         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
 120         struct hdmi *hdmi = hdmi_bridge->hdmi;
 121         struct hdmi_phy *phy = hdmi->phy;
 122
 123         DBG("power down");
 124         hdmi_set_mode(hdmi, false);
 125         phy->funcs->powerdown(phy);
 126
 127         if (hdmi->power_on) {
 128                 power_off(bridge);
 129                 hdmi->power_on = false;
 130                 hdmi_audio_update(hdmi);
 131         }
 132 }
 133
 134 static void hdmi_bridge_mode_set(struct drm_bridge *bridge,
 135                  struct drm_display_mode *mode,
 136                  struct drm_display_mode *adjusted_mode)
 137 {
 138         struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
 139         struct hdmi *hdmi = hdmi_bridge->hdmi;
 140         int hstart, hend, vstart, vend;
 141         uint32_t frame_ctrl;
 142
 143         mode = adjusted_mode;
 144
 145         hdmi->pixclock = mode->clock * 1000;
 146
 147         hdmi->hdmi_mode = drm_match_cea_mode(mode) > 1;
 148
 149         hstart = mode->htotal - mode->hsync_start;
 150         hend   = mode->htotal - mode->hsync_start + mode->hdisplay;
 151
 152         vstart = mode->vtotal - mode->vsync_start - 1;
 153         vend   = mode->vtotal - mode->vsync_start + mode->vdisplay - 1;
 154
 155         DBG("htotal=%d, vtotal=%d, hstart=%d, hend=%d, vstart=%d, vend=%d",
 156                         mode->htotal, mode->vtotal, hstart, hend, vstart, vend);
 157
 158         hdmi_write(hdmi, REG_HDMI_TOTAL,
 159                         HDMI_TOTAL_H_TOTAL(mode->htotal - 1) |
 160                         HDMI_TOTAL_V_TOTAL(mode->vtotal - 1));
 161
 162         hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC,
 163                         HDMI_ACTIVE_HSYNC_START(hstart) |
 164                         HDMI_ACTIVE_HSYNC_END(hend));
 165         hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC,
 166                         HDMI_ACTIVE_VSYNC_START(vstart) |
 167                         HDMI_ACTIVE_VSYNC_END(vend));
 168
 169         if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
 170                 hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
 171                                 HDMI_VSYNC_TOTAL_F2_V_TOTAL(mode->vtotal));
 172                 hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
 173                                 HDMI_VSYNC_ACTIVE_F2_START(vstart + 1) |
 174                                 HDMI_VSYNC_ACTIVE_F2_END(vend + 1));
 175         } else {
 176                 hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
 177                                 HDMI_VSYNC_TOTAL_F2_V_TOTAL(0));
 178                 hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
 179                                 HDMI_VSYNC_ACTIVE_F2_START(0) |
 180                                 HDMI_VSYNC_ACTIVE_F2_END(0));
 181         }
 182
 183         frame_ctrl = 0;
 184         if (mode->flags & DRM_MODE_FLAG_NHSYNC)
 185                 frame_ctrl |= HDMI_FRAME_CTRL_HSYNC_LOW;
 186         if (mode->flags & DRM_MODE_FLAG_NVSYNC)
 187                 frame_ctrl |= HDMI_FRAME_CTRL_VSYNC_LOW;
 188         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
 189                 frame_ctrl |= HDMI_FRAME_CTRL_INTERLACED_EN;
 190         DBG("frame_ctrl=%08x", frame_ctrl);
 191         hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
 192
 193         hdmi_audio_update(hdmi);
 194 }
 195
 196 static const struct drm_bridge_funcs hdmi_bridge_funcs = {
 197                 .pre_enable = hdmi_bridge_pre_enable,
 198                 .enable = hdmi_bridge_enable,
 199                 .disable = hdmi_bridge_disable,
 200                 .post_disable = hdmi_bridge_post_disable,
 201                 .mode_set = hdmi_bridge_mode_set,
 202 };
 203
 204
 205 /* initialize bridge */
 206 struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi)
 207 {
 208         struct drm_bridge *bridge = NULL;
 209         struct hdmi_bridge *hdmi_bridge;
 210         int ret;
 211
 212         hdmi_bridge = kzalloc(sizeof(*hdmi_bridge), GFP_KERNEL);
 213         if (!hdmi_bridge) {
 214                 ret = -ENOMEM;
 215                 goto fail;
 216         }
 217
 218         hdmi_bridge->hdmi = hdmi;
 219
 220         bridge = &hdmi_bridge->base;
 221         bridge->funcs = &hdmi_bridge_funcs;
 222
 223         drm_bridge_attach(hdmi->dev, bridge);
 224
 225         return bridge;
 226
 227 fail:
 228         if (bridge)
 229                 hdmi_bridge_destroy(bridge);
 230
 231         return ERR_PTR(ret);
 232 }