arch/x86/pci/irq.c

   1 /*
   2  *      Low-Level PCI Support for PC -- Routing of Interrupts
   3  *
   4  *      (c) 1999--2000 Martin Mares <mj@ucw.cz>
   5  */
   6
   7 #include <linux/types.h>
   8 #include <linux/kernel.h>
   9 #include <linux/pci.h>
  10 #include <linux/init.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/dmi.h>
  13 #include <linux/io.h>
  14 #include <linux/smp.h>
  15 #include <asm/io_apic.h>
  16 #include <linux/irq.h>
  17 #include <linux/acpi.h>
  18 #include <asm/pci_x86.h>
  19
  20 #define PIRQ_SIGNATURE  (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
  21 #define PIRQ_VERSION 0x0100
  22
  23 static int broken_hp_bios_irq9;
  24 static int acer_tm360_irqrouting;
  25
  26 static struct irq_routing_table *pirq_table;
  27
  28 static int pirq_enable_irq(struct pci_dev *dev);
  29
  30 /*
  31  * Never use: 0, 1, 2 (timer, keyboard, and cascade)
  32  * Avoid using: 13, 14 and 15 (FP error and IDE).
  33  * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
  34  */
  35 unsigned int pcibios_irq_mask = 0xfff8;
  36
  37 static int pirq_penalty[16] = {
  38         1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
  39         0, 0, 0, 0, 1000, 100000, 100000, 100000
  40 };
  41
  42 struct irq_router {
  43         char *name;
  44         u16 vendor, device;
  45         int (*get)(struct pci_dev *router, struct pci_dev *dev, int pirq);
  46         int (*set)(struct pci_dev *router, struct pci_dev *dev, int pirq,
  47                 int new);
  48 };
  49
  50 struct irq_router_handler {
  51         u16 vendor;
  52         int (*probe)(struct irq_router *r, struct pci_dev *router, u16 device);
  53 };
  54
  55 int (*pcibios_enable_irq)(struct pci_dev *dev) = pirq_enable_irq;
  56 void (*pcibios_disable_irq)(struct pci_dev *dev) = NULL;
  57
  58 /*
  59  *  Check passed address for the PCI IRQ Routing Table signature
  60  *  and perform checksum verification.
  61  */
  62
  63 static inline struct irq_routing_table *pirq_check_routing_table(u8 *addr)
  64 {
  65         struct irq_routing_table *rt;
  66         int i;
  67         u8 sum;
  68
  69         rt = (struct irq_routing_table *) addr;
  70         if (rt->signature != PIRQ_SIGNATURE ||
  71             rt->version != PIRQ_VERSION ||
  72             rt->size % 16 ||
  73             rt->size < sizeof(struct irq_routing_table))
  74                 return NULL;
  75         sum = 0;
  76         for (i = 0; i < rt->size; i++)
  77                 sum += addr[i];
  78         if (!sum) {
  79                 DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%p\n",
  80                         rt);
  81                 return rt;
  82         }
  83         return NULL;
  84 }
  85
  86
  87
  88 /*
  89  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
  90  */
  91
  92 static struct irq_routing_table * __init pirq_find_routing_table(void)
  93 {
  94         u8 *addr;
  95         struct irq_routing_table *rt;
  96
  97         if (pirq_table_addr) {
  98                 rt = pirq_check_routing_table((u8 *) __va(pirq_table_addr));
  99                 if (rt)
 100                         return rt;
 101                 printk(KERN_WARNING "PCI: PIRQ table NOT found at pirqaddr\n");
 102         }
 103         for (addr = (u8 *) __va(0xf0000); addr < (u8 *) __va(0x100000); addr += 16) {
 104                 rt = pirq_check_routing_table(addr);
 105                 if (rt)
 106                         return rt;
 107         }
 108         return NULL;
 109 }
 110
 111 /*
 112  *  If we have a IRQ routing table, use it to search for peer host
 113  *  bridges.  It's a gross hack, but since there are no other known
 114  *  ways how to get a list of buses, we have to go this way.
 115  */
 116
 117 static void __init pirq_peer_trick(void)
 118 {
 119         struct irq_routing_table *rt = pirq_table;
 120         u8 busmap[256];
 121         int i;
 122         struct irq_info *e;
 123
 124         memset(busmap, 0, sizeof(busmap));
 125         for (i = 0; i < (rt->size - sizeof(struct irq_routing_table)) / sizeof(struct irq_info); i++) {
 126                 e = &rt->slots[i];
 127 #ifdef DEBUG
 128                 {
 129                         int j;
 130                         DBG(KERN_DEBUG "%02x:%02x slot=%02x", e->bus, e->devfn/8, e->slot);
 131                         for (j = 0; j < 4; j++)
 132                                 DBG(" %d:%02x/%04x", j, e->irq[j].link, e->irq[j].bitmap);
 133                         DBG("\n");
 134                 }
 135 #endif
 136                 busmap[e->bus] = 1;
 137         }
 138         for (i = 1; i < 256; i++) {
 139                 if (!busmap[i] || pci_find_bus(0, i))
 140                         continue;
 141                 pcibios_scan_root(i);
 142         }
 143         pcibios_last_bus = -1;
 144 }
 145
 146 /*
 147  *  Code for querying and setting of IRQ routes on various interrupt routers.
 148  */
 149
 150 void eisa_set_level_irq(unsigned int irq)
 151 {
 152         unsigned char mask = 1 << (irq & 7);
 153         unsigned int port = 0x4d0 + (irq >> 3);
 154         unsigned char val;
 155         static u16 eisa_irq_mask;
 156
 157         if (irq >= 16 || (1 << irq) & eisa_irq_mask)
 158                 return;
 159
 160         eisa_irq_mask |= (1 << irq);
 161         printk(KERN_DEBUG "PCI: setting IRQ %u as level-triggered\n", irq);
 162         val = inb(port);
 163         if (!(val & mask)) {
 164                 DBG(KERN_DEBUG " -> edge");
 165                 outb(val | mask, port);
 166         }
 167 }
 168
 169 /*
 170  * Common IRQ routing practice: nibbles in config space,
 171  * offset by some magic constant.
 172  */
 173 static unsigned int read_config_nybble(struct pci_dev *router, unsigned offset, unsigned nr)
 174 {
 175         u8 x;
 176         unsigned reg = offset + (nr >> 1);
 177
 178         pci_read_config_byte(router, reg, &x);
 179         return (nr & 1) ? (x >> 4) : (x & 0xf);
 180 }
 181
 182 static void write_config_nybble(struct pci_dev *router, unsigned offset,
 183         unsigned nr, unsigned int val)
 184 {
 185         u8 x;
 186         unsigned reg = offset + (nr >> 1);
 187
 188         pci_read_config_byte(router, reg, &x);
 189         x = (nr & 1) ? ((x & 0x0f) | (val << 4)) : ((x & 0xf0) | val);
 190         pci_write_config_byte(router, reg, x);
 191 }
 192
 193 /*
 194  * ALI pirq entries are damn ugly, and completely undocumented.
 195  * This has been figured out from pirq tables, and it's not a pretty
 196  * picture.
 197  */
 198 static int pirq_ali_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 199 {
 200         static const unsigned char irqmap[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
 201
 202         WARN_ON_ONCE(pirq > 16);
 203         return irqmap[read_config_nybble(router, 0x48, pirq-1)];
 204 }
 205
 206 static int pirq_ali_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 207 {
 208         static const unsigned char irqmap[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
 209         unsigned int val = irqmap[irq];
 210
 211         WARN_ON_ONCE(pirq > 16);
 212         if (val) {
 213                 write_config_nybble(router, 0x48, pirq-1, val);
 214                 return 1;
 215         }
 216         return 0;
 217 }
 218
 219 /*
 220  * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
 221  * just a pointer to the config space.
 222  */
 223 static int pirq_piix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 224 {
 225         u8 x;
 226
 227         pci_read_config_byte(router, pirq, &x);
 228         return (x < 16) ? x : 0;
 229 }
 230
 231 static int pirq_piix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 232 {
 233         pci_write_config_byte(router, pirq, irq);
 234         return 1;
 235 }
 236
 237 /*
 238  * The VIA pirq rules are nibble-based, like ALI,
 239  * but without the ugly irq number munging.
 240  * However, PIRQD is in the upper instead of lower 4 bits.
 241  */
 242 static int pirq_via_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 243 {
 244         return read_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq);
 245 }
 246
 247 static int pirq_via_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 248 {
 249         write_config_nybble(router, 0x55, pirq == 4 ? 5 : pirq, irq);
 250         return 1;
 251 }
 252
 253 /*
 254  * The VIA pirq rules are nibble-based, like ALI,
 255  * but without the ugly irq number munging.
 256  * However, for 82C586, nibble map is different .
 257  */
 258 static int pirq_via586_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 259 {
 260         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 261
 262         WARN_ON_ONCE(pirq > 5);
 263         return read_config_nybble(router, 0x55, pirqmap[pirq-1]);
 264 }
 265
 266 static int pirq_via586_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 267 {
 268         static const unsigned int pirqmap[5] = { 3, 2, 5, 1, 1 };
 269
 270         WARN_ON_ONCE(pirq > 5);
 271         write_config_nybble(router, 0x55, pirqmap[pirq-1], irq);
 272         return 1;
 273 }
 274
 275 /*
 276  * ITE 8330G pirq rules are nibble-based
 277  * FIXME: pirqmap may be { 1, 0, 3, 2 },
 278  *        2+3 are both mapped to irq 9 on my system
 279  */
 280 static int pirq_ite_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 281 {
 282         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 283
 284         WARN_ON_ONCE(pirq > 4);
 285         return read_config_nybble(router, 0x43, pirqmap[pirq-1]);
 286 }
 287
 288 static int pirq_ite_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 289 {
 290         static const unsigned char pirqmap[4] = { 1, 0, 2, 3 };
 291
 292         WARN_ON_ONCE(pirq > 4);
 293         write_config_nybble(router, 0x43, pirqmap[pirq-1], irq);
 294         return 1;
 295 }
 296
 297 /*
 298  * OPTI: high four bits are nibble pointer..
 299  * I wonder what the low bits do?
 300  */
 301 static int pirq_opti_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 302 {
 303         return read_config_nybble(router, 0xb8, pirq >> 4);
 304 }
 305
 306 static int pirq_opti_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 307 {
 308         write_config_nybble(router, 0xb8, pirq >> 4, irq);
 309         return 1;
 310 }
 311
 312 /*
 313  * Cyrix: nibble offset 0x5C
 314  * 0x5C bits 7:4 is INTB bits 3:0 is INTA
 315  * 0x5D bits 7:4 is INTD bits 3:0 is INTC
 316  */
 317 static int pirq_cyrix_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 318 {
 319         return read_config_nybble(router, 0x5C, (pirq-1)^1);
 320 }
 321
 322 static int pirq_cyrix_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 323 {
 324         write_config_nybble(router, 0x5C, (pirq-1)^1, irq);
 325         return 1;
 326 }
 327
 328 /*
 329  *      PIRQ routing for SiS 85C503 router used in several SiS chipsets.
 330  *      We have to deal with the following issues here:
 331  *      - vendors have different ideas about the meaning of link values
 332  *      - some onboard devices (integrated in the chipset) have special
 333  *        links and are thus routed differently (i.e. not via PCI INTA-INTD)
 334  *      - different revision of the router have a different layout for
 335  *        the routing registers, particularly for the onchip devices
 336  *
 337  *      For all routing registers the common thing is we have one byte
 338  *      per routeable link which is defined as:
 339  *               bit 7      IRQ mapping enabled (0) or disabled (1)
 340  *               bits [6:4] reserved (sometimes used for onchip devices)
 341  *               bits [3:0] IRQ to map to
 342  *                   allowed: 3-7, 9-12, 14-15
 343  *                   reserved: 0, 1, 2, 8, 13
 344  *
 345  *      The config-space registers located at 0x41/0x42/0x43/0x44 are
 346  *      always used to route the normal PCI INT A/B/C/D respectively.
 347  *      Apparently there are systems implementing PCI routing table using
 348  *      link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
 349  *      We try our best to handle both link mappings.
 350  *
 351  *      Currently (2003-05-21) it appears most SiS chipsets follow the
 352  *      definition of routing registers from the SiS-5595 southbridge.
 353  *      According to the SiS 5595 datasheets the revision id's of the
 354  *      router (ISA-bridge) should be 0x01 or 0xb0.
 355  *
 356  *      Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
 357  *      Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
 358  *      They seem to work with the current routing code. However there is
 359  *      some concern because of the two USB-OHCI HCs (original SiS 5595
 360  *      had only one). YMMV.
 361  *
 362  *      Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
 363  *
 364  *      0x61:   IDEIRQ:
 365  *              bits [6:5] must be written 01
 366  *              bit 4 channel-select primary (0), secondary (1)
 367  *
 368  *      0x62:   USBIRQ:
 369  *              bit 6 OHCI function disabled (0), enabled (1)
 370  *
 371  *      0x6a:   ACPI/SCI IRQ: bits 4-6 reserved
 372  *
 373  *      0x7e:   Data Acq. Module IRQ - bits 4-6 reserved
 374  *
 375  *      We support USBIRQ (in addition to INTA-INTD) and keep the
 376  *      IDE, ACPI and DAQ routing untouched as set by the BIOS.
 377  *
 378  *      Currently the only reported exception is the new SiS 65x chipset
 379  *      which includes the SiS 69x southbridge. Here we have the 85C503
 380  *      router revision 0x04 and there are changes in the register layout
 381  *      mostly related to the different USB HCs with USB 2.0 support.
 382  *
 383  *      Onchip routing for router rev-id 0x04 (try-and-error observation)
 384  *
 385  *      0x60/0x61/0x62/0x63:    1xEHCI and 3xOHCI (companion) USB-HCs
 386  *                              bit 6-4 are probably unused, not like 5595
 387  */
 388
 389 #define PIRQ_SIS_IRQ_MASK       0x0f
 390 #define PIRQ_SIS_IRQ_DISABLE    0x80
 391 #define PIRQ_SIS_USB_ENABLE     0x40
 392
 393 static int pirq_sis_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 394 {
 395         u8 x;
 396         int reg;
 397
 398         reg = pirq;
 399         if (reg >= 0x01 && reg <= 0x04)
 400                 reg += 0x40;
 401         pci_read_config_byte(router, reg, &x);
 402         return (x & PIRQ_SIS_IRQ_DISABLE) ? 0 : (x & PIRQ_SIS_IRQ_MASK);
 403 }
 404
 405 static int pirq_sis_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 406 {
 407         u8 x;
 408         int reg;
 409
 410         reg = pirq;
 411         if (reg >= 0x01 && reg <= 0x04)
 412                 reg += 0x40;
 413         pci_read_config_byte(router, reg, &x);
 414         x &= ~(PIRQ_SIS_IRQ_MASK | PIRQ_SIS_IRQ_DISABLE);
 415         x |= irq ? irq: PIRQ_SIS_IRQ_DISABLE;
 416         pci_write_config_byte(router, reg, x);
 417         return 1;
 418 }
 419
 420
 421 /*
 422  * VLSI: nibble offset 0x74 - educated guess due to routing table and
 423  *       config space of VLSI 82C534 PCI-bridge/router (1004:0102)
 424  *       Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
 425  *       devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
 426  *       for the busbridge to the docking station.
 427  */
 428
 429 static int pirq_vlsi_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 430 {
 431         WARN_ON_ONCE(pirq >= 9);
 432         if (pirq > 8) {
 433                 dev_info(&dev->dev, "VLSI router PIRQ escape (%d)\n", pirq);
 434                 return 0;
 435         }
 436         return read_config_nybble(router, 0x74, pirq-1);
 437 }
 438
 439 static int pirq_vlsi_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 440 {
 441         WARN_ON_ONCE(pirq >= 9);
 442         if (pirq > 8) {
 443                 dev_info(&dev->dev, "VLSI router PIRQ escape (%d)\n", pirq);
 444                 return 0;
 445         }
 446         write_config_nybble(router, 0x74, pirq-1, irq);
 447         return 1;
 448 }
 449
 450 /*
 451  * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
 452  * and Redirect I/O registers (0x0c00 and 0x0c01).  The Index register
 453  * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a.  The Redirect
 454  * register is a straight binary coding of desired PIC IRQ (low nibble).
 455  *
 456  * The 'link' value in the PIRQ table is already in the correct format
 457  * for the Index register.  There are some special index values:
 458  * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
 459  * and 0x03 for SMBus.
 460  */
 461 static int pirq_serverworks_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 462 {
 463         outb(pirq, 0xc00);
 464         return inb(0xc01) & 0xf;
 465 }
 466
 467 static int pirq_serverworks_set(struct pci_dev *router, struct pci_dev *dev,
 468         int pirq, int irq)
 469 {
 470         outb(pirq, 0xc00);
 471         outb(irq, 0xc01);
 472         return 1;
 473 }
 474
 475 /* Support for AMD756 PCI IRQ Routing
 476  * Jhon H. Caicedo <jhcaiced@osso.org.co>
 477  * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
 478  * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
 479  * The AMD756 pirq rules are nibble-based
 480  * offset 0x56 0-3 PIRQA  4-7  PIRQB
 481  * offset 0x57 0-3 PIRQC  4-7  PIRQD
 482  */
 483 static int pirq_amd756_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 484 {
 485         u8 irq;
 486         irq = 0;
 487         if (pirq <= 4)
 488                 irq = read_config_nybble(router, 0x56, pirq - 1);
 489         dev_info(&dev->dev,
 490                  "AMD756: dev [%04x:%04x], router PIRQ %d get IRQ %d\n",
 491                  dev->vendor, dev->device, pirq, irq);
 492         return irq;
 493 }
 494
 495 static int pirq_amd756_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 496 {
 497         dev_info(&dev->dev,
 498                  "AMD756: dev [%04x:%04x], router PIRQ %d set IRQ %d\n",
 499                  dev->vendor, dev->device, pirq, irq);
 500         if (pirq <= 4)
 501                 write_config_nybble(router, 0x56, pirq - 1, irq);
 502         return 1;
 503 }
 504
 505 /*
 506  * PicoPower PT86C523
 507  */
 508 static int pirq_pico_get(struct pci_dev *router, struct pci_dev *dev, int pirq)
 509 {
 510         outb(0x10 + ((pirq - 1) >> 1), 0x24);
 511         return ((pirq - 1) & 1) ? (inb(0x26) >> 4) : (inb(0x26) & 0xf);
 512 }
 513
 514 static int pirq_pico_set(struct pci_dev *router, struct pci_dev *dev, int pirq,
 515                         int irq)
 516 {
 517         unsigned int x;
 518         outb(0x10 + ((pirq - 1) >> 1), 0x24);
 519         x = inb(0x26);
 520         x = ((pirq - 1) & 1) ? ((x & 0x0f) | (irq << 4)) : ((x & 0xf0) | (irq));
 521         outb(x, 0x26);
 522         return 1;
 523 }
 524
 525 #ifdef CONFIG_PCI_BIOS
 526
 527 static int pirq_bios_set(struct pci_dev *router, struct pci_dev *dev, int pirq, int irq)
 528 {
 529         struct pci_dev *bridge;
 530         int pin = pci_get_interrupt_pin(dev, &bridge);
 531         return pcibios_set_irq_routing(bridge, pin - 1, irq);
 532 }
 533
 534 #endif
 535
 536 static __init int intel_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 537 {
 538         static struct pci_device_id __initdata pirq_440gx[] = {
 539                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_0) },
 540                 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82443GX_2) },
 541                 { },
 542         };
 543
 544         /* 440GX has a proprietary PIRQ router -- don't use it */
 545         if (pci_dev_present(pirq_440gx))
 546                 return 0;
 547
 548         switch (device) {
 549         case PCI_DEVICE_ID_INTEL_82371FB_0:
 550         case PCI_DEVICE_ID_INTEL_82371SB_0:
 551         case PCI_DEVICE_ID_INTEL_82371AB_0:
 552         case PCI_DEVICE_ID_INTEL_82371MX:
 553         case PCI_DEVICE_ID_INTEL_82443MX_0:
 554         case PCI_DEVICE_ID_INTEL_82801AA_0:
 555         case PCI_DEVICE_ID_INTEL_82801AB_0:
 556         case PCI_DEVICE_ID_INTEL_82801BA_0:
 557         case PCI_DEVICE_ID_INTEL_82801BA_10:
 558         case PCI_DEVICE_ID_INTEL_82801CA_0:
 559         case PCI_DEVICE_ID_INTEL_82801CA_12:
 560         case PCI_DEVICE_ID_INTEL_82801DB_0:
 561         case PCI_DEVICE_ID_INTEL_82801E_0:
 562         case PCI_DEVICE_ID_INTEL_82801EB_0:
 563         case PCI_DEVICE_ID_INTEL_ESB_1:
 564         case PCI_DEVICE_ID_INTEL_ICH6_0:
 565         case PCI_DEVICE_ID_INTEL_ICH6_1:
 566         case PCI_DEVICE_ID_INTEL_ICH7_0:
 567         case PCI_DEVICE_ID_INTEL_ICH7_1:
 568         case PCI_DEVICE_ID_INTEL_ICH7_30:
 569         case PCI_DEVICE_ID_INTEL_ICH7_31:
 570         case PCI_DEVICE_ID_INTEL_TGP_LPC:
 571         case PCI_DEVICE_ID_INTEL_ESB2_0:
 572         case PCI_DEVICE_ID_INTEL_ICH8_0:
 573         case PCI_DEVICE_ID_INTEL_ICH8_1:
 574         case PCI_DEVICE_ID_INTEL_ICH8_2:
 575         case PCI_DEVICE_ID_INTEL_ICH8_3:
 576         case PCI_DEVICE_ID_INTEL_ICH8_4:
 577         case PCI_DEVICE_ID_INTEL_ICH9_0:
 578         case PCI_DEVICE_ID_INTEL_ICH9_1:
 579         case PCI_DEVICE_ID_INTEL_ICH9_2:
 580         case PCI_DEVICE_ID_INTEL_ICH9_3:
 581         case PCI_DEVICE_ID_INTEL_ICH9_4:
 582         case PCI_DEVICE_ID_INTEL_ICH9_5:
 583         case PCI_DEVICE_ID_INTEL_EP80579_0:
 584         case PCI_DEVICE_ID_INTEL_ICH10_0:
 585         case PCI_DEVICE_ID_INTEL_ICH10_1:
 586         case PCI_DEVICE_ID_INTEL_ICH10_2:
 587         case PCI_DEVICE_ID_INTEL_ICH10_3:
 588         case PCI_DEVICE_ID_INTEL_PATSBURG_LPC_0:
 589         case PCI_DEVICE_ID_INTEL_PATSBURG_LPC_1:
 590                 r->name = "PIIX/ICH";
 591                 r->get = pirq_piix_get;
 592                 r->set = pirq_piix_set;
 593                 return 1;
 594         }
 595
 596         if ((device >= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN &&
 597              device <= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX)
 598         ||  (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&
 599              device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)
 600         ||  (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN &&
 601              device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)
 602         ||  (device >= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MIN &&
 603              device <= PCI_DEVICE_ID_INTEL_PANTHERPOINT_LPC_MAX)) {
 604                 r->name = "PIIX/ICH";
 605                 r->get = pirq_piix_get;
 606                 r->set = pirq_piix_set;
 607                 return 1;
 608         }
 609
 610         return 0;
 611 }
 612
 613 static __init int via_router_probe(struct irq_router *r,
 614                                 struct pci_dev *router, u16 device)
 615 {
 616         /* FIXME: We should move some of the quirk fixup stuff here */
 617
 618         /*
 619          * workarounds for some buggy BIOSes
 620          */
 621         if (device == PCI_DEVICE_ID_VIA_82C586_0) {
 622                 switch (router->device) {
 623                 case PCI_DEVICE_ID_VIA_82C686:
 624                         /*
 625                          * Asus k7m bios wrongly reports 82C686A
 626                          * as 586-compatible
 627                          */
 628                         device = PCI_DEVICE_ID_VIA_82C686;
 629                         break;
 630                 case PCI_DEVICE_ID_VIA_8235:
 631                         /**
 632                          * Asus a7v-x bios wrongly reports 8235
 633                          * as 586-compatible
 634                          */
 635                         device = PCI_DEVICE_ID_VIA_8235;
 636                         break;
 637                 case PCI_DEVICE_ID_VIA_8237:
 638                         /**
 639                          * Asus a7v600 bios wrongly reports 8237
 640                          * as 586-compatible
 641                          */
 642                         device = PCI_DEVICE_ID_VIA_8237;
 643                         break;
 644                 }
 645         }
 646
 647         switch (device) {
 648         case PCI_DEVICE_ID_VIA_82C586_0:
 649                 r->name = "VIA";
 650                 r->get = pirq_via586_get;
 651                 r->set = pirq_via586_set;
 652                 return 1;
 653         case PCI_DEVICE_ID_VIA_82C596:
 654         case PCI_DEVICE_ID_VIA_82C686:
 655         case PCI_DEVICE_ID_VIA_8231:
 656         case PCI_DEVICE_ID_VIA_8233A:
 657         case PCI_DEVICE_ID_VIA_8235:
 658         case PCI_DEVICE_ID_VIA_8237:
 659                 /* FIXME: add new ones for 8233/5 */
 660                 r->name = "VIA";
 661                 r->get = pirq_via_get;
 662                 r->set = pirq_via_set;
 663                 return 1;
 664         }
 665         return 0;
 666 }
 667
 668 static __init int vlsi_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 669 {
 670         switch (device) {
 671         case PCI_DEVICE_ID_VLSI_82C534:
 672                 r->name = "VLSI 82C534";
 673                 r->get = pirq_vlsi_get;
 674                 r->set = pirq_vlsi_set;
 675                 return 1;
 676         }
 677         return 0;
 678 }
 679
 680
 681 static __init int serverworks_router_probe(struct irq_router *r,
 682                 struct pci_dev *router, u16 device)
 683 {
 684         switch (device) {
 685         case PCI_DEVICE_ID_SERVERWORKS_OSB4:
 686         case PCI_DEVICE_ID_SERVERWORKS_CSB5:
 687                 r->name = "ServerWorks";
 688                 r->get = pirq_serverworks_get;
 689                 r->set = pirq_serverworks_set;
 690                 return 1;
 691         }
 692         return 0;
 693 }
 694
 695 static __init int sis_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 696 {
 697         if (device != PCI_DEVICE_ID_SI_503)
 698                 return 0;
 699
 700         r->name = "SIS";
 701         r->get = pirq_sis_get;
 702         r->set = pirq_sis_set;
 703         return 1;
 704 }
 705
 706 static __init int cyrix_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 707 {
 708         switch (device) {
 709         case PCI_DEVICE_ID_CYRIX_5520:
 710                 r->name = "NatSemi";
 711                 r->get = pirq_cyrix_get;
 712                 r->set = pirq_cyrix_set;
 713                 return 1;
 714         }
 715         return 0;
 716 }
 717
 718 static __init int opti_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 719 {
 720         switch (device) {
 721         case PCI_DEVICE_ID_OPTI_82C700:
 722                 r->name = "OPTI";
 723                 r->get = pirq_opti_get;
 724                 r->set = pirq_opti_set;
 725                 return 1;
 726         }
 727         return 0;
 728 }
 729
 730 static __init int ite_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 731 {
 732         switch (device) {
 733         case PCI_DEVICE_ID_ITE_IT8330G_0:
 734                 r->name = "ITE";
 735                 r->get = pirq_ite_get;
 736                 r->set = pirq_ite_set;
 737                 return 1;
 738         }
 739         return 0;
 740 }
 741
 742 static __init int ali_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 743 {
 744         switch (device) {
 745         case PCI_DEVICE_ID_AL_M1533:
 746         case PCI_DEVICE_ID_AL_M1563:
 747                 r->name = "ALI";
 748                 r->get = pirq_ali_get;
 749                 r->set = pirq_ali_set;
 750                 return 1;
 751         }
 752         return 0;
 753 }
 754
 755 static __init int amd_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 756 {
 757         switch (device) {
 758         case PCI_DEVICE_ID_AMD_VIPER_740B:
 759                 r->name = "AMD756";
 760                 break;
 761         case PCI_DEVICE_ID_AMD_VIPER_7413:
 762                 r->name = "AMD766";
 763                 break;
 764         case PCI_DEVICE_ID_AMD_VIPER_7443:
 765                 r->name = "AMD768";
 766                 break;
 767         default:
 768                 return 0;
 769         }
 770         r->get = pirq_amd756_get;
 771         r->set = pirq_amd756_set;
 772         return 1;
 773 }
 774
 775 static __init int pico_router_probe(struct irq_router *r, struct pci_dev *router, u16 device)
 776 {
 777         switch (device) {
 778         case PCI_DEVICE_ID_PICOPOWER_PT86C523:
 779                 r->name = "PicoPower PT86C523";
 780                 r->get = pirq_pico_get;
 781                 r->set = pirq_pico_set;
 782                 return 1;
 783
 784         case PCI_DEVICE_ID_PICOPOWER_PT86C523BBP:
 785                 r->name = "PicoPower PT86C523 rev. BB+";
 786                 r->get = pirq_pico_get;
 787                 r->set = pirq_pico_set;
 788                 return 1;
 789         }
 790         return 0;
 791 }
 792
 793 static __initdata struct irq_router_handler pirq_routers[] = {
 794         { PCI_VENDOR_ID_INTEL, intel_router_probe },
 795         { PCI_VENDOR_ID_AL, ali_router_probe },
 796         { PCI_VENDOR_ID_ITE, ite_router_probe },
 797         { PCI_VENDOR_ID_VIA, via_router_probe },
 798         { PCI_VENDOR_ID_OPTI, opti_router_probe },
 799         { PCI_VENDOR_ID_SI, sis_router_probe },
 800         { PCI_VENDOR_ID_CYRIX, cyrix_router_probe },
 801         { PCI_VENDOR_ID_VLSI, vlsi_router_probe },
 802         { PCI_VENDOR_ID_SERVERWORKS, serverworks_router_probe },
 803         { PCI_VENDOR_ID_AMD, amd_router_probe },
 804         { PCI_VENDOR_ID_PICOPOWER, pico_router_probe },
 805         /* Someone with docs needs to add the ATI Radeon IGP */
 806         { 0, NULL }
 807 };
 808 static struct irq_router pirq_router;
 809 static struct pci_dev *pirq_router_dev;
 810
 811
 812 /*
 813  *      FIXME: should we have an option to say "generic for
 814  *      chipset" ?
 815  */
 816
 817 static void __init pirq_find_router(struct irq_router *r)
 818 {
 819         struct irq_routing_table *rt = pirq_table;
 820         struct irq_router_handler *h;
 821
 822 #ifdef CONFIG_PCI_BIOS
 823         if (!rt->signature) {
 824                 printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");
 825                 r->set = pirq_bios_set;
 826                 r->name = "BIOS";
 827                 return;
 828         }
 829 #endif
 830
 831         /* Default unless a driver reloads it */
 832         r->name = "default";
 833         r->get = NULL;
 834         r->set = NULL;
 835
 836         DBG(KERN_DEBUG "PCI: Attempting to find IRQ router for [%04x:%04x]\n",
 837             rt->rtr_vendor, rt->rtr_device);
 838
 839         pirq_router_dev = pci_get_bus_and_slot(rt->rtr_bus, rt->rtr_devfn);
 840         if (!pirq_router_dev) {
 841                 DBG(KERN_DEBUG "PCI: Interrupt router not found at "
 842                         "%02x:%02x\n", rt->rtr_bus, rt->rtr_devfn);
 843                 return;
 844         }
 845
 846         for (h = pirq_routers; h->vendor; h++) {
 847                 /* First look for a router match */
 848                 if (rt->rtr_vendor == h->vendor &&
 849                         h->probe(r, pirq_router_dev, rt->rtr_device))
 850                         break;
 851                 /* Fall back to a device match */
 852                 if (pirq_router_dev->vendor == h->vendor &&
 853                         h->probe(r, pirq_router_dev, pirq_router_dev->device))
 854                         break;
 855         }
 856         dev_info(&pirq_router_dev->dev, "%s IRQ router [%04x:%04x]\n",
 857                  pirq_router.name,
 858                  pirq_router_dev->vendor, pirq_router_dev->device);
 859
 860         /* The device remains referenced for the kernel lifetime */
 861 }
 862
 863 static struct irq_info *pirq_get_info(struct pci_dev *dev)
 864 {
 865         struct irq_routing_table *rt = pirq_table;
 866         int entries = (rt->size - sizeof(struct irq_routing_table)) /
 867                 sizeof(struct irq_info);
 868         struct irq_info *info;
 869
 870         for (info = rt->slots; entries--; info++)
 871                 if (info->bus == dev->bus->number &&
 872                         PCI_SLOT(info->devfn) == PCI_SLOT(dev->devfn))
 873                         return info;
 874         return NULL;
 875 }
 876
 877 static int pcibios_lookup_irq(struct pci_dev *dev, int assign)
 878 {
 879         u8 pin;
 880         struct irq_info *info;
 881         int i, pirq, newirq;
 882         int irq = 0;
 883         u32 mask;
 884         struct irq_router *r = &pirq_router;
 885         struct pci_dev *dev2 = NULL;
 886         char *msg = NULL;
 887
 888         /* Find IRQ pin */
 889         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
 890         if (!pin) {
 891                 dev_dbg(&dev->dev, "no interrupt pin\n");
 892                 return 0;
 893         }
 894
 895         if (io_apic_assign_pci_irqs)
 896                 return 0;
 897
 898         /* Find IRQ routing entry */
 899
 900         if (!pirq_table)
 901                 return 0;
 902
 903         info = pirq_get_info(dev);
 904         if (!info) {
 905                 dev_dbg(&dev->dev, "PCI INT %c not found in routing table\n",
 906                         'A' + pin - 1);
 907                 return 0;
 908         }
 909         pirq = info->irq[pin - 1].link;
 910         mask = info->irq[pin - 1].bitmap;
 911         if (!pirq) {
 912                 dev_dbg(&dev->dev, "PCI INT %c not routed\n", 'A' + pin - 1);
 913                 return 0;
 914         }
 915         dev_dbg(&dev->dev, "PCI INT %c -> PIRQ %02x, mask %04x, excl %04x",
 916                 'A' + pin - 1, pirq, mask, pirq_table->exclusive_irqs);
 917         mask &= pcibios_irq_mask;
 918
 919         /* Work around broken HP Pavilion Notebooks which assign USB to
 920            IRQ 9 even though it is actually wired to IRQ 11 */
 921
 922         if (broken_hp_bios_irq9 && pirq == 0x59 && dev->irq == 9) {
 923                 dev->irq = 11;
 924                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
 925                 r->set(pirq_router_dev, dev, pirq, 11);
 926         }
 927
 928         /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
 929         if (acer_tm360_irqrouting && dev->irq == 11 &&
 930                 dev->vendor == PCI_VENDOR_ID_O2) {
 931                 pirq = 0x68;
 932                 mask = 0x400;
 933                 dev->irq = r->get(pirq_router_dev, dev, pirq);
 934                 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
 935         }
 936
 937         /*
 938          * Find the best IRQ to assign: use the one
 939          * reported by the device if possible.
 940          */
 941         newirq = dev->irq;
 942         if (newirq && !((1 << newirq) & mask)) {
 943                 if (pci_probe & PCI_USE_PIRQ_MASK)
 944                         newirq = 0;
 945                 else
 946                         dev_warn(&dev->dev, "IRQ %d doesn't match PIRQ mask "
 947                                  "%#x; try pci=usepirqmask\n", newirq, mask);
 948         }
 949         if (!newirq && assign) {
 950                 for (i = 0; i < 16; i++) {
 951                         if (!(mask & (1 << i)))
 952                                 continue;
 953                         if (pirq_penalty[i] < pirq_penalty[newirq] &&
 954                                 can_request_irq(i, IRQF_SHARED))
 955                                 newirq = i;
 956                 }
 957         }
 958         dev_dbg(&dev->dev, "PCI INT %c -> newirq %d", 'A' + pin - 1, newirq);
 959
 960         /* Check if it is hardcoded */
 961         if ((pirq & 0xf0) == 0xf0) {
 962                 irq = pirq & 0xf;
 963                 msg = "hardcoded";
 964         } else if (r->get && (irq = r->get(pirq_router_dev, dev, pirq)) && \
 965         ((!(pci_probe & PCI_USE_PIRQ_MASK)) || ((1 << irq) & mask))) {
 966                 msg = "found";
 967                 eisa_set_level_irq(irq);
 968         } else if (newirq && r->set &&
 969                 (dev->class >> 8) != PCI_CLASS_DISPLAY_VGA) {
 970                 if (r->set(pirq_router_dev, dev, pirq, newirq)) {
 971                         eisa_set_level_irq(newirq);
 972                         msg = "assigned";
 973                         irq = newirq;
 974                 }
 975         }
 976
 977         if (!irq) {
 978                 if (newirq && mask == (1 << newirq)) {
 979                         msg = "guessed";
 980                         irq = newirq;
 981                 } else {
 982                         dev_dbg(&dev->dev, "can't route interrupt\n");
 983                         return 0;
 984                 }
 985         }
 986         dev_info(&dev->dev, "%s PCI INT %c -> IRQ %d\n", msg, 'A' + pin - 1, irq);
 987
 988         /* Update IRQ for all devices with the same pirq value */
 989         for_each_pci_dev(dev2) {
 990                 pci_read_config_byte(dev2, PCI_INTERRUPT_PIN, &pin);
 991                 if (!pin)
 992                         continue;
 993
 994                 info = pirq_get_info(dev2);
 995                 if (!info)
 996                         continue;
 997                 if (info->irq[pin - 1].link == pirq) {
 998                         /*
 999                          * We refuse to override the dev->irq
1000                          * information. Give a warning!
1001                          */
1002                         if (dev2->irq && dev2->irq != irq && \
1003                         (!(pci_probe & PCI_USE_PIRQ_MASK) || \
1004                         ((1 << dev2->irq) & mask))) {
1005 #ifndef CONFIG_PCI_MSI
1006                                 dev_info(&dev2->dev, "IRQ routing conflict: "
1007                                          "have IRQ %d, want IRQ %d\n",
1008                                          dev2->irq, irq);
1009 #endif
1010                                 continue;
1011                         }
1012                         dev2->irq = irq;
1013                         pirq_penalty[irq]++;
1014                         if (dev != dev2)
1015                                 dev_info(&dev->dev, "sharing IRQ %d with %s\n",
1016                                          irq, pci_name(dev2));
1017                 }
1018         }
1019         return 1;
1020 }
1021
1022 void __init pcibios_fixup_irqs(void)
1023 {
1024         struct pci_dev *dev = NULL;
1025         u8 pin;
1026
1027         DBG(KERN_DEBUG "PCI: IRQ fixup\n");
1028         for_each_pci_dev(dev) {
1029                 /*
1030                  * If the BIOS has set an out of range IRQ number, just
1031                  * ignore it.  Also keep track of which IRQ's are
1032                  * already in use.
1033                  */
1034                 if (dev->irq >= 16) {
1035                         dev_dbg(&dev->dev, "ignoring bogus IRQ %d\n", dev->irq);
1036                         dev->irq = 0;
1037                 }
1038                 /*
1039                  * If the IRQ is already assigned to a PCI device,
1040                  * ignore its ISA use penalty
1041                  */
1042                 if (pirq_penalty[dev->irq] >= 100 &&
1043                                 pirq_penalty[dev->irq] < 100000)
1044                         pirq_penalty[dev->irq] = 0;
1045                 pirq_penalty[dev->irq]++;
1046         }
1047
1048         if (io_apic_assign_pci_irqs)
1049                 return;
1050
1051         dev = NULL;
1052         for_each_pci_dev(dev) {
1053                 pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1054                 if (!pin)
1055                         continue;
1056
1057                 /*
1058                  * Still no IRQ? Try to lookup one...
1059                  */
1060                 if (!dev->irq)
1061                         pcibios_lookup_irq(dev, 0);
1062         }
1063 }
1064
1065 /*
1066  * Work around broken HP Pavilion Notebooks which assign USB to
1067  * IRQ 9 even though it is actually wired to IRQ 11
1068  */
1069 static int __init fix_broken_hp_bios_irq9(const struct dmi_system_id *d)
1070 {
1071         if (!broken_hp_bios_irq9) {
1072                 broken_hp_bios_irq9 = 1;
1073                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n",
1074                         d->ident);
1075         }
1076         return 0;
1077 }
1078
1079 /*
1080  * Work around broken Acer TravelMate 360 Notebooks which assign
1081  * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1082  */
1083 static int __init fix_acer_tm360_irqrouting(const struct dmi_system_id *d)
1084 {
1085         if (!acer_tm360_irqrouting) {
1086                 acer_tm360_irqrouting = 1;
1087                 printk(KERN_INFO "%s detected - fixing broken IRQ routing\n",
1088                         d->ident);
1089         }
1090         return 0;
1091 }
1092
1093 static struct dmi_system_id __initdata pciirq_dmi_table[] = {
1094         {
1095                 .callback = fix_broken_hp_bios_irq9,
1096                 .ident = "HP Pavilion N5400 Series Laptop",
1097                 .matches = {
1098                         DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
1099                         DMI_MATCH(DMI_BIOS_VERSION, "GE.M1.03"),
1100                         DMI_MATCH(DMI_PRODUCT_VERSION,
1101                                 "HP Pavilion Notebook Model GE"),
1102                         DMI_MATCH(DMI_BOARD_VERSION, "OmniBook N32N-736"),
1103                 },
1104         },
1105         {
1106                 .callback = fix_acer_tm360_irqrouting,
1107                 .ident = "Acer TravelMate 36x Laptop",
1108                 .matches = {
1109                         DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
1110                         DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"),
1111                 },
1112         },
1113         { }
1114 };
1115
1116 void __init pcibios_irq_init(void)
1117 {
1118         DBG(KERN_DEBUG "PCI: IRQ init\n");
1119
1120         if (raw_pci_ops == NULL)
1121                 return;
1122
1123         dmi_check_system(pciirq_dmi_table);
1124
1125         pirq_table = pirq_find_routing_table();
1126
1127 #ifdef CONFIG_PCI_BIOS
1128         if (!pirq_table && (pci_probe & PCI_BIOS_IRQ_SCAN))
1129                 pirq_table = pcibios_get_irq_routing_table();
1130 #endif
1131         if (pirq_table) {
1132                 pirq_peer_trick();
1133                 pirq_find_router(&pirq_router);
1134                 if (pirq_table->exclusive_irqs) {
1135                         int i;
1136                         for (i = 0; i < 16; i++)
1137                                 if (!(pirq_table->exclusive_irqs & (1 << i)))
1138                                         pirq_penalty[i] += 100;
1139                 }
1140                 /*
1141                  * If we're using the I/O APIC, avoid using the PCI IRQ
1142                  * routing table
1143                  */
1144                 if (io_apic_assign_pci_irqs)
1145                         pirq_table = NULL;
1146         }
1147
1148         x86_init.pci.fixup_irqs();
1149
1150         if (io_apic_assign_pci_irqs && pci_routeirq) {
1151                 struct pci_dev *dev = NULL;
1152                 /*
1153                  * PCI IRQ routing is set up by pci_enable_device(), but we
1154                  * also do it here in case there are still broken drivers that
1155                  * don't use pci_enable_device().
1156                  */
1157                 printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
1158                 for_each_pci_dev(dev)
1159                         pirq_enable_irq(dev);
1160         }
1161 }
1162
1163 static void pirq_penalize_isa_irq(int irq, int active)
1164 {
1165         /*
1166          *  If any ISAPnP device reports an IRQ in its list of possible
1167          *  IRQ's, we try to avoid assigning it to PCI devices.
1168          */
1169         if (irq < 16) {
1170                 if (active)
1171                         pirq_penalty[irq] += 1000;
1172                 else
1173                         pirq_penalty[irq] += 100;
1174         }
1175 }
1176
1177 void pcibios_penalize_isa_irq(int irq, int active)
1178 {
1179 #ifdef CONFIG_ACPI
1180         if (!acpi_noirq)
1181                 acpi_penalize_isa_irq(irq, active);
1182         else
1183 #endif
1184                 pirq_penalize_isa_irq(irq, active);
1185 }
1186
1187 static int pirq_enable_irq(struct pci_dev *dev)
1188 {
1189         u8 pin;
1190
1191         pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
1192         if (pin && !pcibios_lookup_irq(dev, 1)) {
1193                 char *msg = "";
1194
1195                 if (!io_apic_assign_pci_irqs && dev->irq)
1196                         return 0;
1197
1198                 if (io_apic_assign_pci_irqs) {
1199 #ifdef CONFIG_X86_IO_APIC
1200                         struct pci_dev *temp_dev;
1201                         int irq;
1202                         struct io_apic_irq_attr irq_attr;
1203
1204                         irq = IO_APIC_get_PCI_irq_vector(dev->bus->number,
1205                                                 PCI_SLOT(dev->devfn),
1206                                                 pin - 1, &irq_attr);
1207                         /*
1208                          * Busses behind bridges are typically not listed in the MP-table.
1209                          * In this case we have to look up the IRQ based on the parent bus,
1210                          * parent slot, and pin number. The SMP code detects such bridged
1211                          * busses itself so we should get into this branch reliably.
1212                          */
1213                         temp_dev = dev;
1214                         while (irq < 0 && dev->bus->parent) { /* go back to the bridge */
1215                                 struct pci_dev *bridge = dev->bus->self;
1216
1217                                 pin = pci_swizzle_interrupt_pin(dev, pin);
1218                                 irq = IO_APIC_get_PCI_irq_vector(bridge->bus->number,
1219                                                 PCI_SLOT(bridge->devfn),
1220                                                 pin - 1, &irq_attr);
1221                                 if (irq >= 0)
1222                                         dev_warn(&dev->dev, "using bridge %s "
1223                                                  "INT %c to get IRQ %d\n",
1224                                                  pci_name(bridge), 'A' + pin - 1,
1225                                                  irq);
1226                                 dev = bridge;
1227                         }
1228                         dev = temp_dev;
1229                         if (irq >= 0) {
1230                                 io_apic_set_pci_routing(&dev->dev, irq,
1231                                                          &irq_attr);
1232                                 dev->irq = irq;
1233                                 dev_info(&dev->dev, "PCI->APIC IRQ transform: "
1234                                          "INT %c -> IRQ %d\n", 'A' + pin - 1, irq);
1235                                 return 0;
1236                         } else
1237                                 msg = "; probably buggy MP table";
1238 #endif
1239                 } else if (pci_probe & PCI_BIOS_IRQ_SCAN)
1240                         msg = "";
1241                 else
1242                         msg = "; please try using pci=biosirq";
1243
1244                 /*
1245                  * With IDE legacy devices the IRQ lookup failure is not
1246                  * a problem..
1247                  */
1248                 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
1249                                 !(dev->class & 0x5))
1250                         return 0;
1251
1252                 dev_warn(&dev->dev, "can't find IRQ for PCI INT %c%s\n",
1253                          'A' + pin - 1, msg);
1254         }
1255         return 0;
1256 }