2 * Watchdog Device Driver for Xilinx axi/xps_timebase_wdt
4 * (C) Copyright 2013 - 2014 Xilinx, Inc.
5 * (C) Copyright 2011 (Alejandro Cabrera <aldaya@gmail.com>)
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
13 #include <linux/clk.h>
14 #include <linux/err.h>
15 #include <linux/module.h>
16 #include <linux/types.h>
17 #include <linux/kernel.h>
18 #include <linux/ioport.h>
19 #include <linux/watchdog.h>
22 #include <linux/of_device.h>
23 #include <linux/of_address.h>
25 /* Register offsets for the Wdt device */
26 #define XWT_TWCSR0_OFFSET 0x0 /* Control/Status Register0 */
27 #define XWT_TWCSR1_OFFSET 0x4 /* Control/Status Register1 */
28 #define XWT_TBR_OFFSET 0x8 /* Timebase Register Offset */
30 /* Control/Status Register Masks */
31 #define XWT_CSR0_WRS_MASK 0x00000008 /* Reset status */
32 #define XWT_CSR0_WDS_MASK 0x00000004 /* Timer state */
33 #define XWT_CSR0_EWDT1_MASK 0x00000002 /* Enable bit 1 */
35 /* Control/Status Register 0/1 bits */
36 #define XWT_CSRX_EWDT2_MASK 0x00000001 /* Enable bit 2 */
38 /* SelfTest constants */
39 #define XWT_MAX_SELFTEST_LOOP_COUNT 0x00010000
40 #define XWT_TIMER_FAILED 0xFFFFFFFF
42 #define WATCHDOG_NAME "Xilinx Watchdog"
48 struct watchdog_device xilinx_wdt_wdd
;
52 static int xilinx_wdt_start(struct watchdog_device
*wdd
)
54 u32 control_status_reg
;
55 struct xwdt_device
*xdev
= watchdog_get_drvdata(wdd
);
57 spin_lock(&xdev
->spinlock
);
59 /* Clean previous status and enable the watchdog timer */
60 control_status_reg
= ioread32(xdev
->base
+ XWT_TWCSR0_OFFSET
);
61 control_status_reg
|= (XWT_CSR0_WRS_MASK
| XWT_CSR0_WDS_MASK
);
63 iowrite32((control_status_reg
| XWT_CSR0_EWDT1_MASK
),
64 xdev
->base
+ XWT_TWCSR0_OFFSET
);
66 iowrite32(XWT_CSRX_EWDT2_MASK
, xdev
->base
+ XWT_TWCSR1_OFFSET
);
68 spin_unlock(&xdev
->spinlock
);
73 static int xilinx_wdt_stop(struct watchdog_device
*wdd
)
75 u32 control_status_reg
;
76 struct xwdt_device
*xdev
= watchdog_get_drvdata(wdd
);
78 spin_lock(&xdev
->spinlock
);
80 control_status_reg
= ioread32(xdev
->base
+ XWT_TWCSR0_OFFSET
);
82 iowrite32((control_status_reg
& ~XWT_CSR0_EWDT1_MASK
),
83 xdev
->base
+ XWT_TWCSR0_OFFSET
);
85 iowrite32(0, xdev
->base
+ XWT_TWCSR1_OFFSET
);
87 spin_unlock(&xdev
->spinlock
);
88 pr_info("Stopped!\n");
93 static int xilinx_wdt_keepalive(struct watchdog_device
*wdd
)
95 u32 control_status_reg
;
96 struct xwdt_device
*xdev
= watchdog_get_drvdata(wdd
);
98 spin_lock(&xdev
->spinlock
);
100 control_status_reg
= ioread32(xdev
->base
+ XWT_TWCSR0_OFFSET
);
101 control_status_reg
|= (XWT_CSR0_WRS_MASK
| XWT_CSR0_WDS_MASK
);
102 iowrite32(control_status_reg
, xdev
->base
+ XWT_TWCSR0_OFFSET
);
104 spin_unlock(&xdev
->spinlock
);
109 static const struct watchdog_info xilinx_wdt_ident
= {
110 .options
= WDIOF_MAGICCLOSE
|
112 .firmware_version
= 1,
113 .identity
= WATCHDOG_NAME
,
116 static const struct watchdog_ops xilinx_wdt_ops
= {
117 .owner
= THIS_MODULE
,
118 .start
= xilinx_wdt_start
,
119 .stop
= xilinx_wdt_stop
,
120 .ping
= xilinx_wdt_keepalive
,
123 static u32
xwdt_selftest(struct xwdt_device
*xdev
)
129 spin_lock(&xdev
->spinlock
);
131 timer_value1
= ioread32(xdev
->base
+ XWT_TBR_OFFSET
);
132 timer_value2
= ioread32(xdev
->base
+ XWT_TBR_OFFSET
);
135 ((i
<= XWT_MAX_SELFTEST_LOOP_COUNT
) &&
136 (timer_value2
== timer_value1
)); i
++) {
137 timer_value2
= ioread32(xdev
->base
+ XWT_TBR_OFFSET
);
140 spin_unlock(&xdev
->spinlock
);
142 if (timer_value2
!= timer_value1
)
143 return ~XWT_TIMER_FAILED
;
145 return XWT_TIMER_FAILED
;
148 static int xwdt_probe(struct platform_device
*pdev
)
151 u32 pfreq
= 0, enable_once
= 0;
152 struct resource
*res
;
153 struct xwdt_device
*xdev
;
154 struct watchdog_device
*xilinx_wdt_wdd
;
156 xdev
= devm_kzalloc(&pdev
->dev
, sizeof(*xdev
), GFP_KERNEL
);
160 xilinx_wdt_wdd
= &xdev
->xilinx_wdt_wdd
;
161 xilinx_wdt_wdd
->info
= &xilinx_wdt_ident
;
162 xilinx_wdt_wdd
->ops
= &xilinx_wdt_ops
;
163 xilinx_wdt_wdd
->parent
= &pdev
->dev
;
165 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
166 xdev
->base
= devm_ioremap_resource(&pdev
->dev
, res
);
167 if (IS_ERR(xdev
->base
))
168 return PTR_ERR(xdev
->base
);
170 rc
= of_property_read_u32(pdev
->dev
.of_node
, "clock-frequency", &pfreq
);
173 "The watchdog clock frequency cannot be obtained\n");
175 rc
= of_property_read_u32(pdev
->dev
.of_node
, "xlnx,wdt-interval",
176 &xdev
->wdt_interval
);
179 "Parameter \"xlnx,wdt-interval\" not found\n");
181 rc
= of_property_read_u32(pdev
->dev
.of_node
, "xlnx,wdt-enable-once",
185 "Parameter \"xlnx,wdt-enable-once\" not found\n");
187 watchdog_set_nowayout(xilinx_wdt_wdd
, enable_once
);
190 * Twice of the 2^wdt_interval / freq because the first wdt overflow is
191 * ignored (interrupt), reset is only generated at second wdt overflow
193 if (pfreq
&& xdev
->wdt_interval
)
194 xilinx_wdt_wdd
->timeout
= 2 * ((1 << xdev
->wdt_interval
) /
197 spin_lock_init(&xdev
->spinlock
);
198 watchdog_set_drvdata(xilinx_wdt_wdd
, xdev
);
200 xdev
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
201 if (IS_ERR(xdev
->clk
)) {
202 if (PTR_ERR(xdev
->clk
) == -ENOENT
)
205 return PTR_ERR(xdev
->clk
);
208 rc
= clk_prepare_enable(xdev
->clk
);
210 dev_err(&pdev
->dev
, "unable to enable clock\n");
214 rc
= xwdt_selftest(xdev
);
215 if (rc
== XWT_TIMER_FAILED
) {
216 dev_err(&pdev
->dev
, "SelfTest routine error\n");
217 goto err_clk_disable
;
220 rc
= watchdog_register_device(xilinx_wdt_wdd
);
222 dev_err(&pdev
->dev
, "Cannot register watchdog (err=%d)\n", rc
);
223 goto err_clk_disable
;
226 dev_info(&pdev
->dev
, "Xilinx Watchdog Timer at %p with timeout %ds\n",
227 xdev
->base
, xilinx_wdt_wdd
->timeout
);
229 platform_set_drvdata(pdev
, xdev
);
233 clk_disable_unprepare(xdev
->clk
);
238 static int xwdt_remove(struct platform_device
*pdev
)
240 struct xwdt_device
*xdev
= platform_get_drvdata(pdev
);
242 watchdog_unregister_device(&xdev
->xilinx_wdt_wdd
);
243 clk_disable_unprepare(xdev
->clk
);
248 /* Match table for of_platform binding */
249 static const struct of_device_id xwdt_of_match
[] = {
250 { .compatible
= "xlnx,xps-timebase-wdt-1.00.a", },
251 { .compatible
= "xlnx,xps-timebase-wdt-1.01.a", },
254 MODULE_DEVICE_TABLE(of
, xwdt_of_match
);
256 static struct platform_driver xwdt_driver
= {
258 .remove
= xwdt_remove
,
260 .name
= WATCHDOG_NAME
,
261 .of_match_table
= xwdt_of_match
,
265 module_platform_driver(xwdt_driver
);
267 MODULE_AUTHOR("Alejandro Cabrera <aldaya@gmail.com>");
268 MODULE_DESCRIPTION("Xilinx Watchdog driver");
269 MODULE_LICENSE("GPL v2");